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Defined in 1 files as a prototype:

Defined in 1 files as a function:

Referenced in 3 files:

Smatch caller information:

drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn35/dcn35_hwseq.c dcn35_enable_plane() -> (struct opp_funcs)->opp_pipe_clock_control()

Type Parameter Key Value
PARAM_VALUE 0 opp 4096-ptr_max
PARAM_VALUE 0 opp->funcs 4096-ptr_max
PARAM_VALUE 1 enable 1
CONTAINER 0 *(-48-19256+0) $(-1)
NOCHECK_CALL

drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn35/dcn35_hwseq.c dcn35_update_odm() -> (struct opp_funcs)->opp_pipe_clock_control()

Type Parameter Key Value
PARAM_VALUE 0 opp 4096-ptr_max
PARAM_VALUE 0 opp->funcs 4096-ptr_max
PARAM_VALUE 1 enable 1
CONTAINER 0 *(-48-19256+0) $(-1)
NOCHECK_CALL

drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn10/dcn10_hwseq.c dcn10_enable_plane() -> (struct opp_funcs)->opp_pipe_clock_control()

Type Parameter Key Value
PARAM_VALUE 0 opp 4096-ptr_max
PARAM_VALUE 0 opp->funcs 4096-ptr_max
PARAM_VALUE 1 enable 1
CONTAINER 0 *(-48-19256+0) $(-1)
NOCHECK_CALL

drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn10/dcn10_hwseq.c dcn10_plane_atomic_disable() -> (struct opp_funcs)->opp_pipe_clock_control()

Type Parameter Key Value
PARAM_VALUE 0 opp 4096-ptr_max
PARAM_VALUE 0 opp->funcs 4096-ptr_max
PARAM_VALUE 0 opp->mpc_tree_params.opp_list 0
PARAM_VALUE 0 *opp->mpcc_disconnect_pending 0-1
PARAM_VALUE 1 enable 0
CONTAINER 0 *(-48-19256+0) $(-1)
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn20/dcn20_hwseq.c dcn20_enable_plane() -> (struct opp_funcs)->opp_pipe_clock_control()

Type Parameter Key Value
PARAM_VALUE 0 opp 4096-ptr_max
PARAM_VALUE 0 opp->funcs 4096-ptr_max
PARAM_VALUE 1 enable 1
CONTAINER 0 *(-48-19256+0) $(-1)
NOCHECK_CALL

drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn20/dcn20_hwseq.c dcn20_enable_stream_timing() -> (struct opp_funcs)->opp_pipe_clock_control()

Type Parameter Key Value
PARAM_VALUE 0 opp 4096-ptr_max
PARAM_VALUE 0 opp->funcs 4096-ptr_max
PARAM_VALUE 1 enable 1

drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn401/dcn401_hwseq.c dcn401_enable_stream_timing() -> (struct opp_funcs)->opp_pipe_clock_control()

Type Parameter Key Value
PARAM_VALUE 0 opp 4096-ptr_max
PARAM_VALUE 0 opp->funcs 4096-ptr_max
PARAM_VALUE 1 enable 1

drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn401/dcn401_hwseq.c dcn401_enable_stream_timing() -> (struct opp_funcs)->opp_pipe_clock_control()

Type Parameter Key Value
PARAM_VALUE 0 opp 4096-ptr_max
PARAM_VALUE 0 opp->funcs 4096-ptr_max
PARAM_VALUE 1 enable 1
CONTAINER 0 *(-48-19256+0) $(-1)
NOCHECK_CALL

drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn401/dcn401_hwseq.c dcn401_update_odm() -> (struct opp_funcs)->opp_pipe_clock_control()

Type Parameter Key Value
PARAM_VALUE 0 opp 4096-ptr_max
PARAM_VALUE 0 opp->funcs 4096-ptr_max
PARAM_VALUE 1 enable 1

drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn314/dcn314_hwseq.c dcn314_update_odm() -> (struct opp_funcs)->opp_pipe_clock_control()

Type Parameter Key Value
PARAM_VALUE 0 opp 4096-ptr_max
PARAM_VALUE 0 opp->funcs 4096-ptr_max
PARAM_VALUE 1 enable 1
CONTAINER 0 *(-48-19256+0) $(-1)
NOCHECK_CALL

drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc_hw_sequencer.c hwss_opp_pipe_clock_control() -> (struct opp_funcs)->opp_pipe_clock_control()

Type Parameter Key Value
PARAM_VALUE 0 opp 4096-ptr_max
PARAM_VALUE 0 opp->funcs 4096-ptr_max
PARAM_VALUE 0 opp->funcs->opp_pipe_clock_control 4299389466658000896
CONTAINER 0 -48-19256+0 $(-1)
NOCHECK_CALL

drivers/gpu/drm/amd/amdgpu/../display/dc/hwss/dcn32/dcn32_hwseq.c dcn32_update_odm() -> (struct opp_funcs)->opp_pipe_clock_control()

Type Parameter Key Value
PARAM_VALUE 0 opp 4096-ptr_max
PARAM_VALUE 0 opp->funcs 4096-ptr_max
PARAM_VALUE 1 enable 1
CONTAINER 0 *(-48-19256+0) $(-1)
NOCHECK_CALL