| PARAM_VALUE |
0 |
link->ctx->dc->current_state->bw_ctx.dml.vba.DPPCLKUsingSingleDPPChroma |
-inf-1.797693e+308 |
| PARAM_VALUE |
0 |
link->ctx->dc->current_state->bw_ctx.dml.vba.DPPCLKUsingSingleDPPLuma |
-inf-1.797693e+308 |
| PARAM_VALUE |
0 |
link->ctx->dc->dml.vba.DPPCLKUsingSingleDPPChroma |
-inf-1.797693e+308 |
| PARAM_VALUE |
0 |
link->ctx->dc->dml.vba.DPPCLKUsingSingleDPPLuma |
-inf-1.797693e+308 |
| PARAM_VALUE |
0 |
link->ctx->dc->res_pool->res_cap->num_dig_link_enc |
0,3,5 |
| PARAM_VALUE |
0 |
link->ctx->dc_bios->funcs->get_embedded_panel_info |
1-u64max |
| PARAM_VALUE |
0 |
link->link_enc->funcs->get_dig_frontend |
0,35576471446519808,300337660971397120 |
| PARAM_VALUE |
0 |
link->link_enc->funcs->is_dig_enabled |
0,835999835047198720,2505374968371208192,3400303375799660544,6908382666642669568 |
| PARAM_VALUE |
0 |
link->link_enc->funcs->is_in_alt_mode |
0,1151869135948771328,5834955858206629888,7400184177439789056,7861121898187128832 |
| PARAM_VALUE |
0 |
link->panel_cntl->funcs |
0,4096-ptr_max |
| PARAM_VALUE |
0 |
*link->dc->current_state->res_ctx.hpo_dp_link_enc_to_link_idx |
0-4294967295 |
| PARAM_VALUE |
0 |
*link->dpcd_caps.edp_supported_link_rates |
0-4294967295 |
| PARAM_VALUE |
2 |
data |
4096-ptr_max |
| BUF_SIZE |
0 |
link |
(-1),1576 |
| BUF_SIZE |
0 |
link |
(-1),1576 |
| BUF_SIZE |
0 |
link->priv |
(-1),9272 |
| CAPPED_DATA |
1 |
address |
1 |
| DATA_SOURCE |
0 |
link |
$0 |
| DATA_SOURCE |
1 |
address |
$1 |
| RX_PATH |
|
|
|
| TASK_NOT_RUNNING |
|
|
|
| HOST_DATA |
0 |
link->panel_cntl->stored_backlight_registers.BL_PWM_CNTL |
0-u32max |
| HOST_DATA |
0 |
link->panel_cntl->stored_backlight_registers.BL_PWM_CNTL2 |
0-u32max |
| HOST_DATA |
0 |
link->panel_cntl->stored_backlight_registers.BL_PWM_PERIOD_CNTL |
0-u32max |
| NO_OVERFLOW_SIMPLE |
0 |
link->ctx->dc->res_pool->pipe_count |
|
| UNITS |
3 |
size |
unit_byte |
| HALF_LOCKED2 |
|
&aconnector->hpd_lock |
|
| HALF_LOCKED2 |
|
&adev->dm.dc_lock |
|
