Defined in 1 files as a prototype:
Defined in 1 files as a function:
Referenced in 16 files:
- drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c, line 1155
- drivers/gpu/drm/amd/display/dc/hdcp/hdcp_msg.c, line 298
- drivers/gpu/drm/amd/display/dc/link/accessories/link_dp_cts.c
- drivers/gpu/drm/amd/display/dc/link/accessories/link_dp_trace.c, line 170
- drivers/gpu/drm/amd/display/dc/link/link_dpms.c
- drivers/gpu/drm/amd/display/dc/link/protocols/link_ddc.c, line 531
- drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c
- drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_dpia_bw.c
- drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_irq_handler.c
- drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_phy.c
- drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training.c
- drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_128b_132b.c, line 43
- drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_8b_10b.c, line 215
- drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_dpia.c
- drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_fixed_vs_pe_retimer.c
- drivers/gpu/drm/amd/display/dc/link/protocols/link_edp_panel_control.c
Smatch caller information:
drivers/gpu/drm/amd/amdgpu/../display/dc/link/protocols/link_dp_training_dpia.c dpcd_clear_lt_pattern() -> core_link_write_dpcd()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | link | 4096-ptr_max |
| PARAM_VALUE | 0 | link->aux_access_disabled | 0 |
| PARAM_VALUE | 0 | link->ctx | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ctx->logger | 4096-ptr_max |
| PARAM_VALUE | 0 | link->dc | 4096-ptr_max |
| PARAM_VALUE | 0 | link->dc->hwss.enable_dp_link_output | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_clock->id | s32min-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_clock->mode | s32min-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_clock->pin | 0-s64max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_data->id | s32min-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_data->mode | s32min-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_data->pin | 0-s64max |
| PARAM_VALUE | 0 | link->dp_trace.commit_lt_trace.counts.fail | 0-s32max |
| PARAM_VALUE | 0 | link->dp_trace.commit_lt_trace.result | 0-13 |
| PARAM_VALUE | 0 | link->dpcd_caps.lttpr_caps.mode | 85,170 |
| PARAM_VALUE | 0 | link->ep_type | 1 |
| PARAM_VALUE | 0 | link->ext_enc_id.id | 0 |
| PARAM_VALUE | 0 | link->panel_mode | 0-2 |
| PARAM_VALUE | 0 | link->phy_state.symclk_state | 1 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->list.prev->prev | 0,5159360019465732096 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->blocked_lock.owner | (-1) |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->blocked_lock.owner_cpu | 4294967295 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->blocked_on | (-1)-0 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->usage.refs.counter | s32min-s32max |
| PARAM_VALUE | 0 | *link->dpcd_caps.lttpr_caps.aux_rd_interval | 0-255 |
| PARAM_VALUE | 1 | address | 258,983056-983616 |
| PARAM_VALUE | 2 | *data | 0 |
| PARAM_VALUE | 3 | size | 1 |
| CAPPED_DATA | 1 | address | 1 |
| DATA_SOURCE | 0 | link | $0 |
| FUZZY_MAX | 1 | address | 258 |
| MEM_ZERO | 0 | &link->dp_trace.commit_lt_trace | |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| UNITS | 3 | size | unit_byte |
drivers/gpu/drm/amd/amdgpu/../display/dc/link/protocols/link_dp_training_dpia.c dpcd_set_lt_pattern() -> core_link_write_dpcd()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | link | 4096-ptr_max |
| PARAM_VALUE | 0 | link->aux_access_disabled | 0 |
| PARAM_VALUE | 0 | link->ctx | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ctx->logger | 4096-ptr_max |
| PARAM_VALUE | 0 | link->dc | 4096-ptr_max |
| PARAM_VALUE | 0 | link->dc->ctx->dce_version | (-1)-33 |
| PARAM_VALUE | 0 | link->dc->hwss.enable_dp_link_output | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_clock->id | 0-4 |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_clock->mode | (-1)-4 |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_clock->pin | 0-s64max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_data->id | 0-4 |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_data->mode | (-1)-4 |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_data->pin | 0-s64max |
| PARAM_VALUE | 0 | link->dp_trace.commit_lt_trace.counts.fail | 0-s32max |
| PARAM_VALUE | 0 | link->dp_trace.commit_lt_trace.result | 0-13 |
| PARAM_VALUE | 0 | link->dpcd_caps.lttpr_caps.mode | 85,170 |
| PARAM_VALUE | 0 | link->ep_type | 1 |
| PARAM_VALUE | 0 | link->link_enc->hpd_gpio->id | 0-1,3-4 |
| PARAM_VALUE | 0 | link->panel_mode | 0-2 |
| PARAM_VALUE | 0 | link->phy_state.symclk_state | 1 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->list.prev->prev | 0,5159360019465732096 |
| PARAM_VALUE | 0 | *link->dpcd_caps.lttpr_caps.aux_rd_interval | 0-255 |
| PARAM_VALUE | 1 | address | 258,983056-983616 |
| PARAM_VALUE | 2 | *data | 0 |
| PARAM_VALUE | 3 | size | 1 |
| CAPPED_DATA | 1 | address | 1 |
| DATA_SOURCE | 0 | link | $0 |
| FUZZY_MAX | 1 | address | 258 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| UNITS | 3 | size | unit_byte |
drivers/gpu/drm/amd/amdgpu/../display/dc/link/protocols/link_dp_training_dpia.c dpia_training_abort() -> core_link_write_dpcd()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | link | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ctx->dc->dml.soc.dram_clock_change_latency_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.soc.sr_enter_plus_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.soc.sr_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.AverageDCCCompressionRate | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.AverageReadBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.AverageReadBandwidthGBytePerSecond | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DCFCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DISPCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DISPCLKDPPCLKDSCCLKDownSpreading | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DISPCLKDPPCLKVCOSpeed | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DISPCLKRampingMargin | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DISPCLKWithRampingRoundedToDFSGranularity | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DISPCLKWithoutRampingRoundedToDFSGranularity | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DISPCLK_calculated | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DPPCLKUsingSingleDPPChroma | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DPPCLKUsingSingleDPPLuma | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DRAMChannelWidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DRAMClockChangeLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DRAMClockChangeWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DRAMSpeed | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.Downspreading | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.FCLKChangeLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.FabricAndDRAMBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.FabricClock | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.FabricDatapathToDCNDataReturn | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.FinalDRAMClockChangeLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.FrameTimeForMinFullDETBufferingTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.GlobalDPPCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.LinesToFinishSwathTransferStutterCriticalPlane | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.MaxDispclkRoundedToDFSGranularity | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.MaxHSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.MaxVRatioPre | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.MaxVSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.MinActiveDRAMClockChangeLatencySupported | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.MinActiveFCLKChangeLatencySupported | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.MinUrgentLatencySupportUs | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.NonUrgentLatencyTolerance | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.PercentOfIdealDRAMBWReceivedAfterUrgLatencyPixelDataOnly | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.PercentOfIdealDRAMBWReceivedAfterUrgLatencySTROBE | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.PercentOfIdealDRAMBWReceivedAfterUrgLatencyVMDataOnly | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.PercentOfIdealFabricAndSDPPortBWReceivedAfterUrgLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.ReturnBandwidthToDCN | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.SMNLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.SOCCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.SREnterPlusExitTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.SREnterPlusExitZ8Time | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.SRExitTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.SRExitZ8Time | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.SmallestVBlank | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.StutterEfficiency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.StutterEfficiencyNotIncludingVBlank | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.StutterEnterPlusExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.StutterPeriod | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.SwathWidthYCriticalPlane | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.TCalc | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.TFinalxFill | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.TotalDataReadBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.TotalRowReadBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.TslvChk | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.USRRetrainingLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentExtraLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentLatencyAdjustmentFabricClockComponent | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentLatencyAdjustmentFabricClockReference | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentLatencyPixelDataOnly | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentLatencyPixelMixedWithVMData | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentLatencyVMDataOnly | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentRoundTripAndOutOfOrderLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.VBlankTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.VStartupMargin | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.WritebackDRAMClockChangeWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.WritebackLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.WritebackMaxHSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.WritebackMaxVSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.WritebackMinHSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.WritebackMinVSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.WritebackUrgentWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.XFCBusTransportTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.XFCFillBWOverhead | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.XFCRemoteSurfaceFlipDelay | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.XFCTSlvVreadyOffset | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.XFCTSlvVupdateOffset | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.XFCTSlvVupdateWidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.XFCXBUFLatencyTolerance | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.Z8StutterEfficiency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.Z8StutterEfficiencyBestCase | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.Z8StutterEfficiencyNotIncludingVBlank | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.Z8StutterEfficiencyNotIncludingVBlankBestCase | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.Z8StutterEnterPlusExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.Z8StutterExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.soc.dram_clock_change_latency_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.soc.sr_enter_plus_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.soc.sr_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.total_dcn_read_bw_with_flip_no_urgent_burst | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->dc->hwss.enable_dp_link_output | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_clock->id | s32min-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_clock->mode | s32min-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_clock->pin | 0-s64max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_data->id | s32min-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_data->mode | s32min-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_data->pin | 0-s64max |
| PARAM_VALUE | 0 | link->dpcd_caps.lttpr_caps.mode | 85,170 |
| PARAM_VALUE | 0 | link->ep_type | 1 |
| PARAM_VALUE | 0 | link->is_hpd_pending | 0 |
| PARAM_VALUE | 0 | link->phy_state.symclk_state | 1 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->blocked_lock.owner | (-1) |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->blocked_lock.owner_cpu | 4294967295 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->blocked_on | (-1)-0 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->usage.refs.counter | s32min-s32max |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.osq.tail.counter | s32min-s32max |
| PARAM_VALUE | 0 | *link->ctx->dc->scratch.pipes_to_unlock_first | 0-1 |
| PARAM_VALUE | 0 | *link->dpcd_caps.edp_supported_link_rates | 0-4294967295 |
| PARAM_VALUE | 0 | *link->dpcd_caps.lttpr_caps.aux_rd_interval | 0-255 |
| PARAM_VALUE | 1 | address | 258,983056-983616 |
| PARAM_VALUE | 2 | data | 6228408606422671360 |
| PARAM_VALUE | 2 | *data | 0 |
| PARAM_VALUE | 3 | size | 1 |
| CAPPED_DATA | 0 | link | 1 |
| CAPPED_DATA | 1 | address | 1 |
| DATA_SOURCE | 0 | link | $0 |
| FUZZY_MAX | 1 | address | 258 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL |
drivers/gpu/drm/amd/amdgpu/../display/dc/link/protocols/link_dp_training_dpia.c dpia_training_abort() -> core_link_write_dpcd()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | link | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ctx->dc->dml.soc.dram_clock_change_latency_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.soc.sr_enter_plus_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.soc.sr_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.AverageDCCCompressionRate | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.AverageReadBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.AverageReadBandwidthGBytePerSecond | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DCFCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DISPCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DISPCLKDPPCLKDSCCLKDownSpreading | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DISPCLKDPPCLKVCOSpeed | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DISPCLKRampingMargin | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DISPCLKWithRampingRoundedToDFSGranularity | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DISPCLKWithoutRampingRoundedToDFSGranularity | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DISPCLK_calculated | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DPPCLKUsingSingleDPPChroma | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DPPCLKUsingSingleDPPLuma | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DRAMChannelWidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DRAMClockChangeLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DRAMClockChangeWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DRAMSpeed | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.Downspreading | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.FCLKChangeLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.FabricAndDRAMBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.FabricClock | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.FabricDatapathToDCNDataReturn | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.FinalDRAMClockChangeLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.FrameTimeForMinFullDETBufferingTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.GlobalDPPCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.LinesToFinishSwathTransferStutterCriticalPlane | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.MaxDispclkRoundedToDFSGranularity | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.MaxHSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.MaxVRatioPre | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.MaxVSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.MinActiveDRAMClockChangeLatencySupported | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.MinActiveFCLKChangeLatencySupported | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.MinUrgentLatencySupportUs | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.NonUrgentLatencyTolerance | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.PercentOfIdealDRAMBWReceivedAfterUrgLatencyPixelDataOnly | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.PercentOfIdealDRAMBWReceivedAfterUrgLatencySTROBE | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.PercentOfIdealDRAMBWReceivedAfterUrgLatencyVMDataOnly | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.PercentOfIdealFabricAndSDPPortBWReceivedAfterUrgLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.ReturnBandwidthToDCN | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.SMNLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.SOCCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.SREnterPlusExitTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.SREnterPlusExitZ8Time | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.SRExitTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.SRExitZ8Time | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.SmallestVBlank | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.StutterEfficiency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.StutterEfficiencyNotIncludingVBlank | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.StutterEnterPlusExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.StutterPeriod | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.SwathWidthYCriticalPlane | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.TCalc | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.TFinalxFill | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.TotalDataReadBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.TotalRowReadBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.TslvChk | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.USRRetrainingLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentExtraLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentLatencyAdjustmentFabricClockComponent | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentLatencyAdjustmentFabricClockReference | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentLatencyPixelDataOnly | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentLatencyPixelMixedWithVMData | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentLatencyVMDataOnly | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentRoundTripAndOutOfOrderLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.VBlankTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.VStartupMargin | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.WritebackDRAMClockChangeWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.WritebackLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.WritebackMaxHSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.WritebackMaxVSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.WritebackMinHSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.WritebackMinVSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.WritebackUrgentWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.XFCBusTransportTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.XFCFillBWOverhead | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.XFCRemoteSurfaceFlipDelay | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.XFCTSlvVreadyOffset | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.XFCTSlvVupdateOffset | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.XFCTSlvVupdateWidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.XFCXBUFLatencyTolerance | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.Z8StutterEfficiency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.Z8StutterEfficiencyBestCase | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.Z8StutterEfficiencyNotIncludingVBlank | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.Z8StutterEfficiencyNotIncludingVBlankBestCase | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.Z8StutterEnterPlusExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.Z8StutterExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.soc.dram_clock_change_latency_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.soc.sr_enter_plus_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.soc.sr_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.total_dcn_read_bw_with_flip_no_urgent_burst | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->dc->hwss.enable_dp_link_output | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_clock->id | s32min-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_clock->mode | s32min-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_clock->pin | 0-s64max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_data->id | s32min-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_data->mode | s32min-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_data->pin | 0-s64max |
| PARAM_VALUE | 0 | link->dpcd_caps.lttpr_caps.mode | 85,170 |
| PARAM_VALUE | 0 | link->ep_type | 1 |
| PARAM_VALUE | 0 | link->is_hpd_pending | 0 |
| PARAM_VALUE | 0 | link->phy_state.symclk_state | 1 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->blocked_lock.owner | (-1) |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->blocked_lock.owner_cpu | 4294967295 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->blocked_on | (-1)-0 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->usage.refs.counter | s32min-s32max |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.osq.tail.counter | s32min-s32max |
| PARAM_VALUE | 0 | *link->ctx->dc->scratch.pipes_to_unlock_first | 0-1 |
| PARAM_VALUE | 0 | *link->dpcd_caps.edp_supported_link_rates | 0-4294967295 |
| PARAM_VALUE | 0 | *link->dpcd_caps.lttpr_caps.aux_rd_interval | 0-255 |
| PARAM_VALUE | 1 | address | 256 |
| PARAM_VALUE | 2 | data | 6228408606422671360 |
| PARAM_VALUE | 2 | *data | 0 |
| PARAM_VALUE | 3 | size | 1 |
| CAPPED_DATA | 0 | link | 1 |
| DATA_SOURCE | 0 | link | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL |
drivers/gpu/drm/amd/amdgpu/../display/dc/link/protocols/link_dp_training_dpia.c dpia_training_abort() -> core_link_write_dpcd()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | link | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ctx->dc->dml.soc.dram_clock_change_latency_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.soc.sr_enter_plus_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.soc.sr_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.AverageDCCCompressionRate | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.AverageReadBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.AverageReadBandwidthGBytePerSecond | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DCFCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DISPCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DISPCLKDPPCLKDSCCLKDownSpreading | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DISPCLKDPPCLKVCOSpeed | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DISPCLKRampingMargin | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DISPCLKWithRampingRoundedToDFSGranularity | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DISPCLKWithoutRampingRoundedToDFSGranularity | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DISPCLK_calculated | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DPPCLKUsingSingleDPPChroma | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DPPCLKUsingSingleDPPLuma | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DRAMChannelWidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DRAMClockChangeLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DRAMClockChangeWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DRAMSpeed | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.Downspreading | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.FCLKChangeLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.FabricAndDRAMBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.FabricClock | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.FabricDatapathToDCNDataReturn | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.FinalDRAMClockChangeLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.FrameTimeForMinFullDETBufferingTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.GlobalDPPCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.LinesToFinishSwathTransferStutterCriticalPlane | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.MaxDispclkRoundedToDFSGranularity | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.MaxHSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.MaxVRatioPre | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.MaxVSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.MinActiveDRAMClockChangeLatencySupported | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.MinActiveFCLKChangeLatencySupported | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.MinUrgentLatencySupportUs | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.NonUrgentLatencyTolerance | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.PercentOfIdealDRAMBWReceivedAfterUrgLatencyPixelDataOnly | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.PercentOfIdealDRAMBWReceivedAfterUrgLatencySTROBE | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.PercentOfIdealDRAMBWReceivedAfterUrgLatencyVMDataOnly | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.PercentOfIdealFabricAndSDPPortBWReceivedAfterUrgLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.ReturnBandwidthToDCN | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.SMNLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.SOCCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.SREnterPlusExitTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.SREnterPlusExitZ8Time | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.SRExitTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.SRExitZ8Time | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.SmallestVBlank | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.StutterEfficiency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.StutterEfficiencyNotIncludingVBlank | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.StutterEnterPlusExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.StutterPeriod | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.SwathWidthYCriticalPlane | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.TCalc | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.TFinalxFill | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.TotalDataReadBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.TotalRowReadBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.TslvChk | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.USRRetrainingLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentExtraLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentLatencyAdjustmentFabricClockComponent | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentLatencyAdjustmentFabricClockReference | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentLatencyPixelDataOnly | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentLatencyPixelMixedWithVMData | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentLatencyVMDataOnly | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentRoundTripAndOutOfOrderLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.VBlankTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.VStartupMargin | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.WritebackDRAMClockChangeWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.WritebackLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.WritebackMaxHSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.WritebackMaxVSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.WritebackMinHSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.WritebackMinVSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.WritebackUrgentWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.XFCBusTransportTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.XFCFillBWOverhead | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.XFCRemoteSurfaceFlipDelay | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.XFCTSlvVreadyOffset | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.XFCTSlvVupdateOffset | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.XFCTSlvVupdateWidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.XFCXBUFLatencyTolerance | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.Z8StutterEfficiency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.Z8StutterEfficiencyBestCase | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.Z8StutterEfficiencyNotIncludingVBlank | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.Z8StutterEfficiencyNotIncludingVBlankBestCase | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.Z8StutterEnterPlusExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.Z8StutterExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.soc.dram_clock_change_latency_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.soc.sr_enter_plus_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.soc.sr_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.total_dcn_read_bw_with_flip_no_urgent_burst | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->dc->hwss.enable_dp_link_output | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_clock->id | s32min-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_clock->mode | s32min-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_clock->pin | 0-s64max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_data->id | s32min-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_data->mode | s32min-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_data->pin | 0-s64max |
| PARAM_VALUE | 0 | link->dpcd_caps.lttpr_caps.mode | 85,170 |
| PARAM_VALUE | 0 | link->ep_type | 1 |
| PARAM_VALUE | 0 | link->is_hpd_pending | 0 |
| PARAM_VALUE | 0 | link->phy_state.symclk_state | 1 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->blocked_lock.owner | (-1) |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->blocked_lock.owner_cpu | 4294967295 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->blocked_on | (-1)-0 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->usage.refs.counter | s32min-s32max |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.osq.tail.counter | s32min-s32max |
| PARAM_VALUE | 0 | *link->ctx->dc->scratch.pipes_to_unlock_first | 0-1 |
| PARAM_VALUE | 0 | *link->dpcd_caps.edp_supported_link_rates | 0-4294967295 |
| PARAM_VALUE | 0 | *link->dpcd_caps.lttpr_caps.aux_rd_interval | 0-255 |
| PARAM_VALUE | 1 | address | 257 |
| PARAM_VALUE | 2 | data | 6228408606422671360 |
| PARAM_VALUE | 2 | *data | 0 |
| PARAM_VALUE | 3 | size | 1 |
| CAPPED_DATA | 0 | link | 1 |
| DATA_SOURCE | 0 | link | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL |
drivers/gpu/drm/amd/amdgpu/../display/dc/link/accessories/link_dp_trace.c dp_trace_source_sequence() -> core_link_write_dpcd()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | link | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DPPCLKUsingSingleDPPChroma | -inf-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DPPCLKUsingSingleDPPLuma | -inf-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DPPCLKUsingSingleDPPChroma | -inf-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DPPCLKUsingSingleDPPLuma | -inf-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->res_pool->res_cap->num_dig_link_enc | 0,3,5 |
| PARAM_VALUE | 0 | link->ctx->dc_bios->funcs->get_embedded_panel_info | 1-u64max |
| PARAM_VALUE | 0 | link->dc | 4096-ptr_max |
| PARAM_VALUE | 0 | link->dc->debug.enable_driver_sequence_debug | 1 |
| PARAM_VALUE | 0 | link->link_enc->funcs->get_dig_frontend | 0,35576471446519808,300337660971397120 |
| PARAM_VALUE | 0 | link->link_enc->funcs->is_in_alt_mode | 0,1151869135948771328,5834955858206629888,7400184177439789056,7861121898187128832 |
| PARAM_VALUE | 0 | link->panel_cntl->funcs | 0,4096-ptr_max |
| PARAM_VALUE | 0 | *link->dc->current_state->res_ctx.hpo_dp_link_enc_to_link_idx | 0-4294967295 |
| PARAM_VALUE | 0 | *link->dpcd_caps.edp_supported_link_rates | 0-4294967295 |
| PARAM_VALUE | 1 | address | 780 |
| PARAM_VALUE | 2 | *data | 0-13 |
| PARAM_VALUE | 3 | size | 1 |
| DATA_SOURCE | 0 | link | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| HOST_DATA | 0 | link->panel_cntl->stored_backlight_registers.BL_PWM_CNTL | 0-u32max |
| HOST_DATA | 0 | link->panel_cntl->stored_backlight_registers.BL_PWM_CNTL2 | 0-u32max |
| HOST_DATA | 0 | link->panel_cntl->stored_backlight_registers.BL_PWM_PERIOD_CNTL | 0-u32max |
| NO_OVERFLOW_SIMPLE | 0 | link->ctx->dc->res_pool->pipe_count | |
| UNITS | 3 | size | unit_byte |
drivers/gpu/drm/amd/amdgpu/../display/dc/link/protocols/link_dp_capability.c dp_verify_link_cap() -> core_link_write_dpcd()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | link | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.dcn_downspread_percent | -9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.downspread_percent | -9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.BandwidthAvailableForImmediateFlip | -9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DCFCLKDeepSleep | -9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLKWithRamping | -9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLKWithoutRamping | -9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FractionOfUrgentBandwidth | -9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.LastPixelOfLineExtraWatermark | -9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.PartOfBurstThatFitsInROB | -9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.ReturnBW | -9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.StutterBurstTime | -9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.StutterExitWatermark | -9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Watermark.DRAMClockChangeWatermark | -9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Watermark.FCLKChangeWatermark | -9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Watermark.StutterExitWatermark | -9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Watermark.USRRetrainingWatermark | -9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Watermark.UrgentWatermark | -9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Watermark.WritebackUrgentWatermark | -9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Watermark.Z8StutterExitWatermark | -9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackDISPCLK | -9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.soc.dcn_downspread_percent | -9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.soc.downspread_percent | -9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.total_dcn_read_bw_with_flip | -9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_dlg_sys_param.mem_trip_us | -9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_dlg_sys_param.t_extra_us | -9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_dlg_sys_param.t_mclk_wm_us | -9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_dlg_sys_param.t_sr_wm_us | -9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_dlg_sys_param.t_urg_wm_us | -9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_dlg_sys_param.total_flip_bw | -9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_input.clks_cfg.dcfclk_mhz | -9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_input.clks_cfg.dispclk_mhz | -9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_input.clks_cfg.dppclk_mhz | -9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_input.clks_cfg.refclk_mhz | -9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_input.clks_cfg.socclk_mhz | -9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_input.dout.output_bpp | -9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_input.dout.wb.wb_hratio | -9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_input.dout.wb.wb_vratio | -9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_input.pipe.dest.pixel_rate_mhz | -9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.pipe_dlg_param.pixel_rate_mhz | -9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.ip.dcfclk_cstate_latency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.ip.dispclk_ramp_margin_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.ip.dsc_delay_factor_wa | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.ip.max_hscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.ip.max_vscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.ip.min_prefetch_in_strobe_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.ip.underscan_factor | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.ip.writeback_max_hscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.ip.writeback_max_vscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.ip.writeback_min_hscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.ip.writeback_min_vscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.ip.xfc_fill_bw_overhead_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.soc.dcn_downspread_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.soc.dfs_vco_period_ps | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.soc.dispclk_dppclk_vco_speed_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.soc.downspread_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.soc.dram_channel_width_bytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.soc.dram_clock_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.soc.dram_page_open_time_ns | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.soc.dram_return_buffer_per_channel_bytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.soc.dram_rw_turnaround_time_ns | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.soc.dummy_pstate_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.soc.fabric_datapath_to_dcn_data_return_bytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.soc.fclk_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.soc.ideal_dram_bw_after_urgent_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.soc.mall_allocated_for_dcn_mbytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.soc.max_avg_dram_bw_use_normal_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.soc.max_avg_dram_bw_use_normal_strobe_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.soc.max_avg_fabric_bw_use_normal_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.soc.max_avg_sdp_bw_use_normal_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.soc.max_vratio_pre | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.soc.min_dcfclk | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.soc.pct_ideal_dram_bw_after_urgent_strobe | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.soc.pct_ideal_dram_sdp_bw_after_urgent_pixel_and_vm | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.soc.pct_ideal_dram_sdp_bw_after_urgent_pixel_only | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.soc.pct_ideal_dram_sdp_bw_after_urgent_vm_only | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.soc.pct_ideal_fabric_bw_after_urgent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.soc.pct_ideal_sdp_bw_after_urgent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.soc.smn_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.soc.sr_enter_plus_exit_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.soc.sr_enter_plus_exit_z8_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.soc.sr_exit_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.soc.sr_exit_z8_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.soc.urgent_latency_adjustment_fabric_clock_component_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.soc.urgent_latency_adjustment_fabric_clock_reference_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.soc.urgent_latency_pixel_data_only_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.soc.urgent_latency_pixel_mixed_with_vm_data_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.soc.urgent_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.soc.urgent_latency_vm_data_only_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.soc.usr_retraining_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.soc.writeback_dram_clock_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.soc.writeback_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.soc.xfc_bus_transport_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.soc.xfc_xbuf_latency_tolerance_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.AverageDCCCompressionRate | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.AverageReadBandwidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.AverageReadBandwidthGBytePerSecond | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.BPP | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.BandwidthAvailableForImmediateFlip | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.CriticalPoint | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.CursorBufferSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.CursorChunkSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DCFCLK | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DCFCLKDeepSleep | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DETBufferSizeInTime | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DISPCLK | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DISPCLKDPPCLKDSCCLKDownSpreading | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DISPCLKDPPCLKVCOSpeed | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DISPCLKDelaySubtotal | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DISPCLKRampingMargin | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DISPCLKWithRamping | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DISPCLKWithRampingRoundedToDFSGranularity | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DISPCLKWithoutRamping | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DISPCLKWithoutRampingRoundedToDFSGranularity | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DISPCLK_calculated | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DPPCLKDelayCNVCCursor | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DPPCLKDelayCNVCFormater | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DPPCLKDelaySCL | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DPPCLKDelaySCLLBOnly | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DPPCLKDelaySubtotal | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DPPCLKUsingSingleDPPChroma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DPPCLKUsingSingleDPPLuma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DRAMChannelWidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DRAMClockChangeLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DRAMClockChangeLatencyOverride | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DRAMClockChangeWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DRAMSpeed | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.Downspreading | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.EffectiveDETLBLinesChroma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.EffectiveDETLBLinesLuma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.EffectiveDETPlusLBLinesChroma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.EffectiveDETPlusLBLinesLuma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.EffectiveFECOverhead | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.ExtraLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.FCLKChangeLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.FECOverhead | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.FabricAndDRAMBandwidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.FabricClock | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.FabricDatapathToDCNDataReturn | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.FinalDRAMClockChangeLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.FinalFillLevel | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.FinalFillMargin | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.FractionOfUrgentBandwidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.FractionOfUrgentBandwidthImmediateFlip | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.FrameTimeForMinFullDETBufferingTime | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.GPUVMMinPageSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.GlobalDPPCLK | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.HostVMMinPageSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.InitFillLevel | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.LastPixelOfLineExtraWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.LinesInDETChroma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.LinesInDETLuma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.LinesToFinishSwathTransferStutterCriticalPlane | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.MaxDCHUBToPSCLThroughput | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.MaxDispclkRoundedDownToDFSGranularity | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.MaxDispclkRoundedToDFSGranularity | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.MaxDppclkRoundedDownToDFSGranularity | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.MaxHSCLRatio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.MaxPSCLToLBThroughput | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.MaxTotalVActiveRDBandwidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.MaxVRatioPre | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.MaxVSCLRatio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.MaxVStartup | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.MaximumReadBandwidthWithPrefetch | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.MaximumReadBandwidthWithoutPrefetch | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.MaximumSwathWidthInDETBuffer | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.MaximumSwathWidthInLineBuffer | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.MaximumSwathWidthInLineBufferChroma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.MaximumSwathWidthInLineBufferLuma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.MaximumSwathWidthSupport | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.MinActiveDRAMClockChangeLatencySupported | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.MinActiveDRAMClockChangeMargin | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.MinActiveFCLKChangeLatencySupported | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.MinFullDETBufferingTime | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.MinPixelChunkSizeBytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.MinUrgentLatencySupportUs | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.NextMaxVStartup | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.NonUrgentLatencyTolerance | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.NumberOfChannels | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.Outbpp | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.PDEAndMetaPTEBytesPerFrameC | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.PDEAndMetaPTEBytesPerFrameY | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.PTEGroupSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.PartOfBurstThatFitsInROB | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.PercentOfIdealDRAMBWReceivedAfterUrgLatencyPixelDataOnly | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.PercentOfIdealDRAMBWReceivedAfterUrgLatencySTROBE | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.PercentOfIdealDRAMBWReceivedAfterUrgLatencyVMDataOnly | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.PercentOfIdealFabricAndSDPPortBWReceivedAfterUrgLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.PlaneRequiredDISPCLK | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.PlaneRequiredDISPCLKWithODMCombine | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.PlaneRequiredDISPCLKWithODMCombine2To1 | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.PlaneRequiredDISPCLKWithODMCombine4To1 | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.PlaneRequiredDISPCLKWithoutODMCombine | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.RemainingFillLevel | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.ReturnBW | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.ReturnBWToDCNPerState | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.ReturnBandwidthToDCN | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.ReturnBusWidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.RoundTripPingLatencyCycles | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.RoundedUpMaxSwathSizeBytesC | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.RoundedUpMaxSwathSizeBytesY | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.SMNLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.SOCCLK | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.SREnterPlusExitTime | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.SREnterPlusExitZ8Time | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.SRExitTime | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.SRExitZ8Time | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.SmallestVBlank | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.SrcActiveDrainRate | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.StutterBurstTime | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.StutterEfficiency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.StutterEfficiencyNotIncludingVBlank | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.StutterEnterPlusExitWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.StutterExitWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.StutterPeriod | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.StutterPeriodBestCase | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.SurfaceRequiredDISPCLK | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.SurfaceRequiredDISPCLKWithoutODMCombine | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.SwathWidthGranularityC | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.SwathWidthGranularityY | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.SwathWidthYCriticalPlane | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.TCalc | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.TFinalxFill | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.TInitXFill | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.TWait | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.TimeCalc | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.TotalBandwidthConsumedGBytePerSecond | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.TotalDSCUnitsRequired | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.TotalDataReadBandwidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.TotalNumberOfActiveOTG | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.TotalRowReadBandwidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.TslvChk | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.USRRetrainingLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentExtraLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentLatencyAdjustmentFabricClockComponent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentLatencyAdjustmentFabricClockReference | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentLatencyPixelDataOnly | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentLatencyPixelMixedWithVMData | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentLatencySupportUsChroma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentLatencySupportUsLuma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentLatencyVMDataOnly | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentOutOfOrderReturnPerChannel | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentOutOfOrderReturnPerChannelPixelDataOnly | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentOutOfOrderReturnPerChannelPixelMixedWithVMData | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentOutOfOrderReturnPerChannelVMDataOnly | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentRoundTripAndOutOfOrderLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.VBlankTime | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.VStartupMargin | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.Watermark.DRAMClockChangeWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.Watermark.FCLKChangeWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.Watermark.StutterEnterPlusExitWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.Watermark.StutterExitWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.Watermark.USRRetrainingWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.Watermark.UrgentWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.Watermark.WritebackDRAMClockChangeWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.Watermark.WritebackFCLKChangeWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.Watermark.WritebackUrgentWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.Watermark.Z8StutterEnterPlusExitWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.Watermark.Z8StutterExitWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.WritebackChromaVExtra | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.WritebackDISPCLK | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.WritebackDRAMClockChangeWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.WritebackInterfaceBufferSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.WritebackLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.WritebackLineBufferChromaBufferSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.WritebackLineBufferLumaBufferSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.WritebackLineBufferSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.WritebackLumaVExtra | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.WritebackMaxHSCLRatio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.WritebackMaxHSCLTaps | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.WritebackMaxVSCLRatio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.WritebackMaxVSCLTaps | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.WritebackMinHSCLRatio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.WritebackMinVSCLRatio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.WritebackRequiredDISPCLK | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.WritebackUrgentWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.XFCBusTransportTime | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.XFCFillBWOverhead | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.XFCFillConstant | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.XFCRemoteSurfaceFlipDelay | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.XFCSlvChunkSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.XFCTSlvVreadyOffset | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.XFCTSlvVupdateOffset | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.XFCTSlvVupdateWidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.XFCXBUFLatencyTolerance | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.Z8StutterEfficiency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.Z8StutterEfficiencyBestCase | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.Z8StutterEfficiencyNotIncludingVBlank | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.Z8StutterEfficiencyNotIncludingVBlankBestCase | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.Z8StutterEnterPlusExitWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.Z8StutterExitWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.bpp | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.dst_x_after_scaler | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.dst_y_after_scaler | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.dummy5 | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.dummy6 | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.ip.dcfclk_cstate_latency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.ip.dispclk_ramp_margin_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.ip.dsc_delay_factor_wa | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.ip.max_hscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.ip.max_vscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.ip.min_prefetch_in_strobe_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.ip.underscan_factor | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.ip.writeback_max_hscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.ip.writeback_max_vscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.ip.writeback_min_hscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.ip.writeback_min_vscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.ip.xfc_fill_bw_overhead_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.soc.dcn_downspread_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.soc.dfs_vco_period_ps | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.soc.dispclk_dppclk_vco_speed_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.soc.downspread_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.soc.dram_channel_width_bytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.soc.dram_clock_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.soc.dram_page_open_time_ns | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.soc.dram_return_buffer_per_channel_bytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.soc.dram_rw_turnaround_time_ns | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.soc.dummy_pstate_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.soc.fabric_datapath_to_dcn_data_return_bytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.soc.fclk_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.soc.ideal_dram_bw_after_urgent_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.soc.mall_allocated_for_dcn_mbytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.soc.max_avg_dram_bw_use_normal_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.soc.max_avg_dram_bw_use_normal_strobe_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.soc.max_avg_fabric_bw_use_normal_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.soc.max_avg_sdp_bw_use_normal_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.soc.max_vratio_pre | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.soc.min_dcfclk | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.soc.pct_ideal_dram_bw_after_urgent_strobe | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.soc.pct_ideal_dram_sdp_bw_after_urgent_pixel_and_vm | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.soc.pct_ideal_dram_sdp_bw_after_urgent_pixel_only | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.soc.pct_ideal_dram_sdp_bw_after_urgent_vm_only | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.soc.pct_ideal_fabric_bw_after_urgent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.soc.pct_ideal_sdp_bw_after_urgent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.soc.smn_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.soc.sr_enter_plus_exit_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.soc.sr_enter_plus_exit_z8_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.soc.sr_exit_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.soc.sr_exit_z8_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.soc.urgent_latency_adjustment_fabric_clock_component_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.soc.urgent_latency_adjustment_fabric_clock_reference_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.soc.urgent_latency_pixel_data_only_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.soc.urgent_latency_pixel_mixed_with_vm_data_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.soc.urgent_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.soc.urgent_latency_vm_data_only_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.soc.usr_retraining_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.soc.writeback_dram_clock_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.soc.writeback_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.soc.xfc_bus_transport_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.soc.xfc_xbuf_latency_tolerance_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.total_dcn_read_bw_with_flip | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.total_dcn_read_bw_with_flip_no_urgent_burst | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml2_dc_power_options.bbox_overrides.dchub_refclk_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml2_dc_power_options.bbox_overrides.disp_pll_vco_speed_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml2_dc_power_options.bbox_overrides.dprefclk_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml2_dc_power_options.bbox_overrides.dram_clock_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml2_dc_power_options.bbox_overrides.fclk_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml2_dc_power_options.bbox_overrides.sr_enter_plus_exit_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml2_dc_power_options.bbox_overrides.sr_enter_plus_exit_z8_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml2_dc_power_options.bbox_overrides.sr_exit_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml2_dc_power_options.bbox_overrides.sr_exit_z8_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml2_dc_power_options.bbox_overrides.urgent_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml2_dc_power_options.bbox_overrides.xtalclk_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml2_options.bbox_overrides.dchub_refclk_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml2_options.bbox_overrides.disp_pll_vco_speed_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml2_options.bbox_overrides.dprefclk_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml2_options.bbox_overrides.dram_clock_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml2_options.bbox_overrides.fclk_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml2_options.bbox_overrides.sr_enter_plus_exit_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml2_options.bbox_overrides.sr_enter_plus_exit_z8_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml2_options.bbox_overrides.sr_exit_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml2_options.bbox_overrides.sr_exit_z8_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml2_options.bbox_overrides.urgent_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->dml2_options.bbox_overrides.xtalclk_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->scratch.current_state.stream_state.ctx | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ctx->dc_bios->golden_table.dc_golden_table_ver | 0-1 |
| PARAM_VALUE | 0 | link->dc | 4096-ptr_max |
| PARAM_VALUE | 0 | link->dc->current_state | 4096-ptr_max |
| PARAM_VALUE | 0 | link->dc->link_srv | 4096-ptr_max |
| PARAM_VALUE | 0 | link->dc->res_pool | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_clock->pin | 0-9223372036854775807 |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_data->pin | 0-9223372036854775807 |
| PARAM_VALUE | 0 | link->dpcd_caps.lttpr_caps.max_ext_timeout | 1-255 |
| PARAM_VALUE | 0 | link->dpcd_caps.lttpr_caps.max_lane_count | 1-4 |
| PARAM_VALUE | 0 | link->dpcd_caps.lttpr_caps.phy_repeater_cnt | 1-2,4,8,16,32,64,128 |
| PARAM_VALUE | 0 | link->local_sink->edid_caps.max_frl_rate | 0-6 |
| PARAM_VALUE | 0 | link->local_sink->sink_signal | 32,64 |
| PARAM_VALUE | 0 | link->verified_link_cap.lane_count | 0 |
| PARAM_VALUE | 0 | link->verified_link_cap.link_rate | 0 |
| PARAM_VALUE | 0 | link->verified_link_cap.link_rate_set | 0 |
| PARAM_VALUE | 0 | link->verified_link_cap.link_spread | 0 |
| PARAM_VALUE | 1 | address | 983045 |
| PARAM_VALUE | 2 | data | 3367827108826124288 |
| PARAM_VALUE | 2 | *data | 0,128 |
| PARAM_VALUE | 3 | size | 1 |
| CAPPED_DATA | 0 | link | 1 |
| DATA_SOURCE | 0 | link | $0 |
| FUZZY_MAX | 0 | link->dpcd_caps.lttpr_caps.max_ext_timeout | 1 |
| HARD_MAX | 0 | link->dpcd_caps.lttpr_caps.max_lane_count | 4 |
| MEM_ZERO | 0 | &link->dp_trace.detect_lt_trace | |
| MEM_ZERO | 0 | &link->verified_link_cap | |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| UNITS | 3 | size | unit_byte |
| HALF_LOCKED2 | &aconnector->hpd_lock | ||
| HALF_LOCKED2 | &adev->dm.dc_lock | ||
| HALF_LOCKED2 | &attr->mutex | ||
| HALF_LOCKED2 | &dm->dc_lock | ||
| HALF_LOCKED2 | &pool->lock | ||
| HALF_LOCKED2 | _T->lock |
drivers/gpu/drm/amd/amdgpu/../display/dc/link/protocols/link_dp_capability.c dpcd_set_source_specific_data() -> core_link_write_dpcd()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | link | 4096-ptr_max |
| PARAM_VALUE | 0 | link->dc | 4096-ptr_max |
| PARAM_VALUE | 0 | link->dc->vendor_signature.is_valid | 0 |
| PARAM_VALUE | 0 | link->is_dds | 1 |
| PARAM_VALUE | 1 | address | 1825 |
| PARAM_VALUE | 2 | data | 8117625065690185728 |
| PARAM_VALUE | 2 | *data | 0 |
| PARAM_VALUE | 3 | size | 1 |
| DATA_SOURCE | 0 | link | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| UNITS | 3 | size | unit_byte |
drivers/gpu/drm/amd/amdgpu/../display/dc/link/protocols/link_dp_capability.c dpcd_set_source_specific_data() -> core_link_write_dpcd()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | link | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ctx | 4096-ptr_max |
| PARAM_VALUE | 0 | link->dc | 4096-ptr_max |
| PARAM_VALUE | 0 | link->dc->vendor_signature.is_valid | 0 |
| PARAM_VALUE | 1 | address | 768 |
| PARAM_VALUE | 2 | data | 6291221651063885824 |
| PARAM_VALUE | 3 | size | 3 |
| BUF_SIZE | 2 | data | 3 |
| DATA_SOURCE | 0 | link | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| UNITS | 3 | size | unit_byte |
drivers/gpu/drm/amd/amdgpu/../display/dc/link/protocols/link_dp_capability.c dpcd_set_source_specific_data() -> core_link_write_dpcd()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | link | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ctx | 4096-ptr_max |
| PARAM_VALUE | 0 | link->dc | 4096-ptr_max |
| PARAM_VALUE | 0 | link->dc->vendor_signature.is_valid | 0 |
| PARAM_VALUE | 1 | address | 771 |
| PARAM_VALUE | 2 | data | 7176917696493252608 |
| PARAM_VALUE | 3 | size | 9 |
| BUF_SIZE | 2 | data | 9 |
| DATA_SOURCE | 0 | link | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| UNITS | 3 | size | unit_byte |
drivers/gpu/drm/amd/amdgpu/../display/dc/link/protocols/link_dp_capability.c dpcd_set_source_specific_data() -> core_link_write_dpcd()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | link | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ctx | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ctx->dce_version | 15-255 |
| PARAM_VALUE | 0 | link->dc | 4096-ptr_max |
| PARAM_VALUE | 0 | link->dc->caps.min_horizontal_blanking_period | 1-u32max |
| PARAM_VALUE | 0 | link->dc->vendor_signature.is_valid | 0 |
| PARAM_VALUE | 1 | address | 832 |
| PARAM_VALUE | 2 | data | 2184037562175672320 |
| PARAM_VALUE | 3 | size | 1 |
| DATA_SOURCE | 0 | link | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| UNITS | 3 | size | unit_byte |
drivers/gpu/drm/amd/amdgpu/../display/dc/link/protocols/link_dp_capability.c dpcd_set_source_specific_data() -> core_link_write_dpcd()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | link | 4096-ptr_max |
| PARAM_VALUE | 0 | link->dc | 4096-ptr_max |
| PARAM_VALUE | 0 | link->dc->vendor_signature.is_valid | 1 |
| PARAM_VALUE | 1 | address | 768 |
| PARAM_VALUE | 3 | size | 12 |
| BUF_SIZE | 2 | data | 12 |
| DATA_SOURCE | 0 | link | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| UNITS | 3 | size | unit_byte |
drivers/gpu/drm/amd/amdgpu/../display/dc/link/protocols/link_dp_capability.c dpcd_write_cable_id_to_dprx() -> core_link_write_dpcd()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | link | 4096-ptr_max |
| PARAM_VALUE | 0 | link->dc | 4096-ptr_max |
| PARAM_VALUE | 0 | link->dpcd_caps.cable_id.raw | 1-255 |
| PARAM_VALUE | 0 | link->dpcd_caps.channel_coding_cap.bits.DP_128b_132b_SUPPORTED | 1 |
| PARAM_VALUE | 0 | link->dprx_states.cable_id_written | 0 |
| PARAM_VALUE | 1 | address | 272 |
| PARAM_VALUE | 2 | *data | 1-255 |
| PARAM_VALUE | 3 | size | 1 |
| DATA_SOURCE | 0 | link | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| UNITS | 3 | size | unit_byte |
drivers/gpu/drm/amd/amdgpu/../display/dc/link/protocols/link_dp_capability.c retrieve_link_cap() -> core_link_write_dpcd()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | link | 4096-ptr_max |
| PARAM_VALUE | 0 | link->dc | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ddc | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ddc->link | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ddc->link->priv->dm_dp_aux.aux.hw_mutex.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | link->ddc->link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | link->ddc->link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->list.prev->prev | 5159360019465732096 |
| PARAM_VALUE | 0 | link->ddc->link->priv->dm_dp_aux.aux.hw_mutex.osq.tail.counter | s32min-s32max |
| PARAM_VALUE | 0 | link->dpcd_caps.lttpr_caps.max_lane_count | 1-4 |
| PARAM_VALUE | 0 | link->dpcd_caps.lttpr_caps.phy_repeater_cnt | 1-2,4,8,16,32,64,128 |
| PARAM_VALUE | 1 | address | 983050 |
| PARAM_VALUE | 2 | data | 4096-ptr_max |
| PARAM_VALUE | 2 | *data | 1-2,4,8,16,32,64,128 |
| PARAM_VALUE | 3 | size | 1 |
| DATA_SOURCE | 0 | link | $0 |
| HARD_MAX | 0 | link->dpcd_caps.lttpr_caps.max_lane_count | 4 |
| NOCHECK_CALL | |||
| UNITS | 3 | size | unit_byte |
drivers/gpu/drm/amd/amdgpu/../display/dc/link/protocols/link_dp_capability.c wake_up_aux_channel() -> core_link_write_dpcd()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | link | 4096-ptr_max |
| PARAM_VALUE | 0 | link->dc | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ddc | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ddc->link | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ddc->link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 1 | address | 1536 |
| PARAM_VALUE | 2 | data | 4722843353049665536 |
| PARAM_VALUE | 2 | *data | 1 |
| PARAM_VALUE | 3 | size | 1 |
| DATA_SOURCE | 0 | link | $0 |
| UNITS | 3 | size | unit_byte |
drivers/gpu/drm/amd/amdgpu/../display/dc/link/protocols/link_dp_capability.c wake_up_aux_channel() -> core_link_write_dpcd()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | link | 4096-ptr_max |
| PARAM_VALUE | 0 | link->dc | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ddc | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ddc->link | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ddc->link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 1 | address | 1536 |
| PARAM_VALUE | 2 | data | 4722843353049665536 |
| PARAM_VALUE | 2 | *data | 2 |
| PARAM_VALUE | 3 | size | 1 |
| DATA_SOURCE | 0 | link | $0 |
| UNITS | 3 | size | unit_byte |
drivers/gpu/drm/amd/amdgpu/../display/dc/link/protocols/link_dp_phy.c dp_set_fec_ready() -> core_link_write_dpcd()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | link | 4096-ptr_max |
| PARAM_VALUE | 0 | link->connector_signal | 32,64,128 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.soc.dram_clock_change_latency_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.soc.sr_enter_plus_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.soc.sr_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.AverageDCCCompressionRate | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.AverageReadBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.AverageReadBandwidthGBytePerSecond | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DCFCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DISPCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DISPCLKDPPCLKDSCCLKDownSpreading | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DISPCLKDPPCLKVCOSpeed | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DISPCLKRampingMargin | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DISPCLKWithRampingRoundedToDFSGranularity | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DISPCLKWithoutRampingRoundedToDFSGranularity | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DISPCLK_calculated | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DPPCLKUsingSingleDPPChroma | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DPPCLKUsingSingleDPPLuma | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DRAMChannelWidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DRAMClockChangeLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DRAMClockChangeWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DRAMSpeed | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.Downspreading | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.FCLKChangeLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.FabricAndDRAMBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.FabricClock | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.FabricDatapathToDCNDataReturn | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.FinalDRAMClockChangeLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.FrameTimeForMinFullDETBufferingTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.GlobalDPPCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.LinesToFinishSwathTransferStutterCriticalPlane | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.MaxDispclkRoundedToDFSGranularity | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.MaxHSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.MaxVRatioPre | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.MaxVSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.MinActiveDRAMClockChangeLatencySupported | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.MinActiveFCLKChangeLatencySupported | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.MinUrgentLatencySupportUs | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.NonUrgentLatencyTolerance | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.PercentOfIdealDRAMBWReceivedAfterUrgLatencyPixelDataOnly | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.PercentOfIdealDRAMBWReceivedAfterUrgLatencySTROBE | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.PercentOfIdealDRAMBWReceivedAfterUrgLatencyVMDataOnly | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.PercentOfIdealFabricAndSDPPortBWReceivedAfterUrgLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.ReturnBandwidthToDCN | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.SMNLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.SOCCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.SREnterPlusExitTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.SREnterPlusExitZ8Time | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.SRExitTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.SRExitZ8Time | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.SmallestVBlank | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.StutterEfficiency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.StutterEfficiencyNotIncludingVBlank | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.StutterEnterPlusExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.StutterPeriod | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.SwathWidthYCriticalPlane | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.TCalc | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.TFinalxFill | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.TotalDataReadBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.TotalRowReadBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.TslvChk | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.USRRetrainingLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentExtraLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentLatencyAdjustmentFabricClockComponent | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentLatencyAdjustmentFabricClockReference | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentLatencyPixelDataOnly | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentLatencyPixelMixedWithVMData | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentLatencyVMDataOnly | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentRoundTripAndOutOfOrderLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.VBlankTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.VStartupMargin | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.WritebackDRAMClockChangeWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.WritebackLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.WritebackMaxHSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.WritebackMaxVSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.WritebackMinHSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.WritebackMinVSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.WritebackUrgentWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.XFCBusTransportTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.XFCFillBWOverhead | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.XFCRemoteSurfaceFlipDelay | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.XFCTSlvVreadyOffset | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.XFCTSlvVupdateOffset | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.XFCTSlvVupdateWidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.XFCXBUFLatencyTolerance | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.Z8StutterEfficiency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.Z8StutterEfficiencyBestCase | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.Z8StutterEfficiencyNotIncludingVBlank | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.Z8StutterEfficiencyNotIncludingVBlankBestCase | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.Z8StutterEnterPlusExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.Z8StutterExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.soc.dram_clock_change_latency_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.soc.sr_enter_plus_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.soc.sr_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.total_dcn_read_bw_with_flip_no_urgent_burst | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->dc | 4096-ptr_max |
| PARAM_VALUE | 0 | link->dc->debug.disable_fec | 0 |
| PARAM_VALUE | 0 | link->dc->hwss.enable_dp_link_output | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_clock->id | s32min-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_clock->mode | s32min-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_clock->pin | 0-s64max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_data->id | s32min-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_data->mode | s32min-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_data->pin | 0-s64max |
| PARAM_VALUE | 0 | link->dpcd_caps.fec_cap.bits.FEC_CAPABLE | 1 |
| PARAM_VALUE | 0 | link->dpcd_caps.lttpr_caps.mode | 85,170 |
| PARAM_VALUE | 0 | link->phy_state.symclk_state | 1 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->blocked_lock.owner | (-1) |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->blocked_lock.owner_cpu | 4294967295 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->blocked_on | (-1)-0 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->usage.refs.counter | s32min-s32max |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.osq.tail.counter | s32min-s32max |
| PARAM_VALUE | 0 | *link->ctx->dc->scratch.pipes_to_unlock_first | 0-1 |
| PARAM_VALUE | 0 | *link->dpcd_caps.edp_supported_link_rates | 0-4294967295 |
| PARAM_VALUE | 0 | *link->dpcd_caps.lttpr_caps.aux_rd_interval | 0-255 |
| PARAM_VALUE | 1 | address | 288 |
| PARAM_VALUE | 2 | data | 2580796243541471232 |
| PARAM_VALUE | 2 | *data | 1 |
| PARAM_VALUE | 3 | size | 1 |
| CAPPED_DATA | 0 | link | 1 |
| DATA_SOURCE | 0 | link | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| UNITS | 3 | size | unit_byte |
drivers/gpu/drm/amd/amdgpu/../display/dc/link/protocols/link_dp_phy.c dp_set_fec_ready() -> core_link_write_dpcd()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | link | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DPPCLKUsingSingleDPPChroma | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DPPCLKUsingSingleDPPLuma | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->dc | 4096-ptr_max |
| PARAM_VALUE | 0 | link->fec_state | 1 |
| PARAM_VALUE | 0 | link->type | 1-u32max |
| PARAM_VALUE | 0 | *link->dpcd_caps.edp_supported_link_rates | 0-4294967295 |
| PARAM_VALUE | 1 | address | 288 |
| PARAM_VALUE | 2 | data | 2580796243541471232 |
| PARAM_VALUE | 2 | *data | 0 |
| PARAM_VALUE | 3 | size | 1 |
| CAPPED_DATA | 0 | link | 1 |
| DATA_SOURCE | 0 | link | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| UNITS | 3 | size | unit_byte |
drivers/gpu/drm/amd/amdgpu/../display/dc/link/protocols/link_dp_phy.c dpcd_write_rx_power_ctrl() -> core_link_write_dpcd()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | link | 4096-ptr_max |
| PARAM_VALUE | 0 | link->link_enc->funcs->get_dig_frontend | 0,35576471446519808,300337660971397120 |
| PARAM_VALUE | 0 | link->sync_lt_in_progress | 0 |
| PARAM_VALUE | 0 | *link->dpcd_caps.branch_dev_name | (-128)-127 |
| PARAM_VALUE | 0 | *link->dpcd_caps.edp_supported_link_rates | 0-4294967295 |
| PARAM_VALUE | 1 | address | 1536 |
| PARAM_VALUE | 2 | data | 509870230109904896 |
| PARAM_VALUE | 2 | *data | 1-2 |
| PARAM_VALUE | 3 | size | 1 |
| CAPPED_DATA | 0 | link | 1 |
| DATA_SOURCE | 0 | link | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| UNITS | 3 | size | unit_byte |
| HALF_LOCKED2 | &attr->mutex |
drivers/gpu/drm/amd/amdgpu/../display/dc/link/link_dpms.c enable_mst_on_sink() -> core_link_write_dpcd()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | link | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DPPCLKUsingSingleDPPChroma | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DPPCLKUsingSingleDPPLuma | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 1 | address | 273 |
| PARAM_VALUE | 2 | data | 2272103506540400640 |
| PARAM_VALUE | 2 | *data | 0-1 |
| PARAM_VALUE | 3 | size | 1 |
| CAPPED_DATA | 0 | link | 1 |
| DATA_SOURCE | 0 | link | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL |
drivers/gpu/drm/amd/amdgpu/../display/dc/link/link_dpms.c enable_stream_features() -> core_link_write_dpcd()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 1 | address | 263 |
| PARAM_VALUE | 3 | size | 1 |
| NOCHECK_CALL | |||
| UNITS | 3 | size | unit_byte |
drivers/gpu/drm/amd/amdgpu/../display/dc/link/link_dpms.c write_128b_132b_sst_payload_allocation_table() -> core_link_write_dpcd()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | link | 4096-ptr_max |
| PARAM_VALUE | 0 | link->aux_access_disabled | 0 |
| PARAM_VALUE | 0 | link->ctx | 4096-ptr_max |
| PARAM_VALUE | 0 | link->type | 1-u32max |
| PARAM_VALUE | 1 | address | 704 |
| PARAM_VALUE | 2 | *data | 0 |
| PARAM_VALUE | 3 | size | 1 |
| DATA_SOURCE | 0 | link | $1 |
| NOCHECK_CALL |
drivers/gpu/drm/amd/amdgpu/../display/dc/link/link_dpms.c write_128b_132b_sst_payload_allocation_table() -> core_link_write_dpcd()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | link | 4096-ptr_max |
| PARAM_VALUE | 0 | link->aux_access_disabled | 0 |
| PARAM_VALUE | 0 | link->ctx | 4096-ptr_max |
| PARAM_VALUE | 0 | link->type | 1-u32max |
| PARAM_VALUE | 1 | address | 448 |
| PARAM_VALUE | 2 | data | 8689237659667546112 |
| PARAM_VALUE | 2 | *data | 1 |
| PARAM_VALUE | 3 | size | 1 |
| DATA_SOURCE | 0 | link | $1 |
| NOCHECK_CALL |
drivers/gpu/drm/amd/amdgpu/../display/dc/link/link_dpms.c write_128b_132b_sst_payload_allocation_table() -> core_link_write_dpcd()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | link | 4096-ptr_max |
| PARAM_VALUE | 0 | link->aux_access_disabled | 0 |
| PARAM_VALUE | 0 | link->ctx | 4096-ptr_max |
| PARAM_VALUE | 0 | link->type | 1-u32max |
| PARAM_VALUE | 1 | address | 449 |
| PARAM_VALUE | 2 | data | 319150022288662528 |
| PARAM_VALUE | 2 | *data | 0 |
| PARAM_VALUE | 3 | size | 1 |
| DATA_SOURCE | 0 | link | $1 |
| NOCHECK_CALL |
drivers/gpu/drm/amd/amdgpu/../display/dc/link/link_dpms.c write_128b_132b_sst_payload_allocation_table() -> core_link_write_dpcd()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | link | 4096-ptr_max |
| PARAM_VALUE | 0 | link->aux_access_disabled | 0 |
| PARAM_VALUE | 0 | link->ctx | 4096-ptr_max |
| PARAM_VALUE | 0 | link->type | 1-u32max |
| PARAM_VALUE | 1 | address | 450 |
| PARAM_VALUE | 2 | data | 1299784283136442368 |
| PARAM_VALUE | 2 | *data | 0-64 |
| PARAM_VALUE | 3 | size | 1 |
| DATA_SOURCE | 0 | link | $1 |
| NOCHECK_CALL |
drivers/gpu/drm/amd/amdgpu/../display/dc/hdcp/hdcp_msg.c dpcd_access_helper() -> core_link_write_dpcd()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | link | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ddc | 4096-ptr_max |
| PARAM_VALUE | 2 | data | 4096-ptr_max |
| PARAM_VALUE | 3 | size | 1-3,16 |
| DATA_SOURCE | 0 | link | $0 |
| FUZZY_MAX | 3 | size | 16 |
| BIT_INFO | 3 | size | 0x0,0x13 |
| MEM_ZERO | 0 | link->hdcp_caps.rx_caps.raw | |
| UNITS | 3 | size | unit_byte |
drivers/gpu/drm/amd/amdgpu/../display/dc/link/protocols/link_edp_panel_control.c dp_set_panel_mode() -> core_link_write_dpcd()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | link | 4096-ptr_max |
| PARAM_VALUE | 0 | link->dc | 4096-ptr_max |
| PARAM_VALUE | 0 | link->dc->hwss.enable_dp_link_output | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ddc->ctx->driver_context->dm.dpia_aux_lock.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | link->ddc->ctx->driver_context->dm.dpia_aux_lock.first_waiter->list.prev->prev | 5159360019465732096 |
| PARAM_VALUE | 0 | link->ddc->ctx->driver_context->dm.dpia_aux_lock.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | link->dp_trace.commit_lt_trace.counts.fail | 0-s32max |
| PARAM_VALUE | 0 | link->dp_trace.commit_lt_trace.counts.total | 0-1 |
| PARAM_VALUE | 0 | link->dp_trace.commit_lt_trace.result | 0-13 |
| PARAM_VALUE | 0 | link->ext_enc_id.id | 0 |
| PARAM_VALUE | 0 | link->phy_state.symclk_state | 1 |
| PARAM_VALUE | 1 | address | 266 |
| PARAM_VALUE | 3 | size | 1 |
| CAPPED_DATA | 0 | link | 1 |
| DATA_SOURCE | 0 | link | $0 |
| MEM_ZERO | 0 | &link->dp_trace.commit_lt_trace | |
| UNITS | 3 | size | unit_byte |
drivers/gpu/drm/amd/amdgpu/../display/dc/link/protocols/link_edp_panel_control.c edp_backlight_enable_aux() -> core_link_write_dpcd()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | link | 4096-ptr_max |
| PARAM_VALUE | 0 | link->connector_signal | 32,128 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DPPCLKUsingSingleDPPChroma | -inf-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DPPCLKUsingSingleDPPLuma | -inf-1.797693e+308 |
| PARAM_VALUE | 0 | link->dpcd_caps.panel_luminance_control | 0 |
| PARAM_VALUE | 0 | link->is_dds | 0 |
| PARAM_VALUE | 0 | link->link_enc->funcs->is_dig_enabled | 0,835999835047198720,2505374968371208192,3400303375799660544,6908382666642669568 |
| PARAM_VALUE | 0 | link->panel_cntl->funcs | 1629897440322760704,2032623094161895424,7501325087325945856 |
| PARAM_VALUE | 0 | *link->dpcd_caps.edp_supported_link_rates | 0-4294967295 |
| PARAM_VALUE | 1 | address | 815 |
| PARAM_VALUE | 2 | data | 3211821406423318528 |
| PARAM_VALUE | 2 | *data | 0-1 |
| PARAM_VALUE | 3 | size | 1 |
| DATA_SOURCE | 0 | link | $0 |
| BIT_INFO | 0 | link->connector_signal | 0x0,0xa0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HOST_DATA | 0 | link->panel_cntl->stored_backlight_registers.BL_PWM_CNTL | 0-u32max |
| HOST_DATA | 0 | link->panel_cntl->stored_backlight_registers.BL_PWM_CNTL2 | 0-u32max |
| HOST_DATA | 0 | link->panel_cntl->stored_backlight_registers.BL_PWM_PERIOD_CNTL | 0-u32max |
drivers/gpu/drm/amd/amdgpu/../display/dc/link/protocols/link_edp_panel_control.c edp_set_backlight_level_nits() -> core_link_write_dpcd()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | link | 4096-ptr_max |
| PARAM_VALUE | 0 | link->backlight_control_type | 1 |
| PARAM_VALUE | 0 | link->connector_signal | 32,128 |
| PARAM_VALUE | 0 | link->dc | 4096-ptr_max |
| PARAM_VALUE | 1 | address | 814 |
| PARAM_VALUE | 2 | data | 3303570512479592448 |
| PARAM_VALUE | 2 | *data | 0 |
| PARAM_VALUE | 3 | size | 1 |
| DATA_SOURCE | 0 | link | $0 |
| BIT_INFO | 0 | link->connector_signal | 0x0,0xa0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL |
drivers/gpu/drm/amd/amdgpu/../display/dc/link/protocols/link_edp_panel_control.c edp_set_backlight_level_nits() -> core_link_write_dpcd()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | link | 4096-ptr_max |
| PARAM_VALUE | 0 | link->backlight_control_type | 1 |
| PARAM_VALUE | 0 | link->connector_signal | 32,128 |
| PARAM_VALUE | 0 | link->dc | 4096-ptr_max |
| PARAM_VALUE | 1 | address | 1825 |
| PARAM_VALUE | 2 | data | 3303570512479592448 |
| PARAM_VALUE | 2 | *data | 128 |
| PARAM_VALUE | 3 | size | 1 |
| DATA_SOURCE | 0 | link | $0 |
| BIT_INFO | 0 | link->connector_signal | 0x0,0xa0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| UNITS | 3 | size | unit_byte |
drivers/gpu/drm/amd/amdgpu/../display/dc/link/protocols/link_edp_panel_control.c edp_set_backlight_level_nits() -> core_link_write_dpcd()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | link | 4096-ptr_max |
| PARAM_VALUE | 0 | link->backlight_control_type | 1 |
| PARAM_VALUE | 0 | link->connector_signal | 32,128 |
| PARAM_VALUE | 0 | link->dc | 4096-ptr_max |
| PARAM_VALUE | 1 | address | 1844 |
| PARAM_VALUE | 3 | size | 3 |
| BUF_SIZE | 2 | data | 4 |
| BUF_SIZE | 2 | data | 4 |
| DATA_SOURCE | 0 | link | $0 |
| BIT_INFO | 0 | link->connector_signal | 0x0,0xa0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| UNITS | 3 | size | unit_byte |
drivers/gpu/drm/amd/amdgpu/../display/dc/link/protocols/link_edp_panel_control.c edp_set_backlight_level_nits() -> core_link_write_dpcd()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | link | 4096-ptr_max |
| PARAM_VALUE | 0 | link->backlight_control_type | 2 |
| PARAM_VALUE | 0 | link->connector_signal | 32,128 |
| PARAM_VALUE | 0 | link->dc | 4096-ptr_max |
| PARAM_VALUE | 1 | address | 1825 |
| PARAM_VALUE | 2 | data | 3303570512479592448 |
| PARAM_VALUE | 2 | *data | 0 |
| PARAM_VALUE | 3 | size | 1 |
| DATA_SOURCE | 0 | link | $0 |
| BIT_INFO | 0 | link->connector_signal | 0x0,0xa0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| UNITS | 3 | size | unit_byte |
drivers/gpu/drm/amd/amdgpu/../display/dc/link/protocols/link_edp_panel_control.c edp_set_backlight_level_nits() -> core_link_write_dpcd()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | link | 4096-ptr_max |
| PARAM_VALUE | 0 | link->backlight_control_type | 2 |
| PARAM_VALUE | 0 | link->connector_signal | 32,128 |
| PARAM_VALUE | 0 | link->dc | 4096-ptr_max |
| PARAM_VALUE | 1 | address | 800 |
| PARAM_VALUE | 2 | data | 8217559739221045248 |
| PARAM_VALUE | 3 | size | 6 |
| BUF_SIZE | 2 | data | 6 |
| DATA_SOURCE | 0 | link | $0 |
| BIT_INFO | 0 | link->connector_signal | 0x0,0xa0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| UNITS | 3 | size | unit_byte |
drivers/gpu/drm/amd/amdgpu/../display/dc/link/protocols/link_edp_panel_control.c edp_set_backlight_level_nits() -> core_link_write_dpcd()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | link | 4096-ptr_max |
| PARAM_VALUE | 0 | link->backlight_control_type | 2 |
| PARAM_VALUE | 0 | link->connector_signal | 32,128 |
| PARAM_VALUE | 0 | link->dc | 4096-ptr_max |
| PARAM_VALUE | 1 | address | 814 |
| PARAM_VALUE | 2 | data | 3156973518393294848 |
| PARAM_VALUE | 2 | *data | 0-1 |
| PARAM_VALUE | 3 | size | 1 |
| DATA_SOURCE | 0 | link | $0 |
| BIT_INFO | 0 | link->connector_signal | 0x0,0xa0 |
| RX_PATH | |||
| TASK_NOT_RUNNING |
drivers/gpu/drm/amd/amdgpu/../display/dc/link/protocols/link_edp_panel_control.c edp_setup_psr() -> core_link_write_dpcd()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | link | 4096-ptr_max |
| PARAM_VALUE | 0 | link->connector_signal | 128 |
| PARAM_VALUE | 0 | link->ctx | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ctx->dc | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ctx->dc->res_pool | 4096-ptr_max |
| PARAM_VALUE | 0 | link->dc | 4096-ptr_max |
| PARAM_VALUE | 0 | link->dc->link_srv | 4096-ptr_max |
| PARAM_VALUE | 0 | link->dc->link_srv->edp_set_backlight_level | 4096-ptr_max |
| PARAM_VALUE | 0 | link->psr_settings.psr_version | 1 |
| PARAM_VALUE | 0 | link->psr_settings.psr_vtotal_control_support | 1 |
| PARAM_VALUE | 1 | address | 885 |
| PARAM_VALUE | 2 | *data | 0 |
| PARAM_VALUE | 3 | size | 1 |
| DATA_SOURCE | 0 | link | $0 |
| NOCHECK_CALL | |||
| UNITS | 3 | size | unit_byte |
drivers/gpu/drm/amd/amdgpu/../display/dc/link/accessories/link_dp_cts.c dp_handle_automated_test() -> core_link_write_dpcd()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | link | 4096-ptr_max |
| PARAM_VALUE | 0 | link->dc | 4096-ptr_max |
| PARAM_VALUE | 0 | link->dc->link_srv | 4096-ptr_max |
| PARAM_VALUE | 1 | address | 608 |
| PARAM_VALUE | 3 | size | 1 |
| CAPPED_DATA | 0 | link | 1 |
| DATA_SOURCE | 0 | link | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| UNITS | 3 | size | unit_byte |
| HALF_LOCKED2 | &aconnector->hpd_lock | ||
| HALF_LOCKED2 | &adev->dm.dc_lock |
drivers/gpu/drm/amd/amdgpu/../display/dc/link/accessories/link_dp_cts.c dp_handle_automated_test() -> core_link_write_dpcd()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | link | 4096-ptr_max |
| PARAM_VALUE | 0 | link->dc | 4096-ptr_max |
| PARAM_VALUE | 1 | address | 608 |
| PARAM_VALUE | 3 | size | 1 |
| CAPPED_DATA | 0 | link | 1 |
| DATA_SOURCE | 0 | link | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| UNITS | 3 | size | unit_byte |
| HALF_LOCKED2 | &aconnector->hpd_lock | ||
| HALF_LOCKED2 | &adev->dm.dc_lock |
drivers/gpu/drm/amd/amdgpu/../display/dc/link/accessories/link_dp_cts.c dp_set_test_pattern() -> core_link_write_dpcd()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | link | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.dcn_downspread_percent | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.downspread_percent | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.dram_clock_change_latency_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.sr_enter_plus_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.sr_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.AverageDCCCompressionRate | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.AverageReadBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.AverageReadBandwidthGBytePerSecond | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.BandwidthAvailableForImmediateFlip | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DCFCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DCFCLKDeepSleep | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLKDPPCLKDSCCLKDownSpreading | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLKDPPCLKVCOSpeed | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLKRampingMargin | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLKWithRamping | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLKWithoutRamping | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLK_calculated | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DRAMChannelWidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DRAMClockChangeLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DRAMClockChangeWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DRAMSpeed | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Downspreading | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FCLKChangeLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FabricAndDRAMBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FabricClock | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FabricDatapathToDCNDataReturn | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FinalDRAMClockChangeLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FractionOfUrgentBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FrameTimeForMinFullDETBufferingTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.GlobalDPPCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.LastPixelOfLineExtraWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MaxDispclkRoundedToDFSGranularity | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MaxHSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MaxVRatioPre | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MaxVSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MinActiveFCLKChangeLatencySupported | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MinUrgentLatencySupportUs | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.NonUrgentLatencyTolerance | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.PartOfBurstThatFitsInROB | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.ReturnBW | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.ReturnBandwidthToDCN | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SMNLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SOCCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SREnterPlusExitTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SREnterPlusExitZ8Time | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SRExitTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SRExitZ8Time | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SmallestVBlank | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.StutterBurstTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.StutterEfficiency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.StutterEfficiencyNotIncludingVBlank | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.StutterEnterPlusExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.StutterExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.StutterPeriod | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SwathWidthYCriticalPlane | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TCalc | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TFinalxFill | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TotalDataReadBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TotalRowReadBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TslvChk | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.USRRetrainingLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentExtraLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentLatencyPixelDataOnly | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentLatencyPixelMixedWithVMData | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentLatencyVMDataOnly | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentRoundTripAndOutOfOrderLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.VBlankTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.VStartupMargin | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Watermark.DRAMClockChangeWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Watermark.FCLKChangeWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Watermark.StutterExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Watermark.USRRetrainingWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Watermark.UrgentWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Watermark.WritebackUrgentWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Watermark.Z8StutterExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackDISPCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackDRAMClockChangeWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackMaxHSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackMaxVSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackMinHSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackMinVSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackUrgentWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCBusTransportTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCFillBWOverhead | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCRemoteSurfaceFlipDelay | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCTSlvVreadyOffset | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCTSlvVupdateOffset | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCTSlvVupdateWidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCXBUFLatencyTolerance | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Z8StutterEfficiency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Z8StutterEfficiencyBestCase | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Z8StutterEfficiencyNotIncludingVBlank | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Z8StutterEnterPlusExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Z8StutterExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.soc.dcn_downspread_percent | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.soc.downspread_percent | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.soc.dram_clock_change_latency_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.soc.sr_enter_plus_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.soc.sr_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.total_dcn_read_bw_with_flip | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_dlg_sys_param.mem_trip_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_dlg_sys_param.t_extra_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_dlg_sys_param.t_mclk_wm_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_dlg_sys_param.t_sr_wm_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_dlg_sys_param.t_urg_wm_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_dlg_sys_param.total_flip_bw | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_input.clks_cfg.dcfclk_mhz | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_input.clks_cfg.dispclk_mhz | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_input.clks_cfg.dppclk_mhz | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_input.clks_cfg.refclk_mhz | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_input.clks_cfg.socclk_mhz | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_input.dout.output_bpp | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_input.dout.wb.wb_hratio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_input.dout.wb.wb_vratio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_input.pipe.dest.pixel_rate_mhz | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.pipe_dlg_param.pixel_rate_mhz | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->current_test_pattern | 1-25 |
| PARAM_VALUE | 0 | link->dc | 4096-ptr_max |
| PARAM_VALUE | 0 | link->dc->current_state | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ddc->ctx->driver_context->dm.dpia_aux_lock.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_clock->mode | s32min-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_data->mode | s32min-s32max |
| PARAM_VALUE | 0 | link->dpcd_caps.dpcd_rev.raw | 18-255 |
| PARAM_VALUE | 0 | link->pending_test_pattern | 33 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex->first_waiter->task->blocked_lock.owner | (-4611686018427387904)-4611686018427387903 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->list.prev->prev | 0,5159360019465732096 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->magic | 5159360019465732096 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->blocked_lock.owner | (-1) |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->blocked_lock.owner_cpu | 4294967295 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->blocked_on | 0 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->usage.refs.counter | s32min-s32max |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | link->test_pattern_enabled | 1 |
| PARAM_VALUE | 0 | *link->ddc->ddc_pin->pin_clock->pin->en | 0-4294967295 |
| PARAM_VALUE | 0 | *link->ddc->ddc_pin->pin_clock->pin->id | s32min-s32max |
| PARAM_VALUE | 0 | *link->ddc->ddc_pin->pin_clock->pin->mode | s32min-s32max |
| PARAM_VALUE | 0 | *link->ddc->ddc_pin->pin_clock->pin->opened | 0-1 |
| PARAM_VALUE | 0 | *link->ddc->ddc_pin->pin_data->pin->en | 0-4294967295 |
| PARAM_VALUE | 0 | *link->ddc->ddc_pin->pin_data->pin->id | s32min-s32max |
| PARAM_VALUE | 0 | *link->ddc->ddc_pin->pin_data->pin->mode | s32min-s32max |
| PARAM_VALUE | 0 | *link->ddc->ddc_pin->pin_data->pin->opened | 0-1 |
| PARAM_VALUE | 1 | address | 271 |
| PARAM_VALUE | 3 | size | 1 |
| BUF_SIZE | 0 | link->dc | (-1),3059296 |
| BUF_SIZE | 0 | link->priv | (-1),9272 |
| BUF_SIZE | 2 | data | (-1),10,33 |
| BUF_SIZE | 2 | data | (-1),10,33 |
| CAPPED_DATA | 0 | link | 1 |
| DATA_SOURCE | 0 | link | $0 |
| DATA_SOURCE | 2 | data | $4 |
| FUZZY_MAX | 0 | link->dpcd_caps.dpcd_rev.raw | 18 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL |
drivers/gpu/drm/amd/amdgpu/../display/dc/link/accessories/link_dp_cts.c dp_set_test_pattern() -> core_link_write_dpcd()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | link | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.dcn_downspread_percent | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.downspread_percent | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.dram_clock_change_latency_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.sr_enter_plus_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.sr_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.AverageDCCCompressionRate | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.AverageReadBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.AverageReadBandwidthGBytePerSecond | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.BandwidthAvailableForImmediateFlip | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DCFCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DCFCLKDeepSleep | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLKDPPCLKDSCCLKDownSpreading | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLKDPPCLKVCOSpeed | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLKRampingMargin | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLKWithRamping | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLKWithoutRamping | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLK_calculated | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DRAMChannelWidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DRAMClockChangeLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DRAMClockChangeWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DRAMSpeed | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Downspreading | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FCLKChangeLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FabricAndDRAMBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FabricClock | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FabricDatapathToDCNDataReturn | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FinalDRAMClockChangeLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FractionOfUrgentBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FrameTimeForMinFullDETBufferingTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.GlobalDPPCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.LastPixelOfLineExtraWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MaxDispclkRoundedToDFSGranularity | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MaxHSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MaxVRatioPre | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MaxVSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MinActiveFCLKChangeLatencySupported | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MinUrgentLatencySupportUs | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.NonUrgentLatencyTolerance | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.PartOfBurstThatFitsInROB | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.ReturnBW | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.ReturnBandwidthToDCN | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SMNLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SOCCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SREnterPlusExitTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SREnterPlusExitZ8Time | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SRExitTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SRExitZ8Time | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SmallestVBlank | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.StutterBurstTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.StutterEfficiency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.StutterEfficiencyNotIncludingVBlank | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.StutterEnterPlusExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.StutterExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.StutterPeriod | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SwathWidthYCriticalPlane | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TCalc | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TFinalxFill | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TotalDataReadBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TotalRowReadBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TslvChk | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.USRRetrainingLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentExtraLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentLatencyPixelDataOnly | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentLatencyPixelMixedWithVMData | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentLatencyVMDataOnly | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentRoundTripAndOutOfOrderLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.VBlankTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.VStartupMargin | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Watermark.DRAMClockChangeWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Watermark.FCLKChangeWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Watermark.StutterExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Watermark.USRRetrainingWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Watermark.UrgentWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Watermark.WritebackUrgentWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Watermark.Z8StutterExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackDISPCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackDRAMClockChangeWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackMaxHSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackMaxVSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackMinHSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackMinVSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackUrgentWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCBusTransportTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCFillBWOverhead | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCRemoteSurfaceFlipDelay | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCTSlvVreadyOffset | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCTSlvVupdateOffset | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCTSlvVupdateWidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCXBUFLatencyTolerance | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Z8StutterEfficiency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Z8StutterEfficiencyBestCase | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Z8StutterEfficiencyNotIncludingVBlank | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Z8StutterEnterPlusExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Z8StutterExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.soc.dcn_downspread_percent | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.soc.downspread_percent | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.soc.dram_clock_change_latency_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.soc.sr_enter_plus_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.soc.sr_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.total_dcn_read_bw_with_flip | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_dlg_sys_param.mem_trip_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_dlg_sys_param.t_extra_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_dlg_sys_param.t_mclk_wm_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_dlg_sys_param.t_sr_wm_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_dlg_sys_param.t_urg_wm_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_dlg_sys_param.total_flip_bw | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_input.clks_cfg.dcfclk_mhz | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_input.clks_cfg.dispclk_mhz | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_input.clks_cfg.dppclk_mhz | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_input.clks_cfg.refclk_mhz | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_input.clks_cfg.socclk_mhz | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_input.dout.output_bpp | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_input.dout.wb.wb_hratio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_input.dout.wb.wb_vratio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_input.pipe.dest.pixel_rate_mhz | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.pipe_dlg_param.pixel_rate_mhz | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->current_test_pattern | 1-25 |
| PARAM_VALUE | 0 | link->dc | 4096-ptr_max |
| PARAM_VALUE | 0 | link->dc->current_state | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ddc->ctx->driver_context->dm.dpia_aux_lock.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_clock->mode | s32min-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_data->mode | s32min-s32max |
| PARAM_VALUE | 0 | link->dpcd_caps.dpcd_rev.raw | 18-255 |
| PARAM_VALUE | 0 | link->pending_test_pattern | 33 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex->first_waiter->task->blocked_lock.owner | (-4611686018427387904)-4611686018427387903 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->list.prev->prev | 0,5159360019465732096 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->magic | 5159360019465732096 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->blocked_lock.owner | (-1) |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->blocked_lock.owner_cpu | 4294967295 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->blocked_on | 0 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->usage.refs.counter | s32min-s32max |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.osq.tail.counter | s32min-s32max |
| PARAM_VALUE | 0 | link->test_pattern_enabled | 1 |
| PARAM_VALUE | 0 | *link->ddc->ddc_pin->pin_clock->pin->en | 0-4294967295 |
| PARAM_VALUE | 0 | *link->ddc->ddc_pin->pin_clock->pin->id | s32min-s32max |
| PARAM_VALUE | 0 | *link->ddc->ddc_pin->pin_clock->pin->mode | s32min-s32max |
| PARAM_VALUE | 0 | *link->ddc->ddc_pin->pin_clock->pin->opened | 0-1 |
| PARAM_VALUE | 0 | *link->ddc->ddc_pin->pin_data->pin->en | 0-4294967295 |
| PARAM_VALUE | 0 | *link->ddc->ddc_pin->pin_data->pin->id | s32min-s32max |
| PARAM_VALUE | 0 | *link->ddc->ddc_pin->pin_data->pin->mode | s32min-s32max |
| PARAM_VALUE | 0 | *link->ddc->ddc_pin->pin_data->pin->opened | 0-1 |
| PARAM_VALUE | 1 | address | 267 |
| PARAM_VALUE | 2 | data | 4096-ptr_max |
| PARAM_VALUE | 3 | size | 4 |
| BUF_SIZE | 0 | link->dc | (-1),3059296 |
| BUF_SIZE | 0 | link->priv | (-1),9272 |
| BUF_SIZE | 2 | data | 4 |
| CAPPED_DATA | 0 | link | 1 |
| DATA_SOURCE | 0 | link | $0 |
| FUZZY_MAX | 0 | link->dpcd_caps.dpcd_rev.raw | 18 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| UNITS | 3 | size | unit_byte |
drivers/gpu/drm/amd/amdgpu/../display/dc/link/accessories/link_dp_cts.c dp_set_test_pattern() -> core_link_write_dpcd()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | link | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.dcn_downspread_percent | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.downspread_percent | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.dram_clock_change_latency_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.sr_enter_plus_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.sr_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.AverageDCCCompressionRate | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.AverageReadBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.AverageReadBandwidthGBytePerSecond | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.BandwidthAvailableForImmediateFlip | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DCFCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DCFCLKDeepSleep | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLKDPPCLKDSCCLKDownSpreading | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLKDPPCLKVCOSpeed | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLKRampingMargin | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLKWithRamping | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLKWithoutRamping | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLK_calculated | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DRAMChannelWidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DRAMClockChangeLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DRAMClockChangeWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DRAMSpeed | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Downspreading | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FCLKChangeLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FabricAndDRAMBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FabricClock | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FabricDatapathToDCNDataReturn | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FinalDRAMClockChangeLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FractionOfUrgentBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FrameTimeForMinFullDETBufferingTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.GlobalDPPCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.LastPixelOfLineExtraWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MaxDispclkRoundedToDFSGranularity | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MaxHSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MaxVRatioPre | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MaxVSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MinActiveFCLKChangeLatencySupported | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MinUrgentLatencySupportUs | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.NonUrgentLatencyTolerance | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.PartOfBurstThatFitsInROB | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.ReturnBW | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.ReturnBandwidthToDCN | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SMNLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SOCCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SREnterPlusExitTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SREnterPlusExitZ8Time | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SRExitTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SRExitZ8Time | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SmallestVBlank | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.StutterBurstTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.StutterEfficiency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.StutterEfficiencyNotIncludingVBlank | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.StutterEnterPlusExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.StutterExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.StutterPeriod | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SwathWidthYCriticalPlane | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TCalc | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TFinalxFill | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TotalDataReadBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TotalRowReadBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TslvChk | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.USRRetrainingLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentExtraLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentLatencyPixelDataOnly | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentLatencyPixelMixedWithVMData | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentLatencyVMDataOnly | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentRoundTripAndOutOfOrderLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.VBlankTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.VStartupMargin | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Watermark.DRAMClockChangeWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Watermark.FCLKChangeWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Watermark.StutterExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Watermark.USRRetrainingWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Watermark.UrgentWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Watermark.WritebackUrgentWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Watermark.Z8StutterExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackDISPCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackDRAMClockChangeWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackMaxHSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackMaxVSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackMinHSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackMinVSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackUrgentWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCBusTransportTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCFillBWOverhead | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCRemoteSurfaceFlipDelay | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCTSlvVreadyOffset | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCTSlvVupdateOffset | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCTSlvVupdateWidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCXBUFLatencyTolerance | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Z8StutterEfficiency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Z8StutterEfficiencyBestCase | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Z8StutterEfficiencyNotIncludingVBlank | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Z8StutterEnterPlusExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Z8StutterExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.soc.dcn_downspread_percent | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.soc.downspread_percent | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.soc.dram_clock_change_latency_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.soc.sr_enter_plus_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.soc.sr_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.total_dcn_read_bw_with_flip | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_dlg_sys_param.mem_trip_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_dlg_sys_param.t_extra_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_dlg_sys_param.t_mclk_wm_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_dlg_sys_param.t_sr_wm_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_dlg_sys_param.t_urg_wm_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_dlg_sys_param.total_flip_bw | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_input.clks_cfg.dcfclk_mhz | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_input.clks_cfg.dispclk_mhz | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_input.clks_cfg.dppclk_mhz | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_input.clks_cfg.refclk_mhz | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_input.clks_cfg.socclk_mhz | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_input.dout.output_bpp | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_input.dout.wb.wb_hratio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_input.dout.wb.wb_vratio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_input.pipe.dest.pixel_rate_mhz | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.pipe_dlg_param.pixel_rate_mhz | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->current_test_pattern | 1-25 |
| PARAM_VALUE | 0 | link->dc | 4096-ptr_max |
| PARAM_VALUE | 0 | link->dc->current_state | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ddc->ctx->driver_context->dm.dpia_aux_lock.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_clock->mode | s32min-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_data->mode | s32min-s32max |
| PARAM_VALUE | 0 | link->dpcd_caps.dpcd_rev.raw | 0,16-17 |
| PARAM_VALUE | 0 | link->pending_test_pattern | 33 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex->first_waiter->task->blocked_lock.owner | (-4611686018427387904)-4611686018427387903 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->list.prev->prev | 0,5159360019465732096 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->magic | 5159360019465732096 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->blocked_lock.owner | (-1) |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->blocked_lock.owner_cpu | 4294967295 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->blocked_on | 0 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->usage.refs.counter | s32min-s32max |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.osq.tail.counter | s32min-s32max |
| PARAM_VALUE | 0 | link->test_pattern_enabled | 1 |
| PARAM_VALUE | 0 | *link->ddc->ddc_pin->pin_clock->pin->en | 0-4294967295 |
| PARAM_VALUE | 0 | *link->ddc->ddc_pin->pin_clock->pin->id | s32min-s32max |
| PARAM_VALUE | 0 | *link->ddc->ddc_pin->pin_clock->pin->mode | s32min-s32max |
| PARAM_VALUE | 0 | *link->ddc->ddc_pin->pin_clock->pin->opened | 0-1 |
| PARAM_VALUE | 0 | *link->ddc->ddc_pin->pin_data->pin->en | 0-4294967295 |
| PARAM_VALUE | 0 | *link->ddc->ddc_pin->pin_data->pin->id | s32min-s32max |
| PARAM_VALUE | 0 | *link->ddc->ddc_pin->pin_data->pin->mode | s32min-s32max |
| PARAM_VALUE | 0 | *link->ddc->ddc_pin->pin_data->pin->opened | 0-1 |
| PARAM_VALUE | 1 | address | 258 |
| PARAM_VALUE | 3 | size | 1 |
| BUF_SIZE | 0 | link->dc | (-1),3059296 |
| BUF_SIZE | 0 | link->priv | (-1),9272 |
| CAPPED_DATA | 0 | link | 1 |
| DATA_SOURCE | 0 | link | $0 |
| FUZZY_MAX | 0 | link->dpcd_caps.dpcd_rev.raw | 16 |
| HARD_MAX | 0 | link->dpcd_caps.dpcd_rev.raw | 17 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| UNITS | 3 | size | unit_byte |
drivers/gpu/drm/amd/amdgpu/../display/dc/link/protocols/link_ddc.c try_to_configure_aux_timeout() -> core_link_write_dpcd()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | link | 4096-ptr_max |
| PARAM_VALUE | 0 | link->dc | 4096-ptr_max |
| PARAM_VALUE | 1 | address | 983119 |
| PARAM_VALUE | 2 | data | 4096-ptr_max |
| PARAM_VALUE | 3 | size | 4 |
| BUF_SIZE | 2 | data | 4 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| UNITS | 3 | size | unit_byte |
drivers/gpu/drm/amd/amdgpu/../display/dc/link/protocols/link_dp_irq_handler.c dp_handle_hpd_rx_irq() -> core_link_write_dpcd()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | link | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ctx | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ctx->logger | 4096-ptr_max |
| PARAM_VALUE | 0 | link->dc | 4096-ptr_max |
| PARAM_VALUE | 0 | link->dc->link_srv | 4096-ptr_max |
| PARAM_VALUE | 1 | address | 513 |
| PARAM_VALUE | 2 | *data | 0 |
| PARAM_VALUE | 3 | size | 1 |
| CAPPED_DATA | 0 | link | 1 |
| DATA_SOURCE | 0 | link | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| UNITS | 3 | size | unit_byte |
| LOCK2 | &aconnector->hpd_lock | ||
| HALF_LOCKED2 | &adev->dm.irq_handler_list_table_lock | ||
| HALF_LOCKED2 | irq_table_flags | ||
| TYPE_LOCK | (struct amdgpu_dm_connector)->hpd_lock |
drivers/gpu/drm/amd/amdgpu/../display/dc/link/protocols/link_dp_irq_handler.c dp_handle_tunneling_irq() -> core_link_write_dpcd()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | link | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ctx | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ctx->logger | 4096-ptr_max |
| PARAM_VALUE | 0 | link->dc | 4096-ptr_max |
| PARAM_VALUE | 0 | link->dc->link_srv | 4096-ptr_max |
| PARAM_VALUE | 0 | link->dpcd_caps.usb4_dp_tun_info.dp_tun_cap.bits.dp_tunneling | 1 |
| PARAM_VALUE | 1 | address | 8197 |
| PARAM_VALUE | 2 | data | 420134846946738176 |
| PARAM_VALUE | 2 | *data | 32 |
| PARAM_VALUE | 3 | size | 1 |
| CAPPED_DATA | 0 | link | 1 |
| DATA_SOURCE | 0 | link | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| LOCK2 | &aconnector->hpd_lock | ||
| HALF_LOCKED2 | &adev->dm.irq_handler_list_table_lock | ||
| HALF_LOCKED2 | &pool->lock | ||
| HALF_LOCKED2 | irq_table_flags | ||
| TYPE_LOCK | (struct amdgpu_dm_connector)->hpd_lock |
drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_irq.c dm_handle_hpd_rx_offload_work() -> core_link_write_dpcd()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | link | 4096-ptr_max |
| PARAM_VALUE | 0 | link->audio_test_data.channel_count | 1 |
| PARAM_VALUE | 0 | link->audio_test_data.flags.test_requested | 1 |
| PARAM_VALUE | 0 | link->audio_test_data.pattern_type | 31 |
| PARAM_VALUE | 0 | link->audio_test_data.sampling_rate | 0 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.bw.dcn.clk.socclk_khz | 400000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.ip.dcfclk_cstate_latency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.ip.dispclk_ramp_margin_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.ip.dsc_delay_factor_wa | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.ip.max_hscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.ip.max_vscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.ip.min_prefetch_in_strobe_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.ip.underscan_factor | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.ip.writeback_max_hscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.ip.writeback_max_vscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.ip.writeback_min_hscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.ip.writeback_min_vscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.ip.xfc_fill_bw_overhead_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.dcn_downspread_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.dfs_vco_period_ps | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.dispclk_dppclk_vco_speed_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.downspread_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.dram_channel_width_bytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.dram_clock_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.dram_page_open_time_ns | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.dram_return_buffer_per_channel_bytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.dram_rw_turnaround_time_ns | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.dummy_pstate_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.fclk_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.ideal_dram_bw_after_urgent_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.mall_allocated_for_dcn_mbytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.max_avg_dram_bw_use_normal_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.max_avg_fabric_bw_use_normal_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.max_avg_sdp_bw_use_normal_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.max_vratio_pre | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.min_dcfclk | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.pct_ideal_dram_bw_after_urgent_strobe | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.pct_ideal_fabric_bw_after_urgent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.pct_ideal_sdp_bw_after_urgent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.smn_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.sr_enter_plus_exit_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.sr_enter_plus_exit_z8_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.sr_exit_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.sr_exit_z8_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.urgent_latency_pixel_data_only_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.urgent_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.urgent_latency_vm_data_only_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.usr_retraining_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.writeback_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.xfc_bus_transport_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.xfc_xbuf_latency_tolerance_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.AverageDCCCompressionRate | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.AverageReadBandwidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.AverageReadBandwidthGBytePerSecond | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.BPP | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.BandwidthAvailableForImmediateFlip | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.CriticalPoint | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.CursorBufferSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.CursorChunkSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DCFCLK | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DCFCLKDeepSleep | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DETBufferSizeInTime | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLK | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLKDPPCLKDSCCLKDownSpreading | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLKDPPCLKVCOSpeed | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLKDelaySubtotal | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLKRampingMargin | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLKWithRamping | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLKWithoutRamping | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLK_calculated | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DPPCLKDelayCNVCCursor | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DPPCLKDelayCNVCFormater | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DPPCLKDelaySCL | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DPPCLKDelaySCLLBOnly | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DPPCLKDelaySubtotal | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DPPCLKUsingSingleDPPChroma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DPPCLKUsingSingleDPPLuma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DRAMChannelWidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DRAMClockChangeLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DRAMClockChangeLatencyOverride | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DRAMClockChangeWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DRAMSpeed | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Downspreading | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.EffectiveDETLBLinesChroma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.EffectiveDETLBLinesLuma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.EffectiveDETPlusLBLinesChroma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.EffectiveDETPlusLBLinesLuma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.EffectiveFECOverhead | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.ExtraLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FCLKChangeLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FECOverhead | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FabricAndDRAMBandwidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FabricClock | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FabricDatapathToDCNDataReturn | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FinalDRAMClockChangeLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FinalFillLevel | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FinalFillMargin | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FractionOfUrgentBandwidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FrameTimeForMinFullDETBufferingTime | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.GPUVMMinPageSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.GlobalDPPCLK | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.HostVMMinPageSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.InitFillLevel | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.LastPixelOfLineExtraWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.LinesInDETChroma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.LinesInDETLuma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MaxDCHUBToPSCLThroughput | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MaxDispclkRoundedDownToDFSGranularity | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MaxDispclkRoundedToDFSGranularity | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MaxDppclkRoundedDownToDFSGranularity | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MaxHSCLRatio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MaxPSCLToLBThroughput | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MaxTotalVActiveRDBandwidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MaxVRatioPre | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MaxVSCLRatio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MaxVStartup | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MaximumReadBandwidthWithPrefetch | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MaximumReadBandwidthWithoutPrefetch | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MaximumSwathWidthInDETBuffer | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MaximumSwathWidthInLineBuffer | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MaximumSwathWidthInLineBufferChroma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MaximumSwathWidthInLineBufferLuma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MaximumSwathWidthSupport | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MinActiveDRAMClockChangeMargin | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MinActiveFCLKChangeLatencySupported | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MinFullDETBufferingTime | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MinPixelChunkSizeBytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MinUrgentLatencySupportUs | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.NextMaxVStartup | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.NonUrgentLatencyTolerance | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.NumberOfChannels | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Outbpp | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.PDEAndMetaPTEBytesPerFrameC | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.PDEAndMetaPTEBytesPerFrameY | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.PTEGroupSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.PartOfBurstThatFitsInROB | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.PlaneRequiredDISPCLK | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.PlaneRequiredDISPCLKWithODMCombine | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.PlaneRequiredDISPCLKWithoutODMCombine | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.RemainingFillLevel | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.ReturnBW | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.ReturnBWToDCNPerState | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.ReturnBandwidthToDCN | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.ReturnBusWidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.RoundTripPingLatencyCycles | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.RoundedUpMaxSwathSizeBytesC | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.RoundedUpMaxSwathSizeBytesY | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SMNLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SOCCLK | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SREnterPlusExitTime | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SREnterPlusExitZ8Time | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SRExitTime | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SRExitZ8Time | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SmallestVBlank | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SrcActiveDrainRate | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.StutterBurstTime | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.StutterEfficiency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.StutterEfficiencyNotIncludingVBlank | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.StutterEnterPlusExitWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.StutterExitWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.StutterPeriod | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.StutterPeriodBestCase | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SurfaceRequiredDISPCLK | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SwathWidthGranularityC | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SwathWidthGranularityY | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SwathWidthYCriticalPlane | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TCalc | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TFinalxFill | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TInitXFill | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TWait | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TimeCalc | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TotalBandwidthConsumedGBytePerSecond | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TotalDSCUnitsRequired | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TotalDataReadBandwidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TotalNumberOfActiveOTG | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TotalRowReadBandwidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TslvChk | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.USRRetrainingLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentExtraLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentLatencyPixelDataOnly | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentLatencyPixelMixedWithVMData | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentLatencySupportUsChroma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentLatencySupportUsLuma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentLatencyVMDataOnly | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentOutOfOrderReturnPerChannel | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentRoundTripAndOutOfOrderLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.VBlankTime | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.VStartupMargin | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Watermark.DRAMClockChangeWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Watermark.FCLKChangeWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Watermark.StutterExitWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Watermark.USRRetrainingWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Watermark.UrgentWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Watermark.WritebackUrgentWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Watermark.Z8StutterExitWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackChromaVExtra | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackDISPCLK | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackDRAMClockChangeWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackInterfaceBufferSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackLineBufferChromaBufferSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackLineBufferLumaBufferSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackLineBufferSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackLumaVExtra | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackMaxHSCLRatio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackMaxHSCLTaps | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackMaxVSCLRatio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackMaxVSCLTaps | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackMinHSCLRatio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackMinVSCLRatio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackRequiredDISPCLK | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackUrgentWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCBusTransportTime | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCFillBWOverhead | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCFillConstant | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCRemoteSurfaceFlipDelay | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCSlvChunkSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCTSlvVreadyOffset | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCTSlvVupdateOffset | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCTSlvVupdateWidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCXBUFLatencyTolerance | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Z8StutterEfficiency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Z8StutterEfficiencyBestCase | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Z8StutterEfficiencyNotIncludingVBlank | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Z8StutterEnterPlusExitWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Z8StutterExitWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.bpp | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.dst_x_after_scaler | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.dst_y_after_scaler | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.dummy5 | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.dummy6 | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.ip.dcfclk_cstate_latency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.ip.dispclk_ramp_margin_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.ip.dsc_delay_factor_wa | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.ip.max_hscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.ip.max_vscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.ip.min_prefetch_in_strobe_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.ip.underscan_factor | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.ip.writeback_max_hscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.ip.writeback_max_vscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.ip.writeback_min_hscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.ip.writeback_min_vscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.ip.xfc_fill_bw_overhead_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.soc.dcn_downspread_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.soc.dfs_vco_period_ps | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.soc.dispclk_dppclk_vco_speed_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.soc.downspread_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.soc.dram_channel_width_bytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.soc.dram_clock_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.soc.dram_page_open_time_ns | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.soc.dram_rw_turnaround_time_ns | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.soc.dummy_pstate_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.soc.fclk_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.soc.mall_allocated_for_dcn_mbytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.soc.max_avg_sdp_bw_use_normal_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.soc.max_vratio_pre | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.soc.min_dcfclk | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.soc.pct_ideal_fabric_bw_after_urgent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.soc.pct_ideal_sdp_bw_after_urgent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.soc.smn_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.soc.sr_enter_plus_exit_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.soc.sr_enter_plus_exit_z8_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.soc.sr_exit_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.soc.sr_exit_z8_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.soc.urgent_latency_pixel_data_only_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.soc.urgent_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.soc.urgent_latency_vm_data_only_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.soc.usr_retraining_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.soc.writeback_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.soc.xfc_bus_transport_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.soc.xfc_xbuf_latency_tolerance_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.total_dcn_read_bw_with_flip | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.acceptable_quality_hta_ps | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.acceptable_quality_vta_ps | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.active_dp_ps | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.average_read_bandwidth_gbyte_per_second | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.bandwidth_available_for_immediate_flip | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.block_height256_bytes_c | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.block_height256_bytes_y | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.bw_available_for_immediate_flip | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.byte_per_pix_detc | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.byte_per_pix_dety | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.critical_compression | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.critical_point | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.data_fabric_line_delivery_time_chroma | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.data_fabric_line_delivery_time_luma | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.data_pte_req_height_c | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.data_pte_req_height_y | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.data_pte_req_width_c | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.data_pte_req_width_y | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.dcf_clk_deep_sleep | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.dcfclk | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.dcfclkv_max0p9 | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.dcfclkv_mid0p72 | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.dcfclkv_min0p65 | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.dcfclkv_nom0p8 | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.det_buffer_size_in_kbyte | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.dispclk | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.dispclk_ramping_margin | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.dispclk_with_ramping | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.dispclk_without_ramping | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.downspreading | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.dpp_output_buffer_lines_c | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.dpp_output_buffer_lines_y | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.dpp_output_buffer_pixels | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.dppclk | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.dppclk_using_single_dpp | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.dppclk_using_single_dpp_chroma | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.dppclk_using_single_dpp_luma | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.dppopp_buffering_c | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.dppopp_buffering_y | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.dpte_bytes_per_row_c | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.dpte_bytes_per_row_y | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.dram_clock_change_latency | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.dram_clock_change_margin | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.dram_clock_change_support | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.dram_clock_change_watermark | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.dst_x_after_scaler | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.dst_y_after_scaler | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.dstx_after_scaler | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.dsty_after_scaler | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.effective_det_plus_lb_lines_chroma | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.effective_det_plus_lb_lines_luma | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.effective_detlb_lines_chroma | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.effective_detlb_lines_luma | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.effective_lb_latency_hiding_c | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.effective_lb_latency_hiding_y | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.extra_latency | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.fabric_and_dram_bandwidth | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.fabric_and_dram_bandwidth_vmax0p9 | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.fabric_and_dram_bandwidth_vmid0p72 | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.fabric_and_dram_bandwidth_vmin0p65 | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.fabric_and_dram_bandwidth_vnom0p8 | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.frequency | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.header | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.header_line | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.last_pixel_of_line_extra_watermark | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.lb_latency_hiding_source_lines_c | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.lb_latency_hiding_source_lines_y | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.line_buffer_fixed_bpp | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.line_buffer_size | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.lines_in_det_chroma | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.lines_in_det_luma | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.lines_to_request_prefetch_pixel_data | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.macro_tile_block_height_c | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.macro_tile_block_height_y | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.macro_tile_block_size_bytes_c | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.macro_tile_block_size_bytes_y | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.macro_tile_block_width_c | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.macro_tile_height_c | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.macro_tile_height_y | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.macro_tile_size_byte_y | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.macro_tile_size_bytes_c | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.max_dchub_topscl_throughput | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.max_det_buffering_time_c | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.max_det_buffering_time_y | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.max_dispclk_vmax0p9 | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.max_dispclk_vmid0p72 | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.max_dispclk_vmin0p65 | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.max_dispclk_vnom0p8 | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.max_dppclk_vmax0p9 | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.max_dppclk_vmid0p72 | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.max_dppclk_vmin0p65 | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.max_dppclk_vnom0p8 | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.max_hscl_ratio | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.max_hscl_taps | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.max_inter_dcn_tile_repeaters | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.max_lb_tovscl_throughput | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.max_line_buffer_lines | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.max_num_dpp | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.max_num_writeback | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.max_partial_sw_c | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.max_partial_sw_y | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.max_partial_swath_c | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.max_partial_swath_y | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.max_phyclk | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.max_pscl_tolb_throughput | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.max_rd_bandwidth | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.max_used_bw | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.max_vscl_ratio | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.max_vscl_taps | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.max_vscl_tohscl_throughput | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.maximum_swath_height_c | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.maximum_swath_height_y | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.maximum_swath_width | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.maximum_vstartup | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.meta_chunk_size | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.meta_pte_bytes_frame_c | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.meta_pte_bytes_frame_y | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.meta_pte_bytes_per_frame_c | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.meta_pte_bytes_per_frame_y | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.meta_req_height_c | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.meta_req_height_y | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.meta_req_width_c | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.meta_req_width_y | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.meta_request_width_c | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.meta_request_width_y | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.meta_row_byte_c | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.meta_row_byte_y | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.meta_row_bytes_c | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.meta_row_bytes_y | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.meta_surf_height_c | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.meta_surf_height_y | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.meta_surf_width_c | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.meta_surf_width_y | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.meta_surface_height_c | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.meta_surface_height_y | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.meta_surface_width_c | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.meta_surface_width_y | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.min_active_dram_clock_change_margin | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.min_dispclk_using_dual_dpp | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.min_dispclk_using_single_dpp | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.min_full_det_buffering_time | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.min_urgent_latency_support_us | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.min_vblank_dram_clock_change_margin | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.minimum_swath_height_c | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.minimum_swath_height_y | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.next_prefetch_mode | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.non_urgent_latency_tolerance | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.number_of_channels | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.number_of_dpp_required_for_det_size | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.number_of_dpp_required_for_lb_size | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.opp_output_buffer_lines | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.part_of_burst_that_fits_in_rob | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.phyclkv_max0p9 | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.phyclkv_mid0p72 | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.phyclkv_min0p65 | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.phyclkv_nom0p8 | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.pixel_chunk_size_in_kbyte | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.pixel_pte_bytes_per_row_c | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.pixel_pte_bytes_per_row_y | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.pixel_pte_req_height_c | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.pixel_pte_req_height_y | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.pixel_pte_req_width_c | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.pixel_pte_req_width_y | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.prefetch_mode | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.projected_dcfclk_deep_sleep | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.pte_buffer_size_in_requests | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.pte_chunk_size | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.ptemeta_urgent_watermark | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.read256_bytes_block_height_c | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.read256_bytes_block_height_y | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.read256_bytes_block_width_c | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.read256_bytes_block_width_y | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.required_output_bw | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.required_prefetch_pix_data_bw | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.return_bandwidth_to_dcn | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.return_bus_width | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.return_bw | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.return_bw_todcn_per_state | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.rob_buffer_size_in_kbyte | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.round_trip_ping_latency_cycles | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.rounded_up_max_swath_size_bytes_c | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.rounded_up_max_swath_size_bytes_y | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.smallest_vblank | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.socclk | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.sr_enter_plus_exit_time | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.sr_exit_time | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.stutter_burst_time | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.stutter_efficiency | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.stutter_efficiency_not_including_vblank | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.stutter_enter_plus_exit_watermark | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.stutter_exit_watermark | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.swath_width | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.swath_width_granularity_c | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.swath_width_granularity_y | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.t_calc | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.t_setup | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.t_wait | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.time_calc | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.time_for_fetching_meta_pte | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.time_for_fetching_row_in_vblank | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.time_for_meta_pte_with_immediate_flip | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.time_for_meta_pte_without_immediate_flip | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.time_setup | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.tot_immediate_flip_bytes | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.total_active_dpp | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.total_active_writeback | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.total_data_read_bandwidth | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.total_dcc_active_dpp | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.total_number_of_active_writeback | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.total_repeater_delay | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.total_repeater_delay_time | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.under_scan_factor | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.urgent_extra_latency | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.urgent_latency | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.urgent_latency_support_us_chroma | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.urgent_latency_support_us_luma | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.urgent_out_of_order_return_per_channel | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.urgent_watermark | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.v_blank_time | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.v_init_c | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.v_init_y | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.v_startup_lines | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.vmm_page_size | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.voltage_level_with_immediate_flip | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.voltage_level_without_immediate_flip | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.wr_bandwidth | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.write_back_latency | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.writeback_chroma_buffer_size | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.writeback_chunk_size | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.writeback_dram_clock_change_watermark | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->dcn_bw_vars.writeback_luma_buffer_size | -9223372036854775808.000000-9223372036854775808.000000 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->pp_display_cfg.crtc_index | 0-6 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_dlg_sys_param.mem_trip_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_dlg_sys_param.t_extra_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_dlg_sys_param.t_mclk_wm_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_dlg_sys_param.t_sr_wm_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_dlg_sys_param.t_urg_wm_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_dlg_sys_param.total_flip_bw | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_input.clks_cfg.dcfclk_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_input.clks_cfg.dispclk_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_input.clks_cfg.dppclk_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_input.clks_cfg.refclk_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_input.clks_cfg.socclk_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_input.dout.output_bpp | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_input.dout.wb.wb_hratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_input.dout.wb.wb_vratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.dml_input.pipe.dest.pixel_rate_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->res_ctx.temp_pipe.pipe_dlg_param.pixel_rate_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.ip.dcfclk_cstate_latency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.ip.dispclk_ramp_margin_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.ip.dsc_delay_factor_wa | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.ip.max_hscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.ip.max_vscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.ip.min_prefetch_in_strobe_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.ip.underscan_factor | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.ip.writeback_max_hscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.ip.writeback_max_vscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.ip.writeback_min_hscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.ip.writeback_min_vscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.ip.xfc_fill_bw_overhead_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.soc.dcn_downspread_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.soc.dfs_vco_period_ps | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.soc.dispclk_dppclk_vco_speed_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.soc.downspread_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.soc.dram_channel_width_bytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.soc.dram_clock_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.soc.dram_page_open_time_ns | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.soc.dram_return_buffer_per_channel_bytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.soc.dram_rw_turnaround_time_ns | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.soc.dummy_pstate_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.soc.fabric_datapath_to_dcn_data_return_bytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.soc.fclk_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.soc.ideal_dram_bw_after_urgent_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.soc.mall_allocated_for_dcn_mbytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.soc.max_avg_dram_bw_use_normal_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.soc.max_avg_dram_bw_use_normal_strobe_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.soc.max_avg_fabric_bw_use_normal_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.soc.max_avg_sdp_bw_use_normal_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.soc.max_vratio_pre | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.soc.min_dcfclk | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.soc.pct_ideal_dram_bw_after_urgent_strobe | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.soc.pct_ideal_dram_sdp_bw_after_urgent_pixel_and_vm | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.soc.pct_ideal_dram_sdp_bw_after_urgent_pixel_only | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.soc.pct_ideal_dram_sdp_bw_after_urgent_vm_only | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.soc.pct_ideal_fabric_bw_after_urgent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.soc.pct_ideal_sdp_bw_after_urgent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.soc.smn_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.soc.sr_enter_plus_exit_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.soc.sr_enter_plus_exit_z8_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.soc.sr_exit_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.soc.sr_exit_z8_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.soc.urgent_latency_adjustment_fabric_clock_component_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.soc.urgent_latency_adjustment_fabric_clock_reference_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.soc.urgent_latency_pixel_data_only_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.soc.urgent_latency_pixel_mixed_with_vm_data_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.soc.urgent_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.soc.urgent_latency_vm_data_only_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.soc.usr_retraining_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.soc.writeback_dram_clock_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.soc.writeback_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.soc.xfc_bus_transport_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.soc.xfc_xbuf_latency_tolerance_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.AverageDCCCompressionRate | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.AverageReadBandwidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.AverageReadBandwidthGBytePerSecond | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.BPP | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.BandwidthAvailableForImmediateFlip | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.CriticalPoint | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.CursorBufferSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.CursorChunkSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.DCFCLK | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.DCFCLKDeepSleep | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.DETBufferSizeInTime | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.DISPCLK | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.DISPCLKDPPCLKDSCCLKDownSpreading | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.DISPCLKDPPCLKVCOSpeed | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.DISPCLKDelaySubtotal | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.DISPCLKRampingMargin | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.DISPCLKWithRamping | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.DISPCLKWithRampingRoundedToDFSGranularity | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.DISPCLKWithoutRamping | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.DISPCLKWithoutRampingRoundedToDFSGranularity | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.DISPCLK_calculated | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.DPPCLKDelayCNVCCursor | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.DPPCLKDelayCNVCFormater | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.DPPCLKDelaySCL | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.DPPCLKDelaySCLLBOnly | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.DPPCLKDelaySubtotal | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.DPPCLKUsingSingleDPPChroma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.DPPCLKUsingSingleDPPLuma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.DRAMChannelWidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.DRAMClockChangeLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.DRAMClockChangeLatencyOverride | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.DRAMClockChangeWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.DRAMSpeed | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.Downspreading | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.EffectiveDETLBLinesChroma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.EffectiveDETLBLinesLuma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.EffectiveDETPlusLBLinesChroma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.EffectiveDETPlusLBLinesLuma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.EffectiveFECOverhead | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.ExtraLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.FCLKChangeLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.FECOverhead | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.FabricAndDRAMBandwidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.FabricClock | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.FabricDatapathToDCNDataReturn | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.FinalDRAMClockChangeLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.FinalFillLevel | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.FinalFillMargin | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.FractionOfUrgentBandwidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.FractionOfUrgentBandwidthImmediateFlip | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.FrameTimeForMinFullDETBufferingTime | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.GPUVMMinPageSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.GlobalDPPCLK | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.HostVMMinPageSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.InitFillLevel | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.LastPixelOfLineExtraWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.LinesInDETChroma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.LinesInDETLuma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.LinesToFinishSwathTransferStutterCriticalPlane | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.MaxDCHUBToPSCLThroughput | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.MaxDispclkRoundedDownToDFSGranularity | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.MaxDispclkRoundedToDFSGranularity | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.MaxDppclkRoundedDownToDFSGranularity | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.MaxHSCLRatio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.MaxPSCLToLBThroughput | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.MaxTotalVActiveRDBandwidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.MaxVRatioPre | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.MaxVSCLRatio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.MaxVStartup | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.MaximumReadBandwidthWithPrefetch | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.MaximumReadBandwidthWithoutPrefetch | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.MaximumSwathWidthInDETBuffer | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.MaximumSwathWidthInLineBuffer | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.MaximumSwathWidthInLineBufferChroma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.MaximumSwathWidthInLineBufferLuma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.MaximumSwathWidthSupport | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.MinActiveDRAMClockChangeLatencySupported | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.MinActiveDRAMClockChangeMargin | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.MinActiveFCLKChangeLatencySupported | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.MinFullDETBufferingTime | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.MinPixelChunkSizeBytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.MinUrgentLatencySupportUs | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.NextMaxVStartup | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.NonUrgentLatencyTolerance | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.NumberOfChannels | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.Outbpp | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.PDEAndMetaPTEBytesPerFrameC | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.PDEAndMetaPTEBytesPerFrameY | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.PTEGroupSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.PartOfBurstThatFitsInROB | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.PercentOfIdealDRAMBWReceivedAfterUrgLatencyPixelDataOnly | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.PercentOfIdealDRAMBWReceivedAfterUrgLatencyPixelMixedWithVMData | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.PercentOfIdealDRAMBWReceivedAfterUrgLatencySTROBE | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.PercentOfIdealDRAMBWReceivedAfterUrgLatencyVMDataOnly | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.PercentOfIdealFabricAndSDPPortBWReceivedAfterUrgLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.PlaneRequiredDISPCLK | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.PlaneRequiredDISPCLKWithODMCombine | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.PlaneRequiredDISPCLKWithODMCombine2To1 | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.PlaneRequiredDISPCLKWithODMCombine4To1 | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.PlaneRequiredDISPCLKWithoutODMCombine | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.RemainingFillLevel | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.ReturnBW | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.ReturnBWToDCNPerState | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.ReturnBandwidthToDCN | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.ReturnBusWidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.RoundTripPingLatencyCycles | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.RoundedUpMaxSwathSizeBytesC | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.RoundedUpMaxSwathSizeBytesY | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.SMNLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.SOCCLK | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.SREnterPlusExitTime | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.SREnterPlusExitZ8Time | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.SRExitTime | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.SRExitZ8Time | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.SmallestVBlank | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.SrcActiveDrainRate | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.StutterBurstTime | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.StutterEfficiency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.StutterEfficiencyNotIncludingVBlank | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.StutterEnterPlusExitWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.StutterExitWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.StutterPeriod | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.StutterPeriodBestCase | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.SurfaceRequiredDISPCLK | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.SurfaceRequiredDISPCLKWithoutODMCombine | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.SwathWidthGranularityC | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.SwathWidthGranularityY | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.SwathWidthYCriticalPlane | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.TCalc | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.TFinalxFill | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.TInitXFill | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.TWait | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.TimeCalc | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.TotalBandwidthConsumedGBytePerSecond | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.TotalDSCUnitsRequired | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.TotalDataReadBandwidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.TotalNumberOfActiveOTG | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.TotalRowReadBandwidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.TslvChk | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.USRRetrainingLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.UrgentExtraLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.UrgentLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.UrgentLatencyAdjustmentFabricClockComponent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.UrgentLatencyAdjustmentFabricClockReference | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.UrgentLatencyPixelDataOnly | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.UrgentLatencyPixelMixedWithVMData | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.UrgentLatencySupportUsChroma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.UrgentLatencySupportUsLuma | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.UrgentLatencyVMDataOnly | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.UrgentOutOfOrderReturnPerChannel | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.UrgentOutOfOrderReturnPerChannelPixelDataOnly | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.UrgentOutOfOrderReturnPerChannelPixelMixedWithVMData | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.UrgentOutOfOrderReturnPerChannelVMDataOnly | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.UrgentRoundTripAndOutOfOrderLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.UrgentWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.VBlankTime | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.VStartupMargin | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.Watermark.DRAMClockChangeWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.Watermark.FCLKChangeWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.Watermark.StutterEnterPlusExitWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.Watermark.StutterExitWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.Watermark.USRRetrainingWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.Watermark.UrgentWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.Watermark.WritebackDRAMClockChangeWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.Watermark.WritebackFCLKChangeWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.Watermark.WritebackUrgentWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.Watermark.Z8StutterEnterPlusExitWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.Watermark.Z8StutterExitWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.WritebackChromaVExtra | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.WritebackDISPCLK | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.WritebackDRAMClockChangeWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.WritebackInterfaceBufferSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.WritebackLatency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.WritebackLineBufferChromaBufferSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.WritebackLineBufferLumaBufferSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.WritebackLineBufferSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.WritebackLumaVExtra | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.WritebackMaxHSCLRatio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.WritebackMaxHSCLTaps | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.WritebackMaxVSCLRatio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.WritebackMaxVSCLTaps | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.WritebackMinHSCLRatio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.WritebackMinVSCLRatio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.WritebackRequiredDISPCLK | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.WritebackUrgentWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.XFCBusTransportTime | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.XFCFillBWOverhead | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.XFCFillConstant | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.XFCRemoteSurfaceFlipDelay | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.XFCSlvChunkSize | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.XFCTSlvVreadyOffset | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.XFCTSlvVupdateOffset | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.XFCTSlvVupdateWidth | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.XFCXBUFLatencyTolerance | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.Z8StutterEfficiency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.Z8StutterEfficiencyBestCase | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.Z8StutterEfficiencyNotIncludingVBlank | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.Z8StutterEfficiencyNotIncludingVBlankBestCase | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.Z8StutterEnterPlusExitWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.Z8StutterExitWatermark | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.bpp | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.dst_x_after_scaler | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.dst_y_after_scaler | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.dummy5 | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.dummy6 | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.ip.dcfclk_cstate_latency | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.ip.dispclk_ramp_margin_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.ip.dsc_delay_factor_wa | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.ip.max_hscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.ip.max_vscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.ip.min_prefetch_in_strobe_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.ip.underscan_factor | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.ip.writeback_max_hscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.ip.writeback_max_vscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.ip.writeback_min_hscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.ip.writeback_min_vscl_ratio | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.ip.xfc_fill_bw_overhead_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.soc.dcn_downspread_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.soc.dfs_vco_period_ps | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.soc.dispclk_dppclk_vco_speed_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.soc.downspread_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.soc.dram_channel_width_bytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.soc.dram_clock_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.soc.dram_page_open_time_ns | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.soc.dram_return_buffer_per_channel_bytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.soc.dram_rw_turnaround_time_ns | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.soc.dummy_pstate_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.soc.fabric_datapath_to_dcn_data_return_bytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.soc.fclk_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.soc.ideal_dram_bw_after_urgent_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.soc.mall_allocated_for_dcn_mbytes | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.soc.max_avg_dram_bw_use_normal_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.soc.max_avg_dram_bw_use_normal_strobe_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.soc.max_avg_fabric_bw_use_normal_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.soc.max_avg_sdp_bw_use_normal_percent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.soc.max_vratio_pre | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.soc.min_dcfclk | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.soc.pct_ideal_dram_bw_after_urgent_strobe | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.soc.pct_ideal_dram_sdp_bw_after_urgent_pixel_and_vm | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.soc.pct_ideal_dram_sdp_bw_after_urgent_pixel_only | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.soc.pct_ideal_dram_sdp_bw_after_urgent_vm_only | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.soc.pct_ideal_fabric_bw_after_urgent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.soc.pct_ideal_sdp_bw_after_urgent | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.soc.smn_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.soc.sr_enter_plus_exit_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.soc.sr_enter_plus_exit_z8_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.soc.sr_exit_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.soc.sr_exit_z8_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.soc.urgent_latency_adjustment_fabric_clock_component_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.soc.urgent_latency_adjustment_fabric_clock_reference_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.soc.urgent_latency_pixel_data_only_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.soc.urgent_latency_pixel_mixed_with_vm_data_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.soc.urgent_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.soc.urgent_latency_vm_data_only_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.soc.usr_retraining_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.soc.writeback_dram_clock_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.soc.writeback_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.soc.xfc_bus_transport_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.soc.xfc_xbuf_latency_tolerance_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.total_dcn_read_bw_with_flip | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml.vba.total_dcn_read_bw_with_flip_no_urgent_burst | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml2_dc_power_options.bbox_overrides.dchub_refclk_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml2_dc_power_options.bbox_overrides.disp_pll_vco_speed_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml2_dc_power_options.bbox_overrides.dprefclk_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml2_dc_power_options.bbox_overrides.dram_clock_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml2_dc_power_options.bbox_overrides.fclk_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml2_dc_power_options.bbox_overrides.sr_enter_plus_exit_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml2_dc_power_options.bbox_overrides.sr_enter_plus_exit_z8_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml2_dc_power_options.bbox_overrides.sr_exit_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml2_dc_power_options.bbox_overrides.sr_exit_z8_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml2_dc_power_options.bbox_overrides.urgent_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml2_dc_power_options.bbox_overrides.xtalclk_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml2_options.bbox_overrides.dchub_refclk_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml2_options.bbox_overrides.disp_pll_vco_speed_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml2_options.bbox_overrides.dprefclk_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml2_options.bbox_overrides.dram_clock_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml2_options.bbox_overrides.fclk_change_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml2_options.bbox_overrides.sr_enter_plus_exit_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml2_options.bbox_overrides.sr_enter_plus_exit_z8_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml2_options.bbox_overrides.sr_exit_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml2_options.bbox_overrides.sr_exit_z8_time_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml2_options.bbox_overrides.urgent_latency_us | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->dml2_options.bbox_overrides.xtalclk_mhz | -9.223372e+18-9.223372e+18 |
| PARAM_VALUE | 0 | link->dc->link_srv->detect_connection_type | 4096-ptr_max |
| PARAM_VALUE | 0 | link->dc->link_srv->dp_handle_automated_test | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ddc->ctx->driver_context->dm.dpia_aux_lock.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | link->ddc->ctx->driver_context->dm.dpia_aux_lock.first_waiter->list.prev->prev | 5159360019465732096 |
| PARAM_VALUE | 0 | link->ddc->ctx->driver_context->dm.dpia_aux_lock.first_waiter->task->blocked_on | (-1)-0 |
| PARAM_VALUE | 0 | link->ddc->ctx->driver_context->dm.dpia_aux_lock.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_clock->mode | s32min-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_clock->pin | 0-s64max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_data->mode | s32min-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_data->pin | 0-s64max |
| PARAM_VALUE | 0 | link->ddc->link->priv->i2c->base.bus_lock.rtmutex.owner | 0-1 |
| PARAM_VALUE | 0 | link->ddc->link->priv->i2c->base.dev.driver_data->adev->pm.bus_locked | 0-1 |
| PARAM_VALUE | 0 | link->ddc->link->priv->i2c->base.dev.driver_data->mutex->wait_lock.owner | (-4611686018427387904)-4611686018427387903 |
| PARAM_VALUE | 0 | link->hpd_status | 0 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->list.next | 5159360019465732096 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->list.prev->prev | 0,5159360019465732096 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->magic | 5159360019465732096 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->blocked_lock.owner | (-1) |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->blocked_lock.owner_cpu | 4294967295 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->blocked_on | 0 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->usage.refs.counter | s32min-s32max |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | link->priv->timing_changed | 1 |
| PARAM_VALUE | 0 | link->priv->timing_requested->aspect_ratio | 0-4294967295 |
| PARAM_VALUE | 0 | link->priv->timing_requested->display_color_depth | 0-4 |
| PARAM_VALUE | 0 | link->priv->timing_requested->dsc_cfg.bits_per_pixel | 0-4294967295 |
| PARAM_VALUE | 0 | link->priv->timing_requested->dsc_cfg.block_pred_enable | 0-1 |
| PARAM_VALUE | 0 | link->priv->timing_requested->dsc_cfg.is_dp | 0-1 |
| PARAM_VALUE | 0 | link->priv->timing_requested->dsc_cfg.is_frl | 0-1 |
| PARAM_VALUE | 0 | link->priv->timing_requested->dsc_cfg.is_vic_all_bpp | 0-1 |
| PARAM_VALUE | 0 | link->priv->timing_requested->dsc_cfg.linebuf_depth | 0-4294967295 |
| PARAM_VALUE | 0 | link->priv->timing_requested->dsc_cfg.mst_pbn | 0-4294967295 |
| PARAM_VALUE | 0 | link->priv->timing_requested->dsc_cfg.num_slices_h | 0-4294967295 |
| PARAM_VALUE | 0 | link->priv->timing_requested->dsc_cfg.num_slices_v | 0-4294967295 |
| PARAM_VALUE | 0 | link->priv->timing_requested->dsc_cfg.rc_buffer_size | s32min-s32max |
| PARAM_VALUE | 0 | link->priv->timing_requested->dsc_cfg.total_chunk_kbytes | 0-4294967295 |
| PARAM_VALUE | 0 | link->priv->timing_requested->dsc_cfg.version_minor | 0-4294967295 |
| PARAM_VALUE | 0 | link->priv->timing_requested->dsc_cfg.ycbcr422_simple | 0-1 |
| PARAM_VALUE | 0 | link->priv->timing_requested->dsc_fixed_bits_per_pixel_x16 | 0-4294967295 |
| PARAM_VALUE | 0 | link->priv->timing_requested->expanded_hblank | 0-4294967295 |
| PARAM_VALUE | 0 | link->priv->timing_requested->flags.DSC | 0-1 |
| PARAM_VALUE | 0 | link->priv->timing_requested->flags.DTD_COUNTER | 0-31 |
| PARAM_VALUE | 0 | link->priv->timing_requested->flags.EXCLUSIVE_3D | 0-1 |
| PARAM_VALUE | 0 | link->priv->timing_requested->flags.FORCE_HDR | 0-1 |
| PARAM_VALUE | 0 | link->priv->timing_requested->flags.HORZ_COUNT_BY_TWO | 0-1 |
| PARAM_VALUE | 0 | link->priv->timing_requested->flags.HSYNC_POSITIVE_POLARITY | 0-1 |
| PARAM_VALUE | 0 | link->priv->timing_requested->flags.INTERLACE | 0-1 |
| PARAM_VALUE | 0 | link->priv->timing_requested->flags.LTE_340MCSC_SCRAMBLE | 0-1 |
| PARAM_VALUE | 0 | link->priv->timing_requested->flags.RIGHT_EYE_3D_POLARITY | 0-1 |
| PARAM_VALUE | 0 | link->priv->timing_requested->flags.STEREO_3D_PREFERENCE | 0-1 |
| PARAM_VALUE | 0 | link->priv->timing_requested->flags.SUB_SAMPLE_3D | 0-1 |
| PARAM_VALUE | 0 | link->priv->timing_requested->flags.USE_IN_3D_VIEW_ONLY | 0-1 |
| PARAM_VALUE | 0 | link->priv->timing_requested->flags.VBLANK_SYNCHRONIZABLE | 0-1 |
| PARAM_VALUE | 0 | link->priv->timing_requested->flags.VSYNC_POSITIVE_POLARITY | 0-1 |
| PARAM_VALUE | 0 | link->priv->timing_requested->flags.YCBCR420 | 0-1 |
| PARAM_VALUE | 0 | link->priv->timing_requested->flags.Y_ONLY | 0-1 |
| PARAM_VALUE | 0 | link->priv->timing_requested->fr_index | 0-4294967295 |
| PARAM_VALUE | 0 | link->priv->timing_requested->frl_uncompressed_video_bandwidth_in_kbps | 0-4294967295 |
| PARAM_VALUE | 0 | link->priv->timing_requested->h_addressable | 0-4294967295 |
| PARAM_VALUE | 0 | link->priv->timing_requested->h_border_left | 0-4294967295 |
| PARAM_VALUE | 0 | link->priv->timing_requested->h_border_right | 0-4294967295 |
| PARAM_VALUE | 0 | link->priv->timing_requested->h_front_porch | 0-4294967295 |
| PARAM_VALUE | 0 | link->priv->timing_requested->h_sync_width | 0-4294967295 |
| PARAM_VALUE | 0 | link->priv->timing_requested->h_total | 0-4294967295 |
| PARAM_VALUE | 0 | link->priv->timing_requested->hdmi_vic | 0-4294967295 |
| PARAM_VALUE | 0 | link->priv->timing_requested->max_refresh_in_uhz | 0-4294967295 |
| PARAM_VALUE | 0 | link->priv->timing_requested->min_refresh_in_uhz | 0-4294967295 |
| PARAM_VALUE | 0 | link->priv->timing_requested->pix_clk_100hz | 0-4294967295 |
| PARAM_VALUE | 0 | link->priv->timing_requested->pixel_encoding | 1-3 |
| PARAM_VALUE | 0 | link->priv->timing_requested->rid | 0-4294967295 |
| PARAM_VALUE | 0 | link->priv->timing_requested->scan_type | 0-4294967295 |
| PARAM_VALUE | 0 | link->priv->timing_requested->timing_3d_format | 0-4294967295 |
| PARAM_VALUE | 0 | link->priv->timing_requested->v_addressable | 0-4294967295 |
| PARAM_VALUE | 0 | link->priv->timing_requested->v_border_bottom | 0-4294967295 |
| PARAM_VALUE | 0 | link->priv->timing_requested->v_border_top | 0-4294967295 |
| PARAM_VALUE | 0 | link->priv->timing_requested->v_front_porch | 0-4294967295 |
| PARAM_VALUE | 0 | link->priv->timing_requested->v_sync_width | 0-4294967295 |
| PARAM_VALUE | 0 | link->priv->timing_requested->v_total | 0-4294967295 |
| PARAM_VALUE | 0 | link->priv->timing_requested->vic | 0-4294967295 |
| PARAM_VALUE | 0 | link->verified_link_cap.lane_count | 0 |
| PARAM_VALUE | 0 | link->verified_link_cap.link_rate | 0 |
| PARAM_VALUE | 1 | address | 608 |
| PARAM_VALUE | 3 | size | 1 |
| RX_PATH | |||
| NOCHECK_CALL | |||
| UNITS | 3 | size | unit_byte |
| LOCK2 | &adev->dm.dc_lock | ||
| TYPE_LOCK | (struct amdgpu_display_manager)->dc_lock |
58030d6fa8df3e6e configure_lttpr_mode_non_transparent() -> core_link_write_dpcd()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | link | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DPPCLKUsingSingleDPPChroma | -inf-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DPPCLKUsingSingleDPPLuma | -inf-1.797693e+308 |
| PARAM_VALUE | 0 | link->dc | 4096-ptr_max |
| PARAM_VALUE | 0 | link->dc->hwss.enable_dp_link_output | 4096-ptr_max |
| PARAM_VALUE | 0 | link->dc->link_srv | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_clock->id | s32min-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_clock->mode | s32min-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_clock->pin | 0-s64max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_data->id | s32min-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_data->mode | s32min-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_data->pin | 0-s64max |
| PARAM_VALUE | 0 | link->phy_state.symclk_state | 1 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->blocked_lock.owner | (-1) |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->blocked_lock.owner_cpu | 4294967295 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->usage.refs.counter | s32min-s32max |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.osq.tail.counter | s32min-s32max |
| PARAM_VALUE | 1 | address | 983043 |
| PARAM_VALUE | 2 | data | 3133033029232369664 |
| PARAM_VALUE | 2 | *data | 85 |
| PARAM_VALUE | 3 | size | 1 |
| DATA_SOURCE | 0 | link | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| UNITS | 3 | size | unit_byte |
58030d6fa8df3e6e configure_lttpr_mode_non_transparent() -> core_link_write_dpcd()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | link | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DPPCLKUsingSingleDPPChroma | -inf-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DPPCLKUsingSingleDPPLuma | -inf-1.797693e+308 |
| PARAM_VALUE | 0 | link->dc | 4096-ptr_max |
| PARAM_VALUE | 0 | link->dc->hwss.enable_dp_link_output | 4096-ptr_max |
| PARAM_VALUE | 0 | link->dc->link_srv | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_clock->id | s32min-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_clock->mode | s32min-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_clock->pin | 0-s64max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_data->id | s32min-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_data->mode | s32min-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_data->pin | 0-s64max |
| PARAM_VALUE | 0 | link->phy_state.symclk_state | 1 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->blocked_lock.owner | (-1) |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->blocked_lock.owner_cpu | 4294967295 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->usage.refs.counter | s32min-s32max |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.osq.tail.counter | s32min-s32max |
| PARAM_VALUE | 1 | address | 983043 |
| PARAM_VALUE | 2 | data | 3133033029232369664 |
| PARAM_VALUE | 2 | *data | 170 |
| PARAM_VALUE | 3 | size | 1 |
| DATA_SOURCE | 0 | link | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| UNITS | 3 | size | unit_byte |
58030d6fa8df3e6e configure_lttpr_mode_transparent() -> core_link_write_dpcd()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | link | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DPPCLKUsingSingleDPPChroma | -inf-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DPPCLKUsingSingleDPPLuma | -inf-1.797693e+308 |
| PARAM_VALUE | 0 | link->dc | 4096-ptr_max |
| PARAM_VALUE | 1 | address | 983043 |
| PARAM_VALUE | 2 | data | 1555684630337413120 |
| PARAM_VALUE | 2 | *data | 85 |
| PARAM_VALUE | 3 | size | 1 |
| DATA_SOURCE | 0 | link | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| UNITS | 3 | size | unit_byte |
58030d6fa8df3e6e dp_transition_to_video_idle() -> core_link_write_dpcd()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | link | 4096-ptr_max |
| PARAM_VALUE | 0 | link->chip_caps | 2-u16max |
| PARAM_VALUE | 0 | link->ctx->dc->dml.soc.dram_clock_change_latency_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.soc.sr_enter_plus_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.soc.sr_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.AverageDCCCompressionRate | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.AverageReadBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.AverageReadBandwidthGBytePerSecond | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DCFCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DISPCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DISPCLKDPPCLKDSCCLKDownSpreading | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DISPCLKDPPCLKVCOSpeed | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DISPCLKRampingMargin | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DISPCLKWithRampingRoundedToDFSGranularity | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DISPCLKWithoutRampingRoundedToDFSGranularity | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DISPCLK_calculated | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DPPCLKUsingSingleDPPChroma | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DPPCLKUsingSingleDPPLuma | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DRAMChannelWidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DRAMClockChangeLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DRAMClockChangeWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DRAMSpeed | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.Downspreading | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.FCLKChangeLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.FabricAndDRAMBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.FabricClock | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.FabricDatapathToDCNDataReturn | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.FinalDRAMClockChangeLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.FrameTimeForMinFullDETBufferingTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.GlobalDPPCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.LinesToFinishSwathTransferStutterCriticalPlane | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.MaxDispclkRoundedToDFSGranularity | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.MaxHSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.MaxVRatioPre | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.MaxVSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.MinActiveDRAMClockChangeLatencySupported | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.MinActiveFCLKChangeLatencySupported | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.MinUrgentLatencySupportUs | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.NonUrgentLatencyTolerance | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.PercentOfIdealDRAMBWReceivedAfterUrgLatencyPixelDataOnly | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.PercentOfIdealDRAMBWReceivedAfterUrgLatencySTROBE | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.PercentOfIdealDRAMBWReceivedAfterUrgLatencyVMDataOnly | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.PercentOfIdealFabricAndSDPPortBWReceivedAfterUrgLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.ReturnBandwidthToDCN | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.SMNLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.SOCCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.SREnterPlusExitTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.SREnterPlusExitZ8Time | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.SRExitTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.SRExitZ8Time | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.SmallestVBlank | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.StutterEfficiency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.StutterEfficiencyNotIncludingVBlank | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.StutterEnterPlusExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.StutterPeriod | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.SwathWidthYCriticalPlane | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.TCalc | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.TFinalxFill | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.TotalDataReadBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.TotalRowReadBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.TslvChk | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.USRRetrainingLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentExtraLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentLatencyAdjustmentFabricClockComponent | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentLatencyAdjustmentFabricClockReference | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentLatencyPixelDataOnly | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentLatencyPixelMixedWithVMData | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentLatencyVMDataOnly | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentRoundTripAndOutOfOrderLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.VBlankTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.VStartupMargin | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.WritebackDRAMClockChangeWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.WritebackLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.WritebackMaxHSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.WritebackMaxVSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.WritebackMinHSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.WritebackMinVSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.WritebackUrgentWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.XFCBusTransportTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.XFCFillBWOverhead | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.XFCRemoteSurfaceFlipDelay | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.XFCTSlvVreadyOffset | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.XFCTSlvVupdateOffset | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.XFCTSlvVupdateWidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.XFCXBUFLatencyTolerance | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.Z8StutterEfficiency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.Z8StutterEfficiencyBestCase | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.Z8StutterEfficiencyNotIncludingVBlank | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.Z8StutterEfficiencyNotIncludingVBlankBestCase | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.Z8StutterEnterPlusExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.Z8StutterExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.soc.dram_clock_change_latency_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.soc.sr_enter_plus_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.soc.sr_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.total_dcn_read_bw_with_flip_no_urgent_burst | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->dc | 4096-ptr_max |
| PARAM_VALUE | 0 | link->dc->hwss.enable_dp_link_output | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ddc->ctx->driver_context->dm.dpia_aux_lock.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | link->ddc->ctx->driver_context->dm.dpia_aux_lock.first_waiter->list.prev->prev | 5159360019465732096 |
| PARAM_VALUE | 0 | link->ddc->ctx->driver_context->dm.dpia_aux_lock.first_waiter->task->blocked_on | (-1)-0 |
| PARAM_VALUE | 0 | link->ddc->ctx->driver_context->dm.dpia_aux_lock.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_clock->id | s32min-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_clock->mode | s32min-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_clock->pin | 0-s64max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_data->id | s32min-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_data->mode | s32min-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_data->pin | 0-s64max |
| PARAM_VALUE | 0 | link->dpcd_caps.lttpr_caps.mode | 85,170 |
| PARAM_VALUE | 0 | link->dpcd_caps.max_ln_count.bits.POST_LT_ADJ_REQ_SUPPORTED | 1 |
| PARAM_VALUE | 0 | link->phy_state.symclk_state | 1 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex->first_waiter->task->blocked_lock.owner | (-4611686018427387904)-4611686018427387903 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->list.next | 5159360019465732096 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->list.prev->prev | 0,5159360019465732096 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->blocked_lock.owner | (-1) |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->blocked_lock.owner_cpu | 4294967295 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->blocked_on | (-1)-0 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->usage.refs.counter | s32min-s32max |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.osq.tail.counter | s32min-s32max |
| PARAM_VALUE | 0 | *link->ctx->dc->scratch.pipes_to_unlock_first | 0-1 |
| PARAM_VALUE | 0 | *link->ddc->ddc_pin->pin_clock->pin->en | 0-4294967295 |
| PARAM_VALUE | 0 | *link->ddc->ddc_pin->pin_clock->pin->id | s32min-s32max |
| PARAM_VALUE | 0 | *link->ddc->ddc_pin->pin_clock->pin->mode | s32min-s32max |
| PARAM_VALUE | 0 | *link->ddc->ddc_pin->pin_clock->pin->opened | 0-1 |
| PARAM_VALUE | 0 | *link->ddc->ddc_pin->pin_data->pin->en | 0-4294967295 |
| PARAM_VALUE | 0 | *link->ddc->ddc_pin->pin_data->pin->id | s32min-s32max |
| PARAM_VALUE | 0 | *link->ddc->ddc_pin->pin_data->pin->mode | s32min-s32max |
| PARAM_VALUE | 0 | *link->ddc->ddc_pin->pin_data->pin->opened | 0-1 |
| PARAM_VALUE | 0 | *link->dpcd_caps.edp_supported_link_rates | 0-4294967295 |
| PARAM_VALUE | 0 | *link->dpcd_caps.lttpr_caps.aux_rd_interval | 0-255 |
| PARAM_VALUE | 1 | address | 257 |
| PARAM_VALUE | 2 | *data | 0 |
| PARAM_VALUE | 3 | size | 1 |
| CAPPED_DATA | 0 | link | 1 |
| DATA_SOURCE | 0 | link | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| UNITS | 3 | size | unit_byte |
58030d6fa8df3e6e dpcd_configure_channel_coding() -> core_link_write_dpcd()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | link | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ctx->dc->dml.soc.dram_clock_change_latency_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.soc.sr_enter_plus_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.soc.sr_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.AverageDCCCompressionRate | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.AverageReadBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.AverageReadBandwidthGBytePerSecond | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DCFCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DISPCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DISPCLKDPPCLKDSCCLKDownSpreading | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DISPCLKDPPCLKVCOSpeed | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DISPCLKRampingMargin | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DISPCLKWithRampingRoundedToDFSGranularity | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DISPCLKWithoutRampingRoundedToDFSGranularity | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DISPCLK_calculated | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DPPCLKUsingSingleDPPChroma | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DPPCLKUsingSingleDPPLuma | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DRAMChannelWidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DRAMClockChangeLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DRAMClockChangeWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DRAMSpeed | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.Downspreading | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.FCLKChangeLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.FabricAndDRAMBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.FabricClock | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.FabricDatapathToDCNDataReturn | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.FinalDRAMClockChangeLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.FrameTimeForMinFullDETBufferingTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.GlobalDPPCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.LinesToFinishSwathTransferStutterCriticalPlane | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.MaxDispclkRoundedToDFSGranularity | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.MaxHSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.MaxVRatioPre | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.MaxVSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.MinActiveDRAMClockChangeLatencySupported | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.MinActiveFCLKChangeLatencySupported | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.MinUrgentLatencySupportUs | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.NonUrgentLatencyTolerance | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.PercentOfIdealDRAMBWReceivedAfterUrgLatencyPixelDataOnly | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.PercentOfIdealDRAMBWReceivedAfterUrgLatencySTROBE | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.PercentOfIdealDRAMBWReceivedAfterUrgLatencyVMDataOnly | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.PercentOfIdealFabricAndSDPPortBWReceivedAfterUrgLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.ReturnBandwidthToDCN | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.SMNLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.SOCCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.SREnterPlusExitTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.SREnterPlusExitZ8Time | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.SRExitTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.SRExitZ8Time | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.SmallestVBlank | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.StutterEfficiency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.StutterEfficiencyNotIncludingVBlank | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.StutterEnterPlusExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.StutterPeriod | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.SwathWidthYCriticalPlane | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.TCalc | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.TFinalxFill | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.TotalDataReadBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.TotalRowReadBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.TslvChk | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.USRRetrainingLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentExtraLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentLatencyAdjustmentFabricClockComponent | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentLatencyAdjustmentFabricClockReference | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentLatencyPixelDataOnly | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentLatencyPixelMixedWithVMData | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentLatencyVMDataOnly | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentRoundTripAndOutOfOrderLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.VBlankTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.VStartupMargin | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.WritebackDRAMClockChangeWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.WritebackLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.WritebackMaxHSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.WritebackMaxVSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.WritebackMinHSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.WritebackMinVSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.WritebackUrgentWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.XFCBusTransportTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.XFCFillBWOverhead | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.XFCRemoteSurfaceFlipDelay | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.XFCTSlvVreadyOffset | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.XFCTSlvVupdateOffset | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.XFCTSlvVupdateWidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.XFCXBUFLatencyTolerance | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.Z8StutterEfficiency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.Z8StutterEfficiencyBestCase | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.Z8StutterEfficiencyNotIncludingVBlank | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.Z8StutterEfficiencyNotIncludingVBlankBestCase | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.Z8StutterEnterPlusExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.Z8StutterExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.soc.dram_clock_change_latency_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.soc.sr_enter_plus_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.soc.sr_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.total_dcn_read_bw_with_flip_no_urgent_burst | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->dc | 4096-ptr_max |
| PARAM_VALUE | 0 | link->dc->hwss.enable_dp_link_output | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_clock->id | s32min-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_clock->mode | s32min-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_clock->pin | 0-s64max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_data->id | s32min-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_data->mode | s32min-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_data->pin | 0-s64max |
| PARAM_VALUE | 0 | link->phy_state.symclk_state | 1 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->blocked_lock.owner | (-1) |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->blocked_lock.owner_cpu | 4294967295 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->usage.refs.counter | s32min-s32max |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.osq.tail.counter | s32min-s32max |
| PARAM_VALUE | 0 | *link->ctx->dc->scratch.pipes_to_unlock_first | 0-1 |
| PARAM_VALUE | 0 | *link->dpcd_caps.edp_supported_link_rates | 0-4294967295 |
| PARAM_VALUE | 0 | *link->dpcd_caps.lttpr_caps.aux_rd_interval | 0-255 |
| PARAM_VALUE | 1 | address | 264 |
| PARAM_VALUE | 2 | data | 8943241718064099328 |
| PARAM_VALUE | 2 | *data | 0-2 |
| PARAM_VALUE | 3 | size | 1 |
| BUF_SIZE | 2 | data | 4 |
| CAPPED_DATA | 0 | link | 1 |
| DATA_SOURCE | 0 | link | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING |
58030d6fa8df3e6e dpcd_set_lane_settings() -> core_link_write_dpcd()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | link | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.dram_clock_change_latency_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.sr_enter_plus_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.sr_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.AverageDCCCompressionRate | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.AverageReadBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.AverageReadBandwidthGBytePerSecond | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DCFCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLKDPPCLKDSCCLKDownSpreading | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLKDPPCLKVCOSpeed | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLKRampingMargin | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLK_calculated | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DPPCLKUsingSingleDPPChroma | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DPPCLKUsingSingleDPPLuma | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DRAMChannelWidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DRAMClockChangeLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DRAMClockChangeWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DRAMSpeed | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Downspreading | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FCLKChangeLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FabricAndDRAMBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FabricClock | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FabricDatapathToDCNDataReturn | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FinalDRAMClockChangeLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FrameTimeForMinFullDETBufferingTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.GlobalDPPCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MaxDispclkRoundedToDFSGranularity | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MaxHSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MaxVRatioPre | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MaxVSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MinActiveFCLKChangeLatencySupported | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MinUrgentLatencySupportUs | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.NonUrgentLatencyTolerance | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.ReturnBandwidthToDCN | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SMNLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SOCCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SREnterPlusExitTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SREnterPlusExitZ8Time | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SRExitTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SRExitZ8Time | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SmallestVBlank | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.StutterEfficiency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.StutterEfficiencyNotIncludingVBlank | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.StutterEnterPlusExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.StutterPeriod | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SwathWidthYCriticalPlane | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TCalc | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TFinalxFill | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TotalDataReadBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TotalRowReadBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TslvChk | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.USRRetrainingLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentExtraLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentLatencyPixelDataOnly | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentLatencyPixelMixedWithVMData | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentLatencyVMDataOnly | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentRoundTripAndOutOfOrderLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.VBlankTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.VStartupMargin | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackDRAMClockChangeWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackMaxHSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackMaxVSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackMinHSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackMinVSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackUrgentWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCBusTransportTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCFillBWOverhead | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCRemoteSurfaceFlipDelay | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCTSlvVreadyOffset | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCTSlvVupdateOffset | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCTSlvVupdateWidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCXBUFLatencyTolerance | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Z8StutterEfficiency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Z8StutterEfficiencyBestCase | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Z8StutterEfficiencyNotIncludingVBlank | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Z8StutterEnterPlusExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Z8StutterExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.soc.dram_clock_change_latency_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.soc.sr_enter_plus_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.soc.sr_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DPPCLKUsingSingleDPPChroma | -inf-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DPPCLKUsingSingleDPPLuma | -inf-1.797693e+308 |
| PARAM_VALUE | 0 | *link->dc->current_state->res_ctx.hpo_dp_link_enc_to_link_idx | 0-4294967295 |
| PARAM_VALUE | 0 | *link->dpcd_caps.edp_supported_link_rates | 0-4294967295 |
| PARAM_VALUE | 0 | *link->dpcd_caps.lttpr_caps.aux_rd_interval | 0-255 |
| PARAM_VALUE | 1 | address | 259,983057-983617 |
| BUF_SIZE | 0 | link | (-1),1576 |
| BUF_SIZE | 0 | link | (-1),1576 |
| BUF_SIZE | 0 | link->dc | (-1),3059296 |
| BUF_SIZE | 0 | link->priv | (-1),9272 |
| BUF_SIZE | 2 | data | 4 |
| CAPPED_DATA | 0 | link | 1 |
| CAPPED_DATA | 1 | address | 1 |
| DATA_SOURCE | 0 | link | $0 |
| FUZZY_MAX | 1 | address | 259 |
| RX_PATH | |||
| TASK_NOT_RUNNING |
58030d6fa8df3e6e dpcd_set_link_settings() -> core_link_write_dpcd()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | link | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.dram_clock_change_latency_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.sr_enter_plus_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.sr_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.AverageDCCCompressionRate | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.AverageReadBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.AverageReadBandwidthGBytePerSecond | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DCFCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLKDPPCLKDSCCLKDownSpreading | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLKDPPCLKVCOSpeed | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLKRampingMargin | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLK_calculated | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DPPCLKUsingSingleDPPChroma | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DPPCLKUsingSingleDPPLuma | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DRAMChannelWidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DRAMClockChangeLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DRAMClockChangeWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DRAMSpeed | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Downspreading | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FCLKChangeLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FabricAndDRAMBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FabricClock | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FabricDatapathToDCNDataReturn | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FinalDRAMClockChangeLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FrameTimeForMinFullDETBufferingTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.GlobalDPPCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MaxDispclkRoundedToDFSGranularity | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MaxHSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MaxVRatioPre | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MaxVSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MinActiveFCLKChangeLatencySupported | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MinUrgentLatencySupportUs | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.NonUrgentLatencyTolerance | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.ReturnBandwidthToDCN | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SMNLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SOCCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SREnterPlusExitTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SREnterPlusExitZ8Time | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SRExitTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SRExitZ8Time | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SmallestVBlank | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.StutterEfficiency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.StutterEfficiencyNotIncludingVBlank | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.StutterEnterPlusExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.StutterPeriod | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SwathWidthYCriticalPlane | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TCalc | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TFinalxFill | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TotalDataReadBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TotalRowReadBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TslvChk | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.USRRetrainingLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentExtraLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentLatencyPixelDataOnly | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentLatencyPixelMixedWithVMData | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentLatencyVMDataOnly | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentRoundTripAndOutOfOrderLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.VBlankTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.VStartupMargin | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackDRAMClockChangeWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackMaxHSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackMaxVSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackMinHSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackMinVSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackUrgentWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCBusTransportTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCFillBWOverhead | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCRemoteSurfaceFlipDelay | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCTSlvVreadyOffset | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCTSlvVupdateOffset | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCTSlvVupdateWidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCXBUFLatencyTolerance | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Z8StutterEfficiency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Z8StutterEfficiencyBestCase | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Z8StutterEfficiencyNotIncludingVBlank | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Z8StutterEnterPlusExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Z8StutterExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.soc.dram_clock_change_latency_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.soc.sr_enter_plus_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.soc.sr_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DPPCLKUsingSingleDPPChroma | -inf-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DPPCLKUsingSingleDPPLuma | -inf-1.797693e+308 |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_clock->mode | s32min-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_data->mode | s32min-s32max |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->blocked_lock.owner | (-1) |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->blocked_lock.owner_cpu | 4294967295 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->usage.refs.counter | s32min-s32max |
| PARAM_VALUE | 0 | *link->dc->current_state->res_ctx.hpo_dp_link_enc_to_link_idx | 0-4294967295 |
| PARAM_VALUE | 0 | *link->dpcd_caps.edp_supported_link_rates | 0-4294967295 |
| PARAM_VALUE | 0 | *link->dpcd_caps.lttpr_caps.aux_rd_interval | 0-255 |
| PARAM_VALUE | 1 | address | 263 |
| PARAM_VALUE | 3 | size | 1 |
| BUF_SIZE | 0 | link | (-1),1576 |
| BUF_SIZE | 0 | link | (-1),1576 |
| BUF_SIZE | 0 | link->priv | (-1),9272 |
| CAPPED_DATA | 0 | link | 1 |
| DATA_SOURCE | 0 | link | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| UNITS | 3 | size | unit_byte |
58030d6fa8df3e6e dpcd_set_link_settings() -> core_link_write_dpcd()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | link | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.dram_clock_change_latency_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.sr_enter_plus_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.sr_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.AverageDCCCompressionRate | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.AverageReadBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.AverageReadBandwidthGBytePerSecond | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DCFCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLKDPPCLKDSCCLKDownSpreading | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLKDPPCLKVCOSpeed | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLKRampingMargin | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLK_calculated | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DPPCLKUsingSingleDPPChroma | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DPPCLKUsingSingleDPPLuma | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DRAMChannelWidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DRAMClockChangeLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DRAMClockChangeWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DRAMSpeed | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Downspreading | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FCLKChangeLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FabricAndDRAMBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FabricClock | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FabricDatapathToDCNDataReturn | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FinalDRAMClockChangeLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FrameTimeForMinFullDETBufferingTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.GlobalDPPCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MaxDispclkRoundedToDFSGranularity | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MaxHSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MaxVRatioPre | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MaxVSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MinActiveFCLKChangeLatencySupported | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MinUrgentLatencySupportUs | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.NonUrgentLatencyTolerance | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.ReturnBandwidthToDCN | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SMNLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SOCCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SREnterPlusExitTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SREnterPlusExitZ8Time | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SRExitTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SRExitZ8Time | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SmallestVBlank | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.StutterEfficiency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.StutterEfficiencyNotIncludingVBlank | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.StutterEnterPlusExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.StutterPeriod | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SwathWidthYCriticalPlane | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TCalc | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TFinalxFill | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TotalDataReadBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TotalRowReadBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TslvChk | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.USRRetrainingLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentExtraLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentLatencyPixelDataOnly | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentLatencyPixelMixedWithVMData | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentLatencyVMDataOnly | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentRoundTripAndOutOfOrderLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.VBlankTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.VStartupMargin | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackDRAMClockChangeWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackMaxHSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackMaxVSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackMinHSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackMinVSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackUrgentWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCBusTransportTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCFillBWOverhead | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCRemoteSurfaceFlipDelay | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCTSlvVreadyOffset | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCTSlvVupdateOffset | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCTSlvVupdateWidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCXBUFLatencyTolerance | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Z8StutterEfficiency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Z8StutterEfficiencyBestCase | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Z8StutterEfficiencyNotIncludingVBlank | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Z8StutterEnterPlusExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Z8StutterExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.soc.dram_clock_change_latency_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.soc.sr_enter_plus_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.soc.sr_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DPPCLKUsingSingleDPPChroma | -inf-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DPPCLKUsingSingleDPPLuma | -inf-1.797693e+308 |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_clock->mode | s32min-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_data->mode | s32min-s32max |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->blocked_lock.owner | (-1) |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->blocked_lock.owner_cpu | 4294967295 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->usage.refs.counter | s32min-s32max |
| PARAM_VALUE | 0 | *link->dc->current_state->res_ctx.hpo_dp_link_enc_to_link_idx | 0-4294967295 |
| PARAM_VALUE | 0 | *link->dpcd_caps.edp_supported_link_rates | 0-4294967295 |
| PARAM_VALUE | 0 | *link->dpcd_caps.lttpr_caps.aux_rd_interval | 0-255 |
| PARAM_VALUE | 1 | address | 257 |
| PARAM_VALUE | 2 | *data | 0 |
| PARAM_VALUE | 3 | size | 1 |
| BUF_SIZE | 0 | link | (-1),1576 |
| BUF_SIZE | 0 | link | (-1),1576 |
| BUF_SIZE | 0 | link->priv | (-1),9272 |
| CAPPED_DATA | 0 | link | 1 |
| DATA_SOURCE | 0 | link | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING |
58030d6fa8df3e6e dpcd_set_link_settings() -> core_link_write_dpcd()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | link | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.dram_clock_change_latency_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.sr_enter_plus_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.sr_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.AverageDCCCompressionRate | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.AverageReadBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.AverageReadBandwidthGBytePerSecond | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DCFCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLKDPPCLKDSCCLKDownSpreading | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLKDPPCLKVCOSpeed | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLKRampingMargin | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLK_calculated | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DPPCLKUsingSingleDPPChroma | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DPPCLKUsingSingleDPPLuma | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DRAMChannelWidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DRAMClockChangeLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DRAMClockChangeWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DRAMSpeed | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Downspreading | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FCLKChangeLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FabricAndDRAMBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FabricClock | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FabricDatapathToDCNDataReturn | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FinalDRAMClockChangeLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FrameTimeForMinFullDETBufferingTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.GlobalDPPCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MaxDispclkRoundedToDFSGranularity | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MaxHSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MaxVRatioPre | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MaxVSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MinActiveFCLKChangeLatencySupported | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MinUrgentLatencySupportUs | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.NonUrgentLatencyTolerance | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.ReturnBandwidthToDCN | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SMNLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SOCCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SREnterPlusExitTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SREnterPlusExitZ8Time | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SRExitTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SRExitZ8Time | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SmallestVBlank | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.StutterEfficiency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.StutterEfficiencyNotIncludingVBlank | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.StutterEnterPlusExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.StutterPeriod | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SwathWidthYCriticalPlane | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TCalc | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TFinalxFill | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TotalDataReadBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TotalRowReadBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TslvChk | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.USRRetrainingLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentExtraLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentLatencyPixelDataOnly | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentLatencyPixelMixedWithVMData | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentLatencyVMDataOnly | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentRoundTripAndOutOfOrderLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.VBlankTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.VStartupMargin | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackDRAMClockChangeWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackMaxHSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackMaxVSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackMinHSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackMinVSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackUrgentWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCBusTransportTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCFillBWOverhead | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCRemoteSurfaceFlipDelay | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCTSlvVreadyOffset | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCTSlvVupdateOffset | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCTSlvVupdateWidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCXBUFLatencyTolerance | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Z8StutterEfficiency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Z8StutterEfficiencyBestCase | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Z8StutterEfficiencyNotIncludingVBlank | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Z8StutterEnterPlusExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Z8StutterExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.soc.dram_clock_change_latency_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.soc.sr_enter_plus_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.soc.sr_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DPPCLKUsingSingleDPPChroma | -inf-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DPPCLKUsingSingleDPPLuma | -inf-1.797693e+308 |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_clock->mode | s32min-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_data->mode | s32min-s32max |
| PARAM_VALUE | 0 | link->dpcd_caps.dpcd_rev.raw | 19-255 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->blocked_lock.owner | (-1) |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->blocked_lock.owner_cpu | 4294967295 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->usage.refs.counter | s32min-s32max |
| PARAM_VALUE | 0 | *link->dc->current_state->res_ctx.hpo_dp_link_enc_to_link_idx | 0-4294967295 |
| PARAM_VALUE | 0 | *link->dpcd_caps.edp_supported_link_rates | 0-4294967295 |
| PARAM_VALUE | 0 | *link->dpcd_caps.lttpr_caps.aux_rd_interval | 0-255 |
| PARAM_VALUE | 1 | address | 256 |
| PARAM_VALUE | 2 | data | 4754979624124977152 |
| PARAM_VALUE | 2 | *data | 0 |
| PARAM_VALUE | 3 | size | 1 |
| BUF_SIZE | 0 | link | (-1),1576 |
| BUF_SIZE | 0 | link | (-1),1576 |
| BUF_SIZE | 0 | link->priv | (-1),9272 |
| CAPPED_DATA | 0 | link | 1 |
| DATA_SOURCE | 0 | link | $0 |
| FUZZY_MAX | 0 | link->dpcd_caps.dpcd_rev.raw | 19 |
| RX_PATH | |||
| TASK_NOT_RUNNING |
58030d6fa8df3e6e dpcd_set_link_settings() -> core_link_write_dpcd()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | link | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.dram_clock_change_latency_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.sr_enter_plus_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.sr_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.AverageDCCCompressionRate | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.AverageReadBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.AverageReadBandwidthGBytePerSecond | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DCFCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLKDPPCLKDSCCLKDownSpreading | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLKDPPCLKVCOSpeed | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLKRampingMargin | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLK_calculated | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DPPCLKUsingSingleDPPChroma | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DPPCLKUsingSingleDPPLuma | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DRAMChannelWidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DRAMClockChangeLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DRAMClockChangeWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DRAMSpeed | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Downspreading | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FCLKChangeLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FabricAndDRAMBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FabricClock | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FabricDatapathToDCNDataReturn | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FinalDRAMClockChangeLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FrameTimeForMinFullDETBufferingTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.GlobalDPPCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MaxDispclkRoundedToDFSGranularity | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MaxHSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MaxVRatioPre | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MaxVSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MinActiveFCLKChangeLatencySupported | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MinUrgentLatencySupportUs | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.NonUrgentLatencyTolerance | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.ReturnBandwidthToDCN | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SMNLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SOCCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SREnterPlusExitTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SREnterPlusExitZ8Time | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SRExitTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SRExitZ8Time | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SmallestVBlank | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.StutterEfficiency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.StutterEfficiencyNotIncludingVBlank | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.StutterEnterPlusExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.StutterPeriod | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SwathWidthYCriticalPlane | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TCalc | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TFinalxFill | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TotalDataReadBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TotalRowReadBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TslvChk | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.USRRetrainingLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentExtraLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentLatencyPixelDataOnly | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentLatencyPixelMixedWithVMData | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentLatencyVMDataOnly | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentRoundTripAndOutOfOrderLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.VBlankTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.VStartupMargin | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackDRAMClockChangeWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackMaxHSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackMaxVSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackMinHSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackMinVSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackUrgentWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCBusTransportTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCFillBWOverhead | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCRemoteSurfaceFlipDelay | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCTSlvVreadyOffset | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCTSlvVupdateOffset | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCTSlvVupdateWidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCXBUFLatencyTolerance | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Z8StutterEfficiency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Z8StutterEfficiencyBestCase | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Z8StutterEfficiencyNotIncludingVBlank | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Z8StutterEnterPlusExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Z8StutterExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.soc.dram_clock_change_latency_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.soc.sr_enter_plus_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.soc.sr_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DPPCLKUsingSingleDPPChroma | -inf-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DPPCLKUsingSingleDPPLuma | -inf-1.797693e+308 |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_clock->mode | s32min-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_data->mode | s32min-s32max |
| PARAM_VALUE | 0 | link->dpcd_caps.dpcd_rev.raw | 19-255 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->blocked_lock.owner | (-1) |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->blocked_lock.owner_cpu | 4294967295 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->usage.refs.counter | s32min-s32max |
| PARAM_VALUE | 0 | *link->dc->current_state->res_ctx.hpo_dp_link_enc_to_link_idx | 0-4294967295 |
| PARAM_VALUE | 0 | *link->dpcd_caps.edp_supported_link_rates | 0-4294967295 |
| PARAM_VALUE | 0 | *link->dpcd_caps.lttpr_caps.aux_rd_interval | 0-255 |
| PARAM_VALUE | 1 | address | 277 |
| PARAM_VALUE | 2 | data | 4096-ptr_max |
| PARAM_VALUE | 3 | size | 1 |
| BUF_SIZE | 0 | link | (-1),1576 |
| BUF_SIZE | 0 | link | (-1),1576 |
| BUF_SIZE | 0 | link->priv | (-1),9272 |
| CAPPED_DATA | 0 | link | 1 |
| DATA_SOURCE | 0 | link | $0 |
| FUZZY_MAX | 0 | link->dpcd_caps.dpcd_rev.raw | 19 |
| RX_PATH | |||
| TASK_NOT_RUNNING |
58030d6fa8df3e6e dpcd_set_link_settings() -> core_link_write_dpcd()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | link | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.dram_clock_change_latency_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.sr_enter_plus_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.sr_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.AverageDCCCompressionRate | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.AverageReadBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.AverageReadBandwidthGBytePerSecond | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DCFCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLKDPPCLKDSCCLKDownSpreading | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLKDPPCLKVCOSpeed | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLKRampingMargin | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLK_calculated | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DPPCLKUsingSingleDPPChroma | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DPPCLKUsingSingleDPPLuma | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DRAMChannelWidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DRAMClockChangeLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DRAMClockChangeWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DRAMSpeed | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Downspreading | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FCLKChangeLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FabricAndDRAMBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FabricClock | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FabricDatapathToDCNDataReturn | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FinalDRAMClockChangeLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FrameTimeForMinFullDETBufferingTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.GlobalDPPCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MaxDispclkRoundedToDFSGranularity | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MaxHSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MaxVRatioPre | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MaxVSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MinActiveFCLKChangeLatencySupported | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MinUrgentLatencySupportUs | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.NonUrgentLatencyTolerance | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.ReturnBandwidthToDCN | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SMNLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SOCCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SREnterPlusExitTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SREnterPlusExitZ8Time | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SRExitTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SRExitZ8Time | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SmallestVBlank | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.StutterEfficiency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.StutterEfficiencyNotIncludingVBlank | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.StutterEnterPlusExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.StutterPeriod | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SwathWidthYCriticalPlane | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TCalc | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TFinalxFill | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TotalDataReadBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TotalRowReadBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TslvChk | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.USRRetrainingLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentExtraLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentLatencyPixelDataOnly | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentLatencyPixelMixedWithVMData | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentLatencyVMDataOnly | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentRoundTripAndOutOfOrderLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.VBlankTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.VStartupMargin | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackDRAMClockChangeWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackMaxHSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackMaxVSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackMinHSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackMinVSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackUrgentWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCBusTransportTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCFillBWOverhead | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCRemoteSurfaceFlipDelay | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCTSlvVreadyOffset | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCTSlvVupdateOffset | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCTSlvVupdateWidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCXBUFLatencyTolerance | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Z8StutterEfficiency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Z8StutterEfficiencyBestCase | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Z8StutterEfficiencyNotIncludingVBlank | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Z8StutterEnterPlusExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Z8StutterExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.soc.dram_clock_change_latency_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.soc.sr_enter_plus_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.soc.sr_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DPPCLKUsingSingleDPPChroma | -inf-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DPPCLKUsingSingleDPPLuma | -inf-1.797693e+308 |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_clock->mode | s32min-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_data->mode | s32min-s32max |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->blocked_lock.owner | (-1) |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->blocked_lock.owner_cpu | 4294967295 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->usage.refs.counter | s32min-s32max |
| PARAM_VALUE | 0 | *link->dc->current_state->res_ctx.hpo_dp_link_enc_to_link_idx | 0-4294967295 |
| PARAM_VALUE | 0 | *link->dpcd_caps.edp_supported_link_rates | 0-4294967295 |
| PARAM_VALUE | 0 | *link->dpcd_caps.lttpr_caps.aux_rd_interval | 0-255 |
| PARAM_VALUE | 1 | address | 256 |
| PARAM_VALUE | 2 | data | 4754979624124977152 |
| PARAM_VALUE | 2 | *data | 0-2,4,6-30 |
| PARAM_VALUE | 3 | size | 1 |
| BUF_SIZE | 0 | link | (-1),1576 |
| BUF_SIZE | 0 | link | (-1),1576 |
| BUF_SIZE | 0 | link->priv | (-1),9272 |
| CAPPED_DATA | 0 | link | 1 |
| DATA_SOURCE | 0 | link | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING |
58030d6fa8df3e6e dpcd_set_lt_pattern_and_lane_settings() -> core_link_write_dpcd()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | link | 4096-ptr_max |
| PARAM_VALUE | 0 | link->chip_caps | 2-u16max |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.dram_clock_change_latency_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.sr_enter_plus_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.sr_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.AverageDCCCompressionRate | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.AverageReadBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.AverageReadBandwidthGBytePerSecond | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DCFCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLKDPPCLKDSCCLKDownSpreading | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLKDPPCLKVCOSpeed | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLKRampingMargin | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLK_calculated | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DPPCLKUsingSingleDPPChroma | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DPPCLKUsingSingleDPPLuma | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DRAMChannelWidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DRAMClockChangeLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DRAMClockChangeWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DRAMSpeed | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Downspreading | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FCLKChangeLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FabricAndDRAMBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FabricClock | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FabricDatapathToDCNDataReturn | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FinalDRAMClockChangeLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FrameTimeForMinFullDETBufferingTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.GlobalDPPCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MaxDispclkRoundedToDFSGranularity | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MaxHSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MaxVRatioPre | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MaxVSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MinActiveFCLKChangeLatencySupported | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MinUrgentLatencySupportUs | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.NonUrgentLatencyTolerance | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.ReturnBandwidthToDCN | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SMNLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SOCCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SREnterPlusExitTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SREnterPlusExitZ8Time | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SRExitTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SRExitZ8Time | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SmallestVBlank | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.StutterEfficiency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.StutterEfficiencyNotIncludingVBlank | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.StutterEnterPlusExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.StutterPeriod | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SwathWidthYCriticalPlane | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TCalc | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TFinalxFill | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TotalDataReadBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TotalRowReadBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TslvChk | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.USRRetrainingLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentExtraLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentLatencyPixelDataOnly | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentLatencyPixelMixedWithVMData | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentLatencyVMDataOnly | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentRoundTripAndOutOfOrderLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.VBlankTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.VStartupMargin | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackDRAMClockChangeWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackMaxHSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackMaxVSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackMinHSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackMinVSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackUrgentWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCBusTransportTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCFillBWOverhead | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCRemoteSurfaceFlipDelay | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCTSlvVreadyOffset | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCTSlvVupdateOffset | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCTSlvVupdateWidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCXBUFLatencyTolerance | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Z8StutterEfficiency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Z8StutterEfficiencyBestCase | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Z8StutterEfficiencyNotIncludingVBlank | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Z8StutterEnterPlusExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Z8StutterExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.soc.dram_clock_change_latency_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.soc.sr_enter_plus_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.soc.sr_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DPPCLKUsingSingleDPPChroma | -inf-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DPPCLKUsingSingleDPPLuma | -inf-1.797693e+308 |
| PARAM_VALUE | 0 | link->dc->hwss.enable_dp_link_output | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_clock->id | s32min-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_clock->mode | s32min-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_clock->pin | 0-s64max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_data->id | s32min-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_data->mode | s32min-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_data->pin | 0-s64max |
| PARAM_VALUE | 0 | link->dpcd_caps.lttpr_caps.mode | 85,170 |
| PARAM_VALUE | 0 | link->phy_state.symclk_state | 1 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->blocked_lock.owner | (-1) |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->blocked_lock.owner_cpu | 4294967295 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->usage.refs.counter | s32min-s32max |
| PARAM_VALUE | 0 | *link->dpcd_caps.edp_supported_link_rates | 0-4294967295 |
| PARAM_VALUE | 0 | *link->dpcd_caps.lttpr_caps.aux_rd_interval | 0-255 |
| PARAM_VALUE | 1 | address | 258 |
| PARAM_VALUE | 2 | *data | 0 |
| PARAM_VALUE | 3 | size | 1 |
| DATA_SOURCE | 0 | link | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| UNITS | 3 | size | unit_byte |
58030d6fa8df3e6e dpcd_set_lt_pattern_and_lane_settings() -> core_link_write_dpcd()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | link | 4096-ptr_max |
| PARAM_VALUE | 0 | link->chip_caps | 2-u16max |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.dram_clock_change_latency_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.sr_enter_plus_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.sr_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.AverageDCCCompressionRate | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.AverageReadBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.AverageReadBandwidthGBytePerSecond | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DCFCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLKDPPCLKDSCCLKDownSpreading | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLKDPPCLKVCOSpeed | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLKRampingMargin | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLK_calculated | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DPPCLKUsingSingleDPPChroma | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DPPCLKUsingSingleDPPLuma | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DRAMChannelWidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DRAMClockChangeLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DRAMClockChangeWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DRAMSpeed | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Downspreading | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FCLKChangeLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FabricAndDRAMBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FabricClock | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FabricDatapathToDCNDataReturn | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FinalDRAMClockChangeLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FrameTimeForMinFullDETBufferingTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.GlobalDPPCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MaxDispclkRoundedToDFSGranularity | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MaxHSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MaxVRatioPre | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MaxVSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MinActiveFCLKChangeLatencySupported | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MinUrgentLatencySupportUs | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.NonUrgentLatencyTolerance | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.ReturnBandwidthToDCN | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SMNLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SOCCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SREnterPlusExitTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SREnterPlusExitZ8Time | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SRExitTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SRExitZ8Time | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SmallestVBlank | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.StutterEfficiency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.StutterEfficiencyNotIncludingVBlank | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.StutterEnterPlusExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.StutterPeriod | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SwathWidthYCriticalPlane | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TCalc | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TFinalxFill | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TotalDataReadBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TotalRowReadBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TslvChk | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.USRRetrainingLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentExtraLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentLatencyPixelDataOnly | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentLatencyPixelMixedWithVMData | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentLatencyVMDataOnly | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentRoundTripAndOutOfOrderLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.VBlankTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.VStartupMargin | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackDRAMClockChangeWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackMaxHSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackMaxVSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackMinHSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackMinVSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackUrgentWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCBusTransportTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCFillBWOverhead | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCRemoteSurfaceFlipDelay | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCTSlvVreadyOffset | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCTSlvVupdateOffset | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCTSlvVupdateWidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCXBUFLatencyTolerance | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Z8StutterEfficiency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Z8StutterEfficiencyBestCase | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Z8StutterEfficiencyNotIncludingVBlank | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Z8StutterEnterPlusExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Z8StutterExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.soc.dram_clock_change_latency_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.soc.sr_enter_plus_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.soc.sr_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DPPCLKUsingSingleDPPChroma | -inf-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DPPCLKUsingSingleDPPLuma | -inf-1.797693e+308 |
| PARAM_VALUE | 0 | link->dc->hwss.enable_dp_link_output | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_clock->id | s32min-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_clock->mode | s32min-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_clock->pin | 0-s64max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_data->id | s32min-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_data->mode | s32min-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_data->pin | 0-s64max |
| PARAM_VALUE | 0 | link->dpcd_caps.lttpr_caps.mode | 85,170 |
| PARAM_VALUE | 0 | link->phy_state.symclk_state | 1 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->blocked_lock.owner | (-1) |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->blocked_lock.owner_cpu | 4294967295 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->usage.refs.counter | s32min-s32max |
| PARAM_VALUE | 0 | *link->dpcd_caps.edp_supported_link_rates | 0-4294967295 |
| PARAM_VALUE | 0 | *link->dpcd_caps.lttpr_caps.aux_rd_interval | 0-255 |
| PARAM_VALUE | 1 | address | 259 |
| BUF_SIZE | 2 | data | 4 |
| DATA_SOURCE | 0 | link | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL |
58030d6fa8df3e6e dpcd_set_lt_pattern_and_lane_settings() -> core_link_write_dpcd()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | link | 4096-ptr_max |
| PARAM_VALUE | 0 | link->chip_caps | 2-u16max |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.dram_clock_change_latency_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.sr_enter_plus_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.sr_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.AverageDCCCompressionRate | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.AverageReadBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.AverageReadBandwidthGBytePerSecond | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DCFCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLKDPPCLKDSCCLKDownSpreading | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLKDPPCLKVCOSpeed | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLKRampingMargin | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLK_calculated | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DPPCLKUsingSingleDPPChroma | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DPPCLKUsingSingleDPPLuma | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DRAMChannelWidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DRAMClockChangeLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DRAMClockChangeWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DRAMSpeed | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Downspreading | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FCLKChangeLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FabricAndDRAMBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FabricClock | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FabricDatapathToDCNDataReturn | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FinalDRAMClockChangeLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FrameTimeForMinFullDETBufferingTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.GlobalDPPCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MaxDispclkRoundedToDFSGranularity | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MaxHSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MaxVRatioPre | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MaxVSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MinActiveFCLKChangeLatencySupported | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MinUrgentLatencySupportUs | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.NonUrgentLatencyTolerance | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.ReturnBandwidthToDCN | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SMNLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SOCCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SREnterPlusExitTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SREnterPlusExitZ8Time | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SRExitTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SRExitZ8Time | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SmallestVBlank | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.StutterEfficiency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.StutterEfficiencyNotIncludingVBlank | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.StutterEnterPlusExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.StutterPeriod | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SwathWidthYCriticalPlane | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TCalc | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TFinalxFill | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TotalDataReadBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TotalRowReadBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TslvChk | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.USRRetrainingLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentExtraLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentLatencyPixelDataOnly | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentLatencyPixelMixedWithVMData | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentLatencyVMDataOnly | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentRoundTripAndOutOfOrderLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.VBlankTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.VStartupMargin | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackDRAMClockChangeWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackMaxHSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackMaxVSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackMinHSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackMinVSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackUrgentWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCBusTransportTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCFillBWOverhead | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCRemoteSurfaceFlipDelay | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCTSlvVreadyOffset | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCTSlvVupdateOffset | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCTSlvVupdateWidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCXBUFLatencyTolerance | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Z8StutterEfficiency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Z8StutterEfficiencyBestCase | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Z8StutterEfficiencyNotIncludingVBlank | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Z8StutterEnterPlusExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Z8StutterExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.soc.dram_clock_change_latency_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.soc.sr_enter_plus_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.soc.sr_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DPPCLKUsingSingleDPPChroma | -inf-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DPPCLKUsingSingleDPPLuma | -inf-1.797693e+308 |
| PARAM_VALUE | 0 | link->dc->hwss.enable_dp_link_output | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_clock->id | s32min-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_clock->mode | s32min-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_clock->pin | 0-s64max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_data->id | s32min-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_data->mode | s32min-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_data->pin | 0-s64max |
| PARAM_VALUE | 0 | link->dpcd_caps.lttpr_caps.mode | 85,170 |
| PARAM_VALUE | 0 | link->phy_state.symclk_state | 1 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->blocked_lock.owner | (-1) |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->blocked_lock.owner_cpu | 4294967295 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->usage.refs.counter | s32min-s32max |
| PARAM_VALUE | 0 | *link->dpcd_caps.edp_supported_link_rates | 0-4294967295 |
| PARAM_VALUE | 0 | *link->dpcd_caps.lttpr_caps.aux_rd_interval | 0-255 |
| PARAM_VALUE | 1 | address | 258,983056-983616 |
| PARAM_VALUE | 2 | data | 4096-ptr_max |
| PARAM_VALUE | 3 | size | 5 |
| BUF_SIZE | 2 | data | 5 |
| DATA_SOURCE | 0 | link | $0 |
| FUZZY_MAX | 1 | address | 258 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| UNITS | 3 | size | unit_byte |
58030d6fa8df3e6e dpcd_set_lt_pattern_and_lane_settings() -> core_link_write_dpcd()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | link | 4096-ptr_max |
| PARAM_VALUE | 0 | link->chip_caps | 2-u16max |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.dram_clock_change_latency_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.sr_enter_plus_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.sr_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.AverageDCCCompressionRate | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.AverageReadBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.AverageReadBandwidthGBytePerSecond | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DCFCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLKDPPCLKDSCCLKDownSpreading | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLKDPPCLKVCOSpeed | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLKRampingMargin | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLK_calculated | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DPPCLKUsingSingleDPPChroma | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DPPCLKUsingSingleDPPLuma | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DRAMChannelWidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DRAMClockChangeLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DRAMClockChangeWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DRAMSpeed | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Downspreading | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FCLKChangeLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FabricAndDRAMBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FabricClock | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FabricDatapathToDCNDataReturn | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FinalDRAMClockChangeLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FrameTimeForMinFullDETBufferingTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.GlobalDPPCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MaxDispclkRoundedToDFSGranularity | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MaxHSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MaxVRatioPre | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MaxVSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MinActiveFCLKChangeLatencySupported | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MinUrgentLatencySupportUs | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.NonUrgentLatencyTolerance | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.ReturnBandwidthToDCN | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SMNLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SOCCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SREnterPlusExitTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SREnterPlusExitZ8Time | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SRExitTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SRExitZ8Time | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SmallestVBlank | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.StutterEfficiency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.StutterEfficiencyNotIncludingVBlank | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.StutterEnterPlusExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.StutterPeriod | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SwathWidthYCriticalPlane | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TCalc | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TFinalxFill | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TotalDataReadBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TotalRowReadBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TslvChk | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.USRRetrainingLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentExtraLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentLatencyPixelDataOnly | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentLatencyPixelMixedWithVMData | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentLatencyVMDataOnly | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentRoundTripAndOutOfOrderLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.VBlankTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.VStartupMargin | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackDRAMClockChangeWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackMaxHSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackMaxVSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackMinHSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackMinVSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackUrgentWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCBusTransportTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCFillBWOverhead | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCRemoteSurfaceFlipDelay | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCTSlvVreadyOffset | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCTSlvVupdateOffset | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCTSlvVupdateWidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCXBUFLatencyTolerance | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Z8StutterEfficiency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Z8StutterEfficiencyBestCase | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Z8StutterEfficiencyNotIncludingVBlank | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Z8StutterEnterPlusExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Z8StutterExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.soc.dram_clock_change_latency_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.soc.sr_enter_plus_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.soc.sr_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DPPCLKUsingSingleDPPChroma | -inf-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DPPCLKUsingSingleDPPLuma | -inf-1.797693e+308 |
| PARAM_VALUE | 0 | link->dc->hwss.enable_dp_link_output | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_clock->id | s32min-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_clock->mode | s32min-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_clock->pin | 0-s64max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_data->id | s32min-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_data->mode | s32min-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_data->pin | 0-s64max |
| PARAM_VALUE | 0 | link->dpcd_caps.lttpr_caps.mode | 85,170 |
| PARAM_VALUE | 0 | link->phy_state.symclk_state | 1 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->blocked_lock.owner | (-1) |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->blocked_lock.owner_cpu | 4294967295 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->usage.refs.counter | s32min-s32max |
| PARAM_VALUE | 0 | *link->dpcd_caps.edp_supported_link_rates | 0-4294967295 |
| PARAM_VALUE | 0 | *link->dpcd_caps.lttpr_caps.aux_rd_interval | 0-255 |
| PARAM_VALUE | 1 | address | 258,983056-983616 |
| PARAM_VALUE | 2 | data | 4096-ptr_max |
| BUF_SIZE | 2 | data | 5 |
| DATA_SOURCE | 0 | link | $0 |
| FUZZY_MAX | 1 | address | 258 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| UNITS | 3 | size | unit_byte |
58030d6fa8df3e6e dpcd_set_training_pattern() -> core_link_write_dpcd()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | link | 4096-ptr_max |
| PARAM_VALUE | 0 | link->chip_caps | 2-u16max |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DPPCLKUsingSingleDPPChroma | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DPPCLKUsingSingleDPPLuma | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DPPCLKUsingSingleDPPChroma | -inf-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DPPCLKUsingSingleDPPLuma | -inf-1.797693e+308 |
| PARAM_VALUE | 0 | link->dc->hwss.enable_dp_link_output | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_clock->id | s32min-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_clock->mode | s32min-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_clock->pin | 0-s64max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_data->id | s32min-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_data->mode | s32min-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_data->pin | 0-s64max |
| PARAM_VALUE | 0 | link->phy_state.symclk_state | 1 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->blocked_lock.owner | (-1) |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->blocked_lock.owner_cpu | 4294967295 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->usage.refs.counter | s32min-s32max |
| PARAM_VALUE | 1 | address | 258 |
| PARAM_VALUE | 2 | *data | 0 |
| PARAM_VALUE | 3 | size | 1 |
| DATA_SOURCE | 0 | link | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING |
58030d6fa8df3e6e repeater_training_done() -> core_link_write_dpcd()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | link | 4096-ptr_max |
| PARAM_VALUE | 0 | link->chip_caps | 2-u16max |
| PARAM_VALUE | 0 | link->ctx | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ctx->dc | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DPPCLKUsingSingleDPPChroma | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DPPCLKUsingSingleDPPLuma | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->dc | 4096-ptr_max |
| PARAM_VALUE | 0 | link->dc->hwss.enable_dp_link_output | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_clock->id | s32min-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_clock->mode | s32min-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_clock->pin | 0-s64max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_data->id | s32min-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_data->mode | s32min-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_data->pin | 0-s64max |
| PARAM_VALUE | 0 | link->dpcd_caps.lttpr_caps.mode | 85,170 |
| PARAM_VALUE | 0 | link->dpcd_caps.lttpr_caps.phy_repeater_cnt | 1-2,4,8,16,32,64,128 |
| PARAM_VALUE | 0 | link->phy_state.symclk_state | 1 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->blocked_lock.owner | (-1) |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->blocked_lock.owner_cpu | 4294967295 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->usage.refs.counter | s32min-s32max |
| PARAM_VALUE | 0 | *link->dpcd_caps.lttpr_caps.aux_rd_interval | 0-255 |
| PARAM_VALUE | 1 | address | 983056-983616 |
| PARAM_VALUE | 2 | *data | 0 |
| PARAM_VALUE | 3 | size | 1 |
| DATA_SOURCE | 0 | link | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL |
drivers/gpu/drm/amd/amdgpu/../display/dc/link/protocols/link_dp_dpia_bw.c link_dp_dpia_handle_bw_alloc_status() -> core_link_write_dpcd()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | link | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ctx | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ctx->logger | 4096-ptr_max |
| PARAM_VALUE | 0 | link->dc | 4096-ptr_max |
| PARAM_VALUE | 0 | link->dc->link_srv | 4096-ptr_max |
| PARAM_VALUE | 0 | link->dpcd_caps.usb4_dp_tun_info.dp_tun_cap.bits.dp_tunneling | 1 |
| PARAM_VALUE | 1 | address | 917541 |
| PARAM_VALUE | 2 | *data | 0 |
| PARAM_VALUE | 3 | size | 1 |
| CAPPED_DATA | 0 | link | 1 |
| DATA_SOURCE | 0 | link | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| UNITS | 3 | size | unit_byte |
| LOCK2 | &aconnector->hpd_lock | ||
| HALF_LOCKED2 | &adev->dm.irq_handler_list_table_lock | ||
| HALF_LOCKED2 | &pool->lock | ||
| HALF_LOCKED2 | irq_table_flags | ||
| TYPE_LOCK | (struct amdgpu_dm_connector)->hpd_lock |
drivers/gpu/drm/amd/amdgpu/../display/dc/link/protocols/link_dp_dpia_bw.c link_dpia_enable_usb4_dp_bw_alloc_mode() -> core_link_write_dpcd()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 1 | address | 917552 |
| PARAM_VALUE | 2 | data | 7481017866230763520 |
| PARAM_VALUE | 2 | *data | 192 |
| PARAM_VALUE | 3 | size | 1 |
| DATA_SOURCE | 0 | link | $0 |
| UNITS | 3 | size | unit_byte |
drivers/gpu/drm/amd/amdgpu/../display/dc/link/protocols/link_dp_dpia_bw.c link_dpia_send_bw_alloc_request() -> core_link_write_dpcd()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | link | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ctx | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ctx->logger | 4096-ptr_max |
| PARAM_VALUE | 0 | link->dpcd_caps.usb4_dp_tun_info.dp_tun_cap.bits.dp_tunneling | 1 |
| PARAM_VALUE | 0 | link->dpia_bw_alloc_config.bw_granularity | s32min-(-1),1-s32max |
| PARAM_VALUE | 1 | address | 917553 |
| PARAM_VALUE | 2 | data | 1078547878232850432 |
| PARAM_VALUE | 3 | size | 1 |
| CAPPED_DATA | 0 | link->dpia_bw_alloc_config.allocated_bw | 1 |
| DATA_SOURCE | 0 | link | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| UNITS | 3 | size | unit_byte |
| HALF_LOCKED2 | &aconnector->hpd_lock |
drivers/gpu/drm/amd/amdgpu/../display/dc/link/protocols/link_dp_training_128b_132b.c dpcd_128b_132b_set_lane_settings() -> core_link_write_dpcd()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | link | 4096-ptr_max |
| PARAM_VALUE | 0 | link->chip_caps | 2-u16max |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.dram_clock_change_latency_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.sr_enter_plus_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.soc.sr_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.AverageDCCCompressionRate | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.AverageReadBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.AverageReadBandwidthGBytePerSecond | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DCFCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLKDPPCLKDSCCLKDownSpreading | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLKDPPCLKVCOSpeed | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLKRampingMargin | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DISPCLK_calculated | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DPPCLKUsingSingleDPPChroma | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DPPCLKUsingSingleDPPLuma | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DRAMChannelWidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DRAMClockChangeLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DRAMClockChangeWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.DRAMSpeed | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Downspreading | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FCLKChangeLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FabricAndDRAMBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FabricClock | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FabricDatapathToDCNDataReturn | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FinalDRAMClockChangeLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.FrameTimeForMinFullDETBufferingTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.GlobalDPPCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MaxDispclkRoundedToDFSGranularity | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MaxHSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MaxVRatioPre | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MaxVSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MinActiveFCLKChangeLatencySupported | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.MinUrgentLatencySupportUs | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.NonUrgentLatencyTolerance | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.ReturnBandwidthToDCN | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SMNLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SOCCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SREnterPlusExitTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SREnterPlusExitZ8Time | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SRExitTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SRExitZ8Time | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SmallestVBlank | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.StutterEfficiency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.StutterEfficiencyNotIncludingVBlank | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.StutterEnterPlusExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.StutterPeriod | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.SwathWidthYCriticalPlane | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TCalc | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TFinalxFill | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TotalDataReadBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TotalRowReadBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.TslvChk | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.USRRetrainingLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentExtraLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentLatencyPixelDataOnly | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentLatencyPixelMixedWithVMData | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentLatencyVMDataOnly | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentRoundTripAndOutOfOrderLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.UrgentWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.VBlankTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.VStartupMargin | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackDRAMClockChangeWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackMaxHSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackMaxVSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackMinHSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackMinVSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.WritebackUrgentWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCBusTransportTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCFillBWOverhead | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCRemoteSurfaceFlipDelay | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCTSlvVreadyOffset | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCTSlvVupdateOffset | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCTSlvVupdateWidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.XFCXBUFLatencyTolerance | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Z8StutterEfficiency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Z8StutterEfficiencyBestCase | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Z8StutterEfficiencyNotIncludingVBlank | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Z8StutterEnterPlusExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.Z8StutterExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.soc.dram_clock_change_latency_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.soc.sr_enter_plus_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->current_state->bw_ctx.dml.vba.soc.sr_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DPPCLKUsingSingleDPPChroma | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DPPCLKUsingSingleDPPLuma | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->dc->debug.legacy_dp2_lt | 0 |
| PARAM_VALUE | 0 | link->dc->hwss.enable_dp_link_output | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ddc->ctx->driver_context->dm.dpia_aux_lock.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | link->ddc->ctx->driver_context->dm.dpia_aux_lock.first_waiter->list.prev->prev | 5159360019465732096 |
| PARAM_VALUE | 0 | link->ddc->ctx->driver_context->dm.dpia_aux_lock.first_waiter->task->blocked_on | (-1)-0 |
| PARAM_VALUE | 0 | link->ddc->ctx->driver_context->dm.dpia_aux_lock.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_clock->id | s32min-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_clock->mode | s32min-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_clock->pin | 0-s64max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_data->id | s32min-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_data->mode | s32min-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_data->pin | 0-s64max |
| PARAM_VALUE | 0 | link->dpcd_caps.lttpr_caps.mode | 85,170 |
| PARAM_VALUE | 0 | link->link_enc->hpd_gpio->id | s32min-s32max |
| PARAM_VALUE | 0 | link->phy_state.symclk_state | 1 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->blocked_lock.owner | (-1) |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->blocked_lock.owner_cpu | 4294967295 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->blocked_on | (-1)-0 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->usage.refs.counter | s32min-s32max |
| PARAM_VALUE | 0 | *link->dpcd_caps.lttpr_caps.aux_rd_interval | 0-255 |
| PARAM_VALUE | 1 | address | 259 |
| PARAM_VALUE | 3 | size | 4 |
| BUF_SIZE | 2 | data | 4 |
| DATA_SOURCE | 0 | link | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| UNITS | 3 | size | unit_byte |
drivers/gpu/drm/amd/amdgpu/../display/dc/link/protocols/link_dp_training_fixed_vs_pe_retimer.c dp_perform_fixed_vs_pe_training_sequence() -> core_link_write_dpcd()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | link | 4096-ptr_max |
| PARAM_VALUE | 0 | link->chip_caps | 2-u16max |
| PARAM_VALUE | 0 | link->ctx->dc->dml.soc.dram_clock_change_latency_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.soc.sr_enter_plus_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.soc.sr_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.AverageDCCCompressionRate | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.AverageReadBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.AverageReadBandwidthGBytePerSecond | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DCFCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DISPCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DISPCLKDPPCLKDSCCLKDownSpreading | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DISPCLKDPPCLKVCOSpeed | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DISPCLKRampingMargin | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DISPCLKWithRampingRoundedToDFSGranularity | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DISPCLKWithoutRampingRoundedToDFSGranularity | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DISPCLK_calculated | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DPPCLKUsingSingleDPPChroma | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DPPCLKUsingSingleDPPLuma | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DRAMChannelWidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DRAMClockChangeLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DRAMClockChangeWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DRAMSpeed | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.Downspreading | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.FCLKChangeLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.FabricAndDRAMBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.FabricClock | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.FabricDatapathToDCNDataReturn | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.FinalDRAMClockChangeLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.FrameTimeForMinFullDETBufferingTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.GlobalDPPCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.LinesToFinishSwathTransferStutterCriticalPlane | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.MaxDispclkRoundedToDFSGranularity | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.MaxHSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.MaxVRatioPre | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.MaxVSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.MinActiveDRAMClockChangeLatencySupported | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.MinActiveFCLKChangeLatencySupported | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.MinUrgentLatencySupportUs | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.NonUrgentLatencyTolerance | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.PercentOfIdealDRAMBWReceivedAfterUrgLatencyPixelDataOnly | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.PercentOfIdealDRAMBWReceivedAfterUrgLatencySTROBE | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.PercentOfIdealDRAMBWReceivedAfterUrgLatencyVMDataOnly | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.PercentOfIdealFabricAndSDPPortBWReceivedAfterUrgLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.ReturnBandwidthToDCN | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.SMNLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.SOCCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.SREnterPlusExitTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.SREnterPlusExitZ8Time | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.SRExitTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.SRExitZ8Time | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.SmallestVBlank | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.StutterEfficiency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.StutterEfficiencyNotIncludingVBlank | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.StutterEnterPlusExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.StutterPeriod | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.SwathWidthYCriticalPlane | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.TCalc | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.TFinalxFill | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.TotalDataReadBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.TotalRowReadBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.TslvChk | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.USRRetrainingLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentExtraLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentLatencyAdjustmentFabricClockComponent | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentLatencyAdjustmentFabricClockReference | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentLatencyPixelDataOnly | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentLatencyPixelMixedWithVMData | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentLatencyVMDataOnly | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentRoundTripAndOutOfOrderLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.VBlankTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.VStartupMargin | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.WritebackDRAMClockChangeWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.WritebackLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.WritebackMaxHSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.WritebackMaxVSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.WritebackMinHSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.WritebackMinVSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.WritebackUrgentWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.XFCBusTransportTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.XFCFillBWOverhead | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.XFCRemoteSurfaceFlipDelay | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.XFCTSlvVreadyOffset | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.XFCTSlvVupdateOffset | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.XFCTSlvVupdateWidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.XFCXBUFLatencyTolerance | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.Z8StutterEfficiency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.Z8StutterEfficiencyBestCase | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.Z8StutterEfficiencyNotIncludingVBlank | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.Z8StutterEfficiencyNotIncludingVBlankBestCase | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.Z8StutterEnterPlusExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.Z8StutterExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.soc.dram_clock_change_latency_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.soc.sr_enter_plus_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.soc.sr_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.total_dcn_read_bw_with_flip_no_urgent_burst | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->dc | 4096-ptr_max |
| PARAM_VALUE | 0 | link->dc->hwss.enable_dp_link_output | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ddc | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_clock->id | s32min-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_clock->mode | s32min-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_clock->pin | 0-s64max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_data->id | s32min-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_data->mode | s32min-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_data->pin | 0-s64max |
| PARAM_VALUE | 0 | link->dpcd_caps.lttpr_caps.mode | 85,170 |
| PARAM_VALUE | 0 | link->phy_state.symclk_state | 1 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex->first_waiter->task->blocked_lock.owner | (-4611686018427387904)-4611686018427387903 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->blocked_lock.owner | (-1) |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->blocked_lock.owner_cpu | 4294967295 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->blocked_on | (-1)-0 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->usage.refs.counter | s32min-s32max |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.osq.tail.counter | s32min-s32max |
| PARAM_VALUE | 0 | *link->ctx->dc->scratch.pipes_to_unlock_first | 0-1 |
| PARAM_VALUE | 0 | *link->dpcd_caps.edp_supported_link_rates | 0-4294967295 |
| PARAM_VALUE | 0 | *link->dpcd_caps.lttpr_caps.aux_rd_interval | 0-255 |
| PARAM_VALUE | 1 | address | 263 |
| PARAM_VALUE | 3 | size | 1 |
| CAPPED_DATA | 0 | link | 1 |
| DATA_SOURCE | 0 | link | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| UNITS | 3 | size | unit_byte |
drivers/gpu/drm/amd/amdgpu/../display/dc/link/protocols/link_dp_training_fixed_vs_pe_retimer.c dp_perform_fixed_vs_pe_training_sequence() -> core_link_write_dpcd()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | link | 4096-ptr_max |
| PARAM_VALUE | 0 | link->chip_caps | 2-u16max |
| PARAM_VALUE | 0 | link->ctx->dc->dml.soc.dram_clock_change_latency_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.soc.sr_enter_plus_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.soc.sr_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.AverageDCCCompressionRate | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.AverageReadBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.AverageReadBandwidthGBytePerSecond | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DCFCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DISPCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DISPCLKDPPCLKDSCCLKDownSpreading | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DISPCLKDPPCLKVCOSpeed | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DISPCLKRampingMargin | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DISPCLKWithRampingRoundedToDFSGranularity | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DISPCLKWithoutRampingRoundedToDFSGranularity | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DISPCLK_calculated | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DPPCLKUsingSingleDPPChroma | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DPPCLKUsingSingleDPPLuma | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DRAMChannelWidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DRAMClockChangeLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DRAMClockChangeWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DRAMSpeed | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.Downspreading | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.FCLKChangeLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.FabricAndDRAMBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.FabricClock | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.FabricDatapathToDCNDataReturn | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.FinalDRAMClockChangeLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.FrameTimeForMinFullDETBufferingTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.GlobalDPPCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.LinesToFinishSwathTransferStutterCriticalPlane | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.MaxDispclkRoundedToDFSGranularity | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.MaxHSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.MaxVRatioPre | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.MaxVSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.MinActiveDRAMClockChangeLatencySupported | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.MinActiveFCLKChangeLatencySupported | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.MinUrgentLatencySupportUs | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.NonUrgentLatencyTolerance | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.PercentOfIdealDRAMBWReceivedAfterUrgLatencyPixelDataOnly | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.PercentOfIdealDRAMBWReceivedAfterUrgLatencySTROBE | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.PercentOfIdealDRAMBWReceivedAfterUrgLatencyVMDataOnly | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.PercentOfIdealFabricAndSDPPortBWReceivedAfterUrgLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.ReturnBandwidthToDCN | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.SMNLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.SOCCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.SREnterPlusExitTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.SREnterPlusExitZ8Time | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.SRExitTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.SRExitZ8Time | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.SmallestVBlank | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.StutterEfficiency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.StutterEfficiencyNotIncludingVBlank | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.StutterEnterPlusExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.StutterPeriod | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.SwathWidthYCriticalPlane | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.TCalc | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.TFinalxFill | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.TotalDataReadBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.TotalRowReadBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.TslvChk | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.USRRetrainingLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentExtraLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentLatencyAdjustmentFabricClockComponent | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentLatencyAdjustmentFabricClockReference | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentLatencyPixelDataOnly | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentLatencyPixelMixedWithVMData | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentLatencyVMDataOnly | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentRoundTripAndOutOfOrderLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.VBlankTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.VStartupMargin | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.WritebackDRAMClockChangeWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.WritebackLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.WritebackMaxHSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.WritebackMaxVSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.WritebackMinHSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.WritebackMinVSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.WritebackUrgentWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.XFCBusTransportTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.XFCFillBWOverhead | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.XFCRemoteSurfaceFlipDelay | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.XFCTSlvVreadyOffset | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.XFCTSlvVupdateOffset | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.XFCTSlvVupdateWidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.XFCXBUFLatencyTolerance | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.Z8StutterEfficiency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.Z8StutterEfficiencyBestCase | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.Z8StutterEfficiencyNotIncludingVBlank | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.Z8StutterEfficiencyNotIncludingVBlankBestCase | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.Z8StutterEnterPlusExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.Z8StutterExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.soc.dram_clock_change_latency_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.soc.sr_enter_plus_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.soc.sr_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.total_dcn_read_bw_with_flip_no_urgent_burst | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->dc | 4096-ptr_max |
| PARAM_VALUE | 0 | link->dc->hwss.enable_dp_link_output | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ddc | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_clock->id | s32min-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_clock->mode | s32min-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_clock->pin | 0-s64max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_data->id | s32min-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_data->mode | s32min-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_data->pin | 0-s64max |
| PARAM_VALUE | 0 | link->dpcd_caps.lttpr_caps.mode | 85,170 |
| PARAM_VALUE | 0 | link->phy_state.symclk_state | 1 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex->first_waiter->task->blocked_lock.owner | (-4611686018427387904)-4611686018427387903 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->blocked_lock.owner | (-1) |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->blocked_lock.owner_cpu | 4294967295 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->blocked_on | (-1)-0 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->usage.refs.counter | s32min-s32max |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.osq.tail.counter | s32min-s32max |
| PARAM_VALUE | 0 | *link->ctx->dc->scratch.pipes_to_unlock_first | 0-1 |
| PARAM_VALUE | 0 | *link->dpcd_caps.edp_supported_link_rates | 0-4294967295 |
| PARAM_VALUE | 0 | *link->dpcd_caps.lttpr_caps.aux_rd_interval | 0-255 |
| PARAM_VALUE | 1 | address | 257 |
| PARAM_VALUE | 2 | *data | 0 |
| PARAM_VALUE | 3 | size | 1 |
| CAPPED_DATA | 0 | link | 1 |
| DATA_SOURCE | 0 | link | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL |
drivers/gpu/drm/amd/amdgpu/../display/dc/link/protocols/link_dp_training_fixed_vs_pe_retimer.c dp_perform_fixed_vs_pe_training_sequence() -> core_link_write_dpcd()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | link | 4096-ptr_max |
| PARAM_VALUE | 0 | link->chip_caps | 2-u16max |
| PARAM_VALUE | 0 | link->ctx->dc->dml.soc.dram_clock_change_latency_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.soc.sr_enter_plus_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.soc.sr_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.AverageDCCCompressionRate | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.AverageReadBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.AverageReadBandwidthGBytePerSecond | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DCFCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DISPCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DISPCLKDPPCLKDSCCLKDownSpreading | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DISPCLKDPPCLKVCOSpeed | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DISPCLKRampingMargin | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DISPCLKWithRampingRoundedToDFSGranularity | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DISPCLKWithoutRampingRoundedToDFSGranularity | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DISPCLK_calculated | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DPPCLKUsingSingleDPPChroma | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DPPCLKUsingSingleDPPLuma | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DRAMChannelWidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DRAMClockChangeLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DRAMClockChangeWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DRAMSpeed | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.Downspreading | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.FCLKChangeLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.FabricAndDRAMBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.FabricClock | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.FabricDatapathToDCNDataReturn | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.FinalDRAMClockChangeLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.FrameTimeForMinFullDETBufferingTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.GlobalDPPCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.LinesToFinishSwathTransferStutterCriticalPlane | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.MaxDispclkRoundedToDFSGranularity | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.MaxHSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.MaxVRatioPre | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.MaxVSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.MinActiveDRAMClockChangeLatencySupported | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.MinActiveFCLKChangeLatencySupported | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.MinUrgentLatencySupportUs | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.NonUrgentLatencyTolerance | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.PercentOfIdealDRAMBWReceivedAfterUrgLatencyPixelDataOnly | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.PercentOfIdealDRAMBWReceivedAfterUrgLatencySTROBE | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.PercentOfIdealDRAMBWReceivedAfterUrgLatencyVMDataOnly | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.PercentOfIdealFabricAndSDPPortBWReceivedAfterUrgLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.ReturnBandwidthToDCN | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.SMNLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.SOCCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.SREnterPlusExitTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.SREnterPlusExitZ8Time | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.SRExitTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.SRExitZ8Time | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.SmallestVBlank | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.StutterEfficiency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.StutterEfficiencyNotIncludingVBlank | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.StutterEnterPlusExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.StutterPeriod | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.SwathWidthYCriticalPlane | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.TCalc | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.TFinalxFill | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.TotalDataReadBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.TotalRowReadBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.TslvChk | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.USRRetrainingLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentExtraLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentLatencyAdjustmentFabricClockComponent | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentLatencyAdjustmentFabricClockReference | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentLatencyPixelDataOnly | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentLatencyPixelMixedWithVMData | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentLatencyVMDataOnly | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentRoundTripAndOutOfOrderLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.VBlankTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.VStartupMargin | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.WritebackDRAMClockChangeWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.WritebackLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.WritebackMaxHSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.WritebackMaxVSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.WritebackMinHSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.WritebackMinVSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.WritebackUrgentWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.XFCBusTransportTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.XFCFillBWOverhead | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.XFCRemoteSurfaceFlipDelay | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.XFCTSlvVreadyOffset | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.XFCTSlvVupdateOffset | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.XFCTSlvVupdateWidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.XFCXBUFLatencyTolerance | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.Z8StutterEfficiency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.Z8StutterEfficiencyBestCase | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.Z8StutterEfficiencyNotIncludingVBlank | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.Z8StutterEfficiencyNotIncludingVBlankBestCase | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.Z8StutterEnterPlusExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.Z8StutterExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.soc.dram_clock_change_latency_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.soc.sr_enter_plus_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.soc.sr_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.total_dcn_read_bw_with_flip_no_urgent_burst | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->dc | 4096-ptr_max |
| PARAM_VALUE | 0 | link->dc->hwss.enable_dp_link_output | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ddc | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_clock->id | s32min-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_clock->mode | s32min-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_clock->pin | 0-s64max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_data->id | s32min-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_data->mode | s32min-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_data->pin | 0-s64max |
| PARAM_VALUE | 0 | link->dpcd_caps.lttpr_caps.lttpr_ieee_oui | 4096-ptr_max |
| PARAM_VALUE | 0 | link->dpcd_caps.lttpr_caps.mode | 85,170 |
| PARAM_VALUE | 0 | link->phy_state.symclk_state | 1 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex->first_waiter->task->blocked_lock.owner | (-4611686018427387904)-4611686018427387903 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->blocked_lock.owner | (-1) |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->blocked_lock.owner_cpu | 4294967295 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->blocked_on | (-1)-0 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->usage.refs.counter | s32min-s32max |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.osq.tail.counter | s32min-s32max |
| PARAM_VALUE | 0 | link->vendor_specific_lttpr_link_rate_wa | 0-2,4,6-30 |
| PARAM_VALUE | 0 | *link->ctx->dc->scratch.pipes_to_unlock_first | 0-1 |
| PARAM_VALUE | 0 | *link->dpcd_caps.edp_supported_link_rates | 0-4294967295 |
| PARAM_VALUE | 0 | *link->dpcd_caps.lttpr_caps.aux_rd_interval | 0-255 |
| PARAM_VALUE | 1 | address | 256 |
| PARAM_VALUE | 2 | data | 2563468942060945408 |
| PARAM_VALUE | 2 | *data | 6,10 |
| PARAM_VALUE | 3 | size | 1 |
| CAPPED_DATA | 0 | link | 1 |
| CAPPED_DATA | 0 | link->vendor_specific_lttpr_link_rate_wa | 1 |
| DATA_SOURCE | 0 | link | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL |
drivers/gpu/drm/amd/amdgpu/../display/dc/link/protocols/link_dp_training_fixed_vs_pe_retimer.c dp_perform_fixed_vs_pe_training_sequence() -> core_link_write_dpcd()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | link | 4096-ptr_max |
| PARAM_VALUE | 0 | link->chip_caps | 2-u16max |
| PARAM_VALUE | 0 | link->ctx->dc->dml.soc.dram_clock_change_latency_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.soc.sr_enter_plus_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.soc.sr_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.AverageDCCCompressionRate | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.AverageReadBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.AverageReadBandwidthGBytePerSecond | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DCFCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DISPCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DISPCLKDPPCLKDSCCLKDownSpreading | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DISPCLKDPPCLKVCOSpeed | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DISPCLKRampingMargin | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DISPCLKWithRampingRoundedToDFSGranularity | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DISPCLKWithoutRampingRoundedToDFSGranularity | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DISPCLK_calculated | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DPPCLKUsingSingleDPPChroma | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DPPCLKUsingSingleDPPLuma | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DRAMChannelWidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DRAMClockChangeLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DRAMClockChangeWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DRAMSpeed | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.Downspreading | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.FCLKChangeLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.FabricAndDRAMBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.FabricClock | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.FabricDatapathToDCNDataReturn | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.FinalDRAMClockChangeLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.FrameTimeForMinFullDETBufferingTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.GlobalDPPCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.LinesToFinishSwathTransferStutterCriticalPlane | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.MaxDispclkRoundedToDFSGranularity | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.MaxHSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.MaxVRatioPre | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.MaxVSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.MinActiveDRAMClockChangeLatencySupported | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.MinActiveFCLKChangeLatencySupported | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.MinUrgentLatencySupportUs | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.NonUrgentLatencyTolerance | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.PercentOfIdealDRAMBWReceivedAfterUrgLatencyPixelDataOnly | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.PercentOfIdealDRAMBWReceivedAfterUrgLatencySTROBE | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.PercentOfIdealDRAMBWReceivedAfterUrgLatencyVMDataOnly | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.PercentOfIdealFabricAndSDPPortBWReceivedAfterUrgLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.ReturnBandwidthToDCN | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.SMNLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.SOCCLK | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.SREnterPlusExitTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.SREnterPlusExitZ8Time | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.SRExitTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.SRExitZ8Time | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.SmallestVBlank | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.StutterEfficiency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.StutterEfficiencyNotIncludingVBlank | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.StutterEnterPlusExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.StutterPeriod | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.SwathWidthYCriticalPlane | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.TCalc | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.TFinalxFill | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.TotalDataReadBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.TotalRowReadBandwidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.TslvChk | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.USRRetrainingLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentExtraLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentLatencyAdjustmentFabricClockComponent | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentLatencyAdjustmentFabricClockReference | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentLatencyPixelDataOnly | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentLatencyPixelMixedWithVMData | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentLatencyVMDataOnly | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentRoundTripAndOutOfOrderLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.UrgentWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.VBlankTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.VStartupMargin | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.WritebackDRAMClockChangeWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.WritebackLatency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.WritebackMaxHSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.WritebackMaxVSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.WritebackMinHSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.WritebackMinVSCLRatio | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.WritebackUrgentWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.XFCBusTransportTime | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.XFCFillBWOverhead | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.XFCRemoteSurfaceFlipDelay | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.XFCTSlvVreadyOffset | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.XFCTSlvVupdateOffset | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.XFCTSlvVupdateWidth | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.XFCXBUFLatencyTolerance | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.Z8StutterEfficiency | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.Z8StutterEfficiencyBestCase | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.Z8StutterEfficiencyNotIncludingVBlank | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.Z8StutterEfficiencyNotIncludingVBlankBestCase | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.Z8StutterEnterPlusExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.Z8StutterExitWatermark | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.soc.dram_clock_change_latency_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.soc.sr_enter_plus_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.soc.sr_exit_time_us | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.total_dcn_read_bw_with_flip_no_urgent_burst | -1.797693e+308-1.797693e+308 |
| PARAM_VALUE | 0 | link->dc | 4096-ptr_max |
| PARAM_VALUE | 0 | link->dc->hwss.enable_dp_link_output | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ddc | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_clock->id | s32min-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_clock->mode | s32min-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_clock->pin | 0-s64max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_data->id | s32min-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_data->mode | s32min-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_data->pin | 0-s64max |
| PARAM_VALUE | 0 | link->dpcd_caps.lttpr_caps.lttpr_ieee_oui | 4096-ptr_max |
| PARAM_VALUE | 0 | link->dpcd_caps.lttpr_caps.mode | 85,170 |
| PARAM_VALUE | 0 | link->phy_state.symclk_state | 1 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex->first_waiter->task->blocked_lock.owner | (-4611686018427387904)-4611686018427387903 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->blocked_lock.owner | (-1) |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->blocked_lock.owner_cpu | 4294967295 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->blocked_on | (-1)-0 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->usage.refs.counter | s32min-s32max |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.osq.tail.counter | s32min-s32max |
| PARAM_VALUE | 0 | *link->ctx->dc->scratch.pipes_to_unlock_first | 0-1 |
| PARAM_VALUE | 0 | *link->dpcd_caps.edp_supported_link_rates | 0-4294967295 |
| PARAM_VALUE | 0 | *link->dpcd_caps.lttpr_caps.aux_rd_interval | 0-255 |
| PARAM_VALUE | 1 | address | 256 |
| PARAM_VALUE | 2 | data | 2702157349347368960 |
| PARAM_VALUE | 2 | *data | 0-2,4,6-30 |
| PARAM_VALUE | 3 | size | 1 |
| CAPPED_DATA | 0 | link | 1 |
| DATA_SOURCE | 0 | link | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL |
drivers/gpu/drm/amd/amdgpu/../display/dc/link/protocols/link_dp_training_fixed_vs_pe_retimer.c perform_fixed_vs_pe_nontransparent_training_sequence() -> core_link_write_dpcd()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | link | 4096-ptr_max |
| PARAM_VALUE | 0 | link->chip_caps | 2-u16max |
| PARAM_VALUE | 0 | link->ctx | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ctx->dc | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DPPCLKUsingSingleDPPChroma | -inf-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DPPCLKUsingSingleDPPLuma | -inf-1.797693e+308 |
| PARAM_VALUE | 0 | link->dc->hwss.enable_dp_link_output | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_clock->id | s32min-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_clock->mode | s32min-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_clock->pin | 0-s64max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_data->id | s32min-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_data->mode | s32min-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_data->pin | 0-s64max |
| PARAM_VALUE | 0 | link->dpcd_caps.lttpr_caps.mode | 85,170 |
| PARAM_VALUE | 0 | link->ext_enc_id.id | 0 |
| PARAM_VALUE | 0 | link->phy_state.symclk_state | 1 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex->first_waiter->task->blocked_lock.owner | (-4611686018427387904)-4611686018427387903 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->blocked_lock.owner | (-1) |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->blocked_lock.owner_cpu | 4294967295 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->usage.refs.counter | s32min-s32max |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.osq.tail.counter | s32min-s32max |
| PARAM_VALUE | 0 | link->vendor_specific_lttpr_link_rate_wa | 0,6 |
| PARAM_VALUE | 0 | *link->dpcd_caps.lttpr_caps.aux_rd_interval | 0-255 |
| PARAM_VALUE | 1 | address | 256 |
| PARAM_VALUE | 2 | data | 492281775590711296 |
| PARAM_VALUE | 2 | *data | 0-2,4,6-30 |
| PARAM_VALUE | 3 | size | 1 |
| DATA_SOURCE | 0 | link | $0 |
| FUZZY_MAX | 0 | link->vendor_specific_lttpr_link_rate_wa | 6 |
| BIT_INFO | 0 | link->vendor_specific_lttpr_link_rate_wa | 0x0,0x6 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL |
drivers/gpu/drm/amd/amdgpu/../display/dc/link/protocols/link_dp_training_8b_10b.c set_link_settings_and_perform_early_tps2_retimer_pre_lt_sequence() -> core_link_write_dpcd()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | link | 4096-ptr_max |
| PARAM_VALUE | 0 | link->chip_caps | 2-u16max |
| PARAM_VALUE | 0 | link->ctx | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ctx->dc | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DPPCLKUsingSingleDPPChroma | -inf-1.797693e+308 |
| PARAM_VALUE | 0 | link->ctx->dc->dml.vba.DPPCLKUsingSingleDPPLuma | -inf-1.797693e+308 |
| PARAM_VALUE | 0 | link->dc | 4096-ptr_max |
| PARAM_VALUE | 0 | link->dc->hwss.enable_dp_link_output | 4096-ptr_max |
| PARAM_VALUE | 0 | link->ddc->ctx->driver_context->dm.dpia_aux_lock.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_clock->id | s32min-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_clock->mode | s32min-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_clock->pin | 0-s64max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_data->id | s32min-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_data->mode | s32min-s32max |
| PARAM_VALUE | 0 | link->ddc->ddc_pin->pin_data->pin | 0-s64max |
| PARAM_VALUE | 0 | link->dpcd_caps.lttpr_caps.mode | 85,170 |
| PARAM_VALUE | 0 | link->phy_state.symclk_state | 1 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex->first_waiter->task->blocked_lock.owner | (-4611686018427387904)-4611686018427387903 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->blocked_lock.owner | (-1) |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->blocked_lock.owner_cpu | 4294967295 |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.first_waiter->task->usage.refs.counter | s32min-s32max |
| PARAM_VALUE | 0 | link->priv->dm_dp_aux.aux.hw_mutex.osq.tail.counter | s32min-s32max |
| PARAM_VALUE | 0 | *link->dpcd_caps.lttpr_caps.aux_rd_interval | 0-255 |
| PARAM_VALUE | 1 | address | 983056-983616 |
| PARAM_VALUE | 2 | *data | 0 |
| PARAM_VALUE | 3 | size | 1 |
| DATA_SOURCE | 0 | link | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL |