Defined in 4 files as a function:
- drivers/net/wireless/realtek/rtw89/rtw8851b_rfk.c, line 322 (as a function)
- drivers/net/wireless/realtek/rtw89/rtw8852a_rfk.c, line 253 (as a function)
- drivers/net/wireless/realtek/rtw89/rtw8852bt_rfk.c, line 543 (as a function)
- drivers/net/wireless/realtek/rtw89/rtw8852c_rfk.c, line 303 (as a function)
Referenced in 4 files:
- drivers/net/wireless/realtek/rtw89/rtw8851b_rfk.c, line 399
- drivers/net/wireless/realtek/rtw89/rtw8852a_rfk.c, line 317
- drivers/net/wireless/realtek/rtw89/rtw8852bt_rfk.c, line 621
- drivers/net/wireless/realtek/rtw89/rtw8852c_rfk.c, line 366
Smatch caller information:
34b0ab2ddb916e70 _dack_reload() -> _dack_reload_by_path()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rtwdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->btc.cx.wl.scbd_change | 1 |
| PARAM_VALUE | 0 | rtwdev->chip->bss_clr_vld.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->bss_clr_vld.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->c2h_counter_reg.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->c2h_counter_reg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dcfo_comp->addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->dcfo_comp->mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_lna_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_lna_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_p20_pagcugc_en.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_p20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_rxb_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_rxb_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_s20_pagcugc_en.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_s20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_tia_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_tia_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_lna_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_lna_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_p20_pagcugc_en.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_p20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_rxb_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_rxb_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_s20_pagcugc_en.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_s20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_tia_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_tia_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->h2c_counter_reg.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->h2c_counter_reg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->agg_limit.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->agg_limit.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->bfee_ctrl.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->bfee_ctrl.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->muedca_ctrl.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->muedca_ctrl.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->narrow_bw_ru_dis.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->narrow_bw_ru_dis.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->ra_agg_limit.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->ra_agg_limit.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->txcnt_limit.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->txcnt_limit.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->wow_ctrl.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->wow_ctrl.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->ops | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->ops->read_rf | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->phy_def | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_get.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_get.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->ref_rate.addr | 98,724,728,780,812,1792,3100,3132,3168,3180,3184,4768,4792,8200 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->rsc.addr | 98,724,728,780,812,1792,3100,3132,3168,3180,3184,4768,4792,8200 |
| PARAM_VALUE | 0 | rtwdev->chip->scbd | 1 |
| PARAM_VALUE | 0 | rtwdev->coex_rfk_chk_work.timer->entry.pprev | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->coex_rfk_chk_work.work.entry.next->next | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->coex_rfk_chk_work.work.entry.next->prev | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->coex_rfk_chk_work.work.entry.prev->next | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->coex_rfk_chk_work.work.entry.prev->prev | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->fw.elm_info.bb_gain.n_regs | 0-536870911 |
| PARAM_VALUE | 0 | rtwdev->fw.elm_info.bb_tbl.n_regs | 0-536870911 |
| PARAM_VALUE | 0 | rtwdev->fw.elm_info.rf_nctl.n_regs | 0-536870911 |
| PARAM_VALUE | 0 | rtwdev->hci.ops->read32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->phy_write32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write_rf | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->is_tssi_mode | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->priv->continual_io_error.counter | s32min-s32max |
| PARAM_VALUE | 0 | rtwdev->rfe_data->byrate.tbl.size | 0,24,35 |
| PARAM_VALUE | 0 | rtwdev->rfe_parms->byr_tbl->size | 0,24,35 |
| PARAM_VALUE | 1 | path | 0-1 |
| PARAM_VALUE | 2 | index | 0-1 |
| DATA_SOURCE | 0 | rtwdev | $0 |
| DATA_SOURCE | 1 | path | $1 |
| FUZZY_MAX | 2 | index | 1 |
| HARD_MAX | 1 | path | 1 |
| HARD_MAX | 2 | index | 1 |
| NOCHECK_CALL |
drivers/net/wireless/realtek/rtw89/rtw8852bt_rfk.c _dack_reload() -> _dack_reload_by_path()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rtwdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->bss_clr_vld.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->bss_clr_vld.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->c2h_counter_reg.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->c2h_counter_reg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dcfo_comp->addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->dcfo_comp->mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_lna_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_lna_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_p20_pagcugc_en.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_p20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_rxb_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_rxb_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_s20_pagcugc_en.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_s20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_tia_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_tia_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_lna_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_lna_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_p20_pagcugc_en.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_p20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_rxb_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_rxb_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_s20_pagcugc_en.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_s20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_tia_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_tia_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->h2c_counter_reg.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->h2c_counter_reg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->agg_limit.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->agg_limit.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->bfee_ctrl.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->bfee_ctrl.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->muedca_ctrl.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->muedca_ctrl.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->narrow_bw_ru_dis.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->narrow_bw_ru_dis.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->ra_agg_limit.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->ra_agg_limit.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->txcnt_limit.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->txcnt_limit.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->wow_ctrl.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->wow_ctrl.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->ops | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->ops->read_rf | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->phy_def | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->ampdu_miss.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->ampdu_miss.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->brk.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->brk.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->brk_option.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->brk_option.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cca_spoofing.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cca_spoofing.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_brk.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_brk.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_cca.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_cca.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_sfd_gg.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_sfd_gg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_sig_gg.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_sig_gg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_spoofing.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_spoofing.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_txen.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_txen.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_txon.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_txon.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->enable_all_cnt.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->enable_all_cnt.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->lsig_brk_l_th.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->lsig_brk_l_th.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->lsig_brk_s_th.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->lsig_brk_s_th.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->ofdm_cca.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->ofdm_cca.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->r1b_rr_sel.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->r1b_rr_sel.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->r1b_rx_rpt_rst.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->r1b_rx_rpt_rst.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rst_all_cnt.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rst_all_cnt.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rxl_err_parity.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rxl_err_parity.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rxl_err_rate.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rxl_err_rate.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->search_fail.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->search_fail.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_get.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_get.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->ref_rate.addr | 98,724,728,780,812,1792,3100,3132,3168,3180,3184,4768,4792,8200 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->rsc.addr | 98,724,728,780,812,1792,3100,3132,3168,3180,3184,4768,4792,8200 |
| PARAM_VALUE | 0 | rtwdev->chip->scbd | 1 |
| PARAM_VALUE | 0 | rtwdev->coex_rfk_chk_work.work.entry.next->next | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->coex_rfk_chk_work.work.entry.next->prev | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->coex_rfk_chk_work.work.entry.prev->next | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->coex_rfk_chk_work.work.entry.prev->prev | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->dack.msbk_timeout | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->read32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->phy_write32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write_rf | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->is_tssi_mode | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->priv->continual_io_error.counter | s32min-s32max |
| PARAM_VALUE | 0 | rtwdev->rfk_mcc.data->table_idx | 0-2 |
| PARAM_VALUE | 0 | *rtwdev->dpk->cur_idx | 0 |
| PARAM_VALUE | 0 | *rtwdev->dpk->dpk_gs | 91,127 |
| PARAM_VALUE | 0 | *rtwdev->dpk->max_dpk_txagc | 63 |
| PARAM_VALUE | 1 | path | 0-1 |
| PARAM_VALUE | 2 | index | 0-1 |
| DATA_SOURCE | 0 | rtwdev | $0 |
| DATA_SOURCE | 1 | path | $1 |
| FUZZY_MAX | 2 | index | 1 |
| HARD_MAX | 2 | index | 1 |
| NOCHECK_CALL |
drivers/net/wireless/realtek/rtw89/rtw8852c_rfk.c _dack_reload() -> _dack_reload_by_path()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rtwdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->btc.cx.wl.scbd_change | 1 |
| PARAM_VALUE | 0 | rtwdev->chip->bss_clr_vld.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->bss_clr_vld.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->c2h_counter_reg.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->c2h_counter_reg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dcfo_comp->addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->dcfo_comp->mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_lna_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_lna_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_p20_pagcugc_en.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_p20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_rxb_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_rxb_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_s20_pagcugc_en.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_s20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_tia_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_tia_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_lna_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_lna_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_p20_pagcugc_en.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_p20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_rxb_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_rxb_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_s20_pagcugc_en.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_s20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_tia_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_tia_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->h2c_counter_reg.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->h2c_counter_reg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->ops | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->ops->read_rf | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->phy_def | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_get.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_get.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->ref_rate.addr | 98,724,728,780,812,1792,3100,3132,3168,3180,3184,4768,4792,8200 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->rsc.addr | 98,724,728,780,812,1792,3100,3132,3168,3180,3184,4768,4792,8200 |
| PARAM_VALUE | 0 | rtwdev->chip->scbd | 1 |
| PARAM_VALUE | 0 | rtwdev->coex_rfk_chk_work.timer->entry.pprev | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->coex_rfk_chk_work.work.entry.next->next | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->coex_rfk_chk_work.work.entry.next->prev | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->coex_rfk_chk_work.work.entry.prev->next | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->coex_rfk_chk_work.work.entry.prev->prev | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->fw.elm_info.bb_gain.n_regs | 0-536870911 |
| PARAM_VALUE | 0 | rtwdev->fw.elm_info.bb_tbl.n_regs | 0-536870911 |
| PARAM_VALUE | 0 | rtwdev->fw.elm_info.rf_nctl.n_regs | 0-536870911 |
| PARAM_VALUE | 0 | rtwdev->hci.ops->read32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->phy_write32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write_rf | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->is_tssi_mode | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->priv->continual_io_error.counter | s32min-s32max |
| PARAM_VALUE | 0 | rtwdev->rfe_data->byrate.tbl.size | 0,24,35 |
| PARAM_VALUE | 0 | rtwdev->rfe_parms->byr_tbl->size | 0,24,35 |
| PARAM_VALUE | 0 | *rtwdev->lck->thermal | 0-255 |
| PARAM_VALUE | 1 | path | 0-1 |
| PARAM_VALUE | 2 | index | 0-1 |
| DATA_SOURCE | 0 | rtwdev | $0 |
| DATA_SOURCE | 1 | path | $1 |
| FUZZY_MAX | 2 | index | 1 |
| HARD_MAX | 1 | path | 1 |
| HARD_MAX | 2 | index | 1 |
| NOCHECK_CALL |
6ca602436e14891d _dack_reload() -> _dack_reload_by_path()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rtwdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->bss_clr_vld.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->bss_clr_vld.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->c2h_counter_reg.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->c2h_counter_reg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dcfo_comp->addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->dcfo_comp->mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_lna_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_lna_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_p20_pagcugc_en.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_p20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_rxb_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_rxb_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_s20_pagcugc_en.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_s20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_tia_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_tia_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_lna_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_lna_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_p20_pagcugc_en.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_p20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_rxb_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_rxb_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_s20_pagcugc_en.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_s20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_tia_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_tia_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->h2c_counter_reg.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->h2c_counter_reg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->agg_limit.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->agg_limit.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->bfee_ctrl.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->bfee_ctrl.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->muedca_ctrl.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->muedca_ctrl.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->narrow_bw_ru_dis.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->narrow_bw_ru_dis.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->ra_agg_limit.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->ra_agg_limit.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->txcnt_limit.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->txcnt_limit.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->wow_ctrl.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->wow_ctrl.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->ops | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->ops->read_rf | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->phy_def | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_get.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_get.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->ref_rate.addr | 98,724,728,780,812,1792,3100,3132,3168,3180,3184,4768,4792,8200 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->rsc.addr | 98,724,728,780,812,1792,3100,3132,3168,3180,3184,4768,4792,8200 |
| PARAM_VALUE | 0 | rtwdev->fw.elm_info.bb_gain.n_regs | 0-536870911 |
| PARAM_VALUE | 0 | rtwdev->fw.elm_info.bb_tbl.n_regs | 0-536870911 |
| PARAM_VALUE | 0 | rtwdev->fw.elm_info.rf_nctl.n_regs | 0-536870911 |
| PARAM_VALUE | 0 | rtwdev->hci.ops->read32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->phy_write32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write_rf | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->is_tssi_mode | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->priv->continual_io_error.counter | s32min-s32max |
| PARAM_VALUE | 0 | rtwdev->rfe_data->byrate.tbl.size | 0,24,35 |
| PARAM_VALUE | 0 | rtwdev->rfe_parms->byr_tbl->size | 0,24,35 |
| PARAM_VALUE | 1 | path | 0 |
| PARAM_VALUE | 2 | index | 0-1 |
| DATA_SOURCE | 0 | rtwdev | $0 |
| DATA_SOURCE | 1 | path | $1 |
| FUZZY_MAX | 2 | index | 1 |
| HARD_MAX | 2 | index | 1 |
| NOCHECK_CALL |