Defined in 4 files as a function:
- drivers/net/wireless/realtek/rtw89/rtw8851b_rfk.c, line 394 (as a function)
- drivers/net/wireless/realtek/rtw89/rtw8852a_rfk.c, line 312 (as a function)
- drivers/net/wireless/realtek/rtw89/rtw8852bt_rfk.c, line 616 (as a function)
- drivers/net/wireless/realtek/rtw89/rtw8852c_rfk.c, line 361 (as a function)
Referenced in 4 files:
- drivers/net/wireless/realtek/rtw89/rtw8851b_rfk.c, line 505
- drivers/net/wireless/realtek/rtw89/rtw8852a_rfk.c
- drivers/net/wireless/realtek/rtw89/rtw8852bt_rfk.c
- drivers/net/wireless/realtek/rtw89/rtw8852c_rfk.c
Smatch caller information:
34b0ab2ddb916e70 _dack_s0() -> _dack_reload()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rtwdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->btc.bt_req_len | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.ctrl.ctrl.always_freerun | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.ctrl.ctrl.igno_bt | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.ctrl.ctrl.manual | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.ctrl.ctrl.rsvd | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.ctrl.ctrl.trace_step | 0,50 |
| PARAM_VALUE | 0 | rtwdev->btc.ctrl.ctrl_v7.always_freerun | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.ctrl.ctrl_v7.igno_bt | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.ctrl.ctrl_v7.manual | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.ctrl.ctrl_v7.rsvd | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.ble_scan_en | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.enable.remain | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.enable.srvd | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.feature | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.igno_wl | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.inq | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.inq_pag.last | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.inq_pag.now | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.inq_pag.remain | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.inq_pag.srvd | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.link_info.afh_update | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.link_info.bt_txpwr_desc.br_dbm | 4 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.link_info.bt_txpwr_desc.le_dbm | 4 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.link_info.cqddr | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.link_info.relink.last | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.link_info.relink.now | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.link_info.relink.srvd | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.link_info.role_sw | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.link_info.rssi | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.link_info.rsvd | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.link_info.slave_role | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.link_info.status.val | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.link_info.tx_3m | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.lna_constrain | 4-7 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.pag | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.reinit | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.rf_para.tx_pwr_perpkt | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.rfk_info.map.rsvd | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.rfk_info.map.timeout | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.rfk_info.val | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.rssi_level | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.rsvd | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.scan_info_update | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.scan_rx_low_pri | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.scbd | 0-4294967294 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.ver_info.fw | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.ver_info.fw_coex | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.other.hw_coex | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.other.rsvd | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.other.type | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.wl.afh_info.bw | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.wl.afh_info.ch | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.wl.afh_info.en | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.wl.afh_info.rsvd | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.wl.is_5g_hi_channel | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.wl.role_info_v1.dbcc_chg | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.wl.role_info_v1.dbcc_en | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.wl.role_info_v1.rsvd | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.wl.role_info_v2.dbcc_chg | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.wl.role_info_v2.dbcc_en | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.wl.role_info_v2.rsvd | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.wl.role_info_v7.dbcc_chg | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.wl.role_info_v7.dbcc_en | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.wl.role_info_v7.p2p_2g | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.wl.role_info_v7.role_map | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.wl.role_info_v8.dbcc_chg | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.wl.role_info_v8.dbcc_en | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.wl.role_info_v8.p2p_2g | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.wl.role_info_v8.role_map | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.wl.scan_info.rsvd | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.wl.scbd | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.wl.scbd_change | 1 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.wl.status.map.connecting | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.wl.status.map.dbccing | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.dm.init_info.init.bt_only | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.dm.init_info.init.cx_other | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.dm.init_info.init.dbcc_en | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.dm.init_info.init.module.cv | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.dm.init_info.init.rsvd | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.dm.init_info.init.wl_only | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.dm.init_info.init_v7.rsvd3 | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.dm.rf_trx_para.bt_rx_gain | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.dm.rf_trx_para.bt_tx_power | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.dm.rf_trx_para.wl_rx_gain | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.dm.rf_trx_para.wl_tx_power | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.dm.trx_info.bt_rx_gain | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.dm.trx_info.bt_tx_power | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.dm.trx_info.rx_gain | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.dm.trx_info.tx_power | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.dm.wl_scc.ebt_null | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.dm.wl_scc.null_role1 | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.dm.wl_scc.null_role2 | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md.ant.btg_pos | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md.ant.diversity | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md.ant.isolation | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md.ant.num | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md.ant.single_pos | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md.ant.stream_cnt | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md.ant.type | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md.bt_pos | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md.bt_solo | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md.cv | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md.kt_ver_adie | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md.rfe_type | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md.switch_type | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md.wa_type | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md_v7.ant.btg_pos | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md_v7.ant.diversity | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md_v7.ant.isolation | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md_v7.ant.num | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md_v7.ant.rsvd | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md_v7.ant.single_pos | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md_v7.ant.stream_cnt | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md_v7.ant.type | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md_v7.bt_pos | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md_v7.bt_solo | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md_v7.kt_ver | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md_v7.kt_ver_adie | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md_v7.rfe_type | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md_v7.rsvd | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md_v7.switch_type | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md_v7.wa_type | 0 |
| PARAM_VALUE | 0 | rtwdev->chip->bss_clr_vld.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->bss_clr_vld.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->c2h_counter_reg.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->c2h_counter_reg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dcfo_comp->addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->dcfo_comp->mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_lna_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_lna_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_p20_pagcugc_en.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_p20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_rxb_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_rxb_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_s20_pagcugc_en.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_s20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_tia_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_tia_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_lna_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_lna_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_p20_pagcugc_en.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_p20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_rxb_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_rxb_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_s20_pagcugc_en.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_s20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_tia_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_tia_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->h2c_counter_reg.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->h2c_counter_reg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->agg_limit.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->agg_limit.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->bfee_ctrl.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->bfee_ctrl.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->muedca_ctrl.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->muedca_ctrl.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->narrow_bw_ru_dis.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->narrow_bw_ru_dis.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->ra_agg_limit.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->ra_agg_limit.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->txcnt_limit.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->txcnt_limit.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->wow_ctrl.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->wow_ctrl.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->nctl_post_table->defs->addr | 0,17,32,36,81-82,85,96,143,239,768,772,776,780,788,792,804,812 |
| PARAM_VALUE | 0 | rtwdev->chip->nctl_post_table->defs->data | 0-8,10-12,14-17,19,22,24-25,28-32,40,46-48,51,57,62-66,68,92,99 |
| PARAM_VALUE | 0 | rtwdev->chip->nctl_post_table->defs->mask | 0-4,7-8,14-16,31-32,48,56,63-64,112,127-128,192,240,255,448,511 |
| PARAM_VALUE | 0 | rtwdev->chip->ops | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->ops->read_rf | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->ops->rfk_init | 1793181423999668224,2601799948471369728,3827962145406042112,4220007412913414144,5826958568736370688,6401534035154247680 |
| PARAM_VALUE | 0 | rtwdev->chip->phy_def | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->ampdu_miss.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->ampdu_miss.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->brk.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->brk.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->brk_option.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->brk_option.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cca_spoofing.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cca_spoofing.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_brk.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_brk.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_cca.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_cca.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_sfd_gg.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_sfd_gg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_sig_gg.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_sig_gg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_spoofing.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_spoofing.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_txen.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_txen.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_txon.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_txon.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->enable_all_cnt.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->enable_all_cnt.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->lsig_brk_l_th.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->lsig_brk_l_th.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->lsig_brk_s_th.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->lsig_brk_s_th.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->ofdm_cca.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->ofdm_cca.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->r1b_rr_sel.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->r1b_rr_sel.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->r1b_rx_rpt_rst.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->r1b_rx_rpt_rst.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rst_all_cnt.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rst_all_cnt.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rxl_err_parity.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rxl_err_parity.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rxl_err_rate.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rxl_err_rate.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->search_fail.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->search_fail.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_get.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_get.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->ref_rate.addr | 98,724,728,780,812,1792,3100,3132,3168,3180,3184,4768,4792,8200 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->rsc.addr | 98,724,728,780,812,1792,3100,3132,3168,3180,3184,4768,4792,8200 |
| PARAM_VALUE | 0 | rtwdev->coex_rfk_chk_work.timer->entry.pprev | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->coex_rfk_chk_work.timer.entry->pprev | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->coex_rfk_chk_work.timer.lockdep_map->name | 0-255 |
| PARAM_VALUE | 0 | rtwdev->coex_rfk_chk_work.work.entry.next->next | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->coex_rfk_chk_work.work.entry.next->prev | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->coex_rfk_chk_work.work.entry.prev->next | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->coex_rfk_chk_work.work.entry.prev->prev | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->read32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write_rf | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->is_tssi_mode | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->priv->continual_io_error.counter | s32min-s32max |
| PARAM_VALUE | 1 | path | 0 |
| DATA_SOURCE | 0 | rtwdev | $0 |
| NOCHECK_CALL |
34b0ab2ddb916e70 _dack_s1() -> _dack_reload()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rtwdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->btc.bt_req_len | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.ctrl.ctrl.always_freerun | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.ctrl.ctrl.igno_bt | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.ctrl.ctrl.manual | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.ctrl.ctrl.rsvd | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.ctrl.ctrl.trace_step | 0,50 |
| PARAM_VALUE | 0 | rtwdev->btc.ctrl.ctrl_v7.always_freerun | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.ctrl.ctrl_v7.igno_bt | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.ctrl.ctrl_v7.manual | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.ctrl.ctrl_v7.rsvd | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.ble_scan_en | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.enable.remain | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.enable.srvd | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.feature | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.igno_wl | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.inq | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.inq_pag.last | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.inq_pag.now | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.inq_pag.remain | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.inq_pag.srvd | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.link_info.afh_update | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.link_info.bt_txpwr_desc.br_dbm | 4 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.link_info.bt_txpwr_desc.le_dbm | 4 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.link_info.cqddr | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.link_info.relink.last | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.link_info.relink.now | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.link_info.relink.srvd | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.link_info.role_sw | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.link_info.rssi | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.link_info.rsvd | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.link_info.slave_role | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.link_info.status.val | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.link_info.tx_3m | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.lna_constrain | 4-7 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.pag | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.reinit | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.rf_para.tx_pwr_perpkt | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.rfk_info.map.rsvd | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.rfk_info.map.timeout | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.rfk_info.val | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.rssi_level | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.rsvd | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.scan_info_update | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.scan_rx_low_pri | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.scbd | 0-4294967294 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.ver_info.fw | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.ver_info.fw_coex | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.other.hw_coex | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.other.rsvd | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.other.type | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.wl.afh_info.bw | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.wl.afh_info.ch | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.wl.afh_info.en | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.wl.afh_info.rsvd | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.wl.is_5g_hi_channel | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.wl.role_info_v1.dbcc_chg | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.wl.role_info_v1.dbcc_en | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.wl.role_info_v1.rsvd | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.wl.role_info_v2.dbcc_chg | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.wl.role_info_v2.dbcc_en | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.wl.role_info_v2.rsvd | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.wl.role_info_v7.dbcc_chg | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.wl.role_info_v7.dbcc_en | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.wl.role_info_v7.p2p_2g | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.wl.role_info_v7.role_map | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.wl.role_info_v8.dbcc_chg | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.wl.role_info_v8.dbcc_en | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.wl.role_info_v8.p2p_2g | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.wl.role_info_v8.role_map | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.wl.scan_info.rsvd | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.wl.scbd | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.wl.scbd_change | 1 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.wl.status.map.connecting | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.wl.status.map.dbccing | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.dm.init_info.init.bt_only | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.dm.init_info.init.cx_other | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.dm.init_info.init.dbcc_en | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.dm.init_info.init.module.cv | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.dm.init_info.init.rsvd | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.dm.init_info.init.wl_only | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.dm.init_info.init_v7.rsvd3 | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.dm.rf_trx_para.bt_rx_gain | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.dm.rf_trx_para.bt_tx_power | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.dm.rf_trx_para.wl_rx_gain | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.dm.rf_trx_para.wl_tx_power | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.dm.trx_info.bt_rx_gain | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.dm.trx_info.bt_tx_power | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.dm.trx_info.rx_gain | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.dm.trx_info.tx_power | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.dm.wl_scc.ebt_null | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.dm.wl_scc.null_role1 | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.dm.wl_scc.null_role2 | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md.ant.btg_pos | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md.ant.diversity | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md.ant.isolation | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md.ant.num | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md.ant.single_pos | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md.ant.stream_cnt | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md.ant.type | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md.bt_pos | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md.bt_solo | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md.cv | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md.kt_ver_adie | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md.rfe_type | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md.switch_type | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md.wa_type | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md_v7.ant.btg_pos | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md_v7.ant.diversity | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md_v7.ant.isolation | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md_v7.ant.num | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md_v7.ant.rsvd | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md_v7.ant.single_pos | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md_v7.ant.stream_cnt | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md_v7.ant.type | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md_v7.bt_pos | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md_v7.bt_solo | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md_v7.kt_ver | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md_v7.kt_ver_adie | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md_v7.rfe_type | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md_v7.rsvd | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md_v7.switch_type | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md_v7.wa_type | 0 |
| PARAM_VALUE | 0 | rtwdev->chip->bss_clr_vld.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->bss_clr_vld.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->c2h_counter_reg.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->c2h_counter_reg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dcfo_comp->addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->dcfo_comp->mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_lna_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_lna_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_p20_pagcugc_en.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_p20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_rxb_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_rxb_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_s20_pagcugc_en.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_s20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_tia_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_tia_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_lna_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_lna_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_p20_pagcugc_en.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_p20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_rxb_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_rxb_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_s20_pagcugc_en.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_s20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_tia_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_tia_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->h2c_counter_reg.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->h2c_counter_reg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->agg_limit.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->agg_limit.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->bfee_ctrl.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->bfee_ctrl.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->muedca_ctrl.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->muedca_ctrl.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->narrow_bw_ru_dis.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->narrow_bw_ru_dis.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->ra_agg_limit.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->ra_agg_limit.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->txcnt_limit.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->txcnt_limit.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->wow_ctrl.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->wow_ctrl.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->nctl_post_table->defs->addr | 0,17,32,36,81-82,85,96,143,239,768,772,776,780,788,792,804,812 |
| PARAM_VALUE | 0 | rtwdev->chip->nctl_post_table->defs->data | 0-8,10-12,14-17,19,22,24-25,28-32,40,46-48,51,57,62-66,68,92,99 |
| PARAM_VALUE | 0 | rtwdev->chip->nctl_post_table->defs->mask | 0-4,7-8,14-16,31-32,48,56,63-64,112,127-128,192,240,255,448,511 |
| PARAM_VALUE | 0 | rtwdev->chip->ops | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->ops->read_rf | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->ops->rfk_init | 1793181423999668224,2601799948471369728,3827962145406042112,4220007412913414144,5826958568736370688,6401534035154247680 |
| PARAM_VALUE | 0 | rtwdev->chip->phy_def | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->ampdu_miss.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->ampdu_miss.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->brk.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->brk.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->brk_option.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->brk_option.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cca_spoofing.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cca_spoofing.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_brk.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_brk.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_cca.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_cca.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_sfd_gg.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_sfd_gg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_sig_gg.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_sig_gg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_spoofing.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_spoofing.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_txen.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_txen.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_txon.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_txon.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->enable_all_cnt.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->enable_all_cnt.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->lsig_brk_l_th.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->lsig_brk_l_th.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->lsig_brk_s_th.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->lsig_brk_s_th.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->ofdm_cca.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->ofdm_cca.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->r1b_rr_sel.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->r1b_rr_sel.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->r1b_rx_rpt_rst.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->r1b_rx_rpt_rst.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rst_all_cnt.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rst_all_cnt.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rxl_err_parity.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rxl_err_parity.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rxl_err_rate.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rxl_err_rate.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->search_fail.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->search_fail.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_get.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_get.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->ref_rate.addr | 98,724,728,780,812,1792,3100,3132,3168,3180,3184,4768,4792,8200 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->rsc.addr | 98,724,728,780,812,1792,3100,3132,3168,3180,3184,4768,4792,8200 |
| PARAM_VALUE | 0 | rtwdev->coex_rfk_chk_work.timer->entry.pprev | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->coex_rfk_chk_work.timer.entry->pprev | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->coex_rfk_chk_work.timer.lockdep_map->name | 0-255 |
| PARAM_VALUE | 0 | rtwdev->coex_rfk_chk_work.work.entry.next->next | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->coex_rfk_chk_work.work.entry.next->prev | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->coex_rfk_chk_work.work.entry.prev->next | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->coex_rfk_chk_work.work.entry.prev->prev | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->read32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->phy_write32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write_rf | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->is_tssi_mode | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->priv->continual_io_error.counter | s32min-s32max |
| PARAM_VALUE | 1 | path | 1 |
| DATA_SOURCE | 0 | rtwdev | $0 |
| NOCHECK_CALL |
drivers/net/wireless/realtek/rtw89/rtw8852bt_rfk.c _dack_s0() -> _dack_reload()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rtwdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->bss_clr_vld.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->bss_clr_vld.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->c2h_counter_reg.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->c2h_counter_reg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->h2c_counter_reg.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->h2c_counter_reg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->ops | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->ops->read_rf | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->ops->rfk_init | 1793181423999668224,2601799948471369728,3827962145406042112,4220007412913414144,5826958568736370688,6401534035154247680 |
| PARAM_VALUE | 0 | rtwdev->chip->phy_def | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_get.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_get.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->coex_rfk_chk_work.work.entry.next->next | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->coex_rfk_chk_work.work.entry.next->prev | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->coex_rfk_chk_work.work.entry.prev->next | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->coex_rfk_chk_work.work.entry.prev->prev | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->dack.msbk_timeout | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->read32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write_rf | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->is_tssi_mode | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->priv->continual_io_error.counter | s32min-s32max |
| PARAM_VALUE | 0 | rtwdev->rfk_mcc.data->table_idx | 0-2 |
| PARAM_VALUE | 0 | *rtwdev->dpk->cur_idx | 0 |
| PARAM_VALUE | 0 | *rtwdev->dpk->dpk_gs | 91,127 |
| PARAM_VALUE | 0 | *rtwdev->dpk->max_dpk_txagc | 63 |
| PARAM_VALUE | 1 | path | 0 |
| DATA_SOURCE | 0 | rtwdev | $0 |
| NOCHECK_CALL |
drivers/net/wireless/realtek/rtw89/rtw8852bt_rfk.c _dack_s1() -> _dack_reload()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rtwdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->bss_clr_vld.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->bss_clr_vld.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->c2h_counter_reg.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->c2h_counter_reg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->h2c_counter_reg.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->h2c_counter_reg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->ops | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->ops->read_rf | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->ops->rfk_init | 1793181423999668224,2601799948471369728,3827962145406042112,4220007412913414144,5826958568736370688,6401534035154247680 |
| PARAM_VALUE | 0 | rtwdev->chip->phy_def | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_get.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_get.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->coex_rfk_chk_work.work.entry.next->next | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->coex_rfk_chk_work.work.entry.next->prev | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->coex_rfk_chk_work.work.entry.prev->next | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->coex_rfk_chk_work.work.entry.prev->prev | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->dack.msbk_timeout | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->read32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->phy_write32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write_rf | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->is_tssi_mode | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->priv->continual_io_error.counter | s32min-s32max |
| PARAM_VALUE | 0 | rtwdev->rfk_mcc.data->table_idx | 0-2 |
| PARAM_VALUE | 0 | *rtwdev->dpk->cur_idx | 0 |
| PARAM_VALUE | 0 | *rtwdev->dpk->dpk_gs | 91,127 |
| PARAM_VALUE | 0 | *rtwdev->dpk->max_dpk_txagc | 63 |
| PARAM_VALUE | 1 | path | 1 |
| DATA_SOURCE | 0 | rtwdev | $0 |
| NOCHECK_CALL |
drivers/net/wireless/realtek/rtw89/rtw8852c_rfk.c _dack_s0() -> _dack_reload()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rtwdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->btc.bt_req_len | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.ctrl.ctrl.always_freerun | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.ctrl.ctrl.igno_bt | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.ctrl.ctrl.manual | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.ctrl.ctrl.rsvd | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.ctrl.ctrl.trace_step | 0,50 |
| PARAM_VALUE | 0 | rtwdev->btc.ctrl.ctrl_v7.always_freerun | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.ctrl.ctrl_v7.igno_bt | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.ctrl.ctrl_v7.manual | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.ctrl.ctrl_v7.rsvd | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.ble_scan_en | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.enable.remain | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.enable.srvd | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.feature | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.igno_wl | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.inq | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.inq_pag.last | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.inq_pag.now | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.inq_pag.remain | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.inq_pag.srvd | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.link_info.afh_update | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.link_info.bt_txpwr_desc.br_dbm | 4 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.link_info.bt_txpwr_desc.le_dbm | 4 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.link_info.cqddr | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.link_info.relink.last | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.link_info.relink.now | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.link_info.relink.srvd | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.link_info.role_sw | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.link_info.rssi | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.link_info.rsvd | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.link_info.slave_role | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.link_info.status.val | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.link_info.tx_3m | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.lna_constrain | 4-7 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.pag | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.reinit | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.rf_para.tx_pwr_perpkt | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.rfk_info.map.rsvd | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.rfk_info.map.timeout | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.rfk_info.val | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.rssi_level | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.rsvd | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.scan_info_update | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.scan_rx_low_pri | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.scbd | 0-4294967294 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.ver_info.fw | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.ver_info.fw_coex | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.other.hw_coex | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.other.rsvd | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.other.type | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.wl.afh_info.bw | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.wl.afh_info.ch | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.wl.afh_info.en | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.wl.afh_info.rsvd | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.wl.is_5g_hi_channel | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.wl.role_info_v1.dbcc_chg | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.wl.role_info_v1.dbcc_en | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.wl.role_info_v1.rsvd | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.wl.role_info_v2.dbcc_chg | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.wl.role_info_v2.dbcc_en | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.wl.role_info_v2.rsvd | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.wl.role_info_v7.dbcc_chg | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.wl.role_info_v7.dbcc_en | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.wl.role_info_v7.p2p_2g | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.wl.role_info_v7.role_map | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.wl.role_info_v8.dbcc_chg | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.wl.role_info_v8.dbcc_en | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.wl.role_info_v8.p2p_2g | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.wl.role_info_v8.role_map | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.wl.scan_info.rsvd | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.wl.scbd | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.wl.scbd_change | 1 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.wl.status.map.connecting | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.wl.status.map.dbccing | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.dm.init_info.init.bt_only | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.dm.init_info.init.cx_other | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.dm.init_info.init.dbcc_en | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.dm.init_info.init.module.cv | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.dm.init_info.init.rsvd | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.dm.init_info.init.wl_only | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.dm.init_info.init_v7.rsvd3 | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.dm.rf_trx_para.bt_rx_gain | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.dm.rf_trx_para.bt_tx_power | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.dm.rf_trx_para.wl_rx_gain | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.dm.rf_trx_para.wl_tx_power | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.dm.trx_info.bt_rx_gain | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.dm.trx_info.bt_tx_power | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.dm.trx_info.rx_gain | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.dm.trx_info.tx_power | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.dm.wl_scc.ebt_null | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.dm.wl_scc.null_role1 | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.dm.wl_scc.null_role2 | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md.ant.btg_pos | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md.ant.diversity | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md.ant.isolation | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md.ant.num | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md.ant.single_pos | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md.ant.stream_cnt | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md.ant.type | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md.bt_pos | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md.bt_solo | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md.cv | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md.kt_ver_adie | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md.rfe_type | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md.switch_type | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md.wa_type | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md_v7.ant.btg_pos | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md_v7.ant.diversity | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md_v7.ant.isolation | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md_v7.ant.num | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md_v7.ant.rsvd | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md_v7.ant.single_pos | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md_v7.ant.stream_cnt | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md_v7.ant.type | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md_v7.bt_pos | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md_v7.bt_solo | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md_v7.kt_ver | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md_v7.kt_ver_adie | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md_v7.rfe_type | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md_v7.rsvd | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md_v7.switch_type | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md_v7.wa_type | 0 |
| PARAM_VALUE | 0 | rtwdev->chip->bss_clr_vld.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->bss_clr_vld.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->c2h_counter_reg.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->c2h_counter_reg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dcfo_comp->addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->dcfo_comp->mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_lna_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_lna_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_p20_pagcugc_en.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_p20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_rxb_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_rxb_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_s20_pagcugc_en.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_s20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_tia_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_tia_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_lna_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_lna_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_p20_pagcugc_en.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_p20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_rxb_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_rxb_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_s20_pagcugc_en.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_s20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_tia_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_tia_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->h2c_counter_reg.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->h2c_counter_reg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->nctl_post_table->defs->addr | 0,17,32,36,81-82,85,96,143,239,768,772,776,780,788,792,804,812 |
| PARAM_VALUE | 0 | rtwdev->chip->nctl_post_table->defs->data | 0-8,10-12,14-17,19,22,24-25,28-32,40,46-48,51,57,62-66,68,92,99 |
| PARAM_VALUE | 0 | rtwdev->chip->nctl_post_table->defs->mask | 0-4,7-8,14-16,31-32,48,56,63-64,112,127-128,192,240,255,448,511 |
| PARAM_VALUE | 0 | rtwdev->chip->ops | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->ops->read_rf | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->ops->rfk_init | 1793181423999668224,2601799948471369728,3827962145406042112,4220007412913414144,5826958568736370688,6401534035154247680 |
| PARAM_VALUE | 0 | rtwdev->chip->phy_def | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->ampdu_miss.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->ampdu_miss.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->brk.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->brk.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->brk_option.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->brk_option.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cca_spoofing.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cca_spoofing.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_brk.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_brk.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_cca.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_cca.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_sfd_gg.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_sfd_gg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_sig_gg.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_sig_gg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_spoofing.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_spoofing.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_txen.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_txen.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_txon.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_txon.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->enable_all_cnt.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->enable_all_cnt.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->lsig_brk_l_th.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->lsig_brk_l_th.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->lsig_brk_s_th.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->lsig_brk_s_th.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->ofdm_cca.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->ofdm_cca.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->r1b_rr_sel.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->r1b_rr_sel.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->r1b_rx_rpt_rst.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->r1b_rx_rpt_rst.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rst_all_cnt.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rst_all_cnt.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rxl_err_parity.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rxl_err_parity.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rxl_err_rate.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rxl_err_rate.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->search_fail.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->search_fail.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_get.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_get.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->ref_rate.addr | 98,724,728,780,812,1792,3100,3132,3168,3180,3184,4768,4792,8200 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->rsc.addr | 98,724,728,780,812,1792,3100,3132,3168,3180,3184,4768,4792,8200 |
| PARAM_VALUE | 0 | rtwdev->coex_rfk_chk_work.timer->entry.pprev | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->coex_rfk_chk_work.timer.entry->pprev | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->coex_rfk_chk_work.timer.lockdep_map->name | 0-255 |
| PARAM_VALUE | 0 | rtwdev->coex_rfk_chk_work.work.entry.next->next | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->coex_rfk_chk_work.work.entry.next->prev | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->coex_rfk_chk_work.work.entry.prev->next | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->coex_rfk_chk_work.work.entry.prev->prev | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->read32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write_rf | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->is_tssi_mode | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->priv->continual_io_error.counter | s32min-s32max |
| PARAM_VALUE | 0 | *rtwdev->lck->thermal | 0-255 |
| PARAM_VALUE | 1 | path | 0 |
| DATA_SOURCE | 0 | rtwdev | $0 |
| NOCHECK_CALL |
drivers/net/wireless/realtek/rtw89/rtw8852c_rfk.c _dack_s1() -> _dack_reload()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rtwdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->btc.bt_req_len | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.ctrl.ctrl.always_freerun | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.ctrl.ctrl.igno_bt | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.ctrl.ctrl.manual | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.ctrl.ctrl.rsvd | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.ctrl.ctrl.trace_step | 0,50 |
| PARAM_VALUE | 0 | rtwdev->btc.ctrl.ctrl_v7.always_freerun | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.ctrl.ctrl_v7.igno_bt | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.ctrl.ctrl_v7.manual | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.ctrl.ctrl_v7.rsvd | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.ble_scan_en | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.enable.remain | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.enable.srvd | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.feature | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.igno_wl | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.inq | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.inq_pag.last | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.inq_pag.now | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.inq_pag.remain | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.inq_pag.srvd | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.link_info.afh_update | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.link_info.bt_txpwr_desc.br_dbm | 4 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.link_info.bt_txpwr_desc.le_dbm | 4 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.link_info.cqddr | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.link_info.relink.last | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.link_info.relink.now | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.link_info.relink.srvd | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.link_info.role_sw | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.link_info.rssi | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.link_info.rsvd | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.link_info.slave_role | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.link_info.status.val | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.link_info.tx_3m | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.lna_constrain | 4-7 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.pag | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.reinit | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.rf_para.tx_pwr_perpkt | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.rfk_info.map.rsvd | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.rfk_info.map.timeout | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.rfk_info.val | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.rssi_level | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.rsvd | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.scan_info_update | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.scan_rx_low_pri | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.scbd | 0-4294967294 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.ver_info.fw | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.bt.ver_info.fw_coex | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.other.hw_coex | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.other.rsvd | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.other.type | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.wl.afh_info.bw | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.wl.afh_info.ch | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.wl.afh_info.en | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.wl.afh_info.rsvd | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.wl.is_5g_hi_channel | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.wl.role_info_v1.dbcc_chg | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.wl.role_info_v1.dbcc_en | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.wl.role_info_v1.rsvd | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.wl.role_info_v2.dbcc_chg | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.wl.role_info_v2.dbcc_en | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.wl.role_info_v2.rsvd | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.wl.role_info_v7.dbcc_chg | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.wl.role_info_v7.dbcc_en | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.wl.role_info_v7.p2p_2g | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.wl.role_info_v7.role_map | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.wl.role_info_v8.dbcc_chg | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.wl.role_info_v8.dbcc_en | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.wl.role_info_v8.p2p_2g | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.wl.role_info_v8.role_map | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.wl.scan_info.rsvd | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.wl.scbd | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.wl.scbd_change | 1 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.wl.status.map.connecting | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.cx.wl.status.map.dbccing | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.dm.init_info.init.bt_only | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.dm.init_info.init.cx_other | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.dm.init_info.init.dbcc_en | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.dm.init_info.init.module.cv | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.dm.init_info.init.rsvd | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.dm.init_info.init.wl_only | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.dm.init_info.init_v7.rsvd3 | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.dm.rf_trx_para.bt_rx_gain | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.dm.rf_trx_para.bt_tx_power | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.dm.rf_trx_para.wl_rx_gain | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.dm.rf_trx_para.wl_tx_power | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.dm.trx_info.bt_rx_gain | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.dm.trx_info.bt_tx_power | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.dm.trx_info.rx_gain | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.dm.trx_info.tx_power | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.dm.wl_scc.ebt_null | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.dm.wl_scc.null_role1 | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.dm.wl_scc.null_role2 | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md.ant.btg_pos | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md.ant.diversity | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md.ant.isolation | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md.ant.num | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md.ant.single_pos | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md.ant.stream_cnt | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md.ant.type | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md.bt_pos | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md.bt_solo | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md.cv | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md.kt_ver_adie | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md.rfe_type | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md.switch_type | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md.wa_type | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md_v7.ant.btg_pos | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md_v7.ant.diversity | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md_v7.ant.isolation | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md_v7.ant.num | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md_v7.ant.rsvd | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md_v7.ant.single_pos | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md_v7.ant.stream_cnt | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md_v7.ant.type | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md_v7.bt_pos | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md_v7.bt_solo | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md_v7.kt_ver | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md_v7.kt_ver_adie | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md_v7.rfe_type | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md_v7.rsvd | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md_v7.switch_type | 0 |
| PARAM_VALUE | 0 | rtwdev->btc.mdinfo.md_v7.wa_type | 0 |
| PARAM_VALUE | 0 | rtwdev->chip->bss_clr_vld.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->bss_clr_vld.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->c2h_counter_reg.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->c2h_counter_reg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dcfo_comp->addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->dcfo_comp->mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_lna_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_lna_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_p20_pagcugc_en.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_p20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_rxb_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_rxb_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_s20_pagcugc_en.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_s20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_tia_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_tia_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_lna_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_lna_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_p20_pagcugc_en.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_p20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_rxb_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_rxb_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_s20_pagcugc_en.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_s20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_tia_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_tia_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->h2c_counter_reg.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->h2c_counter_reg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->nctl_post_table->defs->addr | 0,17,32,36,81-82,85,96,143,239,768,772,776,780,788,792,804,812 |
| PARAM_VALUE | 0 | rtwdev->chip->nctl_post_table->defs->data | 0-8,10-12,14-17,19,22,24-25,28-32,40,46-48,51,57,62-66,68,92,99 |
| PARAM_VALUE | 0 | rtwdev->chip->nctl_post_table->defs->mask | 0-4,7-8,14-16,31-32,48,56,63-64,112,127-128,192,240,255,448,511 |
| PARAM_VALUE | 0 | rtwdev->chip->ops | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->ops->read_rf | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->ops->rfk_init | 1793181423999668224,2601799948471369728,3827962145406042112,4220007412913414144,5826958568736370688,6401534035154247680 |
| PARAM_VALUE | 0 | rtwdev->chip->phy_def | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->ampdu_miss.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->ampdu_miss.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->brk.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->brk.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->brk_option.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->brk_option.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cca_spoofing.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cca_spoofing.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_brk.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_brk.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_cca.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_cca.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_sfd_gg.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_sfd_gg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_sig_gg.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_sig_gg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_spoofing.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_spoofing.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_txen.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_txen.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_txon.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_txon.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->enable_all_cnt.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->enable_all_cnt.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->lsig_brk_l_th.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->lsig_brk_l_th.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->lsig_brk_s_th.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->lsig_brk_s_th.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->ofdm_cca.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->ofdm_cca.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->r1b_rr_sel.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->r1b_rr_sel.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->r1b_rx_rpt_rst.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->r1b_rx_rpt_rst.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rst_all_cnt.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rst_all_cnt.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rxl_err_parity.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rxl_err_parity.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rxl_err_rate.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rxl_err_rate.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->search_fail.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->search_fail.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_get.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_get.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->ref_rate.addr | 98,724,728,780,812,1792,3100,3132,3168,3180,3184,4768,4792,8200 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->rsc.addr | 98,724,728,780,812,1792,3100,3132,3168,3180,3184,4768,4792,8200 |
| PARAM_VALUE | 0 | rtwdev->coex_rfk_chk_work.timer->entry.pprev | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->coex_rfk_chk_work.timer.entry->pprev | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->coex_rfk_chk_work.timer.lockdep_map->name | 0-255 |
| PARAM_VALUE | 0 | rtwdev->coex_rfk_chk_work.work.entry.next->next | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->coex_rfk_chk_work.work.entry.next->prev | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->coex_rfk_chk_work.work.entry.prev->next | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->coex_rfk_chk_work.work.entry.prev->prev | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->read32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->phy_write32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write_rf | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->is_tssi_mode | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->priv->continual_io_error.counter | s32min-s32max |
| PARAM_VALUE | 0 | *rtwdev->lck->thermal | 0-255 |
| PARAM_VALUE | 1 | path | 1 |
| DATA_SOURCE | 0 | rtwdev | $0 |
| NOCHECK_CALL |
6ca602436e14891d _dack_s0() -> _dack_reload()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rtwdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->dcfo_comp->addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->dcfo_comp->mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_lna_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_lna_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_p20_pagcugc_en.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_p20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_rxb_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_rxb_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_s20_pagcugc_en.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_s20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_tia_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_tia_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_lna_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_lna_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_p20_pagcugc_en.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_p20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_rxb_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_rxb_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_s20_pagcugc_en.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_s20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_tia_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_tia_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->agg_limit.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->agg_limit.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->bfee_ctrl.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->bfee_ctrl.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->muedca_ctrl.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->muedca_ctrl.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->narrow_bw_ru_dis.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->narrow_bw_ru_dis.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->ra_agg_limit.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->ra_agg_limit.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->txcnt_limit.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->txcnt_limit.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->wow_ctrl.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->wow_ctrl.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->ops | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->ops->read_rf | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->ops->rfk_init | 1793181423999668224,2601799948471369728,3827962145406042112,4220007412913414144,5826958568736370688,6401534035154247680 |
| PARAM_VALUE | 0 | rtwdev->chip->phy_def | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->ref_rate.addr | 98,724,728,780,812,1792,3100,3132,3168,3180,3184,4768,4792,8200 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->rsc.addr | 98,724,728,780,812,1792,3100,3132,3168,3180,3184,4768,4792,8200 |
| PARAM_VALUE | 0 | rtwdev->hci.ops->read32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write_rf | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->is_tssi_mode | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->priv->continual_io_error.counter | s32min-s32max |
| PARAM_VALUE | 1 | path | 0 |
| DATA_SOURCE | 0 | rtwdev | $0 |
| NOCHECK_CALL |