__intel_display_power_put_async identifier - Linux source code next-20260811

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FIXME
- FIXME
  - next-20260811

Documented in 1 files:

drivers/gpu/drm/i915/display/intel_display_power.c, line 893

Defined in 1 files as a prototype:

drivers/gpu/drm/i915/display/intel_display_power.h, line 236 (as a prototype)

Defined in 1 files as a function:

drivers/gpu/drm/i915/display/intel_display_power.c, line 906 (as a function)

Referenced in 1 files:

drivers/gpu/drm/i915/display/intel_display_power.h

Smatch caller information:

drivers/gpu/drm/i915/display/intel_tc.c intel_display_power_put_async() -> __intel_display_power_put_async()

Type	Parameter	Key	Value
PARAM_VALUE	0	display	4096-ptr_max
PARAM_VALUE	0	display->hotplug.poll_enabled	0
PARAM_VALUE	0	display->hotplug.poll_init_work.entry.next	4096-ptr_max
PARAM_VALUE	0	display->irq.vlv_display_irqs_enabled	1
PARAM_VALUE	0	display->params.enable_dmc_wl	0-1
PARAM_VALUE	0	display->parent	4096-ptr_max
PARAM_VALUE	0	display->power.domains.async_put_next_delay	0
PARAM_VALUE	0	display->power.domains.async_put_wakeref	0
PARAM_VALUE	0	display->power.domains.async_put_work.work.entry.next	1-u64max
PARAM_VALUE	0	display->power.domains.async_put_work.work.entry.prev	1-u64max
PARAM_VALUE	0	display->power.domains.lock.osq.tail.counter	0-s32max
PARAM_VALUE	0	display->psr_dc5_dc6_wa_work.entry.next	4096-ptr_max
PARAM_VALUE	0	display->wl.enabled	0
PARAM_VALUE	2	wakeref	4096-ptr_max,(-2)
PARAM_VALUE	3	delay_ms	(-1)
DATA_SOURCE	0	display	$0
DATA_SOURCE	1	domain	$1
DATA_SOURCE	2	wakeref	$2
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA	0	display->power.domains.dc_state	0-u32max
HALF_LOCKED2		&tc->lock

drivers/gpu/drm/i915/display/intel_dp.c intel_display_power_put_async() -> __intel_display_power_put_async()

Type	Parameter	Key	Value
PARAM_VALUE	0	display	4096-ptr_max
PARAM_VALUE	0	display->hotplug.poll_enabled	0
PARAM_VALUE	0	display->hotplug.poll_init_work.entry.next	4096-ptr_max
PARAM_VALUE	0	display->irq.vlv_display_irqs_enabled	1
PARAM_VALUE	0	display->parent	4096-ptr_max
PARAM_VALUE	0	display->power.domains.async_put_next_delay	0
PARAM_VALUE	0	display->power.domains.async_put_wakeref	0
PARAM_VALUE	0	display->power.domains.async_put_work.work.entry.next	1-u64max
PARAM_VALUE	0	display->power.domains.async_put_work.work.entry.prev	1-u64max
PARAM_VALUE	0	display->power.domains.lock.osq.tail.counter	0-s32max
PARAM_VALUE	0	display->psr_dc5_dc6_wa_work.entry.next	4096-ptr_max
PARAM_VALUE	0	display->wl.enabled	0
PARAM_VALUE	1	domain	0
PARAM_VALUE	2	wakeref	4096-ptr_max,(-2)
PARAM_VALUE	3	delay_ms	(-1)
DATA_SOURCE	0	display	$0
DATA_SOURCE	1	domain	$1
DATA_SOURCE	2	wakeref	$2
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA	0	display->power.domains.dc_state	0-u32max

drivers/gpu/drm/i915/gt/intel_gt_pm.c intel_display_power_put_async() -> __intel_display_power_put_async()

Type	Parameter	Key	Value
PARAM_VALUE	1	domain	72
PARAM_VALUE	3	delay_ms	(-1)
DATA_SOURCE	0	display	$0
DATA_SOURCE	1	domain	$1
DATA_SOURCE	2	wakeref	$2
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
LOCK2		&wf->mutex
TYPE_LOCK		(struct intel_wakeref)->mutex

drivers/gpu/drm/i915/display/intel_cmtg.c intel_display_power_put_async() -> __intel_display_power_put_async()

Type	Parameter	Key	Value
PARAM_VALUE	0	display	4096-ptr_max
PARAM_VALUE	0	display->drm	4096-ptr_max
PARAM_VALUE	0	display->hotplug.poll_init_work.entry.next	4096-ptr_max
PARAM_VALUE	0	display->info.__device_info	4096-ptr_max
PARAM_VALUE	0	display->params.enable_dmc_wl	0-1
PARAM_VALUE	0	display->parent	4096-ptr_max
PARAM_VALUE	0	display->power.domains.async_put_next_delay	0
PARAM_VALUE	0	display->power.domains.async_put_wakeref	0
PARAM_VALUE	0	display->power.domains.async_put_work.work.entry.next	1-u64max
PARAM_VALUE	0	display->power.domains.async_put_work.work.entry.prev	1-u64max
PARAM_VALUE	0	display->power.domains.lock.osq.tail.counter	0-s32max
PARAM_VALUE	0	display->psr_dc5_dc6_wa_work.entry.next	4096-ptr_max
PARAM_VALUE	0	display->wm.g4x.hpll.cursor	0-63
PARAM_VALUE	0	display->wm.g4x.hpll.fbc	0-15
PARAM_VALUE	0	display->wm.g4x.hpll.plane	0-511
PARAM_VALUE	0	display->wm.g4x.sr.cursor	0-63
PARAM_VALUE	0	display->wm.g4x.sr.fbc	0-7
PARAM_VALUE	0	display->wm.g4x.sr.plane	0-511
PARAM_VALUE	0	display->wm.hw.partitioning	0-1
PARAM_VALUE	0	display->wm.vlv.level	0-2
PARAM_VALUE	0	display->wm.vlv.sr.cursor	0-63
PARAM_VALUE	0	display->wm.vlv.sr.plane	0-2047
PARAM_VALUE	1	domain	9-10
PARAM_VALUE	2	wakeref	4096-ptr_max,(-2)
PARAM_VALUE	3	delay_ms	(-1)
CAPPED_DATA	0	display->dpll.num_dpll	1
DATA_SOURCE	0	display	$0
DATA_SOURCE	1	domain	$1
DATA_SOURCE	2	wakeref	$2
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA	0	display->cdclk.hw.cdclk	0-16[c]
HOST_DATA	0	display->cdclk.hw.joined_mbus	0-1
HOST_DATA	0	display->cdclk.hw.voltage_level	0-31[c]
HOST_DATA	0	display->cdclk.max_cdclk_freq	1-16[c]
HOST_DATA	0	display->cdclk.max_dotclk_freq	0-32[c]
HOST_DATA	0	display->fdi.pll_freq	20000-2570000[c]
HOST_DATA	0	display->fdi.rx_config	0,32768-98304[c]
HOST_DATA	0	display->power.domains.dc_state	0-u32max
HOST_DATA	0	display->state.bxt_phy_grc	0-u32max
HOST_DATA	0	display->vbt.lvds_use_ssc	0-1
HOST_DATA	0	display->wm.g4x.cxsr	0-1
HOST_DATA	0	display->wm.g4x.hpll.cursor	0-63[c]
HOST_DATA	0	display->wm.g4x.hpll.fbc	0-15[c]
HOST_DATA	0	display->wm.g4x.hpll.plane	0-511[c]
HOST_DATA	0	display->wm.g4x.sr.cursor	0-63[c]
HOST_DATA	0	display->wm.g4x.sr.fbc	0-7[c]
HOST_DATA	0	display->wm.g4x.sr.plane	0-511
HOST_DATA	0	display->wm.vlv.cxsr	0-1
HOST_DATA	0	display->wm.vlv.sr.cursor	0-63[c]
HOST_DATA	0	display->wm.vlv.sr.plane	0-2047[c]
HALF_LOCKED2		&display->drm->mode_config.connection_mutex
HALF_LOCKED2		&display->drm->mode_config.mutex

drivers/gpu/drm/i915/display/intel_display.c intel_display_power_put_async() -> __intel_display_power_put_async()

Type	Parameter	Key	Value
PARAM_VALUE	0	display	4096-ptr_max
PARAM_VALUE	0	display->params.enable_dmc_wl	0-1
PARAM_VALUE	0	display->parent	4096-ptr_max
PARAM_VALUE	0	display->power.domains.async_put_next_delay	0
PARAM_VALUE	0	display->power.domains.async_put_wakeref	0
PARAM_VALUE	0	display->power.domains.async_put_work.work.entry.next	1-u64max
PARAM_VALUE	0	display->power.domains.async_put_work.work.entry.prev	1-u64max
PARAM_VALUE	0	display->power.domains.lock.osq.tail.counter	0-s32max
PARAM_VALUE	2	wakeref	4096-ptr_max,(-2)
PARAM_VALUE	3	delay_ms	(-1)
DATA_SOURCE	0	display	$0
DATA_SOURCE	1	domain	$1
DATA_SOURCE	2	wakeref	$2
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA	0	display->power.domains.dc_state	0-u32max
HOST_DATA	0	display->state.bxt_phy_grc	0-u32max

drivers/gpu/drm/i915/display/intel_display.c intel_display_power_put_async_delay() -> __intel_display_power_put_async()

Type	Parameter	Key	Value
PARAM_VALUE	0	display	4096-ptr_max
PARAM_VALUE	0	display->dkl.phy_lock.rlock.dep_map->name	0-255
PARAM_VALUE	0	display->drm	4096-ptr_max
PARAM_VALUE	0	display->hotplug.poll_enabled	0
PARAM_VALUE	0	display->hotplug.poll_init_work.entry.next	4096-ptr_max
PARAM_VALUE	0	display->hotplug.poll_init_work.entry.next->prev	4096-ptr_max
PARAM_VALUE	0	display->irq.vlv_display_irqs_enabled	1
PARAM_VALUE	0	display->modeset.funcs	4096-ptr_max
PARAM_VALUE	0	display->parent	4096-ptr_max
PARAM_VALUE	0	display->power.domains.async_put_next_delay	0
PARAM_VALUE	0	display->power.domains.async_put_wakeref	0
PARAM_VALUE	0	display->power.domains.async_put_work.work.entry.next	1-u64max
PARAM_VALUE	0	display->power.domains.async_put_work.work.entry.next->next	1-u64max
PARAM_VALUE	0	display->power.domains.async_put_work.work.entry.next->prev	4096-ptr_max
PARAM_VALUE	0	display->power.domains.async_put_work.work.entry.prev	1-u64max
PARAM_VALUE	0	display->power.domains.async_put_work.work.entry.prev->next	1-u64max
PARAM_VALUE	0	display->power.domains.async_put_work.work.entry.prev->prev	1-u64max
PARAM_VALUE	0	display->power.domains.lock.dep_map->name	0-255
PARAM_VALUE	0	display->power.domains.lock.first_waiter->list.prev->next	5159360019465732096
PARAM_VALUE	0	display->power.domains.lock.first_waiter->list.prev->prev	5159360019465732096
PARAM_VALUE	0	display->power.domains.lock.first_waiter->task->blocked_lock.dep_map->name	0-255
PARAM_VALUE	0	display->power.domains.lock.first_waiter->task->blocked_lock.owner	(-1)
PARAM_VALUE	0	display->power.domains.lock.first_waiter->task->blocked_lock.owner_cpu	4294967295
PARAM_VALUE	0	display->power.domains.lock.first_waiter->task->blocked_lock.raw_lock.val.counter	s32min-s32max
PARAM_VALUE	0	display->power.domains.lock.first_waiter->task->usage.refs.counter	s32min-s32max
PARAM_VALUE	0	display->power.domains.lock.osq.tail.counter	0-s32max
PARAM_VALUE	0	display->power.domains.power_wells->count	s32min-s32max
PARAM_VALUE	0	display->power.domains.power_wells->hw_enabled	1
PARAM_VALUE	0	display->psr_dc5_dc6_wa_work.entry.next	4096-ptr_max
PARAM_VALUE	0	display->wl.enabled	0
PARAM_VALUE	0	display->wl.work.work.entry.next->next	1-u64max
PARAM_VALUE	0	display->wl.work.work.entry.next->prev	4096-ptr_max
PARAM_VALUE	0	display->wl.work.work.entry.prev->next	1-u64max
PARAM_VALUE	0	display->wl.work.work.entry.prev->prev	1-u64max
PARAM_VALUE	0	*display->irq.de_pipe_imr_mask	0-4294967295
PARAM_VALUE	0	*display->irq.pipestat_irq_mask	0-4294967295
PARAM_VALUE	1	domain	73
PARAM_VALUE	2	wakeref	4096-ptr_max,(-2)
PARAM_VALUE	3	delay_ms	1,17
CAPPED_DATA	0	display->drm->mode_config.num_crtc	1
DATA_SOURCE	0	display	$0
DATA_SOURCE	1	domain	$1
DATA_SOURCE	2	wakeref	$2
DATA_SOURCE	3	delay_ms	$3
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA	0	display->power.domains.dc_state	0-1073741835
HALF_LOCKED2		&pool->lock

drivers/gpu/drm/i915/display/intel_dp_aux.c intel_display_power_put_async() -> __intel_display_power_put_async()

Type	Parameter	Key	Value
PARAM_VALUE	0	display	4096-ptr_max
PARAM_VALUE	0	display->dkl.phy_lock.rlock.dep_map->name	0-255
PARAM_VALUE	0	display->hotplug.poll_enabled	0
PARAM_VALUE	0	display->hotplug.poll_init_work.entry.next	4096-ptr_max
PARAM_VALUE	0	display->hotplug.poll_init_work.entry.next->prev	4096-ptr_max
PARAM_VALUE	0	display->irq.vlv_display_irqs_enabled	1
PARAM_VALUE	0	display->parent	4096-ptr_max
PARAM_VALUE	0	display->power.domains.async_put_next_delay	0
PARAM_VALUE	0	display->power.domains.async_put_wakeref	0
PARAM_VALUE	0	display->power.domains.async_put_work.work.entry.next	1-u64max
PARAM_VALUE	0	display->power.domains.async_put_work.work.entry.next->next	1-u64max
PARAM_VALUE	0	display->power.domains.async_put_work.work.entry.next->prev	4096-ptr_max
PARAM_VALUE	0	display->power.domains.async_put_work.work.entry.prev	1-u64max
PARAM_VALUE	0	display->power.domains.async_put_work.work.entry.prev->next	1-u64max
PARAM_VALUE	0	display->power.domains.async_put_work.work.entry.prev->prev	1-u64max
PARAM_VALUE	0	display->power.domains.lock.dep_map->name	0-255
PARAM_VALUE	0	display->power.domains.lock.first_waiter->list.prev->next	5159360019465732096
PARAM_VALUE	0	display->power.domains.lock.first_waiter->list.prev->prev	5159360019465732096
PARAM_VALUE	0	display->power.domains.lock.first_waiter->task->blocked_lock.dep_map->name	0-255
PARAM_VALUE	0	display->power.domains.lock.first_waiter->task->blocked_lock.owner	(-1)
PARAM_VALUE	0	display->power.domains.lock.first_waiter->task->blocked_lock.owner_cpu	4294967295
PARAM_VALUE	0	display->power.domains.lock.first_waiter->task->blocked_lock.raw_lock.val.counter	s32min-s32max
PARAM_VALUE	0	display->power.domains.lock.first_waiter->task->usage.refs.counter	s32min-s32max
PARAM_VALUE	0	display->power.domains.lock.osq.tail.counter	0-s32max
PARAM_VALUE	0	display->power.domains.power_wells->count	s32min-s32max
PARAM_VALUE	0	display->power.domains.power_wells->hw_enabled	1
PARAM_VALUE	0	display->psr_dc5_dc6_wa_work.entry.next	4096-ptr_max
PARAM_VALUE	0	display->wl.enabled	0
PARAM_VALUE	0	display->wl.work.work.entry.next->next	1-u64max
PARAM_VALUE	0	display->wl.work.work.entry.next->prev	4096-ptr_max
PARAM_VALUE	0	display->wl.work.work.entry.prev->next	1-u64max
PARAM_VALUE	0	display->wl.work.work.entry.prev->prev	1-u64max
PARAM_VALUE	0	*display->irq.pipestat_irq_mask	0-4294967295
PARAM_VALUE	2	wakeref	4096-ptr_max,(-2)
PARAM_VALUE	3	delay_ms	(-1)
DATA_SOURCE	0	display	$0
DATA_SOURCE	1	domain	$1
DATA_SOURCE	2	wakeref	$2
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA	0	display->power.domains.dc_state	0-u32max
HALF_LOCKED2		&aux->hw_mutex
HALF_LOCKED2		&display->pps.mutex