Open Menu / Documentation / devicetree / bindings / mmc / bst,c1200-sdhci.yaml 
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/mmc/bst,c1200-sdhci.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Black Sesame Technologies DWCMSHC SDHCI Controller

maintainers:
  - Ge Gordon <gordon.ge@bst.ai>

allOf:
  - $ref: sdhci-common.yaml#

properties:
  compatible:
    const: bst,c1200-sdhci

  reg:
    items:
      - description: Core SDHCI registers
      - description: CRM registers

  interrupts:
    maxItems: 1

  clocks:
    maxItems: 1

  clock-names:
    items:
      - const: core

  memory-region:
    maxItems: 1

  dma-coherent: true

required:
  - compatible
  - reg
  - interrupts
  - clocks
  - clock-names

unevaluatedProperties: false

examples:
  - |
    #include <dt-bindings/interrupt-controller/arm-gic.h>
    #include <dt-bindings/interrupt-controller/irq.h>

    bus {
        #address-cells = <2>;
        #size-cells = <2>;

        mmc@22200000 {
            compatible = "bst,c1200-sdhci";
            reg = <0x0 0x22200000 0x0 0x1000>,
                  <0x0 0x23006000 0x0 0x1000>;
            interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
            clocks = <&clk_mmc>;
            clock-names = "core";
            memory-region = <&mmc0_reserved>;
            max-frequency = <200000000>;
            bus-width = <8>;
            non-removable;
            dma-coherent;
        };
    };