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Defined in 1 files as a function:

Referenced in 1 files:

Smatch caller information:

drivers/fpga/zynq-fpga.c zynq_fpga_isr() -> zynq_fpga_write()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
PARAM_VALUE 1 offset 12
PARAM_VALUE 2 val 8192
DATA_SOURCE 0 priv $1
PREEMPT_ADD <- disables preempt
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
LOCK2 0 &priv->dma_lock
HALF_LOCKED2 &desc->request_mutex
HALF_LOCKED2 flags
TYPE_LOCK (struct zynq_fpga_priv)->dma_lock

drivers/fpga/zynq-fpga.c zynq_fpga_ops_write() -> zynq_fpga_write()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
PARAM_VALUE 1 offset 12
PARAM_VALUE 2 val 4177000575
BUF_SIZE 0 priv 4,8,16,24,48,112,120,216
BUF_SIZE 0 priv 4,8,16,24,48,112,120,216
NOCHECK_CALL
NO_OVERFLOW_SIMPLE 0 priv->dma_nelms
HALF_LOCKED2 &mgr->ref_mutex
HALF_LOCKED2 &region->mutex

drivers/fpga/zynq-fpga.c zynq_fpga_ops_write() -> zynq_fpga_write()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
PARAM_VALUE 1 offset 12
PARAM_VALUE 2 val 4177000575
BUF_SIZE 0 priv 4,8,16,24,48,112,120,216
BUF_SIZE 0 priv 4,8,16,24,48,112,120,216
NOCHECK_CALL
NO_OVERFLOW_SIMPLE 0 priv->dma_nelms
HALF_LOCKED2 &mgr->ref_mutex
HALF_LOCKED2 &region->mutex

drivers/fpga/zynq-fpga.c zynq_fpga_ops_write_complete() -> zynq_fpga_write()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
PARAM_VALUE 1 offset 0
PARAM_VALUE 2 val 0-4160749567
BUF_SIZE 0 priv 4,8,16,24,48,112,120,216
BUF_SIZE 0 priv 4,8,16,24,48,112,120,216
BIT_INFO 2 val 0x0,0xf7ffffff
NOCHECK_CALL
HOST_DATA 2 val 0-4160749567
HALF_LOCKED2 &mgr->ref_mutex
HALF_LOCKED2 &region->mutex

drivers/fpga/zynq-fpga.c zynq_fpga_ops_write_init() -> zynq_fpga_write()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
PARAM_VALUE 1 offset 0
BUF_SIZE 0 priv 4,8,16,24,48,112,120,216
BUF_SIZE 0 priv 4,8,16,24,48,112,120,216
BIT_INFO 2 val 0x40000000,0xffffffff
NOCHECK_CALL
HOST_DATA 2 val 0-u32max
HALF_LOCKED2 &mgr->ref_mutex
HALF_LOCKED2 &region->mutex

drivers/fpga/zynq-fpga.c zynq_fpga_ops_write_init() -> zynq_fpga_write()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
PARAM_VALUE 1 offset 0
PARAM_VALUE 2 val 0-3221225471
BUF_SIZE 0 priv 4,8,16,24,48,112,120,216
BUF_SIZE 0 priv 4,8,16,24,48,112,120,216
BIT_INFO 2 val 0x0,0xbfffffff
NOCHECK_CALL
HOST_DATA 2 val 0-3221225471[c]
HALF_LOCKED2 &mgr->ref_mutex
HALF_LOCKED2 &region->mutex

drivers/fpga/zynq-fpga.c zynq_fpga_ops_write_init() -> zynq_fpga_write()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
PARAM_VALUE 1 offset 0
BUF_SIZE 0 priv 4,8,16,24,48,112,120,216
BUF_SIZE 0 priv 4,8,16,24,48,112,120,216
BIT_INFO 2 val 0x40000000,0xffffffff
NOCHECK_CALL
HOST_DATA 2 val 0-u32max
HALF_LOCKED2 &mgr->ref_mutex
HALF_LOCKED2 &region->mutex

drivers/fpga/zynq-fpga.c zynq_fpga_ops_write_init() -> zynq_fpga_write()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
PARAM_VALUE 1 offset 0
BUF_SIZE 0 priv 4,8,16,24,48,112,120,216
BUF_SIZE 0 priv 4,8,16,24,48,112,120,216
BIT_INFO 2 val 0xe000000,0xffffffff
NOCHECK_CALL
HOST_DATA 2 val 0-u32max
HALF_LOCKED2 &mgr->ref_mutex
HALF_LOCKED2 &region->mutex

drivers/fpga/zynq-fpga.c zynq_fpga_ops_write_init() -> zynq_fpga_write()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
PARAM_VALUE 1 offset 0
BUF_SIZE 0 priv 4,8,16,24,48,112,120,216
BUF_SIZE 0 priv 4,8,16,24,48,112,120,216
BIT_INFO 2 val 0xc000000,0xffffffff
NOCHECK_CALL
HOST_DATA 2 val 0-u32max
HALF_LOCKED2 &mgr->ref_mutex
HALF_LOCKED2 &region->mutex

drivers/fpga/zynq-fpga.c zynq_fpga_ops_write_init() -> zynq_fpga_write()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
PARAM_VALUE 1 offset 128
PARAM_VALUE 2 val 0-4294967279
BUF_SIZE 0 priv 4,8,16,24,48,112,120,216
BUF_SIZE 0 priv 4,8,16,24,48,112,120,216
CAPPED_DATA 2 val 1
BIT_INFO 2 val 0x0,0xffffffef
NOCHECK_CALL
HOST_DATA 2 val 0-4294967279
HALF_LOCKED2 &mgr->ref_mutex
HALF_LOCKED2 &region->mutex

drivers/fpga/zynq-fpga.c zynq_fpga_probe() -> zynq_fpga_write()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
PARAM_VALUE 0 priv->io_base 4096-ptr_max
PARAM_VALUE 1 offset 52
PARAM_VALUE 2 val 1971052301
BUF_SIZE 0 priv 216
BUF_SIZE 0 priv->clk (-1),1-s32max
BUF_SIZE 0 priv->irq s32min-(-1),1-s32max
BUF_SIZE 0 priv->slcr (-1),1-s32max
DATA_SOURCE 0 priv r devm_kzalloc
MEM_ZERO 0 priv
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/fpga/zynq-fpga.c zynq_fpga_probe() -> zynq_fpga_write()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
PARAM_VALUE 0 priv->io_base 4096-ptr_max
PARAM_VALUE 1 offset 12
PARAM_VALUE 2 val 4177000575
BUF_SIZE 0 priv 216
BUF_SIZE 0 priv->clk (-1),1-s32max
BUF_SIZE 0 priv->irq s32min-(-1),1-s32max
BUF_SIZE 0 priv->slcr (-1),1-s32max
DATA_SOURCE 0 priv r devm_kzalloc
MEM_ZERO 0 priv
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/fpga/zynq-fpga.c zynq_fpga_set_irq() -> zynq_fpga_write()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
PARAM_VALUE 1 offset 16
BUF_SIZE 0 priv (-1),4,8,16,24,48,112,120,216
BUF_SIZE 0 priv (-1),4,8,16,24,48,112,120,216
BUF_SIZE 0 priv->clk (-1),1-s32max
BUF_SIZE 0 priv->irq s32min-(-1),1-s32max
BUF_SIZE 0 priv->slcr (-1),1-s32max
DATA_SOURCE 0 priv $0
PREEMPT_ADD
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2 flags
HALF_LOCKED2 0 &priv->dma_lock

drivers/fpga/zynq-fpga.c zynq_step_dma() -> zynq_fpga_write()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
PARAM_VALUE 1 offset 24
BUF_SIZE 0 priv (-1),4,8,16,24,48,112,120,216
BUF_SIZE 0 priv (-1),4,8,16,24,48,112,120,216
DATA_SOURCE 0 priv $0
PREEMPT_ADD
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
UNITS 2 val unit_byte
LOCK2 0 &priv->dma_lock
HALF_LOCKED2 flags
TYPE_LOCK (struct zynq_fpga_priv)->dma_lock

drivers/fpga/zynq-fpga.c zynq_step_dma() -> zynq_fpga_write()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
PARAM_VALUE 1 offset 28
PARAM_VALUE 2 val u32max
BUF_SIZE 0 priv (-1),4,8,16,24,48,112,120,216
BUF_SIZE 0 priv (-1),4,8,16,24,48,112,120,216
DATA_SOURCE 0 priv $0
PREEMPT_ADD
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
LOCK2 0 &priv->dma_lock
HALF_LOCKED2 flags
TYPE_LOCK (struct zynq_fpga_priv)->dma_lock

drivers/fpga/zynq-fpga.c zynq_step_dma() -> zynq_fpga_write()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
PARAM_VALUE 1 offset 32
BUF_SIZE 0 priv (-1),4,8,16,24,48,112,120,216
BUF_SIZE 0 priv (-1),4,8,16,24,48,112,120,216
DATA_SOURCE 0 priv $0
PREEMPT_ADD
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
LOCK2 0 &priv->dma_lock
HALF_LOCKED2 flags
TYPE_LOCK (struct zynq_fpga_priv)->dma_lock

drivers/fpga/zynq-fpga.c zynq_step_dma() -> zynq_fpga_write()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
PARAM_VALUE 1 offset 36
PARAM_VALUE 2 val 0
BUF_SIZE 0 priv (-1),4,8,16,24,48,112,120,216
BUF_SIZE 0 priv (-1),4,8,16,24,48,112,120,216
DATA_SOURCE 0 priv $0
PREEMPT_ADD
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
LOCK2 0 &priv->dma_lock
HALF_LOCKED2 flags
TYPE_LOCK (struct zynq_fpga_priv)->dma_lock