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Defined in 1 files as a function:

Referenced in 1 files:

Smatch caller information:

drivers/fpga/zynq-fpga.c zynq_fpga_isr() -> zynq_fpga_read()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
PARAM_VALUE 1 offset 12
DATA_SOURCE 0 priv $1
PREEMPT_ADD <- disables preempt
RX_PATH
TASK_NOT_RUNNING
LOCK2 0 &priv->dma_lock
HALF_LOCKED2 &desc->request_mutex
HALF_LOCKED2 flags
TYPE_LOCK (struct zynq_fpga_priv)->dma_lock

drivers/fpga/zynq-fpga.c zynq_fpga_ops_state() -> zynq_fpga_read()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
PARAM_VALUE 1 offset 12
BUF_SIZE 0 priv (-1),4,8,16,24,48,112,120,216
BUF_SIZE 0 priv (-1),4,8,16,24,48,112,120,216
RX_PATH
TASK_NOT_RUNNING

drivers/fpga/zynq-fpga.c zynq_fpga_ops_write() -> zynq_fpga_read()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
PARAM_VALUE 1 offset 12
BUF_SIZE 0 priv 4,8,16,24,48,112,120,216
BUF_SIZE 0 priv 4,8,16,24,48,112,120,216
NO_OVERFLOW_SIMPLE 0 priv->dma_nelms
HALF_LOCKED2 &mgr->ref_mutex
HALF_LOCKED2 &region->mutex

drivers/fpga/zynq-fpga.c zynq_fpga_ops_write() -> zynq_fpga_read()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
PARAM_VALUE 1 offset 0
BUF_SIZE 0 priv 4,8,16,24,48,112,120,216
BUF_SIZE 0 priv 4,8,16,24,48,112,120,216
NO_OVERFLOW_SIMPLE 0 priv->dma_nelms
HALF_LOCKED2 &mgr->ref_mutex
HALF_LOCKED2 &region->mutex

drivers/fpga/zynq-fpga.c zynq_fpga_ops_write() -> zynq_fpga_read()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
PARAM_VALUE 1 offset 4
BUF_SIZE 0 priv 4,8,16,24,48,112,120,216
BUF_SIZE 0 priv 4,8,16,24,48,112,120,216
NO_OVERFLOW_SIMPLE 0 priv->dma_nelms
HALF_LOCKED2 &mgr->ref_mutex
HALF_LOCKED2 &region->mutex

drivers/fpga/zynq-fpga.c zynq_fpga_ops_write() -> zynq_fpga_read()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
PARAM_VALUE 1 offset 16
BUF_SIZE 0 priv 4,8,16,24,48,112,120,216
BUF_SIZE 0 priv 4,8,16,24,48,112,120,216
NO_OVERFLOW_SIMPLE 0 priv->dma_nelms
HALF_LOCKED2 &mgr->ref_mutex
HALF_LOCKED2 &region->mutex

drivers/fpga/zynq-fpga.c zynq_fpga_ops_write() -> zynq_fpga_read()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
PARAM_VALUE 1 offset 20
BUF_SIZE 0 priv 4,8,16,24,48,112,120,216
BUF_SIZE 0 priv 4,8,16,24,48,112,120,216
NO_OVERFLOW_SIMPLE 0 priv->dma_nelms
HALF_LOCKED2 &mgr->ref_mutex
HALF_LOCKED2 &region->mutex

drivers/fpga/zynq-fpga.c zynq_fpga_ops_write() -> zynq_fpga_read()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
PARAM_VALUE 1 offset 128
BUF_SIZE 0 priv 4,8,16,24,48,112,120,216
BUF_SIZE 0 priv 4,8,16,24,48,112,120,216
NO_OVERFLOW_SIMPLE 0 priv->dma_nelms
HALF_LOCKED2 &mgr->ref_mutex
HALF_LOCKED2 &region->mutex

drivers/fpga/zynq-fpga.c zynq_fpga_ops_write_complete() -> zynq_fpga_read()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
PARAM_VALUE 1 offset 0
BUF_SIZE 0 priv 4,8,16,24,48,112,120,216
BUF_SIZE 0 priv 4,8,16,24,48,112,120,216
HALF_LOCKED2 &mgr->ref_mutex
HALF_LOCKED2 &region->mutex

drivers/fpga/zynq-fpga.c zynq_fpga_ops_write_init() -> zynq_fpga_read()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
PARAM_VALUE 1 offset 0
BUF_SIZE 0 priv 4,8,16,24,48,112,120,216
BUF_SIZE 0 priv 4,8,16,24,48,112,120,216
HALF_LOCKED2 &mgr->ref_mutex
HALF_LOCKED2 &region->mutex

drivers/fpga/zynq-fpga.c zynq_fpga_ops_write_init() -> zynq_fpga_read()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
PARAM_VALUE 1 offset 0
BUF_SIZE 0 priv 4,8,16,24,48,112,120,216
BUF_SIZE 0 priv 4,8,16,24,48,112,120,216
HALF_LOCKED2 &mgr->ref_mutex
HALF_LOCKED2 &region->mutex

drivers/fpga/zynq-fpga.c zynq_fpga_ops_write_init() -> zynq_fpga_read()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
PARAM_VALUE 1 offset 0
BUF_SIZE 0 priv 4,8,16,24,48,112,120,216
BUF_SIZE 0 priv 4,8,16,24,48,112,120,216
HALF_LOCKED2 &mgr->ref_mutex
HALF_LOCKED2 &region->mutex

drivers/fpga/zynq-fpga.c zynq_fpga_ops_write_init() -> zynq_fpga_read()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
PARAM_VALUE 1 offset 0
BUF_SIZE 0 priv 4,8,16,24,48,112,120,216
BUF_SIZE 0 priv 4,8,16,24,48,112,120,216
HALF_LOCKED2 &mgr->ref_mutex
HALF_LOCKED2 &region->mutex

drivers/fpga/zynq-fpga.c zynq_fpga_ops_write_init() -> zynq_fpga_read()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
PARAM_VALUE 1 offset 0
BUF_SIZE 0 priv 4,8,16,24,48,112,120,216
BUF_SIZE 0 priv 4,8,16,24,48,112,120,216
HALF_LOCKED2 &mgr->ref_mutex
HALF_LOCKED2 &region->mutex

drivers/fpga/zynq-fpga.c zynq_fpga_ops_write_init() -> zynq_fpga_read()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
PARAM_VALUE 1 offset 20
BUF_SIZE 0 priv 4,8,16,24,48,112,120,216
BUF_SIZE 0 priv 4,8,16,24,48,112,120,216
HALF_LOCKED2 &mgr->ref_mutex
HALF_LOCKED2 &region->mutex

drivers/fpga/zynq-fpga.c zynq_fpga_ops_write_init() -> zynq_fpga_read()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
PARAM_VALUE 1 offset 128
BUF_SIZE 0 priv 4,8,16,24,48,112,120,216
BUF_SIZE 0 priv 4,8,16,24,48,112,120,216
HALF_LOCKED2 &mgr->ref_mutex
HALF_LOCKED2 &region->mutex

drivers/fpga/zynq-fpga.c zynq_step_dma() -> zynq_fpga_read()

Type Parameter Key Value
PARAM_VALUE 0 priv 4096-ptr_max
PARAM_VALUE 1 offset 20
BUF_SIZE 0 priv (-1),4,8,16,24,48,112,120,216
BUF_SIZE 0 priv (-1),4,8,16,24,48,112,120,216
DATA_SOURCE 0 priv $0
PREEMPT_ADD
RX_PATH
TASK_NOT_RUNNING
LOCK2 0 &priv->dma_lock
HALF_LOCKED2 flags
TYPE_LOCK (struct zynq_fpga_priv)->dma_lock