x86_vector_activate identifier - Linux source code next-20260811

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linux

Versions

FIXME
- FIXME
  - next-20260811

Defined in 1 files as a function:

arch/x86/kernel/apic/vector.c, line 461 (as a function)

Referenced in 1 files:

arch/x86/kernel/apic/vector.c, line 710

Smatch caller information:

kernel/irq/irqdomain.c __irq_domain_activate_irq() -> (struct irq_domain_ops)->activate()

Type	Parameter	Key	Value
PARAM_VALUE	0	dom	4096-ptr_max
PARAM_VALUE	0	dom->ops	4096-ptr_max
PARAM_VALUE	0	dom->ops->activate	1-u64max
PARAM_VALUE	1	irqd	4096-ptr_max
PARAM_VALUE	1	irqd->domain	4096-ptr_max
PARAM_VALUE	1	irqd->domain->ops	4096-ptr_max
PARAM_VALUE	1	irqd->domain->ops->activate	1-u64max
PARAM_VALUE	1	irqd->parent_data	0,4096-ptr_max
PARAM_VALUE	1	irqd->parent_data->chip_data	0,4096-ptr_max
PARAM_VALUE	1	irqd->parent_data->chip_data->entry->fields.destination	0-255
PARAM_VALUE	1	irqd->parent_data->chip_data->entry->fields.valid	1
PARAM_VALUE	1	irqd->parent_data->chip_data->entry->fields.vector	0-255
PARAM_VALUE	1	irqd->parent_data->chip_data->entry->hi.fields.destination	0-255
PARAM_VALUE	1	irqd->parent_data->chip_data->entry->hi.fields.vector	0-255
PARAM_VALUE	1	irqd->parent_data->chip_data->entry->lo.fields_remap.destination	0-16777215
PARAM_VALUE	1	irqd->parent_data->chip_data->entry->lo.fields_remap.valid	1
PARAM_VALUE	1	irqd->parent_data->chip_data->entry.ioapic_rte.as_uint64	0
PARAM_VALUE	1	irqd->parent_data->chip_data->entry.ioapic_rte.delivery_mode	0
PARAM_VALUE	1	irqd->parent_data->chip_data->entry.ioapic_rte.delivery_status	0
PARAM_VALUE	1	irqd->parent_data->chip_data->entry.ioapic_rte.destination_id	0
PARAM_VALUE	1	irqd->parent_data->chip_data->entry.ioapic_rte.destination_mode	0
PARAM_VALUE	1	irqd->parent_data->chip_data->entry.ioapic_rte.high_uint32	0
PARAM_VALUE	1	irqd->parent_data->chip_data->entry.ioapic_rte.interrupt_mask	0
PARAM_VALUE	1	irqd->parent_data->chip_data->entry.ioapic_rte.interrupt_polarity	0
PARAM_VALUE	1	irqd->parent_data->chip_data->entry.ioapic_rte.low_uint32	0
PARAM_VALUE	1	irqd->parent_data->chip_data->entry.ioapic_rte.remote_irr	0
PARAM_VALUE	1	irqd->parent_data->chip_data->entry.ioapic_rte.reserved1	0
PARAM_VALUE	1	irqd->parent_data->chip_data->entry.ioapic_rte.reserved2	0
PARAM_VALUE	1	irqd->parent_data->chip_data->entry.ioapic_rte.trigger_mode	0
PARAM_VALUE	1	irqd->parent_data->chip_data->entry.ioapic_rte.vector	0
PARAM_VALUE	1	irqd->parent_data->chip_data->entry.msi_entry.address.destination_id	0
PARAM_VALUE	1	irqd->parent_data->chip_data->entry.msi_entry.address.destination_mode	0
PARAM_VALUE	1	irqd->parent_data->chip_data->entry.msi_entry.address.msi_base	0
PARAM_VALUE	1	irqd->parent_data->chip_data->entry.msi_entry.address.redirection_hint	0
PARAM_VALUE	1	irqd->parent_data->chip_data->entry.msi_entry.address.reserved1	0
PARAM_VALUE	1	irqd->parent_data->chip_data->entry.msi_entry.address.reserved2	0
PARAM_VALUE	1	irqd->parent_data->chip_data->entry.msi_entry.as_uint64	0
PARAM_VALUE	1	irqd->parent_data->chip_data->entry.msi_entry.data.delivery_mode	0
PARAM_VALUE	1	irqd->parent_data->chip_data->entry.msi_entry.data.level_assert	0
PARAM_VALUE	1	irqd->parent_data->chip_data->entry.msi_entry.data.reserved1	0
PARAM_VALUE	1	irqd->parent_data->chip_data->entry.msi_entry.data.reserved2	0
PARAM_VALUE	1	irqd->parent_data->chip_data->entry.msi_entry.data.trigger_mode	0
PARAM_VALUE	1	irqd->parent_data->chip_data->entry.msi_entry.data.vector	0
PARAM_VALUE	1	irqd->parent_data->chip_data->entry.source	0
PARAM_VALUE	1	irqd->parent_data->chip_data->iommu->lock.dep_map->name	0-255
PARAM_VALUE	1	irqd->parent_data->chip_data->irq_2_iommu->iommu->qi->desc_status	0
PARAM_VALUE	1	irqd->parent_data->chip_data->irq_2_iommu.iommu->qi->free_cnt	s32min-s32max
PARAM_VALUE	1	irqd->parent_data->chip_data->irq_2_iommu.iommu->qi->free_head	s32min-s32max
PARAM_VALUE	1	irqd->parent_data->chip_data->irq_2_iommu.iommu->qi->free_tail	s32min-s32max
PARAM_VALUE	1	irqd->parent_data->chip_data->irq_2_iommu.iommu->qi->q_lock.dep_map->name	0-255
PARAM_VALUE	1	irqd->parent_data->chip_data->irq_2_iommu.iommu->qi->q_lock.owner	(-1)
PARAM_VALUE	1	irqd->parent_data->chip_data->irq_2_iommu.iommu->qi->q_lock.owner_cpu	4294967295
PARAM_VALUE	1	irqd->parent_data->chip_data->irq_2_iommu.iommu->qi->q_lock.raw_lock.val.counter	0-s32max
PARAM_VALUE	1	irqd->parent_data->chip_data->irq_2_iommu.posted_vcpu	0
PARAM_VALUE	1	irqd->parent_data->chip_data->spmic->dev.driver_data->last_apid	0-u16max
PARAM_VALUE	1	irqd->parent_data->chip_data->spmic->dev.driver_data->lock->owner	(-4611686018427387904)-4611686018427387903
PARAM_VALUE	1	irqd->parent_data->chip_data->spmic->dev.driver_data->lock.dep_map->name	0-255
PARAM_VALUE	1	irqd->parent_data->chip_data->spmic->dev.driver_data->lock.owner	(-1)
PARAM_VALUE	1	irqd->parent_data->chip_data->spmic->dev.driver_data->lock.owner_cpu	4294967295
PARAM_VALUE	1	irqd->parent_data->chip_data->spmic->dev.driver_data->lock.raw_lock.val.counter	s32min-s32max
BUF_SIZE	1	irqd	(-1),56
BUF_SIZE	1	irqd	(-1),56
DATA_SOURCE	1	irqd	$0
DATA_SOURCE	2	reserve	$1
CONTAINER	0	-56-24+0	$(-1)
RX_PATH
TASK_NOT_RUNNING
HOST_DATA	1	irqd->parent_data->chip_data->iommu->acpi_flags	0-255
HOST_DATA	1	irqd->parent_data->chip_data->iommu->cap	0-4294967295
HOST_DATA	1	irqd->parent_data->chip_data->iommu->cap_ptr	0-u16max
HOST_DATA	1	irqd->parent_data->chip_data->iommu->cmd_buf_head	0-4294967295
HOST_DATA	1	irqd->parent_data->chip_data->iommu->cmd_buf_tail	0-8191
HOST_DATA	1	irqd->parent_data->chip_data->iommu->cmd_sem_paddr	s64min-s64max
HOST_DATA	1	irqd->parent_data->chip_data->iommu->cmd_sem_val	s64min-s64max
HOST_DATA	1	irqd->parent_data->chip_data->iommu->dbg_cap_offset	s32min-s32max
HOST_DATA	1	irqd->parent_data->chip_data->iommu->dbg_mmio_offset	s32min-s32max
HOST_DATA	1	irqd->parent_data->chip_data->iommu->devid	0-u16max
HOST_DATA	1	irqd->parent_data->chip_data->iommu->features	s64min-s64max
HOST_DATA	1	irqd->parent_data->chip_data->iommu->features2	s64min-s64max
HOST_DATA	1	irqd->parent_data->chip_data->iommu->flags	0-4294967295
HOST_DATA	1	irqd->parent_data->chip_data->iommu->index	s32min-s32max
HOST_DATA	1	irqd->parent_data->chip_data->iommu->int_enabled	0-1
HOST_DATA	1	irqd->parent_data->chip_data->iommu->iommu.max_pasids	0-4294967295
HOST_DATA	1	irqd->parent_data->chip_data->iommu->iommu.ready	0-1
HOST_DATA	1	irqd->parent_data->chip_data->iommu->irtcachedis_enabled	0-1
HOST_DATA	1	irqd->parent_data->chip_data->iommu->lock.magic	0-4294967295
HOST_DATA	1	irqd->parent_data->chip_data->iommu->lock.raw_lock.locked	0-255
HOST_DATA	1	irqd->parent_data->chip_data->iommu->lock.raw_lock.locked_pending	0-u16max
HOST_DATA	1	irqd->parent_data->chip_data->iommu->lock.raw_lock.pending	0-255
HOST_DATA	1	irqd->parent_data->chip_data->iommu->lock.raw_lock.tail	0-u16max
HOST_DATA	1	irqd->parent_data->chip_data->iommu->lock.raw_lock.val.counter	s32min-s32max
HOST_DATA	1	irqd->parent_data->chip_data->iommu->max_banks	0-255
HOST_DATA	1	irqd->parent_data->chip_data->iommu->max_counters	0-255
HOST_DATA	1	irqd->parent_data->chip_data->iommu->mmio_phys	s64min-s64max
HOST_DATA	1	irqd->parent_data->chip_data->iommu->mmio_phys_end	s64min-s64max
HOST_DATA	1	irqd->parent_data->chip_data->iommu->need_sync	1
HOST_DATA	1	irqd->parent_data->chip_data->iommu->stored_addr_hi	0-4294967295
HOST_DATA	1	irqd->parent_data->chip_data->iommu->stored_addr_lo	0-4294967295
HOST_DATA	1	*irqd->parent_data->chip_data->iommu	s64min-s64max