Defined in 1 files as a function:
Referenced in 1 files:
Smatch caller information:
drivers/gpu/drm/i915/display/intel_psr.c intel_psr_enable_source() -> wm_optimization_wa()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | intel_dp | 4096-ptr_max |
| PARAM_VALUE | 0 | intel_dp->aux.hw_mutex.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | intel_dp->aux.hw_mutex.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | intel_dp->aux.hw_mutex.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | intel_dp->aux.hw_mutex.first_waiter->list.prev->prev | 5159360019465732096 |
| PARAM_VALUE | 0 | intel_dp->aux.hw_mutex.first_waiter->task->blocked_lock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | intel_dp->aux.hw_mutex.first_waiter->task->blocked_lock.owner | (-1) |
| PARAM_VALUE | 0 | intel_dp->aux.hw_mutex.first_waiter->task->blocked_lock.owner_cpu | 4294967295 |
| PARAM_VALUE | 0 | intel_dp->aux.hw_mutex.first_waiter->task->blocked_lock.raw_lock.val.counter | s32min-s32max |
| PARAM_VALUE | 0 | intel_dp->aux.hw_mutex.first_waiter->task->usage.refs.counter | s32min-s32max |
| PARAM_VALUE | 0 | intel_dp->psr.busy_frontbuffer_bits | 0 |
| PARAM_VALUE | 0 | intel_dp->psr.dc3co_exit_delay | 0-1073740,4294967294 |
| PARAM_VALUE | 0 | intel_dp->psr.enabled | 0 |
| PARAM_VALUE | 0 | intel_dp->psr.lock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | intel_dp->psr.lock.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | intel_dp->psr.lock.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | intel_dp->psr.lock.first_waiter->list.prev->prev | 5159360019465732096 |
| PARAM_VALUE | 0 | intel_dp->psr.lock.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | intel_dp->psr.lock.wait_lock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | intel_dp->psr.lock.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | intel_dp->psr.lock.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | intel_dp->psr.sink_not_reliable | 0 |
| PARAM_VALUE | 1 | crtc_state | 4096-ptr_max |
| PARAM_VALUE | 1 | crtc_state->active_planes | 1-255 |
| PARAM_VALUE | 1 | crtc_state->has_psr | 1 |
| PARAM_VALUE | 1 | crtc_state->uapi.crtc | 4096-ptr_max |
| BUF_SIZE | 0 | intel_dp | 6896 |
| DATA_SOURCE | 0 | intel_dp | $0 |
| DATA_SOURCE | 1 | crtc_state | $1 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| NO_OVERFLOW_SIMPLE | 1 | crtc_state->hw.adjusted_mode.clock | |
| LOCK2 | &psr->lock | ||
| HALF_LOCKED2 | &pool->lock | ||
| TYPE_LOCK | (struct intel_psr)->lock |
drivers/gpu/drm/i915/display/intel_psr.c intel_psr_post_plane_update() -> wm_optimization_wa()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | intel_dp | 4096-ptr_max |
| PARAM_VALUE | 0 | intel_dp->psr.enabled | 1 |
| PARAM_VALUE | 0 | intel_dp->psr.lock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | intel_dp->psr.lock.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | intel_dp->psr.lock.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | intel_dp->psr.lock.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | intel_dp->psr.lock.wait_lock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | intel_dp->psr.lock.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | intel_dp->psr.lock.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 1 | crtc_state | 4096-ptr_max |
| PARAM_VALUE | 1 | crtc_state->has_psr | 1 |
| PARAM_VALUE | 1 | crtc_state->uapi.crtc | 4096-ptr_max |
| PARAM_VALUE | 1 | crtc_state->wm_level_disabled | 0 |
| BUF_SIZE | 0 | intel_dp | 6896 |
| DATA_SOURCE | 0 | intel_dp | r enc_to_intel_dp |
| DATA_SOURCE | 1 | crtc_state | r intel_atomic_get_new_crtc_state |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| NO_OVERFLOW_SIMPLE | 1 | crtc_state->hw.adjusted_mode.clock | |
| LOCK2 | &psr->lock | ||
| HALF_LOCKED2 | &pool->lock | ||
| TYPE_LOCK | (struct intel_psr)->lock |
drivers/gpu/drm/i915/display/intel_psr.c intel_psr_pre_plane_update() -> wm_optimization_wa()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | intel_dp | 4096-ptr_max |
| PARAM_VALUE | 0 | intel_dp->psr.enabled | 1 |
| PARAM_VALUE | 0 | intel_dp->psr.lock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | intel_dp->psr.lock.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | intel_dp->psr.lock.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | intel_dp->psr.lock.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | intel_dp->psr.lock.wait_lock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | intel_dp->psr.lock.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | intel_dp->psr.lock.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 1 | crtc_state | 4096-ptr_max |
| PARAM_VALUE | 1 | crtc_state->active_planes | 1-255 |
| PARAM_VALUE | 1 | crtc_state->has_psr | 1 |
| PARAM_VALUE | 1 | crtc_state->uapi.active_changed | 0 |
| PARAM_VALUE | 1 | crtc_state->uapi.connectors_changed | 0 |
| PARAM_VALUE | 1 | crtc_state->uapi.mode_changed | 0 |
| PARAM_VALUE | 1 | crtc_state->update_lrr | 0 |
| PARAM_VALUE | 1 | crtc_state->update_m_n | 0 |
| PARAM_VALUE | 1 | crtc_state->wm_level_disabled | 1 |
| BUF_SIZE | 0 | intel_dp | 6896 |
| CAPPED_DATA | 1 | crtc_state->enable_psr2_su_region_et | 1 |
| CAPPED_DATA | 1 | crtc_state->has_panel_replay | 1 |
| CAPPED_DATA | 1 | crtc_state->has_sel_update | 1 |
| DATA_SOURCE | 0 | intel_dp | r enc_to_intel_dp |
| DATA_SOURCE | 1 | crtc_state | r intel_atomic_get_new_crtc_state |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| LOCK2 | &psr->lock | ||
| HALF_LOCKED2 | &pool->lock | ||
| TYPE_LOCK | (struct intel_psr)->lock |