Defined in 1 files as a prototype:

Defined in 1 files as a function:

Referenced in 3 files:

Smatch caller information:

drivers/gpu/drm/i915/display/intel_dpll.c _chv_enable_pll() -> vlv_dpio_write()

Type Parameter Key Value
PARAM_VALUE 0 display 4096-ptr_max
PARAM_VALUE 0 display->parent 4096-ptr_max
PARAM_VALUE 1 phy 0-1
PARAM_VALUE 3 val 0,8192-u32max
DATA_SOURCE 1 phy r vlv_pipe_to_phy
BIT_INFO 3 val 0x2000,0xffffffff
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/i915/display/intel_dpll.c chv_disable_pll() -> vlv_dpio_write()

Type Parameter Key Value
PARAM_VALUE 0 display 4096-ptr_max
PARAM_VALUE 0 display->dkl.phy_lock.rlock.dep_map->name 0-255
PARAM_VALUE 0 display->hotplug.poll_init_work.entry.next->prev 4096-ptr_max
PARAM_VALUE 0 display->info.__device_info 4096-ptr_max
PARAM_VALUE 0 display->params.enable_dmc_wl 0-1
PARAM_VALUE 0 display->parent 4096-ptr_max
PARAM_VALUE 0 display->platform.cherryview 1
PARAM_VALUE 0 display->power.domains.async_put_work.work.entry.next 1-u64max
PARAM_VALUE 0 display->power.domains.async_put_work.work.entry.next->next 1-u64max
PARAM_VALUE 0 display->power.domains.async_put_work.work.entry.next->prev 4096-ptr_max
PARAM_VALUE 0 display->power.domains.async_put_work.work.entry.prev 1-u64max
PARAM_VALUE 0 display->power.domains.async_put_work.work.entry.prev->next 1-u64max
PARAM_VALUE 0 display->power.domains.async_put_work.work.entry.prev->prev 1-u64max
PARAM_VALUE 0 display->power.domains.lock.dep_map->name 0-255
PARAM_VALUE 0 display->power.domains.lock.first_waiter->list.prev->next 5159360019465732096
PARAM_VALUE 0 display->power.domains.lock.first_waiter->list.prev->prev 5159360019465732096
PARAM_VALUE 0 display->power.domains.lock.first_waiter->task->blocked_lock.dep_map->name 0-255
PARAM_VALUE 0 display->power.domains.lock.first_waiter->task->blocked_lock.owner (-1)
PARAM_VALUE 0 display->power.domains.lock.first_waiter->task->blocked_lock.owner_cpu 4294967295
PARAM_VALUE 0 display->power.domains.lock.first_waiter->task->blocked_lock.raw_lock.val.counter s32min-s32max
PARAM_VALUE 0 display->power.domains.lock.first_waiter->task->usage.refs.counter s32min-s32max
PARAM_VALUE 0 display->power.domains.lock.osq.tail.counter 0-s32max
PARAM_VALUE 0 display->power.domains.power_wells->count s32min-s32max
PARAM_VALUE 0 display->power.domains.power_wells->hw_enabled 1
PARAM_VALUE 0 display->wl.taken 1
PARAM_VALUE 0 display->wl.work.timer.entry->pprev 4096-ptr_max
PARAM_VALUE 0 *display->irq.pipestat_irq_mask 0-4294967295
PARAM_VALUE 0 *display->power.chv_phy_assert 0-1
PARAM_VALUE 1 phy 0-1
DATA_SOURCE 0 display $0
DATA_SOURCE 1 phy r vlv_pipe_to_phy
BIT_INFO 3 val 0x0,0xffffdfff
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA 0 display->dmc.dmc->dc6_allowed.dc5_start 0-4294967295
HOST_DATA 0 display->power.domains.dc_state 0-u32max
HOST_DATA 3 val 0-4294959102[c]

drivers/gpu/drm/i915/display/intel_dpll.c chv_prepare_pll() -> vlv_dpio_write()

Type Parameter Key Value
PARAM_VALUE 0 display 4096-ptr_max
PARAM_VALUE 0 display->parent 4096-ptr_max
PARAM_VALUE 1 phy 0-1
DATA_SOURCE 1 phy r vlv_pipe_to_phy
BIT_INFO 3 val 0x0,0xffffff
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/i915/display/intel_dpll.c chv_prepare_pll() -> vlv_dpio_write()

Type Parameter Key Value
PARAM_VALUE 0 display 4096-ptr_max
PARAM_VALUE 0 display->parent 4096-ptr_max
PARAM_VALUE 1 phy 0-1
PARAM_VALUE 2 reg 32768-33152
PARAM_VALUE 3 val 0-255
DATA_SOURCE 1 phy r vlv_pipe_to_phy
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/i915/display/intel_dpll.c chv_prepare_pll() -> vlv_dpio_write()

Type Parameter Key Value
PARAM_VALUE 0 display 4096-ptr_max
PARAM_VALUE 0 display->parent 4096-ptr_max
PARAM_VALUE 1 phy 0-1
PARAM_VALUE 2 reg 32772-33156
PARAM_VALUE 3 val 0-4095
DATA_SOURCE 1 phy r vlv_pipe_to_phy
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/i915/display/intel_dpll.c chv_prepare_pll() -> vlv_dpio_write()

Type Parameter Key Value
PARAM_VALUE 0 display 4096-ptr_max
PARAM_VALUE 0 display->parent 4096-ptr_max
PARAM_VALUE 1 phy 0-1
PARAM_VALUE 2 reg 32776-33160
PARAM_VALUE 3 val 0-4194303
DATA_SOURCE 1 phy r vlv_pipe_to_phy
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/i915/display/intel_dpll.c chv_prepare_pll() -> vlv_dpio_write()

Type Parameter Key Value
PARAM_VALUE 0 display 4096-ptr_max
PARAM_VALUE 0 display->parent 4096-ptr_max
PARAM_VALUE 1 phy 0-1
PARAM_VALUE 2 reg 32780-33164
DATA_SOURCE 1 phy r vlv_pipe_to_phy
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/i915/display/intel_dpll.c chv_prepare_pll() -> vlv_dpio_write()

Type Parameter Key Value
PARAM_VALUE 0 display 4096-ptr_max
PARAM_VALUE 0 display->parent 4096-ptr_max
PARAM_VALUE 1 phy 0-1
PARAM_VALUE 2 reg 32804-33188
DATA_SOURCE 1 phy r vlv_pipe_to_phy
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/i915/display/intel_dpll.c chv_prepare_pll() -> vlv_dpio_write()

Type Parameter Key Value
PARAM_VALUE 0 display 4096-ptr_max
PARAM_VALUE 0 display->parent 4096-ptr_max
PARAM_VALUE 1 phy 0-1
PARAM_VALUE 2 reg 32792-33176
DATA_SOURCE 1 phy r vlv_pipe_to_phy
BIT_INFO 3 val 0x0,0x7ffff
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/i915/display/intel_dpll.c chv_prepare_pll() -> vlv_dpio_write()

Type Parameter Key Value
PARAM_VALUE 0 display 4096-ptr_max
PARAM_VALUE 0 display->parent 4096-ptr_max
PARAM_VALUE 1 phy 0-1
PARAM_VALUE 2 reg 32800-33184
DATA_SOURCE 1 phy r vlv_pipe_to_phy
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/i915/display/intel_dpll.c chv_prepare_pll() -> vlv_dpio_write()

Type Parameter Key Value
PARAM_VALUE 0 display 4096-ptr_max
PARAM_VALUE 0 display->parent 4096-ptr_max
PARAM_VALUE 1 phy 0-1
PARAM_VALUE 3 val 0,16384-u32max
DATA_SOURCE 1 phy r vlv_pipe_to_phy
BIT_INFO 3 val 0x4000,0xffffffff
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/i915/display/intel_dpll.c vlv_pllb_recal_opamp() -> vlv_dpio_write()

Type Parameter Key Value
PARAM_VALUE 0 display 4096-ptr_max
PARAM_VALUE 0 display->parent 4096-ptr_max
PARAM_VALUE 1 phy 0
PARAM_VALUE 2 reg 32836-32868
PARAM_VALUE 3 val 0,16-u32max
DATA_SOURCE 0 display $0
DATA_SOURCE 1 phy $1
BIT_INFO 3 val 0x30,0xffffff30
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/i915/display/intel_dpll.c vlv_pllb_recal_opamp() -> vlv_dpio_write()

Type Parameter Key Value
PARAM_VALUE 0 display 4096-ptr_max
PARAM_VALUE 0 display->parent 4096-ptr_max
PARAM_VALUE 1 phy 0
PARAM_VALUE 2 reg 32940
PARAM_VALUE 3 val 2348810240-2365587455
DATA_SOURCE 0 display $0
DATA_SOURCE 1 phy $1
BIT_INFO 3 val 0x8c000000,0x8cffffff
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/i915/display/intel_dpll.c vlv_pllb_recal_opamp() -> vlv_dpio_write()

Type Parameter Key Value
PARAM_VALUE 0 display 4096-ptr_max
PARAM_VALUE 0 display->parent 4096-ptr_max
PARAM_VALUE 1 phy 0
PARAM_VALUE 2 reg 32836-32868
PARAM_VALUE 3 val 0,256-u32max
DATA_SOURCE 0 display $0
DATA_SOURCE 1 phy $1
BIT_INFO 3 val 0x0,0xffffff00
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/i915/display/intel_dpll.c vlv_pllb_recal_opamp() -> vlv_dpio_write()

Type Parameter Key Value
PARAM_VALUE 0 display 4096-ptr_max
PARAM_VALUE 0 display->parent 4096-ptr_max
PARAM_VALUE 1 phy 0
PARAM_VALUE 2 reg 32940
PARAM_VALUE 3 val 2952790016-2969567231
DATA_SOURCE 0 display $0
DATA_SOURCE 1 phy $1
BIT_INFO 3 val 0xb0000000,0xb0ffffff
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/i915/display/intel_dpll.c vlv_prepare_pll() -> vlv_dpio_write()

Type Parameter Key Value
PARAM_VALUE 0 display 4096-ptr_max
PARAM_VALUE 0 display->parent 4096-ptr_max
PARAM_VALUE 1 phy 0-1
PARAM_VALUE 2 reg 49220
PARAM_VALUE 3 val 16777231
DATA_SOURCE 1 phy r vlv_pipe_to_phy
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/i915/display/intel_dpll.c vlv_prepare_pll() -> vlv_dpio_write()

Type Parameter Key Value
PARAM_VALUE 0 display 4096-ptr_max
PARAM_VALUE 0 display->parent 4096-ptr_max
PARAM_VALUE 1 phy 0-1
PARAM_VALUE 2 reg 32832-32864
PARAM_VALUE 3 val 0-16777215
DATA_SOURCE 1 phy r vlv_pipe_to_phy
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/i915/display/intel_dpll.c vlv_prepare_pll() -> vlv_dpio_write()

Type Parameter Key Value
PARAM_VALUE 0 display 4096-ptr_max
PARAM_VALUE 0 display->parent 4096-ptr_max
PARAM_VALUE 1 phy 0-1
PARAM_VALUE 2 reg 33024
PARAM_VALUE 3 val 1552
DATA_SOURCE 1 phy r vlv_pipe_to_phy
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/i915/display/intel_dpll.c vlv_prepare_pll() -> vlv_dpio_write()

Type Parameter Key Value
PARAM_VALUE 0 display 4096-ptr_max
PARAM_VALUE 0 display->parent 4096-ptr_max
PARAM_VALUE 1 phy 0-1
PARAM_VALUE 2 reg 32780-32812
DATA_SOURCE 1 phy r vlv_pipe_to_phy
BIT_INFO 3 val 0x0,0x7fffffff
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/i915/display/intel_dpll.c vlv_prepare_pll() -> vlv_dpio_write()

Type Parameter Key Value
PARAM_VALUE 0 display 4096-ptr_max
PARAM_VALUE 0 display->parent 4096-ptr_max
PARAM_VALUE 1 phy 0-1
PARAM_VALUE 2 reg 32780-32812
PARAM_VALUE 3 val 0,2048-u32max
DATA_SOURCE 1 phy r vlv_pipe_to_phy
BIT_INFO 3 val 0x800,0x7fffffff
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/i915/display/intel_dpll.c vlv_prepare_pll() -> vlv_dpio_write()

Type Parameter Key Value
PARAM_VALUE 0 display 4096-ptr_max
PARAM_VALUE 0 display->parent 4096-ptr_max
PARAM_VALUE 1 phy 0-1
PARAM_VALUE 2 reg 32840-32872
PARAM_VALUE 3 val 10420227
DATA_SOURCE 1 phy r vlv_pipe_to_phy
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/i915/display/intel_dpll.c vlv_prepare_pll() -> vlv_dpio_write()

Type Parameter Key Value
PARAM_VALUE 0 display 4096-ptr_max
PARAM_VALUE 0 display->parent 4096-ptr_max
PARAM_VALUE 1 phy 0-1
PARAM_VALUE 2 reg 32840-32872
PARAM_VALUE 3 val 13631503
DATA_SOURCE 1 phy r vlv_pipe_to_phy
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/i915/display/intel_dpll.c vlv_prepare_pll() -> vlv_dpio_write()

Type Parameter Key Value
PARAM_VALUE 0 display 4096-ptr_max
PARAM_VALUE 0 display->parent 4096-ptr_max
PARAM_VALUE 1 phy 0-1
PARAM_VALUE 2 reg 32788
PARAM_VALUE 3 val 234094592
DATA_SOURCE 1 phy r vlv_pipe_to_phy
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/i915/display/intel_dpll.c vlv_prepare_pll() -> vlv_dpio_write()

Type Parameter Key Value
PARAM_VALUE 0 display 4096-ptr_max
PARAM_VALUE 0 display->parent 4096-ptr_max
PARAM_VALUE 1 phy 0-1
PARAM_VALUE 2 reg 32788-32820
PARAM_VALUE 3 val 234291200
DATA_SOURCE 1 phy r vlv_pipe_to_phy
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/i915/display/intel_dpll.c vlv_prepare_pll() -> vlv_dpio_write()

Type Parameter Key Value
PARAM_VALUE 0 display 4096-ptr_max
PARAM_VALUE 0 display->parent 4096-ptr_max
PARAM_VALUE 1 phy 0-1
PARAM_VALUE 2 reg 32788
PARAM_VALUE 3 val 234291200
DATA_SOURCE 1 phy r vlv_pipe_to_phy
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/i915/display/intel_dpll.c vlv_prepare_pll() -> vlv_dpio_write()

Type Parameter Key Value
PARAM_VALUE 0 display 4096-ptr_max
PARAM_VALUE 0 display->parent 4096-ptr_max
PARAM_VALUE 1 phy 0-1
PARAM_VALUE 2 reg 32788-32820
PARAM_VALUE 3 val 234094592
DATA_SOURCE 1 phy r vlv_pipe_to_phy
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/i915/display/intel_dpll.c vlv_prepare_pll() -> vlv_dpio_write()

Type Parameter Key Value
PARAM_VALUE 0 display 4096-ptr_max
PARAM_VALUE 0 display->parent 4096-ptr_max
PARAM_VALUE 1 phy 0-1
PARAM_VALUE 2 reg 32796-32828
PARAM_VALUE 3 val 29360128,29360384-29425408,46137344,46137600-46202624
DATA_SOURCE 1 phy r vlv_pipe_to_phy
BIT_INFO 3 val 0x1c00000,0x1c0ff00
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/i915/display/intel_dpll.c vlv_prepare_pll() -> vlv_dpio_write()

Type Parameter Key Value
PARAM_VALUE 0 display 4096-ptr_max
PARAM_VALUE 0 display->parent 4096-ptr_max
PARAM_VALUE 1 phy 0-1
PARAM_VALUE 2 reg 32844-32876
PARAM_VALUE 3 val 2273775616
DATA_SOURCE 1 phy r vlv_pipe_to_phy
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/i915/display/intel_dpio_phy.c __chv_data_lane_soft_reset() -> vlv_dpio_write()

Type Parameter Key Value
PARAM_VALUE 0 display 4096-ptr_max
PARAM_VALUE 0 display->parent 4096-ptr_max
PARAM_VALUE 1 phy 0-1
PARAM_VALUE 2 reg 512-9728
DATA_SOURCE 1 phy r vlv_dig_port_to_phy
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/i915/display/intel_dpio_phy.c __chv_data_lane_soft_reset() -> vlv_dpio_write()

Type Parameter Key Value
PARAM_VALUE 0 display 4096-ptr_max
PARAM_VALUE 0 display->parent 4096-ptr_max
PARAM_VALUE 1 phy 0-1
PARAM_VALUE 2 reg 1024-10240
DATA_SOURCE 1 phy r vlv_dig_port_to_phy
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/i915/display/intel_dpio_phy.c __chv_data_lane_soft_reset() -> vlv_dpio_write()

Type Parameter Key Value
PARAM_VALUE 0 display 4096-ptr_max
PARAM_VALUE 0 display->parent 4096-ptr_max
PARAM_VALUE 1 phy 0-1
PARAM_VALUE 2 reg 516-9732
PARAM_VALUE 3 val 0,32-u32max
DATA_SOURCE 1 phy r vlv_dig_port_to_phy
BIT_INFO 3 val 0x800000,0xffffffff
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/i915/display/intel_dpio_phy.c __chv_data_lane_soft_reset() -> vlv_dpio_write()

Type Parameter Key Value
PARAM_VALUE 0 display 4096-ptr_max
PARAM_VALUE 0 display->parent 4096-ptr_max
PARAM_VALUE 1 phy 0-1
PARAM_VALUE 2 reg 1028-10244
PARAM_VALUE 3 val 0,32-u32max
DATA_SOURCE 1 phy r vlv_dig_port_to_phy
BIT_INFO 3 val 0x800000,0xffffffff
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/i915/display/intel_dpio_phy.c chv_phy_post_pll_disable() -> vlv_dpio_write()

Type Parameter Key Value
PARAM_VALUE 0 display 4096-ptr_max
PARAM_VALUE 0 display->parent 4096-ptr_max
PARAM_VALUE 1 phy 0-1
PARAM_VALUE 2 reg 33044
DATA_SOURCE 1 phy r vlv_dig_port_to_phy
BIT_INFO 3 val 0x0,0xff0fffff
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/i915/display/intel_dpio_phy.c chv_phy_post_pll_disable() -> vlv_dpio_write()

Type Parameter Key Value
PARAM_VALUE 0 display 4096-ptr_max
PARAM_VALUE 0 display->parent 4096-ptr_max
PARAM_VALUE 1 phy 0-1
PARAM_VALUE 2 reg 32900
DATA_SOURCE 1 phy r vlv_dig_port_to_phy
BIT_INFO 3 val 0x0,0xffe1ffff
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/i915/display/intel_dpio_phy.c chv_phy_pre_encoder_enable() -> vlv_dpio_write()

Type Parameter Key Value
PARAM_VALUE 0 display 4096-ptr_max
PARAM_VALUE 0 display->parent 4096-ptr_max
PARAM_VALUE 1 phy 0-1
PARAM_VALUE 2 reg 556-9772
DATA_SOURCE 1 phy r vlv_dig_port_to_phy
BIT_INFO 3 val 0x0,0xfffffff7
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/i915/display/intel_dpio_phy.c chv_phy_pre_encoder_enable() -> vlv_dpio_write()

Type Parameter Key Value
PARAM_VALUE 0 display 4096-ptr_max
PARAM_VALUE 0 display->parent 4096-ptr_max
PARAM_VALUE 1 phy 0-1
PARAM_VALUE 2 reg 1068-10284
DATA_SOURCE 1 phy r vlv_dig_port_to_phy
BIT_INFO 3 val 0x0,0xfffffff7
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/i915/display/intel_dpio_phy.c chv_phy_pre_encoder_enable() -> vlv_dpio_write()

Type Parameter Key Value
PARAM_VALUE 0 display 4096-ptr_max
PARAM_VALUE 0 display->parent 4096-ptr_max
PARAM_VALUE 1 phy 0-1
PARAM_VALUE 2 reg 184-139448
PARAM_VALUE 3 val 0,1073741824
DATA_SOURCE 1 phy r vlv_dig_port_to_phy
BIT_INFO 3 val 0x0,0x40000000
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/i915/display/intel_dpio_phy.c chv_phy_pre_encoder_enable() -> vlv_dpio_write()

Type Parameter Key Value
PARAM_VALUE 0 display 4096-ptr_max
PARAM_VALUE 0 display->parent 4096-ptr_max
PARAM_VALUE 1 phy 0-1
PARAM_VALUE 2 reg 556-9772
DATA_SOURCE 1 phy r vlv_dig_port_to_phy
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/i915/display/intel_dpio_phy.c chv_phy_pre_encoder_enable() -> vlv_dpio_write()

Type Parameter Key Value
PARAM_VALUE 0 display 4096-ptr_max
PARAM_VALUE 0 display->parent 4096-ptr_max
PARAM_VALUE 1 phy 0-1
PARAM_VALUE 2 reg 1068-10284
DATA_SOURCE 1 phy r vlv_dig_port_to_phy
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/i915/display/intel_dpio_phy.c chv_phy_pre_encoder_enable() -> vlv_dpio_write()

Type Parameter Key Value
PARAM_VALUE 0 display 4096-ptr_max
PARAM_VALUE 0 display->parent 4096-ptr_max
PARAM_VALUE 1 phy 0-1
PARAM_VALUE 2 reg 560-9776
PARAM_VALUE 3 val 0-8388607
DATA_SOURCE 1 phy r vlv_dig_port_to_phy
BIT_INFO 3 val 0x40,0x7fffff
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/i915/display/intel_dpio_phy.c chv_phy_pre_encoder_enable() -> vlv_dpio_write()

Type Parameter Key Value
PARAM_VALUE 0 display 4096-ptr_max
PARAM_VALUE 0 display->parent 4096-ptr_max
PARAM_VALUE 1 phy 0-1
PARAM_VALUE 2 reg 1072-10288
PARAM_VALUE 3 val 0-8388607
DATA_SOURCE 1 phy r vlv_dig_port_to_phy
BIT_INFO 3 val 0x40,0x7fffff
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/i915/display/intel_dpio_phy.c chv_phy_pre_pll_enable() -> vlv_dpio_write()

Type Parameter Key Value
PARAM_VALUE 0 display 4096-ptr_max
PARAM_VALUE 0 display->parent 4096-ptr_max
PARAM_VALUE 1 phy 0-1
PARAM_VALUE 2 reg 33044
DATA_SOURCE 1 phy r vlv_dig_port_to_phy
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/i915/display/intel_dpio_phy.c chv_phy_pre_pll_enable() -> vlv_dpio_write()

Type Parameter Key Value
PARAM_VALUE 0 display 4096-ptr_max
PARAM_VALUE 0 display->parent 4096-ptr_max
PARAM_VALUE 1 phy 0-1
PARAM_VALUE 2 reg 32900
DATA_SOURCE 1 phy r vlv_dig_port_to_phy
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/i915/display/intel_dpio_phy.c chv_phy_pre_pll_enable() -> vlv_dpio_write()

Type Parameter Key Value
PARAM_VALUE 0 display 4096-ptr_max
PARAM_VALUE 0 display->parent 4096-ptr_max
PARAM_VALUE 1 phy 0-1
PARAM_VALUE 2 reg 544-9760
PARAM_VALUE 3 val 0,1048576-u32max
DATA_SOURCE 1 phy r vlv_dig_port_to_phy
BIT_INFO 3 val 0x100000,0xffffffff
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/i915/display/intel_dpio_phy.c chv_phy_pre_pll_enable() -> vlv_dpio_write()

Type Parameter Key Value
PARAM_VALUE 0 display 4096-ptr_max
PARAM_VALUE 0 display->parent 4096-ptr_max
PARAM_VALUE 1 phy 0-1
PARAM_VALUE 2 reg 1056-10272
PARAM_VALUE 3 val 0,1048576-u32max
DATA_SOURCE 1 phy r vlv_dig_port_to_phy
BIT_INFO 3 val 0x100000,0xffffffff
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/i915/display/intel_dpio_phy.c chv_phy_pre_pll_enable() -> vlv_dpio_write()

Type Parameter Key Value
PARAM_VALUE 0 display 4096-ptr_max
PARAM_VALUE 0 display->parent 4096-ptr_max
PARAM_VALUE 1 phy 0-1
DATA_SOURCE 1 phy r vlv_dig_port_to_phy
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/i915/display/intel_dpio_phy.c chv_set_phy_signal_level() -> vlv_dpio_write()

Type Parameter Key Value
PARAM_VALUE 0 display 4096-ptr_max
PARAM_VALUE 0 display->parent 4096-ptr_max
PARAM_VALUE 1 phy 0-1
PARAM_VALUE 2 reg 552-9768
PARAM_VALUE 3 val 0-1073741823
DATA_SOURCE 1 phy r vlv_dig_port_to_phy
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/i915/display/intel_dpio_phy.c chv_set_phy_signal_level() -> vlv_dpio_write()

Type Parameter Key Value
PARAM_VALUE 0 display 4096-ptr_max
PARAM_VALUE 0 display->parent 4096-ptr_max
PARAM_VALUE 1 phy 0-1
PARAM_VALUE 2 reg 1064-10280
PARAM_VALUE 3 val 0-1073741823
DATA_SOURCE 1 phy r vlv_dig_port_to_phy
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/i915/display/intel_dpio_phy.c chv_set_phy_signal_level() -> vlv_dpio_write()

Type Parameter Key Value
PARAM_VALUE 0 display 4096-ptr_max
PARAM_VALUE 0 display->parent 4096-ptr_max
PARAM_VALUE 1 phy 0-1
PARAM_VALUE 2 reg 548-9764
DATA_SOURCE 1 phy r vlv_dig_port_to_phy
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/i915/display/intel_dpio_phy.c chv_set_phy_signal_level() -> vlv_dpio_write()

Type Parameter Key Value
PARAM_VALUE 0 display 4096-ptr_max
PARAM_VALUE 0 display->parent 4096-ptr_max
PARAM_VALUE 1 phy 0-1
PARAM_VALUE 2 reg 1060-10276
DATA_SOURCE 1 phy r vlv_dig_port_to_phy
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/i915/display/intel_dpio_phy.c chv_set_phy_signal_level() -> vlv_dpio_write()

Type Parameter Key Value
PARAM_VALUE 0 display 4096-ptr_max
PARAM_VALUE 0 display->parent 4096-ptr_max
PARAM_VALUE 1 phy 0-1
PARAM_VALUE 2 reg 144-139408
DATA_SOURCE 1 phy r vlv_dig_port_to_phy
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/i915/display/intel_dpio_phy.c chv_set_phy_signal_level() -> vlv_dpio_write()

Type Parameter Key Value
PARAM_VALUE 0 display 4096-ptr_max
PARAM_VALUE 0 display->parent 4096-ptr_max
PARAM_VALUE 1 phy 0-1
PARAM_VALUE 2 reg 136-139400
DATA_SOURCE 1 phy r vlv_dig_port_to_phy
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/i915/display/intel_dpio_phy.c chv_set_phy_signal_level() -> vlv_dpio_write()

Type Parameter Key Value
PARAM_VALUE 0 display 4096-ptr_max
PARAM_VALUE 0 display->parent 4096-ptr_max
PARAM_VALUE 1 phy 0-1
PARAM_VALUE 2 reg 140-139404
DATA_SOURCE 1 phy r vlv_dig_port_to_phy
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/i915/display/intel_dpio_phy.c chv_set_phy_signal_level() -> vlv_dpio_write()

Type Parameter Key Value
PARAM_VALUE 0 display 4096-ptr_max
PARAM_VALUE 0 display->parent 4096-ptr_max
PARAM_VALUE 1 phy 0-1
PARAM_VALUE 2 reg 552-9768
PARAM_VALUE 3 val 0,1073741824-u32max
DATA_SOURCE 1 phy r vlv_dig_port_to_phy
BIT_INFO 3 val 0xc0000000,0xffffffff
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/i915/display/intel_dpio_phy.c chv_set_phy_signal_level() -> vlv_dpio_write()

Type Parameter Key Value
PARAM_VALUE 0 display 4096-ptr_max
PARAM_VALUE 0 display->parent 4096-ptr_max
PARAM_VALUE 1 phy 0-1
PARAM_VALUE 2 reg 1064-10280
PARAM_VALUE 3 val 0,1073741824-u32max
DATA_SOURCE 1 phy r vlv_dig_port_to_phy
BIT_INFO 3 val 0xc0000000,0xffffffff
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/i915/display/intel_dpio_phy.c vlv_phy_pre_encoder_enable() -> vlv_dpio_write()

Type Parameter Key Value
PARAM_VALUE 0 display 4096-ptr_max
PARAM_VALUE 0 display->parent 4096-ptr_max
PARAM_VALUE 1 phy 0-1
PARAM_VALUE 2 reg 33312-33824
PARAM_VALUE 3 val 1048772,3145924
DATA_SOURCE 1 phy r vlv_dig_port_to_phy
BIT_INFO 3 val 0x1000c4,0x3000c4
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/i915/display/intel_dpio_phy.c vlv_phy_pre_encoder_enable() -> vlv_dpio_write()

Type Parameter Key Value
PARAM_VALUE 0 display 4096-ptr_max
PARAM_VALUE 0 display->parent 4096-ptr_max
PARAM_VALUE 1 phy 0-1
PARAM_VALUE 2 reg 33336-33848
PARAM_VALUE 3 val 7733272
DATA_SOURCE 1 phy r vlv_dig_port_to_phy
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/i915/display/intel_dpio_phy.c vlv_phy_pre_encoder_enable() -> vlv_dpio_write()

Type Parameter Key Value
PARAM_VALUE 0 display 4096-ptr_max
PARAM_VALUE 0 display->parent 4096-ptr_max
PARAM_VALUE 1 phy 0-1
PARAM_VALUE 2 reg 33372-33884
PARAM_VALUE 3 val 4196488
DATA_SOURCE 1 phy r vlv_dig_port_to_phy
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/i915/display/intel_dpio_phy.c vlv_phy_pre_pll_enable() -> vlv_dpio_write()

Type Parameter Key Value
PARAM_VALUE 0 display 4096-ptr_max
PARAM_VALUE 0 display->parent 4096-ptr_max
PARAM_VALUE 1 phy 0-1
PARAM_VALUE 2 reg 33280-33792
PARAM_VALUE 3 val 65664
DATA_SOURCE 1 phy r vlv_dig_port_to_phy
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/i915/display/intel_dpio_phy.c vlv_phy_pre_pll_enable() -> vlv_dpio_write()

Type Parameter Key Value
PARAM_VALUE 0 display 4096-ptr_max
PARAM_VALUE 0 display->parent 4096-ptr_max
PARAM_VALUE 1 phy 0-1
PARAM_VALUE 2 reg 33284-33796
PARAM_VALUE 3 val 6291488,6291552-6291680
DATA_SOURCE 1 phy r vlv_dig_port_to_phy
BIT_INFO 3 val 0x600020,0x6000ff
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/i915/display/intel_dpio_phy.c vlv_phy_pre_pll_enable() -> vlv_dpio_write()

Type Parameter Key Value
PARAM_VALUE 0 display 4096-ptr_max
PARAM_VALUE 0 display->parent 4096-ptr_max
PARAM_VALUE 1 phy 0-1
PARAM_VALUE 2 reg 33328-33840
PARAM_VALUE 3 val 7671552
DATA_SOURCE 1 phy r vlv_dig_port_to_phy
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/i915/display/intel_dpio_phy.c vlv_phy_pre_pll_enable() -> vlv_dpio_write()

Type Parameter Key Value
PARAM_VALUE 0 display 4096-ptr_max
PARAM_VALUE 0 display->parent 4096-ptr_max
PARAM_VALUE 1 phy 0-1
PARAM_VALUE 2 reg 33452-33964
PARAM_VALUE 3 val 5376
DATA_SOURCE 1 phy r vlv_dig_port_to_phy
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/i915/display/intel_dpio_phy.c vlv_phy_pre_pll_enable() -> vlv_dpio_write()

Type Parameter Key Value
PARAM_VALUE 0 display 4096-ptr_max
PARAM_VALUE 0 display->parent 4096-ptr_max
PARAM_VALUE 1 phy 0-1
PARAM_VALUE 2 reg 33464-33976
PARAM_VALUE 3 val 1077936128
DATA_SOURCE 1 phy r vlv_dig_port_to_phy
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/i915/display/intel_dpio_phy.c vlv_phy_reset_lanes() -> vlv_dpio_write()

Type Parameter Key Value
PARAM_VALUE 0 display 4096-ptr_max
PARAM_VALUE 0 display->parent 4096-ptr_max
PARAM_VALUE 1 phy 0-1
PARAM_VALUE 2 reg 33280-33792
PARAM_VALUE 3 val 0
DATA_SOURCE 1 phy r vlv_dig_port_to_phy
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/i915/display/intel_dpio_phy.c vlv_phy_reset_lanes() -> vlv_dpio_write()

Type Parameter Key Value
PARAM_VALUE 0 display 4096-ptr_max
PARAM_VALUE 0 display->parent 4096-ptr_max
PARAM_VALUE 1 phy 0-1
PARAM_VALUE 2 reg 33284-33796
PARAM_VALUE 3 val 14680160
DATA_SOURCE 1 phy r vlv_dig_port_to_phy
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/i915/display/intel_dpio_phy.c vlv_set_phy_signal_level() -> vlv_dpio_write()

Type Parameter Key Value
PARAM_VALUE 0 display 4096-ptr_max
PARAM_VALUE 0 display->parent 4096-ptr_max
PARAM_VALUE 1 phy 0-1
PARAM_VALUE 2 reg 33428-33940
PARAM_VALUE 3 val 0
DATA_SOURCE 1 phy r vlv_dig_port_to_phy
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/i915/display/intel_dpio_phy.c vlv_set_phy_signal_level() -> vlv_dpio_write()

Type Parameter Key Value
PARAM_VALUE 0 display 4096-ptr_max
PARAM_VALUE 0 display->parent 4096-ptr_max
PARAM_VALUE 1 phy 0-1
PARAM_VALUE 2 reg 33424-33936
PARAM_VALUE 3 val 457200981,723801429,723803999,724254784,724587861,725631040,725633096,725636437
DATA_SOURCE 1 phy r vlv_dig_port_to_phy
DATA_SOURCE 3 val $2
BIT_INFO 3 val 0xb004040,0x3b7f5f5f
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/i915/display/intel_dpio_phy.c vlv_set_phy_signal_level() -> vlv_dpio_write()

Type Parameter Key Value
PARAM_VALUE 0 display 4096-ptr_max
PARAM_VALUE 0 display->parent 4096-ptr_max
PARAM_VALUE 1 phy 0-1
PARAM_VALUE 2 reg 33416-33928
PARAM_VALUE 3 val 1428863034,1430829114,1431484474,1432401978,1433450554,1433974842,1434499130,1436080698,1437456954
DATA_SOURCE 1 phy r vlv_dig_port_to_phy
DATA_SOURCE 3 val $4
BIT_INFO 3 val 0x5500983a,0x55fffa3a
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/i915/display/intel_dpio_phy.c vlv_set_phy_signal_level() -> vlv_dpio_write()

Type Parameter Key Value
PARAM_VALUE 0 display 4096-ptr_max
PARAM_VALUE 0 display->parent 4096-ptr_max
PARAM_VALUE 1 phy 0-1
PARAM_VALUE 2 reg 33420-33932
PARAM_VALUE 3 val 209199168
DATA_SOURCE 1 phy r vlv_dig_port_to_phy
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/i915/display/intel_dpio_phy.c vlv_set_phy_signal_level() -> vlv_dpio_write()

Type Parameter Key Value
PARAM_VALUE 0 display 4096-ptr_max
PARAM_VALUE 0 display->parent 4096-ptr_max
PARAM_VALUE 1 phy 0-1
PARAM_VALUE 2 reg 1680-10896
PARAM_VALUE 3 val 723810424
DATA_SOURCE 1 phy r vlv_dig_port_to_phy
DATA_SOURCE 3 val $5
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/i915/display/intel_dpio_phy.c vlv_set_phy_signal_level() -> vlv_dpio_write()

Type Parameter Key Value
PARAM_VALUE 0 display 4096-ptr_max
PARAM_VALUE 0 display->parent 4096-ptr_max
PARAM_VALUE 1 phy 0-1
PARAM_VALUE 2 reg 33324-33836
PARAM_VALUE 3 val 196608
DATA_SOURCE 1 phy r vlv_dig_port_to_phy
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/i915/display/intel_dpio_phy.c vlv_set_phy_signal_level() -> vlv_dpio_write()

Type Parameter Key Value
PARAM_VALUE 0 display 4096-ptr_max
PARAM_VALUE 0 display->parent 4096-ptr_max
PARAM_VALUE 1 phy 0-1
PARAM_VALUE 2 reg 33316-33828
PARAM_VALUE 3 val 0,8192,16384,24576
DATA_SOURCE 1 phy r vlv_dig_port_to_phy
DATA_SOURCE 3 val $3
BIT_INFO 3 val 0x0,0x6000
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/i915/display/intel_dpio_phy.c vlv_set_phy_signal_level() -> vlv_dpio_write()

Type Parameter Key Value
PARAM_VALUE 0 display 4096-ptr_max
PARAM_VALUE 0 display->parent 4096-ptr_max
PARAM_VALUE 1 phy 0-1
PARAM_VALUE 2 reg 33428-33940
PARAM_VALUE 3 val 2147483648
DATA_SOURCE 1 phy r vlv_dig_port_to_phy
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/i915/display/intel_display_power_well.c chv_dpio_cmn_power_well_enable() -> vlv_dpio_write()

Type Parameter Key Value
PARAM_VALUE 0 display 4096-ptr_max
PARAM_VALUE 0 display->bw.obj.funcs->atomic_destroy_state 231959734523985920,312078704547934208,1654662236298231808,5986221188102647808,8423152862500474880
PARAM_VALUE 0 display->bw.obj.funcs->atomic_duplicate_state 1751081395836968960,4594388545939185664,5185885321829400576,7625532090363609088,8914423393379360768
PARAM_VALUE 0 display->cdclk.funcs->set_cdclk 0,981987470656221184,2279366636571783168,7605838049097428992,7713557352659574784,8715991085883871232
PARAM_VALUE 0 display->cdclk.obj.funcs->atomic_destroy_state 231959734523985920,312078704547934208,1654662236298231808,5986221188102647808,8423152862500474880
PARAM_VALUE 0 display->cdclk.obj.funcs->atomic_duplicate_state 1751081395836968960,4594388545939185664,5185885321829400576,7625532090363609088,8914423393379360768
PARAM_VALUE 0 display->cdclk.table->cdclk 0,79200,144000,151200,153600,158400,163200,172800,176000,176400,179200,180000,192000,201600,204000,211200,226800,230400,244800,249600,252000,268800,277200,285600,288000,302400,307200,312000,316800,324000,326400-4294967295
PARAM_VALUE 0 display->cdclk.table->ratio 0,9-10,14-41,46,50,52,54,58,60,64-65,68,92,108,116,136
PARAM_VALUE 0 display->cdclk.table->refclk 0,19200,24000,24400,38400
PARAM_VALUE 0 display->cdclk.table->waveform 0,6,34952,37448,42148,42314,43604,43690,44378,46774,56246,61166,63454,65278,65534-u16max
PARAM_VALUE 0 display->dbuf.obj.funcs->atomic_destroy_state 231959734523985920,312078704547934208,1654662236298231808,5986221188102647808,8423152862500474880
PARAM_VALUE 0 display->dbuf.obj.funcs->atomic_duplicate_state 1751081395836968960,4594388545939185664,5185885321829400576,7625532090363609088,8914423393379360768
PARAM_VALUE 0 display->dbuf_bw.obj.funcs->atomic_destroy_state 231959734523985920,312078704547934208,1654662236298231808,5986221188102647808,8423152862500474880
PARAM_VALUE 0 display->dbuf_bw.obj.funcs->atomic_duplicate_state 1751081395836968960,4594388545939185664,5185885321829400576,7625532090363609088,8914423393379360768
PARAM_VALUE 0 display->dpll.mgr->compare_hw_state 1988828769907408896,4304445909437353984,5589390013801357312,7199724579178258432,7292826417019408384,7481167222828003328,8665324935750119424,9182544845536616448
PARAM_VALUE 0 display->dpll.mgr->compute_dplls 3278772287333720064,5266472627050582016,6060912680081088512,6216086186862542848,8471094383317381120,8614942105147809792,8986272695562289152,9022440569105731584
PARAM_VALUE 0 display->dpll.mgr->dump_hw_state 90682934213672960,215385455013437440,1582718613836124160,1835901918492803072,4180342879337267200,5224410778052669440,6129327221765451776,9060799253560999936
PARAM_VALUE 0 display->dpll.mgr->get_dplls 204657350407954432,3936139357776248832,4663370074112573440,5334416601241935872,6868165492758421504,8361789056745369600,8976139343680507904
PARAM_VALUE 0 display->dpll.mgr->put_dplls 1769282744316076032,3032660624085295104
PARAM_VALUE 0 display->dpll.mgr->update_active_dpll 0,3893979238484942848
PARAM_VALUE 0 display->dpll.mgr->update_ref_clks 0,3536181015747457024,6167602680813006848,6325637718150250496,6483930178044678144
PARAM_VALUE 0 display->drm 0,4096-ptr_max
PARAM_VALUE 0 display->drm->huge_mnt->mnt_sb->s_cop->inode_info_offs 1632,1720,1808,2632,2648,2704,2712
PARAM_VALUE 0 display->drm->mode_config.helper_private->atomic_commit_tail 0,113,234517204248432640,264416658693812224,1002985563129995264,1135616218159751168,1435312838172803072,1559742614509715456,1682444203744997376,2792895115794366464,3649211429048074240,4264110321136541696,4348468181405868032-s64max
PARAM_VALUE 0 display->params.enable_dmc_wl 0-1
PARAM_VALUE 0 display->parent 4096-ptr_max
PARAM_VALUE 0 display->parent->irq 5062596649199198208
PARAM_VALUE 0 display->parent->pcode 600309631264055296
PARAM_VALUE 0 display->parent->rpm 1303590034781167616
PARAM_VALUE 0 display->parent->vlv_iosf 197119610173992960
PARAM_VALUE 0 display->pmdemand.obj.funcs->atomic_destroy_state 231959734523985920,312078704547934208,1654662236298231808,5986221188102647808,8423152862500474880
PARAM_VALUE 0 display->pmdemand.obj.funcs->atomic_duplicate_state 1751081395836968960,4594388545939185664,5185885321829400576,7625532090363609088,8914423393379360768
PARAM_VALUE 0 display->power.domains.lock.dep_map->name 0-255
PARAM_VALUE 0 display->power.domains.lock.first_waiter->list.prev->next 5159360019465732096
PARAM_VALUE 0 display->power.domains.lock.first_waiter->list.prev->prev 5159360019465732096
PARAM_VALUE 0 display->power.domains.lock.osq.tail.counter 0-s32max
PARAM_VALUE 0 display->power.domains.lock.wait_lock.dep_map->name 0-255
PARAM_VALUE 0 display->power.domains.lock.wait_lock.owner (-1)
PARAM_VALUE 0 display->power.domains.lock.wait_lock.owner_cpu u32max
PARAM_VALUE 0 display->power.domains.power_wells->desc->enable_timeout 0,500
PARAM_VALUE 0 display->restore.reset_ctx.ww_ctx.ww_class->is_wait_die 0-1
PARAM_VALUE 0 display->wl.work.timer.entry->pprev 4096-ptr_max
PARAM_VALUE 0 display->wm.funcs->atomic_update_watermarks 0,241866399159836672
PARAM_VALUE 0 display->wm.funcs->compute_global_watermarks 0,7679025112587603968
PARAM_VALUE 0 display->wm.funcs->compute_watermarks 0,663047380929499136,4718310602505961472,7447224825039265792,8278299763477639168
PARAM_VALUE 0 display->wm.funcs->get_hw_state 0,1372658440782848000,6903309568198033408,7899623770445606912,8633453788894511104
PARAM_VALUE 0 display->wm.funcs->initial_watermarks 0,318382624811003904,2077638626766659584,4361408001915691008
PARAM_VALUE 0 display->wm.funcs->optimize_watermarks 0,136016925988110336,2676780419539894272,6733336501198520320
PARAM_VALUE 0 display->wm.funcs->sanitize 0,3771904337417297920,8756858967241641984,9118998679592730624
PARAM_VALUE 0 display->wm.funcs->update_wm 0,2900677620984037376,5075417898438156288,6224038869724659712,6233422041516032000
PARAM_VALUE 0 *display->bw.peakbw 0-4294967295
PARAM_VALUE 0 *display->bw.psf_bw 0-4294967295
PARAM_VALUE 0 *display->irq.pipestat_irq_mask 0-4294967295
PARAM_VALUE 1 phy 0-1
PARAM_VALUE 2 reg 33136
BUF_SIZE 0 display (-1),8128
BUF_SIZE 0 display (-1),8128
BUF_SIZE 0 display->hotplug.dp_wq (-1),512,528-8720
BUF_SIZE 0 display->wq.cleanup (-1),512,528-8720
BUF_SIZE 0 display->wq.flip (-1),512,528-8720
BUF_SIZE 0 display->wq.modeset (-1),512,528-8720
BUF_SIZE 0 display->wq.unordered (-1),512,528-8720
DATA_SOURCE 0 display $0
FUZZY_MAX 1 phy 1
STR_LEN 0 display (-1),21-22
STR_LEN 0 display (-1),21-22
BIT_INFO 3 val 0xc00000,0xffffffff
HARD_MAX 1 phy 1
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA 0 display->cdclk.hw.cdclk 0-39168016[c]
HOST_DATA 0 display->cdclk.hw.joined_mbus 0-1
HOST_DATA 0 display->cdclk.hw.voltage_level 0-31[c]
HOST_DATA 0 display->cdclk.max_cdclk_freq 1-39168016[c]
HOST_DATA 0 display->drm->mode_config.connector_ida.xa.xa_flags 67108869
HOST_DATA 0 display->drm->mode_config.object_idr.idr_rt.xa_flags 0,4-u32max
HOST_DATA 0 display->drm->mode_config.tile_idr.idr_rt.xa_flags 0,67108864-u32max
HOST_DATA 0 display->drm->num_crtcs 2[c]
HOST_DATA 0 display->fdi.pll_freq 20000-2570000[c]
HOST_DATA 0 display->fdi.rx_config 0,32768-98304[c]
HOST_DATA 0 display->power.chv_phy_control 0-u32max[c]
HOST_DATA 0 display->power.domains.dc_state 0-u32max
HOST_DATA 0 display->state.bxt_phy_grc 0-u32max
HOST_DATA 0 display->vbt.lvds_use_ssc 0-1
HOST_DATA 0 display->wm.g4x.cxsr 0-1
HOST_DATA 0 display->wm.g4x.hpll.cursor 0-63[c]
HOST_DATA 0 display->wm.g4x.hpll.fbc 0-15[c]
HOST_DATA 0 display->wm.g4x.hpll.plane 0-511[c]
HOST_DATA 0 display->wm.g4x.sr.cursor 0-63[c]
HOST_DATA 0 display->wm.g4x.sr.fbc 0-7[c]
HOST_DATA 0 display->wm.g4x.sr.plane 0-511
HOST_DATA 0 display->wm.vlv.cxsr 0-1
HOST_DATA 0 display->wm.vlv.sr.cursor 0-63[c]
HOST_DATA 0 display->wm.vlv.sr.plane 0-2047[c]
HOST_DATA 3 val 0-u32max
NO_OVERFLOW_SIMPLE 0 display->drm->mode_config.num_colorop
NO_OVERFLOW_SIMPLE 0 display->drm->mode_config.num_crtc
NO_OVERFLOW_SIMPLE 0 display->drm->mode_config.num_total_plane
NO_OVERFLOW_SIMPLE 0 display->drm->num_crtcs
NO_OVERFLOW_SIMPLE 0 display->restore.modeset_state->num_connector
LOCK2 &power_domains->lock
HALF_LOCKED2 0 &display->dpll.lock
HALF_LOCKED2 0 &display->drm->mode_config.connection_mutex
HALF_LOCKED2 0 &display->drm->mode_config.mutex
HALF_LOCKED2 0 &display->gmbus.mutex
TYPE_LOCK (struct i915_power_domains)->lock

drivers/gpu/drm/i915/display/intel_display_power_well.c chv_dpio_cmn_power_well_enable() -> vlv_dpio_write()

Type Parameter Key Value
PARAM_VALUE 0 display 4096-ptr_max
PARAM_VALUE 0 display->bw.obj.funcs->atomic_destroy_state 231959734523985920,312078704547934208,1654662236298231808,5986221188102647808,8423152862500474880
PARAM_VALUE 0 display->bw.obj.funcs->atomic_duplicate_state 1751081395836968960,4594388545939185664,5185885321829400576,7625532090363609088,8914423393379360768
PARAM_VALUE 0 display->cdclk.funcs->set_cdclk 0,981987470656221184,2279366636571783168,7605838049097428992,7713557352659574784,8715991085883871232
PARAM_VALUE 0 display->cdclk.obj.funcs->atomic_destroy_state 231959734523985920,312078704547934208,1654662236298231808,5986221188102647808,8423152862500474880
PARAM_VALUE 0 display->cdclk.obj.funcs->atomic_duplicate_state 1751081395836968960,4594388545939185664,5185885321829400576,7625532090363609088,8914423393379360768
PARAM_VALUE 0 display->cdclk.table->cdclk 0,79200,144000,151200,153600,158400,163200,172800,176000,176400,179200,180000,192000,201600,204000,211200,226800,230400,244800,249600,252000,268800,277200,285600,288000,302400,307200,312000,316800,324000,326400-4294967295
PARAM_VALUE 0 display->cdclk.table->ratio 0,9-10,14-41,46,50,52,54,58,60,64-65,68,92,108,116,136
PARAM_VALUE 0 display->cdclk.table->refclk 0,19200,24000,24400,38400
PARAM_VALUE 0 display->cdclk.table->waveform 0,6,34952,37448,42148,42314,43604,43690,44378,46774,56246,61166,63454,65278,65534-u16max
PARAM_VALUE 0 display->dbuf.obj.funcs->atomic_destroy_state 231959734523985920,312078704547934208,1654662236298231808,5986221188102647808,8423152862500474880
PARAM_VALUE 0 display->dbuf.obj.funcs->atomic_duplicate_state 1751081395836968960,4594388545939185664,5185885321829400576,7625532090363609088,8914423393379360768
PARAM_VALUE 0 display->dbuf_bw.obj.funcs->atomic_destroy_state 231959734523985920,312078704547934208,1654662236298231808,5986221188102647808,8423152862500474880
PARAM_VALUE 0 display->dbuf_bw.obj.funcs->atomic_duplicate_state 1751081395836968960,4594388545939185664,5185885321829400576,7625532090363609088,8914423393379360768
PARAM_VALUE 0 display->dpll.mgr->compare_hw_state 1988828769907408896,4304445909437353984,5589390013801357312,7199724579178258432,7292826417019408384,7481167222828003328,8665324935750119424,9182544845536616448
PARAM_VALUE 0 display->dpll.mgr->compute_dplls 3278772287333720064,5266472627050582016,6060912680081088512,6216086186862542848,8471094383317381120,8614942105147809792,8986272695562289152,9022440569105731584
PARAM_VALUE 0 display->dpll.mgr->dump_hw_state 90682934213672960,215385455013437440,1582718613836124160,1835901918492803072,4180342879337267200,5224410778052669440,6129327221765451776,9060799253560999936
PARAM_VALUE 0 display->dpll.mgr->get_dplls 204657350407954432,3936139357776248832,4663370074112573440,5334416601241935872,6868165492758421504,8361789056745369600,8976139343680507904
PARAM_VALUE 0 display->dpll.mgr->put_dplls 1769282744316076032,3032660624085295104
PARAM_VALUE 0 display->dpll.mgr->update_active_dpll 0,3893979238484942848
PARAM_VALUE 0 display->dpll.mgr->update_ref_clks 0,3536181015747457024,6167602680813006848,6325637718150250496,6483930178044678144
PARAM_VALUE 0 display->drm 0,4096-ptr_max
PARAM_VALUE 0 display->drm->huge_mnt->mnt_sb->s_cop->inode_info_offs 1632,1720,1808,2632,2648,2704,2712
PARAM_VALUE 0 display->drm->mode_config.helper_private->atomic_commit_tail 0,113,234517204248432640,264416658693812224,1002985563129995264,1135616218159751168,1435312838172803072,1559742614509715456,1682444203744997376,2792895115794366464,3649211429048074240,4264110321136541696,4348468181405868032-s64max
PARAM_VALUE 0 display->params.enable_dmc_wl 0-1
PARAM_VALUE 0 display->parent 4096-ptr_max
PARAM_VALUE 0 display->parent->irq 5062596649199198208
PARAM_VALUE 0 display->parent->pcode 600309631264055296
PARAM_VALUE 0 display->parent->rpm 1303590034781167616
PARAM_VALUE 0 display->parent->vlv_iosf 197119610173992960
PARAM_VALUE 0 display->pmdemand.obj.funcs->atomic_destroy_state 231959734523985920,312078704547934208,1654662236298231808,5986221188102647808,8423152862500474880
PARAM_VALUE 0 display->pmdemand.obj.funcs->atomic_duplicate_state 1751081395836968960,4594388545939185664,5185885321829400576,7625532090363609088,8914423393379360768
PARAM_VALUE 0 display->power.domains.lock.dep_map->name 0-255
PARAM_VALUE 0 display->power.domains.lock.first_waiter->list.prev->next 5159360019465732096
PARAM_VALUE 0 display->power.domains.lock.first_waiter->list.prev->prev 5159360019465732096
PARAM_VALUE 0 display->power.domains.lock.osq.tail.counter 0-s32max
PARAM_VALUE 0 display->power.domains.lock.wait_lock.dep_map->name 0-255
PARAM_VALUE 0 display->power.domains.lock.wait_lock.owner (-1)
PARAM_VALUE 0 display->power.domains.lock.wait_lock.owner_cpu u32max
PARAM_VALUE 0 display->power.domains.power_wells->desc->enable_timeout 0,500
PARAM_VALUE 0 display->restore.reset_ctx.ww_ctx.ww_class->is_wait_die 0-1
PARAM_VALUE 0 display->wl.work.timer.entry->pprev 4096-ptr_max
PARAM_VALUE 0 display->wm.funcs->atomic_update_watermarks 0,241866399159836672
PARAM_VALUE 0 display->wm.funcs->compute_global_watermarks 0,7679025112587603968
PARAM_VALUE 0 display->wm.funcs->compute_watermarks 0,663047380929499136,4718310602505961472,7447224825039265792,8278299763477639168
PARAM_VALUE 0 display->wm.funcs->get_hw_state 0,1372658440782848000,6903309568198033408,7899623770445606912,8633453788894511104
PARAM_VALUE 0 display->wm.funcs->initial_watermarks 0,318382624811003904,2077638626766659584,4361408001915691008
PARAM_VALUE 0 display->wm.funcs->optimize_watermarks 0,136016925988110336,2676780419539894272,6733336501198520320
PARAM_VALUE 0 display->wm.funcs->sanitize 0,3771904337417297920,8756858967241641984,9118998679592730624
PARAM_VALUE 0 display->wm.funcs->update_wm 0,2900677620984037376,5075417898438156288,6224038869724659712,6233422041516032000
PARAM_VALUE 0 *display->bw.peakbw 0-4294967295
PARAM_VALUE 0 *display->bw.psf_bw 0-4294967295
PARAM_VALUE 0 *display->irq.pipestat_irq_mask 0-4294967295
PARAM_VALUE 1 phy 0
PARAM_VALUE 2 reg 32920
PARAM_VALUE 3 val 0,268435456-u32max
BUF_SIZE 0 display (-1),8128
BUF_SIZE 0 display (-1),8128
BUF_SIZE 0 display->hotplug.dp_wq (-1),512,528-8720
BUF_SIZE 0 display->wq.cleanup (-1),512,528-8720
BUF_SIZE 0 display->wq.flip (-1),512,528-8720
BUF_SIZE 0 display->wq.modeset (-1),512,528-8720
BUF_SIZE 0 display->wq.unordered (-1),512,528-8720
DATA_SOURCE 0 display $0
STR_LEN 0 display (-1),21-22
STR_LEN 0 display (-1),21-22
BIT_INFO 3 val 0x10000000,0xffffffff
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA 0 display->cdclk.hw.cdclk 0-39168016[c]
HOST_DATA 0 display->cdclk.hw.joined_mbus 0-1
HOST_DATA 0 display->cdclk.hw.voltage_level 0-31[c]
HOST_DATA 0 display->cdclk.max_cdclk_freq 1-39168016[c]
HOST_DATA 0 display->drm->mode_config.connector_ida.xa.xa_flags 67108869
HOST_DATA 0 display->drm->mode_config.object_idr.idr_rt.xa_flags 0,4-u32max
HOST_DATA 0 display->drm->mode_config.tile_idr.idr_rt.xa_flags 0,67108864-u32max
HOST_DATA 0 display->drm->num_crtcs 2[c]
HOST_DATA 0 display->fdi.pll_freq 20000-2570000[c]
HOST_DATA 0 display->fdi.rx_config 0,32768-98304[c]
HOST_DATA 0 display->power.chv_phy_control 0-u32max[c]
HOST_DATA 0 display->power.domains.dc_state 0-u32max
HOST_DATA 0 display->state.bxt_phy_grc 0-u32max
HOST_DATA 0 display->vbt.lvds_use_ssc 0-1
HOST_DATA 0 display->wm.g4x.cxsr 0-1
HOST_DATA 0 display->wm.g4x.hpll.cursor 0-63[c]
HOST_DATA 0 display->wm.g4x.hpll.fbc 0-15[c]
HOST_DATA 0 display->wm.g4x.hpll.plane 0-511[c]
HOST_DATA 0 display->wm.g4x.sr.cursor 0-63[c]
HOST_DATA 0 display->wm.g4x.sr.fbc 0-7[c]
HOST_DATA 0 display->wm.g4x.sr.plane 0-511
HOST_DATA 0 display->wm.vlv.cxsr 0-1
HOST_DATA 0 display->wm.vlv.sr.cursor 0-63[c]
HOST_DATA 0 display->wm.vlv.sr.plane 0-2047[c]
HOST_DATA 3 val 0,268435456-u32max
NO_OVERFLOW_SIMPLE 0 display->drm->mode_config.num_colorop
NO_OVERFLOW_SIMPLE 0 display->drm->mode_config.num_crtc
NO_OVERFLOW_SIMPLE 0 display->drm->mode_config.num_total_plane
NO_OVERFLOW_SIMPLE 0 display->drm->num_crtcs
NO_OVERFLOW_SIMPLE 0 display->restore.modeset_state->num_connector
LOCK2 &power_domains->lock
HALF_LOCKED2 0 &display->dpll.lock
HALF_LOCKED2 0 &display->drm->mode_config.connection_mutex
HALF_LOCKED2 0 &display->drm->mode_config.mutex
HALF_LOCKED2 0 &display->gmbus.mutex
TYPE_LOCK (struct i915_power_domains)->lock

drivers/gpu/drm/i915/display/intel_display_power_well.c chv_dpio_cmn_power_well_enable() -> vlv_dpio_write()

Type Parameter Key Value
PARAM_VALUE 0 display 4096-ptr_max
PARAM_VALUE 0 display->bw.obj.funcs->atomic_destroy_state 231959734523985920,312078704547934208,1654662236298231808,5986221188102647808,8423152862500474880
PARAM_VALUE 0 display->bw.obj.funcs->atomic_duplicate_state 1751081395836968960,4594388545939185664,5185885321829400576,7625532090363609088,8914423393379360768
PARAM_VALUE 0 display->cdclk.funcs->set_cdclk 0,981987470656221184,2279366636571783168,7605838049097428992,7713557352659574784,8715991085883871232
PARAM_VALUE 0 display->cdclk.obj.funcs->atomic_destroy_state 231959734523985920,312078704547934208,1654662236298231808,5986221188102647808,8423152862500474880
PARAM_VALUE 0 display->cdclk.obj.funcs->atomic_duplicate_state 1751081395836968960,4594388545939185664,5185885321829400576,7625532090363609088,8914423393379360768
PARAM_VALUE 0 display->cdclk.table->cdclk 0,79200,144000,151200,153600,158400,163200,172800,176000,176400,179200,180000,192000,201600,204000,211200,226800,230400,244800,249600,252000,268800,277200,285600,288000,302400,307200,312000,316800,324000,326400-4294967295
PARAM_VALUE 0 display->cdclk.table->ratio 0,9-10,14-41,46,50,52,54,58,60,64-65,68,92,108,116,136
PARAM_VALUE 0 display->cdclk.table->refclk 0,19200,24000,24400,38400
PARAM_VALUE 0 display->cdclk.table->waveform 0,6,34952,37448,42148,42314,43604,43690,44378,46774,56246,61166,63454,65278,65534-u16max
PARAM_VALUE 0 display->dbuf.obj.funcs->atomic_destroy_state 231959734523985920,312078704547934208,1654662236298231808,5986221188102647808,8423152862500474880
PARAM_VALUE 0 display->dbuf.obj.funcs->atomic_duplicate_state 1751081395836968960,4594388545939185664,5185885321829400576,7625532090363609088,8914423393379360768
PARAM_VALUE 0 display->dbuf_bw.obj.funcs->atomic_destroy_state 231959734523985920,312078704547934208,1654662236298231808,5986221188102647808,8423152862500474880
PARAM_VALUE 0 display->dbuf_bw.obj.funcs->atomic_duplicate_state 1751081395836968960,4594388545939185664,5185885321829400576,7625532090363609088,8914423393379360768
PARAM_VALUE 0 display->dpll.mgr->compare_hw_state 1988828769907408896,4304445909437353984,5589390013801357312,7199724579178258432,7292826417019408384,7481167222828003328,8665324935750119424,9182544845536616448
PARAM_VALUE 0 display->dpll.mgr->compute_dplls 3278772287333720064,5266472627050582016,6060912680081088512,6216086186862542848,8471094383317381120,8614942105147809792,8986272695562289152,9022440569105731584
PARAM_VALUE 0 display->dpll.mgr->dump_hw_state 90682934213672960,215385455013437440,1582718613836124160,1835901918492803072,4180342879337267200,5224410778052669440,6129327221765451776,9060799253560999936
PARAM_VALUE 0 display->dpll.mgr->get_dplls 204657350407954432,3936139357776248832,4663370074112573440,5334416601241935872,6868165492758421504,8361789056745369600,8976139343680507904
PARAM_VALUE 0 display->dpll.mgr->put_dplls 1769282744316076032,3032660624085295104
PARAM_VALUE 0 display->dpll.mgr->update_active_dpll 0,3893979238484942848
PARAM_VALUE 0 display->dpll.mgr->update_ref_clks 0,3536181015747457024,6167602680813006848,6325637718150250496,6483930178044678144
PARAM_VALUE 0 display->drm 0,4096-ptr_max
PARAM_VALUE 0 display->drm->huge_mnt->mnt_sb->s_cop->inode_info_offs 1632,1720,1808,2632,2648,2704,2712
PARAM_VALUE 0 display->drm->mode_config.helper_private->atomic_commit_tail 0,113,234517204248432640,264416658693812224,1002985563129995264,1135616218159751168,1435312838172803072,1559742614509715456,1682444203744997376,2792895115794366464,3649211429048074240,4264110321136541696,4348468181405868032-s64max
PARAM_VALUE 0 display->params.enable_dmc_wl 0-1
PARAM_VALUE 0 display->parent 4096-ptr_max
PARAM_VALUE 0 display->parent->irq 5062596649199198208
PARAM_VALUE 0 display->parent->pcode 600309631264055296
PARAM_VALUE 0 display->parent->rpm 1303590034781167616
PARAM_VALUE 0 display->parent->vlv_iosf 197119610173992960
PARAM_VALUE 0 display->pmdemand.obj.funcs->atomic_destroy_state 231959734523985920,312078704547934208,1654662236298231808,5986221188102647808,8423152862500474880
PARAM_VALUE 0 display->pmdemand.obj.funcs->atomic_duplicate_state 1751081395836968960,4594388545939185664,5185885321829400576,7625532090363609088,8914423393379360768
PARAM_VALUE 0 display->power.domains.lock.dep_map->name 0-255
PARAM_VALUE 0 display->power.domains.lock.first_waiter->list.prev->next 5159360019465732096
PARAM_VALUE 0 display->power.domains.lock.first_waiter->list.prev->prev 5159360019465732096
PARAM_VALUE 0 display->power.domains.lock.osq.tail.counter 0-s32max
PARAM_VALUE 0 display->power.domains.lock.wait_lock.dep_map->name 0-255
PARAM_VALUE 0 display->power.domains.lock.wait_lock.owner (-1)
PARAM_VALUE 0 display->power.domains.lock.wait_lock.owner_cpu u32max
PARAM_VALUE 0 display->power.domains.power_wells->desc->enable_timeout 0,500
PARAM_VALUE 0 display->restore.reset_ctx.ww_ctx.ww_class->is_wait_die 0-1
PARAM_VALUE 0 display->wl.work.timer.entry->pprev 4096-ptr_max
PARAM_VALUE 0 display->wm.funcs->atomic_update_watermarks 0,241866399159836672
PARAM_VALUE 0 display->wm.funcs->compute_global_watermarks 0,7679025112587603968
PARAM_VALUE 0 display->wm.funcs->compute_watermarks 0,663047380929499136,4718310602505961472,7447224825039265792,8278299763477639168
PARAM_VALUE 0 display->wm.funcs->get_hw_state 0,1372658440782848000,6903309568198033408,7899623770445606912,8633453788894511104
PARAM_VALUE 0 display->wm.funcs->initial_watermarks 0,318382624811003904,2077638626766659584,4361408001915691008
PARAM_VALUE 0 display->wm.funcs->optimize_watermarks 0,136016925988110336,2676780419539894272,6733336501198520320
PARAM_VALUE 0 display->wm.funcs->sanitize 0,3771904337417297920,8756858967241641984,9118998679592730624
PARAM_VALUE 0 display->wm.funcs->update_wm 0,2900677620984037376,5075417898438156288,6224038869724659712,6233422041516032000
PARAM_VALUE 0 *display->bw.peakbw 0-4294967295
PARAM_VALUE 0 *display->bw.psf_bw 0-4294967295
PARAM_VALUE 0 *display->irq.pipestat_irq_mask 0-4294967295
PARAM_VALUE 1 phy 1
PARAM_VALUE 2 reg 33144
PARAM_VALUE 3 val 0,64-u32max
BUF_SIZE 0 display (-1),8128
BUF_SIZE 0 display (-1),8128
BUF_SIZE 0 display->hotplug.dp_wq (-1),512,528-8720
BUF_SIZE 0 display->wq.cleanup (-1),512,528-8720
BUF_SIZE 0 display->wq.flip (-1),512,528-8720
BUF_SIZE 0 display->wq.modeset (-1),512,528-8720
BUF_SIZE 0 display->wq.unordered (-1),512,528-8720
DATA_SOURCE 0 display $0
STR_LEN 0 display (-1),21-22
STR_LEN 0 display (-1),21-22
BIT_INFO 3 val 0x40,0xffffffff
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA 0 display->cdclk.hw.cdclk 0-39168016[c]
HOST_DATA 0 display->cdclk.hw.joined_mbus 0-1
HOST_DATA 0 display->cdclk.hw.voltage_level 0-31[c]
HOST_DATA 0 display->cdclk.max_cdclk_freq 1-39168016[c]
HOST_DATA 0 display->drm->mode_config.connector_ida.xa.xa_flags 67108869
HOST_DATA 0 display->drm->mode_config.object_idr.idr_rt.xa_flags 0,4-u32max
HOST_DATA 0 display->drm->mode_config.tile_idr.idr_rt.xa_flags 0,67108864-u32max
HOST_DATA 0 display->drm->num_crtcs 2[c]
HOST_DATA 0 display->fdi.pll_freq 20000-2570000[c]
HOST_DATA 0 display->fdi.rx_config 0,32768-98304[c]
HOST_DATA 0 display->power.chv_phy_control 0-u32max[c]
HOST_DATA 0 display->power.domains.dc_state 0-u32max
HOST_DATA 0 display->state.bxt_phy_grc 0-u32max
HOST_DATA 0 display->vbt.lvds_use_ssc 0-1
HOST_DATA 0 display->wm.g4x.cxsr 0-1
HOST_DATA 0 display->wm.g4x.hpll.cursor 0-63[c]
HOST_DATA 0 display->wm.g4x.hpll.fbc 0-15[c]
HOST_DATA 0 display->wm.g4x.hpll.plane 0-511[c]
HOST_DATA 0 display->wm.g4x.sr.cursor 0-63[c]
HOST_DATA 0 display->wm.g4x.sr.fbc 0-7[c]
HOST_DATA 0 display->wm.g4x.sr.plane 0-511
HOST_DATA 0 display->wm.vlv.cxsr 0-1
HOST_DATA 0 display->wm.vlv.sr.cursor 0-63[c]
HOST_DATA 0 display->wm.vlv.sr.plane 0-2047[c]
HOST_DATA 3 val 0,64-u32max
NO_OVERFLOW_SIMPLE 0 display->drm->mode_config.num_colorop
NO_OVERFLOW_SIMPLE 0 display->drm->mode_config.num_crtc
NO_OVERFLOW_SIMPLE 0 display->drm->mode_config.num_total_plane
NO_OVERFLOW_SIMPLE 0 display->drm->num_crtcs
NO_OVERFLOW_SIMPLE 0 display->restore.modeset_state->num_connector
LOCK2 &power_domains->lock
HALF_LOCKED2 0 &display->dpll.lock
HALF_LOCKED2 0 &display->drm->mode_config.connection_mutex
HALF_LOCKED2 0 &display->drm->mode_config.mutex
HALF_LOCKED2 0 &display->gmbus.mutex
TYPE_LOCK (struct i915_power_domains)->lock