Defined in 1 files as a prototype:
Defined in 1 files as a function:
Referenced in 1 files:
Smatch caller information:
drivers/gpu/drm/radeon/radeon_pm.c radeon_dpm_change_power_state_locked() -> (struct radeon_asic)->dpm.print_power_state()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.high_pixelclock_count | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.dpm.new_active_crtc_count | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.dpm.requested_ps | 1-u64max |
| PARAM_VALUE | 0 | rdev->pm.dpm_enabled | 1 |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->pm.pm_method | 2 |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev->agp | (-1),144 |
| CAPPED_DATA | 0 | rdev->pm.dpm.num_ps | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.requested_ps | 1 |
| DATA_SOURCE | 0 | rdev | $0 |
| CONTAINER | 0 | -96-520-17056+0 | $(-1) |
| CONTAINER | 1 | *(-96-520-17056+16+792+17232) | $(-1) |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| HOST_DATA | 0 | rdev->config.cik.tile_config | 0-16383[c] |
| HOST_DATA | 0 | rdev->config.r100.hdp_cntl | 0-u32max |
| HOST_DATA | 0 | rdev->config.r300.hdp_cntl | 0-u32max |
| HOST_DATA | 0 | rdev->config.r600.backend_map | 0-3[c] |
| HOST_DATA | 0 | rdev->config.r600.tile_config | 0-262143[c] |
| HOST_DATA | 0 | rdev->config.rv770.tile_config | 0,2048-u32max[c] |
| HOST_DATA | 0 | rdev->gart.num_cpu_pages | 0-524287[c] |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d1grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d2grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d3grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d4grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d5grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d6grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont2 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont3 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont4 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont5 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont6 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.r500.disp_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.r500.hdmi0_status | 0,268435456 |
| HOST_DATA | 0 | rdev->mc.aper_base | 0-1099511627775 |
| HOST_DATA | 0 | rdev->mc.gtt_size | 0-s32max[c] |
| HOST_DATA | 0 | rdev->mc.gtt_start | 0-u64max[c] |
| HOST_DATA | 0 | rdev->mc.mc_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.real_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.vram_end | 0-9223372039002259453,u64max[c] |
| HOST_DATA | 0 | rdev->mc.vram_start | 0-9223372036854775807[c] |
| HOST_DATA | 0 | rdev->num_gb_pipes | 2-4[c] |
| NO_OVERFLOW_SIMPLE | 0 | rdev->rmmio_size | |
| LOCK2 | &rdev->pm.mutex | ||
| HALF_LOCKED2 | &of->mutex | ||
| HALF_LOCKED2 | &rdev->exclusive_lock | ||
| TYPE_LOCK | (struct radeon_pm)->mutex |
drivers/gpu/drm/radeon/radeon_pm.c radeon_dpm_change_power_state_locked() -> (struct radeon_asic)->dpm.print_power_state()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.high_pixelclock_count | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.dpm.new_active_crtc_count | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.dpm.requested_ps | 1-u64max |
| PARAM_VALUE | 0 | rdev->pm.dpm_enabled | 1 |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->pm.pm_method | 2 |
| PARAM_VALUE | 1 | rps | 1-u64max |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev->agp | (-1),144 |
| CAPPED_DATA | 0 | rdev->pm.dpm.current_ps | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.num_ps | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.requested_ps | 1 |
| CAPPED_DATA | 1 | rps | 1 |
| DATA_SOURCE | 0 | rdev | $0 |
| CONTAINER | 0 | -96-520-17056+0 | $(-1) |
| CONTAINER | 1 | *(-96-520-17056+24+792+17232) | $(-1) |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| HOST_DATA | 0 | rdev->config.cik.tile_config | 0-16383[c] |
| HOST_DATA | 0 | rdev->config.r100.hdp_cntl | 0-u32max |
| HOST_DATA | 0 | rdev->config.r300.hdp_cntl | 0-u32max |
| HOST_DATA | 0 | rdev->config.r600.backend_map | 0-3[c] |
| HOST_DATA | 0 | rdev->config.r600.tile_config | 0-262143[c] |
| HOST_DATA | 0 | rdev->config.rv770.tile_config | 0,2048-u32max[c] |
| HOST_DATA | 0 | rdev->gart.num_cpu_pages | 0-524287[c] |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d1grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d2grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d3grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d4grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d5grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d6grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont2 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont3 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont4 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont5 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont6 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.r500.disp_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.r500.hdmi0_status | 0,268435456 |
| HOST_DATA | 0 | rdev->mc.aper_base | 0-1099511627775 |
| HOST_DATA | 0 | rdev->mc.gtt_size | 0-s32max[c] |
| HOST_DATA | 0 | rdev->mc.gtt_start | 0-u64max[c] |
| HOST_DATA | 0 | rdev->mc.mc_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.real_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.vram_end | 0-9223372039002259453,u64max[c] |
| HOST_DATA | 0 | rdev->mc.vram_start | 0-9223372036854775807[c] |
| HOST_DATA | 0 | rdev->num_gb_pipes | 2-4[c] |
| NO_OVERFLOW_SIMPLE | 0 | rdev->rmmio_size | |
| LOCK2 | &rdev->pm.mutex | ||
| HALF_LOCKED2 | &of->mutex | ||
| HALF_LOCKED2 | &rdev->exclusive_lock | ||
| TYPE_LOCK | (struct radeon_pm)->mutex |
drivers/gpu/drm/radeon/radeon_pm.c radeon_dpm_print_power_states() -> (struct radeon_asic)->dpm.print_power_state()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->bios | 1-u64max |
| PARAM_VALUE | 0 | rdev->family | 28-61 |
| PARAM_VALUE | 0 | rdev->is_atom_bios | 1 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.current_clock_mode_index | 0 |
| PARAM_VALUE | 0 | rdev->pm.dpm.forced_level | 0 |
| PARAM_VALUE | 0 | rdev->pm.dpm.num_ps | 1-s32max |
| PARAM_VALUE | 0 | rdev->pm.dpm.ps | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.state | 3 |
| PARAM_VALUE | 0 | rdev->pm.dpm.user_state | 3 |
| PARAM_VALUE | 0 | rdev->pm.fan_pulses_per_revolution | 0-15 |
| PARAM_VALUE | 0 | rdev->pm.i2c_bus | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.int_thermal_type | 0-12 |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->pm.no_fan | 1 |
| PARAM_VALUE | 0 | rdev->pm.num_power_states | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.pm_method | 2 |
| PARAM_VALUE | 0 | rdev->pm.power_state | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->rlc_fw | 1-u64max |
| PARAM_VALUE | 1 | rps | 4096-ptr_max |
| BUF_SIZE | 0 | rdev | s32min-(-2),1-s32max |
| BUF_SIZE | 0 | rdev | s32min-(-2),1-s32max |
| BUF_SIZE | 0 | rdev->agp | (-1),144 |
| DATA_SOURCE | 0 | rdev | $0 |
| CONTAINER | 0 | -96-520-17056+0 | $(-1) |
| BIT_INFO | 0 | rdev->mc.mc_mask | 0xffffffff,0xffffffffffffffff |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| HOST_DATA | 0 | rdev->gart.num_cpu_pages | 0-524287[c] |
| HOST_DATA | 0 | rdev->mc.aper_base | 0-1099511627775[c] |
| HOST_DATA | 0 | rdev->mc.gtt_size | 0-s32max[c] |
| HOST_DATA | 0 | rdev->mc.gtt_start | 0-u64max[c] |
| HOST_DATA | 0 | rdev->mc.mc_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.real_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.vram_end | 0-4504699121172479,u64max[c] |
| HOST_DATA | 0 | rdev->mc.vram_start | 0-9223372036854775807[c] |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.current_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.default_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.num_power_states | |
| LOCK2 | &rdev->pm.mutex | ||
| TYPE_LOCK | (struct radeon_pm)->mutex |