Defined in 1 files as a function:

Referenced in 1 files:

Smatch caller information:

drivers/gpu/drm/tegra/dpaux.c drm_dp_aux_detect() -> tegra_dpaux_readl()

Type Parameter Key Value
PARAM_VALUE 0 dpaux 4096-ptr_max
PARAM_VALUE 1 offset 49
DATA_SOURCE 0 dpaux r to_dpaux
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &device->clients_lock

drivers/gpu/drm/tegra/dpaux.c tegra_dpaux_irq() -> tegra_dpaux_readl()

Type Parameter Key Value
PARAM_VALUE 1 offset 5
DATA_SOURCE 0 dpaux $1
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &desc->request_mutex
HALF_LOCKED2 flags

drivers/gpu/drm/tegra/dpaux.c tegra_dpaux_pad_power_down() -> tegra_dpaux_readl()

Type Parameter Key Value
PARAM_VALUE 1 offset 77
BUF_SIZE 0 dpaux s32min-(-1),1-s32max
BUF_SIZE 0 dpaux s32min-(-1),1-s32max
DATA_SOURCE 0 dpaux $0
RX_PATH
TASK_NOT_RUNNING
NO_OVERFLOW_SIMPLE 0 dpaux->clk_parent->core->parent->req_rate
UNITS 0 dpaux unit_byte
HALF_LOCKED2 &_dev->mutex

drivers/gpu/drm/tegra/dpaux.c tegra_dpaux_pad_power_up() -> tegra_dpaux_readl()

Type Parameter Key Value
PARAM_VALUE 0 dpaux 4096-ptr_max
PARAM_VALUE 0 dpaux->aux.ddc.lock_ops->lock_bus 0,4096-ptr_max
PARAM_VALUE 0 dpaux->aux.ddc.lock_ops->trylock_bus 0,4096-ptr_max
PARAM_VALUE 0 dpaux->aux.ddc.lock_ops->unlock_bus 0,4096-ptr_max
PARAM_VALUE 0 dpaux->soc 4096-ptr_max
PARAM_VALUE 1 offset 77
BUF_SIZE 0 dpaux (-1),1,24,32,40,48,56,64,72,80,88,96,104,112,120,128,136,144,152,168,3352
BUF_SIZE 0 dpaux (-1),1,24,32,40,48,56,64,72,80,88,96,104,112,120,128,136,144,152,168,3352
BUF_SIZE 0 dpaux->aux.dev (-1),1616
BUF_SIZE 0 dpaux->clk (-1),1-s32max
BUF_SIZE 0 dpaux->clk_parent (-1),1-s32max
BUF_SIZE 0 dpaux->dev (-1),1616
BUF_SIZE 0 dpaux->irq s32min-(-1),1-s32max
BUF_SIZE 0 dpaux->rst (-1)-0,8,280
BUF_SIZE 0 dpaux->vdd s32min,(-1)-s32max
DATA_SOURCE 0 dpaux $0
RX_PATH
TASK_NOT_RUNNING
NO_OVERFLOW_SIMPLE 0 dpaux->clk_parent->core->parent->req_rate

drivers/gpu/drm/tegra/dpaux.c tegra_dpaux_read_fifo() -> tegra_dpaux_readl()

Type Parameter Key Value
PARAM_VALUE 0 dpaux 4096-ptr_max
PARAM_VALUE 0 dpaux->complete.done 0-4294967293,u32max
PARAM_VALUE 0 dpaux->complete.wait.lock.dep_map->name 0-255
PARAM_VALUE 0 dpaux->complete.wait.lock.owner (-1)
PARAM_VALUE 0 dpaux->complete.wait.lock.owner_cpu u32max
PARAM_VALUE 0 dpaux->complete.wait.task_list.prev->next 4096-ptr_max
PARAM_VALUE 0 dpaux->complete.wait.task_list.prev->next->next 4096-ptr_max
PARAM_VALUE 1 offset 25,29-37
CAPPED_DATA 1 offset 1
DATA_SOURCE 0 dpaux $0
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &aux->hw_mutex

drivers/gpu/drm/tegra/dpaux.c tegra_dpaux_transfer() -> tegra_dpaux_readl()

Type Parameter Key Value
PARAM_VALUE 0 dpaux 4096-ptr_max
PARAM_VALUE 1 offset 45
DATA_SOURCE 0 dpaux r to_dpaux
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &aux->hw_mutex

drivers/gpu/drm/tegra/dpaux.c tegra_dpaux_transfer() -> tegra_dpaux_readl()

Type Parameter Key Value
PARAM_VALUE 0 dpaux 4096-ptr_max
PARAM_VALUE 0 dpaux->complete.done 0-4294967293,u32max
PARAM_VALUE 0 dpaux->complete.wait.lock.dep_map->name 0-255
PARAM_VALUE 0 dpaux->complete.wait.lock.owner (-1)
PARAM_VALUE 0 dpaux->complete.wait.lock.owner_cpu u32max
PARAM_VALUE 0 dpaux->complete.wait.task_list.prev->next 4096-ptr_max
PARAM_VALUE 0 dpaux->complete.wait.task_list.prev->next->next 4096-ptr_max
PARAM_VALUE 1 offset 49
DATA_SOURCE 0 dpaux r to_dpaux
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &aux->hw_mutex