Defined in 2 files as a function:

Referenced in 2 files:

Smatch caller information:

drivers/dma/tegra20-apb-dma.c tegra_dma_global_pause() -> tdma_write()

Type Parameter Key Value
PARAM_VALUE 0 tdma 4096-ptr_max
PARAM_VALUE 1 reg 0
PARAM_VALUE 2 val 0
PREEMPT_ADD <- disables preempt
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
LOCK2 &tdc->lock
LOCK2 0 &tdma->global_lock
HALF_LOCKED2 flags
TYPE_LOCK (struct tegra_dma)->global_lock
TYPE_LOCK (struct tegra_dma_channel)->lock

drivers/dma/tegra20-apb-dma.c tegra_dma_global_resume() -> tdma_write()

Type Parameter Key Value
PARAM_VALUE 0 tdma 4096-ptr_max
PARAM_VALUE 1 reg 0
PARAM_VALUE 2 val 2147483648
PREEMPT_ADD <- disables preempt
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
LOCK2 &tdc->lock
LOCK2 0 &tdma->global_lock
HALF_LOCKED2 flags
TYPE_LOCK (struct tegra_dma)->global_lock
TYPE_LOCK (struct tegra_dma_channel)->lock

drivers/dma/tegra20-apb-dma.c tegra_dma_init_hw() -> tdma_write()

Type Parameter Key Value
PARAM_VALUE 0 tdma 4096-ptr_max
PARAM_VALUE 1 reg 0
PARAM_VALUE 2 val 2147483648
BUF_SIZE 0 tdma s32min-(-2),1-s32max
BUF_SIZE 0 tdma s32min-(-2),1-s32max
BUF_SIZE 0 tdma->channels (-1)-s32max
BUF_SIZE 0 tdma->dev (-1),1616
BUF_SIZE 0 tdma->dma_clk (-1),1-s32max
BUF_SIZE 0 tdma->rst (-1),8,280
DATA_SOURCE 0 tdma $0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
NO_OVERFLOW_SIMPLE 0 tdma->chip_data->nr_channels
UNITS 0 tdma unit_byte

drivers/dma/tegra20-apb-dma.c tegra_dma_init_hw() -> tdma_write()

Type Parameter Key Value
PARAM_VALUE 0 tdma 4096-ptr_max
PARAM_VALUE 1 reg 16
PARAM_VALUE 2 val 0
BUF_SIZE 0 tdma s32min-(-2),1-s32max
BUF_SIZE 0 tdma s32min-(-2),1-s32max
BUF_SIZE 0 tdma->channels (-1)-s32max
BUF_SIZE 0 tdma->dev (-1),1616
BUF_SIZE 0 tdma->dma_clk (-1),1-s32max
BUF_SIZE 0 tdma->rst (-1),8,280
DATA_SOURCE 0 tdma $0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
NO_OVERFLOW_SIMPLE 0 tdma->chip_data->nr_channels
UNITS 0 tdma unit_byte

drivers/dma/tegra20-apb-dma.c tegra_dma_init_hw() -> tdma_write()

Type Parameter Key Value
PARAM_VALUE 0 tdma 4096-ptr_max
PARAM_VALUE 1 reg 32
PARAM_VALUE 2 val u32max
BUF_SIZE 0 tdma s32min-(-2),1-s32max
BUF_SIZE 0 tdma s32min-(-2),1-s32max
BUF_SIZE 0 tdma->channels (-1)-s32max
BUF_SIZE 0 tdma->dev (-1),1616
BUF_SIZE 0 tdma->dma_clk (-1),1-s32max
BUF_SIZE 0 tdma->rst (-1),8,280
DATA_SOURCE 0 tdma $0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
NO_OVERFLOW_SIMPLE 0 tdma->chip_data->nr_channels
UNITS 0 tdma unit_byte

drivers/dma/tegra210-adma.c tegra186_adma_global_page_config() -> tdma_write()

Type Parameter Key Value
PARAM_VALUE 0 tdma 4096-ptr_max
PARAM_VALUE 0 tdma->base_addr 1-u64max
PARAM_VALUE 0 tdma->cdata 4096-ptr_max
PARAM_VALUE 1 reg 48
PARAM_VALUE 2 val 0
BUF_SIZE 0 tdma s32min-(-2),1-s32max
BUF_SIZE 0 tdma s32min-(-2),1-s32max
BUF_SIZE 0 tdma->ahub_clk (-1),1-s32max
BUF_SIZE 0 tdma->channels (-1)-s32max
BUF_SIZE 0 tdma->dev (-1),1616
BUF_SIZE 0 tdma->dma_chan_mask (-1)-536870912
DATA_SOURCE 0 tdma $0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
NO_OVERFLOW_SIMPLE 0 tdma->cdata->nr_channels
NO_OVERFLOW_SIMPLE 0 tdma->nr_channels

drivers/dma/tegra210-adma.c tegra186_adma_global_page_config() -> tdma_write()

Type Parameter Key Value
PARAM_VALUE 0 tdma 4096-ptr_max
PARAM_VALUE 0 tdma->base_addr 1-u64max
PARAM_VALUE 0 tdma->cdata 4096-ptr_max
PARAM_VALUE 1 reg 112
PARAM_VALUE 2 val 0
BUF_SIZE 0 tdma s32min-(-2),1-s32max
BUF_SIZE 0 tdma s32min-(-2),1-s32max
BUF_SIZE 0 tdma->ahub_clk (-1),1-s32max
BUF_SIZE 0 tdma->channels (-1)-s32max
BUF_SIZE 0 tdma->dev (-1),1616
BUF_SIZE 0 tdma->dma_chan_mask (-1)-536870912
DATA_SOURCE 0 tdma $0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
NO_OVERFLOW_SIMPLE 0 tdma->cdata->nr_channels
NO_OVERFLOW_SIMPLE 0 tdma->nr_channels

drivers/dma/tegra210-adma.c tegra186_adma_global_page_config() -> tdma_write()

Type Parameter Key Value
PARAM_VALUE 0 tdma 4096-ptr_max
PARAM_VALUE 0 tdma->base_addr 1-u64max
PARAM_VALUE 0 tdma->cdata 4096-ptr_max
PARAM_VALUE 1 reg 132
PARAM_VALUE 2 val 0
BUF_SIZE 0 tdma s32min-(-2),1-s32max
BUF_SIZE 0 tdma s32min-(-2),1-s32max
BUF_SIZE 0 tdma->ahub_clk (-1),1-s32max
BUF_SIZE 0 tdma->channels (-1)-s32max
BUF_SIZE 0 tdma->dev (-1),1616
BUF_SIZE 0 tdma->dma_chan_mask (-1)-536870912
DATA_SOURCE 0 tdma $0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
NO_OVERFLOW_SIMPLE 0 tdma->cdata->nr_channels
NO_OVERFLOW_SIMPLE 0 tdma->nr_channels

drivers/dma/tegra210-adma.c tegra186_adma_global_page_config() -> tdma_write()

Type Parameter Key Value
PARAM_VALUE 0 tdma 4096-ptr_max
PARAM_VALUE 0 tdma->base_addr 1-u64max
PARAM_VALUE 0 tdma->cdata 4096-ptr_max
PARAM_VALUE 2 val 255
BUF_SIZE 0 tdma s32min-(-2),1-s32max
BUF_SIZE 0 tdma s32min-(-2),1-s32max
BUF_SIZE 0 tdma->ahub_clk (-1),1-s32max
BUF_SIZE 0 tdma->channels (-1)-s32max
BUF_SIZE 0 tdma->dev (-1),1616
BUF_SIZE 0 tdma->dma_chan_mask (-1)-536870912
DATA_SOURCE 0 tdma $0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
NO_OVERFLOW_SIMPLE 0 tdma->cdata->nr_channels
NO_OVERFLOW_SIMPLE 0 tdma->nr_channels

drivers/dma/tegra210-adma.c tegra186_adma_global_page_config() -> tdma_write()

Type Parameter Key Value
PARAM_VALUE 0 tdma 4096-ptr_max
PARAM_VALUE 0 tdma->base_addr 1-u64max
PARAM_VALUE 0 tdma->cdata 4096-ptr_max
PARAM_VALUE 2 val 33554431
BUF_SIZE 0 tdma s32min-(-2),1-s32max
BUF_SIZE 0 tdma s32min-(-2),1-s32max
BUF_SIZE 0 tdma->ahub_clk (-1),1-s32max
BUF_SIZE 0 tdma->channels (-1)-s32max
BUF_SIZE 0 tdma->dev (-1),1616
BUF_SIZE 0 tdma->dma_chan_mask (-1)-536870912
DATA_SOURCE 0 tdma $0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
NO_OVERFLOW_SIMPLE 0 tdma->cdata->nr_channels
NO_OVERFLOW_SIMPLE 0 tdma->nr_channels

drivers/dma/tegra210-adma.c tegra186_adma_global_page_config() -> tdma_write()

Type Parameter Key Value
PARAM_VALUE 0 tdma 4096-ptr_max
PARAM_VALUE 0 tdma->base_addr 1-u64max
PARAM_VALUE 0 tdma->cdata 4096-ptr_max
PARAM_VALUE 2 val 16777215
BUF_SIZE 0 tdma s32min-(-2),1-s32max
BUF_SIZE 0 tdma s32min-(-2),1-s32max
BUF_SIZE 0 tdma->ahub_clk (-1),1-s32max
BUF_SIZE 0 tdma->channels (-1)-s32max
BUF_SIZE 0 tdma->dev (-1),1616
BUF_SIZE 0 tdma->dma_chan_mask (-1)-536870912
DATA_SOURCE 0 tdma $0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
NO_OVERFLOW_SIMPLE 0 tdma->cdata->nr_channels
NO_OVERFLOW_SIMPLE 0 tdma->nr_channels

drivers/dma/tegra210-adma.c tegra264_adma_global_page_config() -> tdma_write()

Type Parameter Key Value
PARAM_VALUE 0 tdma 4096-ptr_max
PARAM_VALUE 0 tdma->base_addr 1-u64max
PARAM_VALUE 0 tdma->cdata 4096-ptr_max
PARAM_VALUE 1 reg 68
PARAM_VALUE 2 val 0
BUF_SIZE 0 tdma s32min-(-2),1-s32max
BUF_SIZE 0 tdma s32min-(-2),1-s32max
BUF_SIZE 0 tdma->ahub_clk (-1),1-s32max
BUF_SIZE 0 tdma->channels (-1)-s32max
BUF_SIZE 0 tdma->dev (-1),1616
BUF_SIZE 0 tdma->dma_chan_mask (-1)-536870912
DATA_SOURCE 0 tdma $0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
NO_OVERFLOW_SIMPLE 0 tdma->cdata->nr_channels
NO_OVERFLOW_SIMPLE 0 tdma->nr_channels

drivers/dma/tegra210-adma.c tegra264_adma_global_page_config() -> tdma_write()

Type Parameter Key Value
PARAM_VALUE 0 tdma 4096-ptr_max
PARAM_VALUE 0 tdma->base_addr 1-u64max
PARAM_VALUE 0 tdma->cdata 4096-ptr_max
PARAM_VALUE 1 reg 72
PARAM_VALUE 2 val 0
BUF_SIZE 0 tdma s32min-(-2),1-s32max
BUF_SIZE 0 tdma s32min-(-2),1-s32max
BUF_SIZE 0 tdma->ahub_clk (-1),1-s32max
BUF_SIZE 0 tdma->channels (-1)-s32max
BUF_SIZE 0 tdma->dev (-1),1616
BUF_SIZE 0 tdma->dma_chan_mask (-1)-536870912
DATA_SOURCE 0 tdma $0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
NO_OVERFLOW_SIMPLE 0 tdma->cdata->nr_channels
NO_OVERFLOW_SIMPLE 0 tdma->nr_channels

drivers/dma/tegra210-adma.c tegra264_adma_global_page_config() -> tdma_write()

Type Parameter Key Value
PARAM_VALUE 0 tdma 4096-ptr_max
PARAM_VALUE 0 tdma->base_addr 1-u64max
PARAM_VALUE 0 tdma->cdata 4096-ptr_max
PARAM_VALUE 1 reg 256
PARAM_VALUE 2 val 0
BUF_SIZE 0 tdma s32min-(-2),1-s32max
BUF_SIZE 0 tdma s32min-(-2),1-s32max
BUF_SIZE 0 tdma->ahub_clk (-1),1-s32max
BUF_SIZE 0 tdma->channels (-1)-s32max
BUF_SIZE 0 tdma->dev (-1),1616
BUF_SIZE 0 tdma->dma_chan_mask (-1)-536870912
DATA_SOURCE 0 tdma $0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
NO_OVERFLOW_SIMPLE 0 tdma->cdata->nr_channels
NO_OVERFLOW_SIMPLE 0 tdma->nr_channels

drivers/dma/tegra210-adma.c tegra264_adma_global_page_config() -> tdma_write()

Type Parameter Key Value
PARAM_VALUE 0 tdma 4096-ptr_max
PARAM_VALUE 0 tdma->base_addr 1-u64max
PARAM_VALUE 0 tdma->cdata 4096-ptr_max
PARAM_VALUE 1 reg 260
PARAM_VALUE 2 val 0
BUF_SIZE 0 tdma s32min-(-2),1-s32max
BUF_SIZE 0 tdma s32min-(-2),1-s32max
BUF_SIZE 0 tdma->ahub_clk (-1),1-s32max
BUF_SIZE 0 tdma->channels (-1)-s32max
BUF_SIZE 0 tdma->dev (-1),1616
BUF_SIZE 0 tdma->dma_chan_mask (-1)-536870912
DATA_SOURCE 0 tdma $0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
NO_OVERFLOW_SIMPLE 0 tdma->cdata->nr_channels
NO_OVERFLOW_SIMPLE 0 tdma->nr_channels

drivers/dma/tegra210-adma.c tegra264_adma_global_page_config() -> tdma_write()

Type Parameter Key Value
PARAM_VALUE 0 tdma 4096-ptr_max
PARAM_VALUE 0 tdma->base_addr 1-u64max
PARAM_VALUE 0 tdma->cdata 4096-ptr_max
PARAM_VALUE 1 reg 384
PARAM_VALUE 2 val 0
BUF_SIZE 0 tdma s32min-(-2),1-s32max
BUF_SIZE 0 tdma s32min-(-2),1-s32max
BUF_SIZE 0 tdma->ahub_clk (-1),1-s32max
BUF_SIZE 0 tdma->channels (-1)-s32max
BUF_SIZE 0 tdma->dev (-1),1616
BUF_SIZE 0 tdma->dma_chan_mask (-1)-536870912
DATA_SOURCE 0 tdma $0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
NO_OVERFLOW_SIMPLE 0 tdma->cdata->nr_channels
NO_OVERFLOW_SIMPLE 0 tdma->nr_channels

drivers/dma/tegra210-adma.c tegra264_adma_global_page_config() -> tdma_write()

Type Parameter Key Value
PARAM_VALUE 0 tdma 4096-ptr_max
PARAM_VALUE 0 tdma->base_addr 1-u64max
PARAM_VALUE 0 tdma->cdata 4096-ptr_max
PARAM_VALUE 1 reg 388
PARAM_VALUE 2 val 0
BUF_SIZE 0 tdma s32min-(-2),1-s32max
BUF_SIZE 0 tdma s32min-(-2),1-s32max
BUF_SIZE 0 tdma->ahub_clk (-1),1-s32max
BUF_SIZE 0 tdma->channels (-1)-s32max
BUF_SIZE 0 tdma->dev (-1),1616
BUF_SIZE 0 tdma->dma_chan_mask (-1)-536870912
DATA_SOURCE 0 tdma $0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
NO_OVERFLOW_SIMPLE 0 tdma->cdata->nr_channels
NO_OVERFLOW_SIMPLE 0 tdma->nr_channels

drivers/dma/tegra210-adma.c tegra264_adma_global_page_config() -> tdma_write()

Type Parameter Key Value
PARAM_VALUE 0 tdma 4096-ptr_max
PARAM_VALUE 0 tdma->base_addr 1-u64max
PARAM_VALUE 0 tdma->cdata 4096-ptr_max
PARAM_VALUE 2 val u32max
BUF_SIZE 0 tdma s32min-(-2),1-s32max
BUF_SIZE 0 tdma s32min-(-2),1-s32max
BUF_SIZE 0 tdma->ahub_clk (-1),1-s32max
BUF_SIZE 0 tdma->channels (-1)-s32max
BUF_SIZE 0 tdma->dev (-1),1616
BUF_SIZE 0 tdma->dma_chan_mask (-1)-536870912
DATA_SOURCE 0 tdma $0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
NO_OVERFLOW_SIMPLE 0 tdma->cdata->nr_channels
NO_OVERFLOW_SIMPLE 0 tdma->nr_channels

drivers/dma/tegra210-adma.c tegra264_adma_global_page_config() -> tdma_write()

Type Parameter Key Value
PARAM_VALUE 0 tdma 4096-ptr_max
PARAM_VALUE 0 tdma->base_addr 1-u64max
PARAM_VALUE 0 tdma->cdata 4096-ptr_max
PARAM_VALUE 2 val u32max
BUF_SIZE 0 tdma s32min-(-2),1-s32max
BUF_SIZE 0 tdma s32min-(-2),1-s32max
BUF_SIZE 0 tdma->ahub_clk (-1),1-s32max
BUF_SIZE 0 tdma->channels (-1)-s32max
BUF_SIZE 0 tdma->dev (-1),1616
BUF_SIZE 0 tdma->dma_chan_mask (-1)-536870912
DATA_SOURCE 0 tdma $0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
NO_OVERFLOW_SIMPLE 0 tdma->cdata->nr_channels
NO_OVERFLOW_SIMPLE 0 tdma->nr_channels

drivers/dma/tegra210-adma.c tegra264_adma_global_page_config() -> tdma_write()

Type Parameter Key Value
PARAM_VALUE 0 tdma 4096-ptr_max
PARAM_VALUE 0 tdma->base_addr 1-u64max
PARAM_VALUE 0 tdma->cdata 4096-ptr_max
PARAM_VALUE 2 val u32max
BUF_SIZE 0 tdma s32min-(-2),1-s32max
BUF_SIZE 0 tdma s32min-(-2),1-s32max
BUF_SIZE 0 tdma->ahub_clk (-1),1-s32max
BUF_SIZE 0 tdma->channels (-1)-s32max
BUF_SIZE 0 tdma->dev (-1),1616
BUF_SIZE 0 tdma->dma_chan_mask (-1)-536870912
DATA_SOURCE 0 tdma $0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
NO_OVERFLOW_SIMPLE 0 tdma->cdata->nr_channels
NO_OVERFLOW_SIMPLE 0 tdma->nr_channels

drivers/dma/tegra210-adma.c tegra264_adma_global_page_config() -> tdma_write()

Type Parameter Key Value
PARAM_VALUE 0 tdma 4096-ptr_max
PARAM_VALUE 0 tdma->base_addr 1-u64max
PARAM_VALUE 0 tdma->cdata 4096-ptr_max
PARAM_VALUE 2 val 1
BUF_SIZE 0 tdma s32min-(-2),1-s32max
BUF_SIZE 0 tdma s32min-(-2),1-s32max
BUF_SIZE 0 tdma->ahub_clk (-1),1-s32max
BUF_SIZE 0 tdma->channels (-1)-s32max
BUF_SIZE 0 tdma->dev (-1),1616
BUF_SIZE 0 tdma->dma_chan_mask (-1)-536870912
DATA_SOURCE 0 tdma $0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
NO_OVERFLOW_SIMPLE 0 tdma->cdata->nr_channels
NO_OVERFLOW_SIMPLE 0 tdma->nr_channels

drivers/dma/tegra210-adma.c tegra264_adma_global_page_config() -> tdma_write()

Type Parameter Key Value
PARAM_VALUE 0 tdma 4096-ptr_max
PARAM_VALUE 0 tdma->base_addr 1-u64max
PARAM_VALUE 0 tdma->cdata 4096-ptr_max
PARAM_VALUE 2 val u32max
BUF_SIZE 0 tdma s32min-(-2),1-s32max
BUF_SIZE 0 tdma s32min-(-2),1-s32max
BUF_SIZE 0 tdma->ahub_clk (-1),1-s32max
BUF_SIZE 0 tdma->channels (-1)-s32max
BUF_SIZE 0 tdma->dev (-1),1616
BUF_SIZE 0 tdma->dma_chan_mask (-1)-536870912
DATA_SOURCE 0 tdma $0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
NO_OVERFLOW_SIMPLE 0 tdma->cdata->nr_channels
NO_OVERFLOW_SIMPLE 0 tdma->nr_channels

drivers/dma/tegra210-adma.c tegra264_adma_global_page_config() -> tdma_write()

Type Parameter Key Value
PARAM_VALUE 0 tdma 4096-ptr_max
PARAM_VALUE 0 tdma->base_addr 1-u64max
PARAM_VALUE 0 tdma->cdata 4096-ptr_max
PARAM_VALUE 2 val 1
BUF_SIZE 0 tdma s32min-(-2),1-s32max
BUF_SIZE 0 tdma s32min-(-2),1-s32max
BUF_SIZE 0 tdma->ahub_clk (-1),1-s32max
BUF_SIZE 0 tdma->channels (-1)-s32max
BUF_SIZE 0 tdma->dev (-1),1616
BUF_SIZE 0 tdma->dma_chan_mask (-1)-536870912
DATA_SOURCE 0 tdma $0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
NO_OVERFLOW_SIMPLE 0 tdma->cdata->nr_channels
NO_OVERFLOW_SIMPLE 0 tdma->nr_channels

drivers/dma/tegra210-adma.c tegra_adma_init() -> tdma_write()

Type Parameter Key Value
PARAM_VALUE 0 tdma 4096-ptr_max
PARAM_VALUE 0 tdma->base_addr 4096-ptr_max
PARAM_VALUE 0 tdma->cdata 4096-ptr_max
PARAM_VALUE 1 reg 4
PARAM_VALUE 2 val 1
BUF_SIZE 0 tdma 544-s32max
BUF_SIZE 0 tdma 544-s32max
BUF_SIZE 0 tdma->ahub_clk (-1),1-s32max
BUF_SIZE 0 tdma->channels 0-s32max
BUF_SIZE 0 tdma->dev 1616
BUF_SIZE 0 tdma->dma_chan_mask 0-536870912
CAPPED_DATA 0 tdma->nr_channels 1
DATA_SOURCE 0 tdma $0
MEM_ZERO 0 tdma
MEM_ZERO 0 tdma->dma_chan_mask
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
NO_OVERFLOW_SIMPLE 0 tdma->cdata->nr_channels
NO_OVERFLOW_SIMPLE 0 tdma->nr_channels

drivers/dma/tegra210-adma.c tegra_adma_init() -> tdma_write()

Type Parameter Key Value
PARAM_VALUE 0 tdma 4096-ptr_max
PARAM_VALUE 0 tdma->base_addr 4096-ptr_max
PARAM_VALUE 0 tdma->cdata 4096-ptr_max
PARAM_VALUE 1 reg 0
PARAM_VALUE 2 val 1
BUF_SIZE 0 tdma 544-s32max
BUF_SIZE 0 tdma 544-s32max
BUF_SIZE 0 tdma->ahub_clk (-1),1-s32max
BUF_SIZE 0 tdma->channels 0-s32max
BUF_SIZE 0 tdma->dev 1616
BUF_SIZE 0 tdma->dma_chan_mask 0-536870912
CAPPED_DATA 0 tdma->nr_channels 1
DATA_SOURCE 0 tdma $0
MEM_ZERO 0 tdma
MEM_ZERO 0 tdma->dma_chan_mask
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
NO_OVERFLOW_SIMPLE 0 tdma->cdata->nr_channels
NO_OVERFLOW_SIMPLE 0 tdma->nr_channels

drivers/dma/tegra210-adma.c tegra_adma_runtime_resume() -> tdma_write()

Type Parameter Key Value
PARAM_VALUE 0 tdma 4096-ptr_max
PARAM_VALUE 0 tdma->base_addr 1-u64max
PARAM_VALUE 1 reg 0
BUF_SIZE 0 tdma s32min-(-2),1-s32max
BUF_SIZE 0 tdma s32min-(-2),1-s32max
NOCHECK_CALL
UNITS 0 tdma unit_byte

drivers/dma/tegra210-adma.c tegra_adma_runtime_resume() -> tdma_write()

Type Parameter Key Value
PARAM_VALUE 0 tdma 4096-ptr_max
PARAM_VALUE 0 tdma->cdata 4096-ptr_max
PARAM_VALUE 1 reg 1-u32max
NOCHECK_CALL

drivers/dma/tegra210-adma.c tegra_adma_runtime_resume() -> tdma_write()

Type Parameter Key Value
PARAM_VALUE 0 tdma 4096-ptr_max
PARAM_VALUE 0 tdma->cdata 4096-ptr_max
PARAM_VALUE 1 reg 1-u32max
NOCHECK_CALL

drivers/dma/tegra210-adma.c tegra_adma_start() -> tdma_write()

Type Parameter Key Value
PARAM_VALUE 0 tdma 4096-ptr_max
PARAM_VALUE 0 tdma->cdata 4096-ptr_max
PARAM_VALUE 1 reg 1-u32max
PREEMPT_ADD
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
LOCK2 &tdc->vc.lock
LOCK2 flags
HALF_LOCKED2 &ctlr->io_mutex
HALF_LOCKED2 &host->io_mutex
HALF_LOCKED2 &pool->lock
HALF_LOCKED2 rcu_read
TYPE_LOCK (struct virt_dma_chan)->lock

drivers/dma/tegra210-adma.c tegra_adma_start() -> tdma_write()

Type Parameter Key Value
PARAM_VALUE 0 tdma 4096-ptr_max
PARAM_VALUE 0 tdma->cdata 4096-ptr_max
PARAM_VALUE 1 reg 1-u32max
PREEMPT_ADD
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
LOCK2 &tdc->vc.lock
LOCK2 flags
HALF_LOCKED2 &ctlr->io_mutex
HALF_LOCKED2 &host->io_mutex
HALF_LOCKED2 &pool->lock
HALF_LOCKED2 rcu_read
TYPE_LOCK (struct virt_dma_chan)->lock