Defined in 1 files as a prototype:

Defined in 1 files as a function:

Referenced in 4 files:

Smatch caller information:

drivers/gpu/drm/amd/amdgpu/mes_v12_1.c mes_v12_1_get_rrmt() -> soc_v1_0_normalize_xcc_reg_offset()

Type Parameter Key Value
DATA_SOURCE 0 reg $0
RX_PATH
TASK_NOT_RUNNING
LOCK2 &adev->mes.mutex_hidden
HALF_LOCKED2 &adev->reset_domain->sem
TYPE_LOCK (struct amdgpu_mes)->mutex_hidden

3d756af95eb3bd31 gfx_v12_1_ring_emit_rreg() -> soc_v1_0_normalize_xcc_reg_offset()

Type Parameter Key Value
DATA_SOURCE 0 reg $1
RX_PATH
TASK_NOT_RUNNING
LOCK2 &kiq->ring_lock
LOCK2 flags
HALF_LOCKED2 &adev->irq.lock
HALF_LOCKED2 &adev->reset_domain->sem
HALF_LOCKED2 &m->lock
HALF_LOCKED2 irqflags
TYPE_LOCK (struct amdgpu_kiq)->ring_lock

3d756af95eb3bd31 gfx_v12_1_ring_emit_wreg() -> soc_v1_0_normalize_xcc_reg_offset()

Type Parameter Key Value
DATA_SOURCE 0 reg $1
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &adev->reset_domain->sem
HALF_LOCKED2 &kiq->ring_lock
HALF_LOCKED2 flags

3d756af95eb3bd31 gfx_v12_1_wait_reg_mem() -> soc_v1_0_normalize_xcc_reg_offset()

Type Parameter Key Value
DATA_SOURCE 0 reg $4
RX_PATH
TASK_NOT_RUNNING

3d756af95eb3bd31 gfx_v12_1_wait_reg_mem() -> soc_v1_0_normalize_xcc_reg_offset()

Type Parameter Key Value
DATA_SOURCE 0 reg $5
RX_PATH
TASK_NOT_RUNNING

drivers/gpu/drm/amd/amdgpu/sdma_v7_1.c sdma_v7_1_ring_emit_reg_wait() -> soc_v1_0_normalize_xcc_reg_offset()

Type Parameter Key Value
DATA_SOURCE 0 reg $1
RX_PATH
TASK_NOT_RUNNING

drivers/gpu/drm/amd/amdgpu/sdma_v7_1.c sdma_v7_1_ring_emit_wreg() -> soc_v1_0_normalize_xcc_reg_offset()

Type Parameter Key Value
DATA_SOURCE 0 reg $1
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &adev->reset_domain->sem
HALF_LOCKED2 &kiq->ring_lock
HALF_LOCKED2 flags

drivers/gpu/drm/amd/amdgpu/soc_v1_0.c soc_v1_0_mid1_reg_range() -> soc_v1_0_normalize_xcc_reg_offset()

Type Parameter Key Value
DATA_SOURCE 0 reg $0
RX_PATH
TASK_NOT_RUNNING
LOCK2 &adev->mes.mutex_hidden
HALF_LOCKED2 &adev->reset_domain->sem
TYPE_LOCK (struct amdgpu_mes)->mutex_hidden

drivers/gpu/drm/amd/amdgpu/soc_v1_0.c soc_v1_0_normalize_reg_offset() -> soc_v1_0_normalize_xcc_reg_offset()

Type Parameter Key Value
DATA_SOURCE 0 reg $0
RX_PATH
TASK_NOT_RUNNING
LOCK2 &adev->mes.mutex_hidden
HALF_LOCKED2 &adev->reset_domain->sem
TYPE_LOCK (struct amdgpu_mes)->mutex_hidden

drivers/gpu/drm/amd/amdgpu/soc_v1_0.c soc_v1_0_normalize_reg_offset() -> soc_v1_0_normalize_xcc_reg_offset()

Type Parameter Key Value
DATA_SOURCE 0 reg $0
RX_PATH
TASK_NOT_RUNNING
LOCK2 &adev->mes.mutex_hidden
HALF_LOCKED2 &adev->reset_domain->sem
TYPE_LOCK (struct amdgpu_mes)->mutex_hidden