| PARAM_VALUE |
0 |
adev |
4096-ptr_max |
| PARAM_VALUE |
0 |
adev->asic_funcs |
4096-ptr_max |
| PARAM_VALUE |
0 |
adev->gfx.gfx_off_mutex.first_waiter |
0,4096-ptr_max |
| PARAM_VALUE |
0 |
adev->gfx.gfx_off_mutex.osq.tail.counter |
0-s32max |
| PARAM_VALUE |
0 |
adev->reg_offset |
4096-ptr_max |
| PARAM_VALUE |
0 |
adev->reset_domain |
4096-ptr_max |
| PARAM_VALUE |
2 |
se_num |
0-3,u32max |
| PARAM_VALUE |
3 |
sh_num |
0-1,u32max |
| CAPPED_DATA |
4 |
reg_offset |
1 |
| DATA_SOURCE |
0 |
adev |
$0 |
| DATA_SOURCE |
2 |
se_num |
$1 |
| DATA_SOURCE |
3 |
sh_num |
$2 |
| DATA_SOURCE |
4 |
reg_offset |
$3 |
| USER_DATA |
2 |
se_num |
0-3[c] |
| USER_DATA |
3 |
sh_num |
0-1[c] |
| LOCK2 |
|
&adev->reset_domain->sem |
|
| TYPE_LOCK |
|
(struct amdgpu_reset_domain)->sem |
|
