Defined in 1 files as a function:

Referenced in 1 files:

Smatch caller information:

drivers/gpu/drm/i915/display/intel_cdclk.c skl_cdclk_init_hw() -> skl_set_cdclk()

Type Parameter Key Value
PARAM_VALUE 0 display 4096-ptr_max
PARAM_VALUE 0 display->cdclk.hw.bypass 9600,12000,19200,24000,38400,50000
PARAM_VALUE 0 display->cdclk.hw.ref 19200,24000,38400
PARAM_VALUE 0 display->cdclk.hw.voltage_level 0-31
PARAM_VALUE 0 display->cdclk.table->waveform 0,6,34952,37448,42148,42314,43604,43690,44378,46774,56246,61166,63454,65278,65534-u16max
PARAM_VALUE 0 display->dkl.phy_lock.rlock.dep_map->name 0-255
PARAM_VALUE 0 display->drm 0,4096-ptr_max
PARAM_VALUE 0 display->hotplug.poll_init_work.entry.next 4096-ptr_max
PARAM_VALUE 0 display->hotplug.poll_init_work.entry.next->prev 4096-ptr_max
PARAM_VALUE 0 display->irq.vlv_display_irqs_enabled 1
PARAM_VALUE 0 display->opregion->vbt 0-s64max
PARAM_VALUE 0 display->params.enable_dmc_wl 0-1
PARAM_VALUE 0 display->platform.broxton 0
PARAM_VALUE 0 display->power.domains.lock.dep_map->name 0-255
PARAM_VALUE 0 display->power.domains.lock.first_waiter->list.prev->next 5159360019465732096
PARAM_VALUE 0 display->power.domains.lock.first_waiter->list.prev->prev 5159360019465732096
PARAM_VALUE 0 display->power.domains.lock.first_waiter->task->blocked_lock.dep_map->name 0-255
PARAM_VALUE 0 display->power.domains.lock.first_waiter->task->blocked_lock.owner (-1)
PARAM_VALUE 0 display->power.domains.lock.first_waiter->task->blocked_lock.owner_cpu 4294967295
PARAM_VALUE 0 display->power.domains.lock.first_waiter->task->blocked_lock.raw_lock.val.counter s32min-s32max
PARAM_VALUE 0 display->power.domains.lock.first_waiter->task->usage.refs.counter s32min-s32max
PARAM_VALUE 0 display->power.domains.lock.osq.tail.counter 0-s32max
PARAM_VALUE 0 display->power.domains.lock.wait_lock.dep_map->name 0-255
PARAM_VALUE 0 display->wl.enabled 0
PARAM_VALUE 0 display->wl.work.timer.entry->pprev 4096-ptr_max
PARAM_VALUE 0 display->wl.work.work.entry.next->prev 4096-ptr_max
PARAM_VALUE 0 *display->bw.peakbw 0-4294967295
PARAM_VALUE 0 *display->bw.psf_bw 0-4294967295
PARAM_VALUE 0 *display->irq.pipestat_irq_mask 0-4294967295
PARAM_VALUE 1 cdclk_config 2834696862146748416
PARAM_VALUE 1 cdclk_config->bypass 9600,12000,19200,24000,38400,50000
PARAM_VALUE 1 cdclk_config->cdclk 308571,337500
PARAM_VALUE 1 cdclk_config->ref 19200,24000,38400
PARAM_VALUE 1 cdclk_config->vco 1-u32max
PARAM_VALUE 1 cdclk_config->voltage_level 0
PARAM_VALUE 2 pipe (-1)
DATA_SOURCE 0 display $0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA 0 display->cdclk.hw.cdclk 0-16[c]
HOST_DATA 0 display->cdclk.hw.joined_mbus 0-1
HOST_DATA 0 display->drm->mode_config.object_idr.idr_rt.xa_flags 0,4-u32max
HOST_DATA 0 display->power.chv_phy_control 0-u32max[c]
HOST_DATA 0 display->power.domains.dc_state 0-u32max
HOST_DATA 0 display->state.bxt_phy_grc 0-u32max
HOST_DATA 1 cdclk_config->cdclk 308571,337500[c]
HOST_DATA 1 cdclk_config->joined_mbus 0-1
NO_OVERFLOW_SIMPLE 0 display->drm->num_crtcs

drivers/gpu/drm/i915/display/intel_cdclk.c skl_cdclk_uninit_hw() -> skl_set_cdclk()

Type Parameter Key Value
PARAM_VALUE 0 display 4096-ptr_max
PARAM_VALUE 0 display->dbuf.enabled_slices 0
PARAM_VALUE 0 display->dmc.dmc->dc6_allowed.count 0-4294967295
PARAM_VALUE 0 display->dmc.dmc->dc6_allowed.dc5_start 0-4294967295
PARAM_VALUE 0 display->drm 0,4096-ptr_max
PARAM_VALUE 0 display->info.__device_info 4096-ptr_max
PARAM_VALUE 0 display->platform.broxton 0
PARAM_VALUE 0 display->pmdemand.lock.dep_map->name 0-255
PARAM_VALUE 0 display->pmdemand.lock.first_waiter 0,4096-ptr_max
PARAM_VALUE 0 display->pmdemand.lock.first_waiter->list.prev->next 5159360019465732096
PARAM_VALUE 0 display->pmdemand.lock.first_waiter->list.prev->prev 5159360019465732096
PARAM_VALUE 0 display->pmdemand.lock.first_waiter->task->blocked_lock.dep_map->name 0-255
PARAM_VALUE 0 display->pmdemand.lock.first_waiter->task->blocked_lock.owner (-1)
PARAM_VALUE 0 display->pmdemand.lock.first_waiter->task->blocked_lock.owner_cpu 4294967295
PARAM_VALUE 0 display->pmdemand.lock.first_waiter->task->blocked_lock.raw_lock.val.counter 0-s32max
PARAM_VALUE 0 display->pmdemand.lock.first_waiter->task->usage.refs.counter s32min-s32max
PARAM_VALUE 0 display->pmdemand.lock.osq.tail.counter 0-s32max
PARAM_VALUE 0 display->pmdemand.waitqueue.head.prev->next 4096-ptr_max
PARAM_VALUE 0 display->pmdemand.waitqueue.head.prev->next->next 4096-ptr_max
PARAM_VALUE 0 display->power.domains.lock.dep_map->name 0-255
PARAM_VALUE 0 display->power.domains.lock.first_waiter->list.prev->next 5159360019465732096
PARAM_VALUE 0 display->power.domains.lock.first_waiter->list.prev->prev 5159360019465732096
PARAM_VALUE 0 display->power.domains.lock.first_waiter->task->blocked_lock.dep_map->name 0-255
PARAM_VALUE 0 display->power.domains.lock.first_waiter->task->blocked_lock.owner (-1)
PARAM_VALUE 0 display->power.domains.lock.first_waiter->task->blocked_lock.owner_cpu 4294967295
PARAM_VALUE 0 display->power.domains.lock.first_waiter->task->blocked_lock.raw_lock.val.counter 0-s32max
PARAM_VALUE 0 display->power.domains.lock.first_waiter->task->usage.refs.counter s32min-s32max
PARAM_VALUE 0 display->power.domains.lock.osq.tail.counter 0-s32max
PARAM_VALUE 0 display->psr_dc5_dc6_wa_work.entry.next 4096-ptr_max
PARAM_VALUE 0 display->psr_dc5_dc6_wa_work.entry.next->prev 4096-ptr_max
PARAM_VALUE 0 display->wl.work.work.entry.next->next 1-u64max
PARAM_VALUE 0 display->wl.work.work.entry.next->prev 4096-ptr_max
PARAM_VALUE 0 display->wl.work.work.entry.prev->next 1-u64max
PARAM_VALUE 0 display->wl.work.work.entry.prev->prev 1-u64max
PARAM_VALUE 0 *display->irq.pipestat_irq_mask 0-4294967295
PARAM_VALUE 0 *display->power.chv_phy_assert 0-1
PARAM_VALUE 1 cdclk_config 7516267904997822464
PARAM_VALUE 1 cdclk_config->vco 0
PARAM_VALUE 1 cdclk_config->voltage_level 0-3
PARAM_VALUE 2 pipe (-1)
DATA_SOURCE 0 display $0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA 0 display->drm->mode_config.object_idr.idr_rt.xa_flags 0,4-u32max
HOST_DATA 0 display->power.domains.dc_state 0-u32max

drivers/gpu/drm/i915/display/intel_cdclk.c intel_cdclk_set_cdclk() -> (struct intel_cdclk_funcs)->set_cdclk()

Type Parameter Key Value
PARAM_VALUE 0 display 4096-ptr_max
PARAM_VALUE 0 display->cdclk.funcs 4096-ptr_max
PARAM_VALUE 0 display->cdclk.funcs->set_cdclk 981987470656221184,2279366636571783168,7605838049097428992,7713557352659574784,8715991085883871232
PARAM_VALUE 0 display->drm 0,4096-ptr_max
PARAM_VALUE 0 display->gmbus.mutex.dep_map->name 0-255
PARAM_VALUE 0 display->gmbus.mutex.first_waiter 0,4096-ptr_max
PARAM_VALUE 0 display->gmbus.mutex.first_waiter->list.prev->next 5159360019465732096
PARAM_VALUE 0 display->gmbus.mutex.osq.tail.counter 0-s32max
PARAM_VALUE 0 display->gmbus.mutex.wait_lock.dep_map->name 0-255
PARAM_VALUE 0 display->gmbus.mutex.wait_lock.owner (-1)
PARAM_VALUE 0 display->gmbus.mutex.wait_lock.owner_cpu u32max
PARAM_VALUE 0 display->wl.taken 1
PARAM_VALUE 0 display->wl.work->timer->entry.pprev 4096-ptr_max
PARAM_VALUE 0 display->wl.work.work.entry.next->next 1-u64max
PARAM_VALUE 0 display->wl.work.work.entry.next->prev 4096-ptr_max
PARAM_VALUE 0 display->wl.work.work.entry.prev->next 1-u64max
PARAM_VALUE 0 display->wl.work.work.entry.prev->prev 1-u64max
PARAM_VALUE 1 cdclk_config 4096-ptr_max
DATA_SOURCE 0 display $0
DATA_SOURCE 1 cdclk_config $1
DATA_SOURCE 2 pipe $2
STR_LEN 0 display 21-22
STR_LEN 0 display 21-22
CONTAINER 0 -8-0-520+0 $(-1)
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
LOCK2 0 &display->gmbus.mutex
HALF_LOCKED2 &pool->lock
TYPE_LOCK (struct intel_display)->gmbus.mutex