Defined in 2 files as a prototype:
- drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c, line 1855 (as a prototype)
- drivers/gpu/drm/radeon/si_dpm.c, line 1687 (as a prototype)
Defined in 2 files as a function:
- drivers/gpu/drm/amd/pm/legacy-dpm/si_dpm.c, line 3712 (as a function)
- drivers/gpu/drm/radeon/si_dpm.c, line 3138 (as a function)
Referenced in 2 files:
Smatch caller information:
drivers/gpu/drm/radeon/si_dpm.c si_convert_power_state_to_smc() -> si_write_smc_soft_register()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->mmio_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.high_pixelclock_count | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.dpm.new_active_crtc_count | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.dpm.requested_ps | 1-u64max |
| PARAM_VALUE | 0 | rdev->pm.dpm_enabled | 1 |
| PARAM_VALUE | 0 | rdev->pm.mclk_lock.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mclk_lock.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->pm.mclk_lock.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->pm.pm_method | 2 |
| PARAM_VALUE | 0 | rdev->ring_lock.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->ring_lock.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->ring_lock.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->ring_lock.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->ring_lock.wait_lock.raw_lock.val.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->smc_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 1 | reg_offset | 120 |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev->agp | (-1),144 |
| CAPPED_DATA | 0 | rdev->pm.dpm.num_ps | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.requested_ps | 1 |
| CAPPED_DATA | 0 | rdev->usec_timeout | 1 |
| DATA_SOURCE | 0 | rdev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| HOST_DATA | 0 | rdev->config.cik.tile_config | 0-16383[c] |
| HOST_DATA | 0 | rdev->config.r100.hdp_cntl | 0-u32max |
| HOST_DATA | 0 | rdev->config.r300.hdp_cntl | 0-u32max |
| HOST_DATA | 0 | rdev->config.r600.backend_map | 0-3[c] |
| HOST_DATA | 0 | rdev->config.r600.tile_config | 0-262143[c] |
| HOST_DATA | 0 | rdev->config.rv770.tile_config | 0,2048-u32max[c] |
| HOST_DATA | 0 | rdev->gart.num_cpu_pages | 0-524287[c] |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d1grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d2grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d3grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d4grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d5grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d6grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont2 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont3 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont4 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont5 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont6 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.r500.disp_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.r500.hdmi0_status | 0,268435456 |
| HOST_DATA | 0 | rdev->mc.aper_base | 0-1099511627775 |
| HOST_DATA | 0 | rdev->mc.gtt_size | 0-s32max[c] |
| HOST_DATA | 0 | rdev->mc.gtt_start | 0-u64max[c] |
| HOST_DATA | 0 | rdev->mc.mc_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.real_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.vram_end | 0-9223372039002259453,u64max[c] |
| HOST_DATA | 0 | rdev->mc.vram_start | 0-9223372036854775807[c] |
| HOST_DATA | 0 | rdev->num_gb_pipes | 2-4[c] |
| LOCK2 | &rdev->pm.mclk_lock | ||
| LOCK2 | &rdev->pm.mutex | ||
| LOCK2 | &rdev->ring_lock | ||
| HALF_LOCKED2 | &of->mutex | ||
| HALF_LOCKED2 | &pool->lock | ||
| HALF_LOCKED2 | &rdev->exclusive_lock | ||
| TYPE_LOCK | (struct radeon_device)->ring_lock | ||
| TYPE_LOCK | (struct radeon_pm)->mclk_lock | ||
| TYPE_LOCK | (struct radeon_pm)->mutex |
drivers/gpu/drm/radeon/si_dpm.c si_init_smc_table() -> si_write_smc_soft_register()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic->get_xclk | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->family | 52-56 |
| PARAM_VALUE | 0 | rdev->mmio_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.platform_caps | 2097152-u32max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->arb_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->bsp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->bsu | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->cac_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dsp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dte_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->fan_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mc_reg_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->papm_cfg_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pbsp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pbsu | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->psp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->soft_regs_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->spll_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->state_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->pm.pm_method | 2 |
| PARAM_VALUE | 0 | rdev->smc_fw | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->smc_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 1 | reg_offset | 256 |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev->agp | (-1),144 |
| CAPPED_DATA | 0 | rdev->rmmio_size | 1 |
| DATA_SOURCE | 0 | rdev | $0 |
| BIT_INFO | 0 | rdev->pm.dpm.platform_caps | 0x200000,0xffffffff |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| HOST_DATA | 0 | rdev->gart.num_cpu_pages | 0-524287[c] |
| HOST_DATA | 0 | rdev->mc.aper_base | 0-1099511627775[c] |
| HOST_DATA | 0 | rdev->mc.gtt_size | 0-s32max[c] |
| HOST_DATA | 0 | rdev->mc.gtt_start | 0-u64max[c] |
| HOST_DATA | 0 | rdev->mc.mc_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.real_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.vram_end | 0-4504699121172479,u64max[c] |
| HOST_DATA | 0 | rdev->mc.vram_start | 0-9223372036854775807[c] |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.current_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.default_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.num_power_states | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->rmmio_size | |
| LOCK2 | &rdev->pm.mutex | ||
| TYPE_LOCK | (struct radeon_pm)->mutex |
drivers/gpu/drm/radeon/si_dpm.c si_init_smc_table() -> si_write_smc_soft_register()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic->get_xclk | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->family | 52-56 |
| PARAM_VALUE | 0 | rdev->mmio_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->bios | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->fb_base | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->io_mode | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->mutex->first_waiter->task->blocked_lock.owner | (-4611686018427387904)-4611686018427387903 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->reg_block | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->scratch_mutex.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->scratch_mutex.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->scratch_mutex.first_waiter->list.prev->prev | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->scratch_mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.dpm.boot_ps | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->arb_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->bsp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->bsu | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->cac_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dsp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dte_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->fan_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mc_reg_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mvdd_control | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->papm_cfg_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pbsp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pbsu | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->psp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->soft_regs_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->spll_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->state_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->vddc_voltage_table.count | 1-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->pm.pm_method | 2 |
| PARAM_VALUE | 0 | rdev->smc_fw | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->smc_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 1 | reg_offset | 244 |
| PARAM_VALUE | 2 | value | 0-2,4,8,12,16 |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev->agp | (-1),144 |
| CAPPED_DATA | 0 | rdev->pm.dpm.priv->acpi_vddc | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.priv->mclk_stutter_mode_threshold | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.priv->ulv.pl.mclk | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.priv->ulv.pl.vddc | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.priv->vddc_voltage_table.count | 1 |
| CAPPED_DATA | 0 | rdev->rmmio_size | 1 |
| DATA_SOURCE | 0 | rdev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| HOST_DATA | 0 | rdev->gart.num_cpu_pages | 0-524287[c] |
| HOST_DATA | 0 | rdev->mc.aper_base | 0-1099511627775[c] |
| HOST_DATA | 0 | rdev->mc.gtt_size | 0-s32max[c] |
| HOST_DATA | 0 | rdev->mc.gtt_start | 0-u64max[c] |
| HOST_DATA | 0 | rdev->mc.mc_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.real_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.vram_end | 0-4504699121172479,u64max[c] |
| HOST_DATA | 0 | rdev->mc.vram_start | 0-9223372036854775807[c] |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.current_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.default_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.num_power_states | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->rmmio_size | |
| LOCK2 | &rdev->pm.mutex | ||
| TYPE_LOCK | (struct radeon_pm)->mutex |
drivers/gpu/drm/radeon/si_dpm.c si_initialize_smc_cac_tables() -> si_write_smc_soft_register()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic->get_xclk | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->family | 52-56 |
| PARAM_VALUE | 0 | rdev->mman.bdev.pool.dev->iommu->attach_deferred | 0-1 |
| PARAM_VALUE | 0 | rdev->mmio_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->fb_base | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->io_mode | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->mutex->first_waiter->task->blocked_lock.owner | (-4611686018427387904)-4611686018427387903 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->reg_block | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->scratch_mutex.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->scratch_mutex.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->scratch_mutex.first_waiter->list.prev->prev | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->scratch_mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pcie_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->pciep_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.boot_ps | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.dyn_state.cac_leakage_table.count | 1-u32max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->arb_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->bsp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->bsu | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->cac_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dsp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dte_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->fan_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mc_reg_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mvdd_control | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->papm_cfg_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pbsp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pbsu | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->powertune_data | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->powertune_data->leakage_coefficients.av | 51,4521550,7194395 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->powertune_data->leakage_coefficients.bv | 2957,309631529 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->powertune_data->lkge_lut_v0_percent | 12 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->psp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.flags | 0,2-254 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.level.SQPowerThrottle | 1073692671 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.level.SQPowerThrottle_2 | 2080325631 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.level.aT | u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.level.mcFlags | 0,3 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.level.mclk.vMCLK_PWRMGT_CNTL | 196608-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.level.sclk.vCG_SPLL_FUNC_CNTL_2 | 0,4-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.level.strobeMode | 0-31 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.levelCount | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.flags | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.ACIndex | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.MaxPoweredUpCU | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.SQPowerThrottle | 1073692671 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.SQPowerThrottle_2 | 2080325631 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.UVDWatermark | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.VCEWatermark | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.aT | u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.arbRefreshState | 0,2 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.bSP | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.displayWatermark | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.dpm2.MaxPS_StepDec | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.dpm2.MaxPS_StepInc | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.dpm2.PSDeltaLimit | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.dpm2.PSDeltaWin | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.dpm2.PSSamplingTime | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.dpm2.TgtAct | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.gen2PCIE | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.high_temp_vddc.index | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.high_temp_vddc.phase_settings | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.high_temp_vddc.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.hysteresisDown | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.hysteresisUp | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.low_temp_vddc.index | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.low_temp_vddc.phase_settings | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.low_temp_vddc.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mcFlags | 0-3,8-11,25-27 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.mclk_value | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vDLL_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMCLK_PWRMGT_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMPLL_AD_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMPLL_DQ_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMPLL_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMPLL_FUNC_CNTL_1 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMPLL_FUNC_CNTL_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMPLL_SS | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMPLL_SS2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mvdd.index | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mvdd.phase_settings | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mvdd.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.padding | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.sclk.sclk_value | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.sclk.vCG_SPLL_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.sclk.vCG_SPLL_FUNC_CNTL_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.sclk.vCG_SPLL_FUNC_CNTL_3 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.sclk.vCG_SPLL_FUNC_CNTL_4 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.sclk.vCG_SPLL_SPREAD_SPECTRUM | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.sclk.vCG_SPLL_SPREAD_SPECTRUM_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.stateFlags | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.std_vddc.phase_settings | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.std_vddc.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.strobeMode | 0-31 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.vddc.phase_settings | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.vddc.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.vddci.phase_settings | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.vddci.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.levelCount | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.padding2 | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.padding3 | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.driverState.flags | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.driverState.levelCount | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.extraFlags | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.flags | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.SQPowerThrottle | 1073692671 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.SQPowerThrottle_2 | 2080325631 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.aT | u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.bSP | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.gen2PCIE | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mcFlags | 0,3 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.mclk_value | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vDLL_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMCLK_PWRMGT_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMPLL_AD_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMPLL_DQ_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMPLL_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMPLL_FUNC_CNTL_1 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMPLL_FUNC_CNTL_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMPLL_SS | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMPLL_SS2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mvdd.index | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mvdd.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.sclk.sclk_value | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.sclk.vCG_SPLL_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.sclk.vCG_SPLL_FUNC_CNTL_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.sclk.vCG_SPLL_FUNC_CNTL_3 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.sclk.vCG_SPLL_FUNC_CNTL_4 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.sclk.vCG_SPLL_SPREAD_SPECTRUM | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.std_vddc.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.strobeMode | 0-31 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.vddc.phase_settings | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.vddc.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.vddci.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.levelCount | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.maxVDDCIndexInPPTable | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.systemFlags | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.thermalProtectType | 0-1,255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->soft_regs_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->spll_table_start | 1-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->state_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->pm.pm_method | 2 |
| PARAM_VALUE | 0 | rdev->smc_fw | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->smc_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->uvd.vcpu_bo->tbo.bdev->pool.dev->iommu->attach_deferred | 0-1 |
| PARAM_VALUE | 0 | rdev->wb.wb_obj->tbo.bdev->pool.dev->iommu->attach_deferred | 0-1 |
| PARAM_VALUE | 0 | *rdev->pm.dpm.priv->smc_statetable->lowSMIO | 0-4294967295 |
| PARAM_VALUE | 1 | reg_offset | 168 |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev->agp | (-1),144 |
| CAPPED_DATA | 0 | rdev->pm.dpm.dyn_state.cac_leakage_table.count | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.priv->acpi_vddc | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.priv->vddc_voltage_table.count | 1 |
| CAPPED_DATA | 0 | rdev->rmmio_size | 1 |
| DATA_SOURCE | 0 | rdev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HOST_DATA | 0 | rdev->gart.num_cpu_pages | 0-524287[c] |
| HOST_DATA | 0 | rdev->mc.aper_base | 0-1099511627775[c] |
| HOST_DATA | 0 | rdev->mc.gtt_size | 0-s32max[c] |
| HOST_DATA | 0 | rdev->mc.gtt_start | 0-u64max[c] |
| HOST_DATA | 0 | rdev->mc.mc_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.real_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.vram_end | 0-4504699121172479,u64max[c] |
| HOST_DATA | 0 | rdev->mc.vram_start | 0-9223372036854775807[c] |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.current_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.default_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.num_power_states | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->rmmio_size | |
| LOCK2 | &rdev->pm.mutex | ||
| TYPE_LOCK | (struct radeon_pm)->mutex |
drivers/gpu/drm/radeon/si_dpm.c si_populate_mc_reg_table() -> si_write_smc_soft_register()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic->get_xclk | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->family | 52-56 |
| PARAM_VALUE | 0 | rdev->mman.bdev.pool.dev->iommu->attach_deferred | 0-1 |
| PARAM_VALUE | 0 | rdev->mmio_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->fb_base | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->io_mode | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->mutex->first_waiter->task->blocked_lock.owner | (-4611686018427387904)-4611686018427387903 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->reg_block | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->scratch_mutex.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->scratch_mutex.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->scratch_mutex.first_waiter->list.prev->prev | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->scratch_mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pcie_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->pciep_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.boot_ps | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->arb_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->bsp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->bsu | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->cac_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dsp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dte_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->fan_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mc_reg_table.last | 0 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mc_reg_table.valid_flag | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mc_reg_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mvdd_control | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->papm_cfg_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pbsp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pbsu | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->psp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.flags | 0,2-254 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.level.SQPowerThrottle | 1073692671 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.level.SQPowerThrottle_2 | 2080325631 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.level.aT | u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.level.mcFlags | 0,3 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.level.mclk.vMCLK_PWRMGT_CNTL | 196608-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.level.sclk.vCG_SPLL_FUNC_CNTL_2 | 0,4-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.level.strobeMode | 0-31 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.levelCount | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.flags | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.ACIndex | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.MaxPoweredUpCU | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.SQPowerThrottle | 1073692671 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.SQPowerThrottle_2 | 2080325631 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.UVDWatermark | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.VCEWatermark | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.aT | u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.arbRefreshState | 0,2 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.bSP | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.displayWatermark | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.dpm2.MaxPS_StepDec | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.dpm2.MaxPS_StepInc | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.dpm2.PSDeltaLimit | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.dpm2.PSDeltaWin | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.dpm2.PSSamplingTime | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.dpm2.TgtAct | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.gen2PCIE | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.high_temp_vddc.index | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.high_temp_vddc.phase_settings | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.high_temp_vddc.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.hysteresisDown | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.hysteresisUp | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.low_temp_vddc.index | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.low_temp_vddc.phase_settings | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.low_temp_vddc.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mcFlags | 0-3,8-11,25-27 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.mclk_value | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vDLL_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMCLK_PWRMGT_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMPLL_AD_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMPLL_DQ_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMPLL_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMPLL_FUNC_CNTL_1 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMPLL_FUNC_CNTL_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMPLL_SS | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMPLL_SS2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mvdd.index | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mvdd.phase_settings | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mvdd.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.padding | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.sclk.sclk_value | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.sclk.vCG_SPLL_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.sclk.vCG_SPLL_FUNC_CNTL_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.sclk.vCG_SPLL_FUNC_CNTL_3 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.sclk.vCG_SPLL_FUNC_CNTL_4 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.sclk.vCG_SPLL_SPREAD_SPECTRUM | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.sclk.vCG_SPLL_SPREAD_SPECTRUM_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.stateFlags | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.std_vddc.phase_settings | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.std_vddc.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.strobeMode | 0-31 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.vddc.phase_settings | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.vddc.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.vddci.phase_settings | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.vddci.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.levelCount | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.padding2 | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.padding3 | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.driverState.flags | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.driverState.levelCount | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.extraFlags | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.flags | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.SQPowerThrottle | 1073692671 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.SQPowerThrottle_2 | 2080325631 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.aT | u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.bSP | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.gen2PCIE | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mcFlags | 0,3 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.mclk_value | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vDLL_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMCLK_PWRMGT_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMPLL_AD_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMPLL_DQ_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMPLL_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMPLL_FUNC_CNTL_1 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMPLL_FUNC_CNTL_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMPLL_SS | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMPLL_SS2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mvdd.index | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mvdd.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.sclk.sclk_value | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.sclk.vCG_SPLL_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.sclk.vCG_SPLL_FUNC_CNTL_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.sclk.vCG_SPLL_FUNC_CNTL_3 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.sclk.vCG_SPLL_FUNC_CNTL_4 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.sclk.vCG_SPLL_SPREAD_SPECTRUM | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.std_vddc.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.strobeMode | 0-31 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.vddc.phase_settings | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.vddc.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.vddci.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.levelCount | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.maxVDDCIndexInPPTable | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.systemFlags | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.thermalProtectType | 0-1,255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->soft_regs_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->spll_table_start | 1-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->state_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->pm.pm_method | 2 |
| PARAM_VALUE | 0 | rdev->smc_fw | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->smc_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->uvd.vcpu_bo->tbo.bdev->pool.dev->iommu->attach_deferred | 0-1 |
| PARAM_VALUE | 0 | rdev->wb.wb_obj->tbo.bdev->pool.dev->iommu->attach_deferred | 0-1 |
| PARAM_VALUE | 0 | *rdev->pm.dpm.priv->smc_statetable->lowSMIO | 0-4294967295 |
| PARAM_VALUE | 1 | reg_offset | 92 |
| PARAM_VALUE | 2 | value | 1 |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev->agp | (-1),144 |
| CAPPED_DATA | 0 | rdev->pm.dpm.priv->acpi_vddc | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.priv->vddc_voltage_table.count | 1 |
| CAPPED_DATA | 0 | rdev->rmmio_size | 1 |
| DATA_SOURCE | 0 | rdev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| HOST_DATA | 0 | rdev->gart.num_cpu_pages | 0-524287[c] |
| HOST_DATA | 0 | rdev->mc.aper_base | 0-1099511627775[c] |
| HOST_DATA | 0 | rdev->mc.gtt_size | 0-s32max[c] |
| HOST_DATA | 0 | rdev->mc.gtt_start | 0-u64max[c] |
| HOST_DATA | 0 | rdev->mc.mc_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.real_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.vram_end | 0-4504699121172479,u64max[c] |
| HOST_DATA | 0 | rdev->mc.vram_start | 0-9223372036854775807[c] |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.current_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.default_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.num_power_states | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->rmmio_size | |
| LOCK2 | &rdev->pm.mutex | ||
| TYPE_LOCK | (struct radeon_pm)->mutex |
drivers/gpu/drm/radeon/si_dpm.c si_populate_smc_voltage_tables() -> si_write_smc_soft_register()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic->get_xclk | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->family | 52-56 |
| PARAM_VALUE | 0 | rdev->mmio_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->arb_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->bsp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->bsu | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->cac_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dsp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dte_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->fan_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mc_reg_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->papm_cfg_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pbsp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pbsu | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->psp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->soft_regs_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->spll_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->state_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.raw_lock.val.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.pm_method | 2 |
| PARAM_VALUE | 0 | rdev->smc_fw | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->smc_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 1 | reg_offset | 288 |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev->agp | (-1),144 |
| CAPPED_DATA | 0 | rdev->rmmio_size | 1 |
| DATA_SOURCE | 0 | rdev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| HOST_DATA | 0 | rdev->config.cik.tile_config | 0-16383[c] |
| HOST_DATA | 0 | rdev->config.r100.hdp_cntl | 0-u32max |
| HOST_DATA | 0 | rdev->config.r300.hdp_cntl | 0-u32max |
| HOST_DATA | 0 | rdev->config.r600.backend_map | 0-3[c] |
| HOST_DATA | 0 | rdev->config.r600.tile_config | 0-262143[c] |
| HOST_DATA | 0 | rdev->config.rv770.tile_config | 0,2048-u32max[c] |
| HOST_DATA | 0 | rdev->gart.num_cpu_pages | 0-524287[c] |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d1grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d2grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d3grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d4grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d5grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d6grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont2 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont3 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont4 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont5 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont6 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.r500.disp_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.r500.hdmi0_status | 0,268435456 |
| HOST_DATA | 0 | rdev->mc.aper_base | 0-1099511627775 |
| HOST_DATA | 0 | rdev->mc.gtt_size | 0-s32max[c] |
| HOST_DATA | 0 | rdev->mc.gtt_start | 0-u64max[c] |
| HOST_DATA | 0 | rdev->mc.mc_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.real_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.vram_end | 0-9223372039002259453,u64max[c] |
| HOST_DATA | 0 | rdev->mc.vram_start | 0-9223372036854775807[c] |
| HOST_DATA | 0 | rdev->num_gb_pipes | 2-4[c] |
| NO_OVERFLOW_SIMPLE | 0 | rdev->gart.table_size | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.current_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.default_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.num_power_states | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->rmmio_size | |
| LOCK2 | &rdev->pm.mutex | ||
| TYPE_LOCK | (struct radeon_pm)->mutex |
drivers/gpu/drm/radeon/si_dpm.c si_populate_smc_voltage_tables() -> si_write_smc_soft_register()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic->get_xclk | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->family | 52-56 |
| PARAM_VALUE | 0 | rdev->mmio_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->arb_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->bsp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->bsu | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->cac_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dsp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dte_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->fan_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mc_reg_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->papm_cfg_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pbsp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pbsu | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->psp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->soft_regs_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->spll_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->state_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.raw_lock.val.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.pm_method | 2 |
| PARAM_VALUE | 0 | rdev->smc_fw | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->smc_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 1 | reg_offset | 284 |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev->agp | (-1),144 |
| CAPPED_DATA | 0 | rdev->rmmio_size | 1 |
| DATA_SOURCE | 0 | rdev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| HOST_DATA | 0 | rdev->config.cik.tile_config | 0-16383[c] |
| HOST_DATA | 0 | rdev->config.r100.hdp_cntl | 0-u32max |
| HOST_DATA | 0 | rdev->config.r300.hdp_cntl | 0-u32max |
| HOST_DATA | 0 | rdev->config.r600.backend_map | 0-3[c] |
| HOST_DATA | 0 | rdev->config.r600.tile_config | 0-262143[c] |
| HOST_DATA | 0 | rdev->config.rv770.tile_config | 0,2048-u32max[c] |
| HOST_DATA | 0 | rdev->gart.num_cpu_pages | 0-524287[c] |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d1grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d2grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d3grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d4grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d5grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d6grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont2 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont3 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont4 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont5 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont6 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.r500.disp_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.r500.hdmi0_status | 0,268435456 |
| HOST_DATA | 0 | rdev->mc.aper_base | 0-1099511627775 |
| HOST_DATA | 0 | rdev->mc.gtt_size | 0-s32max[c] |
| HOST_DATA | 0 | rdev->mc.gtt_start | 0-u64max[c] |
| HOST_DATA | 0 | rdev->mc.mc_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.real_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.vram_end | 0-9223372039002259453,u64max[c] |
| HOST_DATA | 0 | rdev->mc.vram_start | 0-9223372036854775807[c] |
| HOST_DATA | 0 | rdev->num_gb_pipes | 2-4[c] |
| NO_OVERFLOW_SIMPLE | 0 | rdev->gart.table_size | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.current_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.default_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.num_power_states | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->rmmio_size | |
| LOCK2 | &rdev->pm.mutex | ||
| TYPE_LOCK | (struct radeon_pm)->mutex |
drivers/gpu/drm/radeon/si_dpm.c si_populate_smc_voltage_tables() -> si_write_smc_soft_register()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic->get_xclk | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->family | 52-56 |
| PARAM_VALUE | 0 | rdev->mmio_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->arb_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->bsp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->bsu | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->cac_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dsp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dte_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->fan_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mc_reg_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->papm_cfg_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pbsp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pbsu | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->psp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->soft_regs_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->spll_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->state_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.raw_lock.val.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.pm_method | 2 |
| PARAM_VALUE | 0 | rdev->smc_fw | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->smc_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 1 | reg_offset | 280 |
| PARAM_VALUE | 2 | value | 2 |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev->agp | (-1),144 |
| CAPPED_DATA | 0 | rdev->rmmio_size | 1 |
| DATA_SOURCE | 0 | rdev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| HOST_DATA | 0 | rdev->config.cik.tile_config | 0-16383[c] |
| HOST_DATA | 0 | rdev->config.r100.hdp_cntl | 0-u32max |
| HOST_DATA | 0 | rdev->config.r300.hdp_cntl | 0-u32max |
| HOST_DATA | 0 | rdev->config.r600.backend_map | 0-3[c] |
| HOST_DATA | 0 | rdev->config.r600.tile_config | 0-262143[c] |
| HOST_DATA | 0 | rdev->config.rv770.tile_config | 0,2048-u32max[c] |
| HOST_DATA | 0 | rdev->gart.num_cpu_pages | 0-524287[c] |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d1grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d2grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d3grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d4grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d5grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d6grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont2 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont3 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont4 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont5 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont6 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.r500.disp_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.r500.hdmi0_status | 0,268435456 |
| HOST_DATA | 0 | rdev->mc.aper_base | 0-1099511627775 |
| HOST_DATA | 0 | rdev->mc.gtt_size | 0-s32max[c] |
| HOST_DATA | 0 | rdev->mc.gtt_start | 0-u64max[c] |
| HOST_DATA | 0 | rdev->mc.mc_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.real_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.vram_end | 0-9223372039002259453,u64max[c] |
| HOST_DATA | 0 | rdev->mc.vram_start | 0-9223372036854775807[c] |
| HOST_DATA | 0 | rdev->num_gb_pipes | 2-4[c] |
| NO_OVERFLOW_SIMPLE | 0 | rdev->gart.table_size | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.current_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.default_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.num_power_states | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->rmmio_size | |
| LOCK2 | &rdev->pm.mutex | ||
| TYPE_LOCK | (struct radeon_pm)->mutex |
drivers/gpu/drm/radeon/si_dpm.c si_populate_smc_voltage_tables() -> si_write_smc_soft_register()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic->get_xclk | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->family | 52-56 |
| PARAM_VALUE | 0 | rdev->mmio_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->arb_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->bsp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->bsu | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->cac_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dsp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dte_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->fan_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mc_reg_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->papm_cfg_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pbsp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pbsu | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->psp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->soft_regs_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->spll_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->state_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.raw_lock.val.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.pm_method | 2 |
| PARAM_VALUE | 0 | rdev->smc_fw | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->smc_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 1 | reg_offset | 136 |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev->agp | (-1),144 |
| CAPPED_DATA | 0 | rdev->pm.dpm.dyn_state.phase_shedding_limits_table.count | 1 |
| CAPPED_DATA | 0 | rdev->rmmio_size | 1 |
| DATA_SOURCE | 0 | rdev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| HOST_DATA | 0 | rdev->config.cik.tile_config | 0-16383[c] |
| HOST_DATA | 0 | rdev->config.r100.hdp_cntl | 0-u32max |
| HOST_DATA | 0 | rdev->config.r300.hdp_cntl | 0-u32max |
| HOST_DATA | 0 | rdev->config.r600.backend_map | 0-3[c] |
| HOST_DATA | 0 | rdev->config.r600.tile_config | 0-262143[c] |
| HOST_DATA | 0 | rdev->config.rv770.tile_config | 0,2048-u32max[c] |
| HOST_DATA | 0 | rdev->gart.num_cpu_pages | 0-524287[c] |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d1grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d2grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d3grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d4grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d5grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d6grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont2 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont3 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont4 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont5 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont6 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.r500.disp_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.r500.hdmi0_status | 0,268435456 |
| HOST_DATA | 0 | rdev->mc.aper_base | 0-1099511627775 |
| HOST_DATA | 0 | rdev->mc.gtt_size | 0-s32max[c] |
| HOST_DATA | 0 | rdev->mc.gtt_start | 0-u64max[c] |
| HOST_DATA | 0 | rdev->mc.mc_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.real_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.vram_end | 0-9223372039002259453,u64max[c] |
| HOST_DATA | 0 | rdev->mc.vram_start | 0-9223372036854775807[c] |
| HOST_DATA | 0 | rdev->num_gb_pipes | 2-4[c] |
| NO_OVERFLOW_SIMPLE | 0 | rdev->gart.table_size | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.current_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.default_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.num_power_states | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->rmmio_size | |
| LOCK2 | &rdev->pm.mutex | ||
| TYPE_LOCK | (struct radeon_pm)->mutex |
drivers/gpu/drm/radeon/si_dpm.c si_program_response_times() -> si_write_smc_soft_register()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic->get_xclk | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->family | 52-56 |
| PARAM_VALUE | 0 | rdev->mman.bdev.pool.dev->iommu->attach_deferred | 0-1 |
| PARAM_VALUE | 0 | rdev->mmio_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->fb_base | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->io_mode | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->mutex->first_waiter->task->blocked_lock.owner | (-4611686018427387904)-4611686018427387903 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->reg_block | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->scratch_mutex.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->scratch_mutex.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->scratch_mutex.first_waiter->list.prev->prev | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->scratch_mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pcie_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->pciep_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.boot_ps | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->arb_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->bsp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->bsu | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->cac_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dsp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dte_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->fan_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mc_reg_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mvdd_control | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->papm_cfg_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->papm_parm.NearTDPLimitPAPM | 4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->papm_parm.NearTDPLimitTherm | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->papm_parm.PlatformPowerLimit | 4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->papm_parm.dGPU_T_Hysteresis | 5 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->papm_parm.dGPU_T_Limit | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->papm_parm.dGPU_T_Warning | 95 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pbsp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pbsu | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->psp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.flags | 0,2-254 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.level.SQPowerThrottle | 0,1073692671 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.level.SQPowerThrottle_2 | 0,2080325631 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.level.aT | 0,u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.level.mcFlags | 0,3 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.level.mclk.vMCLK_PWRMGT_CNTL | 0,196608-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.level.sclk.vCG_SPLL_FUNC_CNTL_2 | 0,4-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.level.strobeMode | 0-31 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.levelCount | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.flags | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.ACIndex | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.MaxPoweredUpCU | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.SQPowerThrottle | 0,1073692671 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.SQPowerThrottle_2 | 0,2080325631 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.UVDWatermark | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.VCEWatermark | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.aT | 0,u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.arbRefreshState | 0,2 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.bSP | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.displayWatermark | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.dpm2.MaxPS_StepDec | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.dpm2.MaxPS_StepInc | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.dpm2.PSDeltaLimit | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.dpm2.PSDeltaWin | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.dpm2.PSSamplingTime | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.dpm2.TgtAct | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.gen2PCIE | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.high_temp_vddc.index | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.high_temp_vddc.phase_settings | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.high_temp_vddc.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.hysteresisDown | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.hysteresisUp | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.low_temp_vddc.index | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.low_temp_vddc.phase_settings | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.low_temp_vddc.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mcFlags | 0-3,8-11,25-27 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.mclk_value | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vDLL_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMCLK_PWRMGT_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMPLL_AD_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMPLL_DQ_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMPLL_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMPLL_FUNC_CNTL_1 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMPLL_FUNC_CNTL_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMPLL_SS | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMPLL_SS2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mvdd.index | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mvdd.phase_settings | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mvdd.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.padding | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.sclk.sclk_value | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.sclk.vCG_SPLL_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.sclk.vCG_SPLL_FUNC_CNTL_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.sclk.vCG_SPLL_FUNC_CNTL_3 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.sclk.vCG_SPLL_FUNC_CNTL_4 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.sclk.vCG_SPLL_SPREAD_SPECTRUM | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.sclk.vCG_SPLL_SPREAD_SPECTRUM_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.stateFlags | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.std_vddc.phase_settings | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.std_vddc.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.strobeMode | 0-31 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.vddc.phase_settings | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.vddc.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.vddci.phase_settings | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.vddci.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.levelCount | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.padding2 | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.padding3 | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.dpm2Params.NearTDPLimit | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.dpm2Params.SafePowerLimit | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.dpm2Params.TDPLimit | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.driverState.flags | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.driverState.levelCount | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.extraFlags | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.flags | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.SQPowerThrottle | 0,1073692671 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.SQPowerThrottle_2 | 0,2080325631 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.aT | 0,u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.bSP | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.gen2PCIE | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mcFlags | 0,3 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.mclk_value | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vDLL_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMCLK_PWRMGT_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMPLL_AD_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMPLL_DQ_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMPLL_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMPLL_FUNC_CNTL_1 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMPLL_FUNC_CNTL_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMPLL_SS | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMPLL_SS2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mvdd.index | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mvdd.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.sclk.sclk_value | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.sclk.vCG_SPLL_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.sclk.vCG_SPLL_FUNC_CNTL_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.sclk.vCG_SPLL_FUNC_CNTL_3 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.sclk.vCG_SPLL_FUNC_CNTL_4 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.sclk.vCG_SPLL_SPREAD_SPECTRUM | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.std_vddc.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.strobeMode | 0-31 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.vddc.phase_settings | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.vddc.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.vddci.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.levelCount | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.maxVDDCIndexInPPTable | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.systemFlags | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.thermalProtectType | 0-1,255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->soft_regs_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->spll_table_start | 1-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->state_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->pm.pm_method | 2 |
| PARAM_VALUE | 0 | rdev->smc_fw | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->smc_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->uvd.vcpu_bo->tbo.bdev->pool.dev->iommu->attach_deferred | 0-1 |
| PARAM_VALUE | 0 | rdev->wb.wb_obj->tbo.bdev->pool.dev->iommu->attach_deferred | 0-1 |
| PARAM_VALUE | 0 | *rdev->pm.dpm.priv->smc_statetable->lowSMIO | 0-4294967295 |
| PARAM_VALUE | 1 | reg_offset | 96 |
| PARAM_VALUE | 2 | value | 1 |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev->agp | (-1),144 |
| CAPPED_DATA | 0 | rdev->pm.dpm.priv->acpi_vddc | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.priv->vddc_voltage_table.count | 1 |
| CAPPED_DATA | 0 | rdev->rmmio_size | 1 |
| DATA_SOURCE | 0 | rdev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| HOST_DATA | 0 | rdev->gart.num_cpu_pages | 0-524287[c] |
| HOST_DATA | 0 | rdev->mc.aper_base | 0-1099511627775[c] |
| HOST_DATA | 0 | rdev->mc.gtt_size | 0-s32max[c] |
| HOST_DATA | 0 | rdev->mc.gtt_start | 0-u64max[c] |
| HOST_DATA | 0 | rdev->mc.mc_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.real_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.vram_end | 0-4504699121172479,u64max[c] |
| HOST_DATA | 0 | rdev->mc.vram_start | 0-9223372036854775807[c] |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.current_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.default_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.num_power_states | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->rmmio_size | |
| LOCK2 | &rdev->pm.mutex | ||
| TYPE_LOCK | (struct radeon_pm)->mutex |
drivers/gpu/drm/radeon/si_dpm.c si_program_response_times() -> si_write_smc_soft_register()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic->get_xclk | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->family | 52-56 |
| PARAM_VALUE | 0 | rdev->mman.bdev.pool.dev->iommu->attach_deferred | 0-1 |
| PARAM_VALUE | 0 | rdev->mmio_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->fb_base | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->io_mode | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->mutex->first_waiter->task->blocked_lock.owner | (-4611686018427387904)-4611686018427387903 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->reg_block | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->scratch_mutex.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->scratch_mutex.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->scratch_mutex.first_waiter->list.prev->prev | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->scratch_mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pcie_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->pciep_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.boot_ps | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->arb_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->bsp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->bsu | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->cac_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dsp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dte_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->fan_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mc_reg_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mvdd_control | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->papm_cfg_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->papm_parm.NearTDPLimitPAPM | 4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->papm_parm.NearTDPLimitTherm | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->papm_parm.PlatformPowerLimit | 4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->papm_parm.dGPU_T_Hysteresis | 5 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->papm_parm.dGPU_T_Limit | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->papm_parm.dGPU_T_Warning | 95 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pbsp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pbsu | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->psp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.flags | 0,2-254 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.level.SQPowerThrottle | 0,1073692671 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.level.SQPowerThrottle_2 | 0,2080325631 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.level.aT | 0,u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.level.mcFlags | 0,3 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.level.mclk.vMCLK_PWRMGT_CNTL | 0,196608-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.level.sclk.vCG_SPLL_FUNC_CNTL_2 | 0,4-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.level.strobeMode | 0-31 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.levelCount | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.flags | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.ACIndex | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.MaxPoweredUpCU | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.SQPowerThrottle | 0,1073692671 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.SQPowerThrottle_2 | 0,2080325631 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.UVDWatermark | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.VCEWatermark | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.aT | 0,u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.arbRefreshState | 0,2 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.bSP | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.displayWatermark | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.dpm2.MaxPS_StepDec | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.dpm2.MaxPS_StepInc | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.dpm2.PSDeltaLimit | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.dpm2.PSDeltaWin | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.dpm2.PSSamplingTime | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.dpm2.TgtAct | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.gen2PCIE | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.high_temp_vddc.index | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.high_temp_vddc.phase_settings | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.high_temp_vddc.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.hysteresisDown | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.hysteresisUp | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.low_temp_vddc.index | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.low_temp_vddc.phase_settings | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.low_temp_vddc.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mcFlags | 0-3,8-11,25-27 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.mclk_value | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vDLL_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMCLK_PWRMGT_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMPLL_AD_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMPLL_DQ_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMPLL_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMPLL_FUNC_CNTL_1 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMPLL_FUNC_CNTL_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMPLL_SS | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMPLL_SS2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mvdd.index | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mvdd.phase_settings | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mvdd.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.padding | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.sclk.sclk_value | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.sclk.vCG_SPLL_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.sclk.vCG_SPLL_FUNC_CNTL_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.sclk.vCG_SPLL_FUNC_CNTL_3 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.sclk.vCG_SPLL_FUNC_CNTL_4 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.sclk.vCG_SPLL_SPREAD_SPECTRUM | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.sclk.vCG_SPLL_SPREAD_SPECTRUM_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.stateFlags | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.std_vddc.phase_settings | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.std_vddc.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.strobeMode | 0-31 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.vddc.phase_settings | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.vddc.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.vddci.phase_settings | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.vddci.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.levelCount | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.padding2 | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.padding3 | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.dpm2Params.NearTDPLimit | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.dpm2Params.SafePowerLimit | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.dpm2Params.TDPLimit | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.driverState.flags | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.driverState.levelCount | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.extraFlags | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.flags | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.SQPowerThrottle | 0,1073692671 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.SQPowerThrottle_2 | 0,2080325631 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.aT | 0,u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.bSP | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.gen2PCIE | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mcFlags | 0,3 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.mclk_value | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vDLL_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMCLK_PWRMGT_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMPLL_AD_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMPLL_DQ_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMPLL_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMPLL_FUNC_CNTL_1 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMPLL_FUNC_CNTL_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMPLL_SS | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMPLL_SS2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mvdd.index | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mvdd.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.sclk.sclk_value | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.sclk.vCG_SPLL_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.sclk.vCG_SPLL_FUNC_CNTL_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.sclk.vCG_SPLL_FUNC_CNTL_3 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.sclk.vCG_SPLL_FUNC_CNTL_4 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.sclk.vCG_SPLL_SPREAD_SPECTRUM | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.std_vddc.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.strobeMode | 0-31 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.vddc.phase_settings | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.vddc.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.vddci.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.levelCount | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.maxVDDCIndexInPPTable | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.systemFlags | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.thermalProtectType | 0-1,255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->soft_regs_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->spll_table_start | 1-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->state_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->pm.pm_method | 2 |
| PARAM_VALUE | 0 | rdev->smc_fw | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->smc_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->uvd.vcpu_bo->tbo.bdev->pool.dev->iommu->attach_deferred | 0-1 |
| PARAM_VALUE | 0 | rdev->wb.wb_obj->tbo.bdev->pool.dev->iommu->attach_deferred | 0-1 |
| PARAM_VALUE | 0 | *rdev->pm.dpm.priv->smc_statetable->lowSMIO | 0-4294967295 |
| PARAM_VALUE | 1 | reg_offset | 12 |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev->agp | (-1),144 |
| CAPPED_DATA | 0 | rdev->pm.dpm.priv->acpi_vddc | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.priv->vddc_voltage_table.count | 1 |
| CAPPED_DATA | 0 | rdev->rmmio_size | 1 |
| DATA_SOURCE | 0 | rdev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| HOST_DATA | 0 | rdev->gart.num_cpu_pages | 0-524287[c] |
| HOST_DATA | 0 | rdev->mc.aper_base | 0-1099511627775[c] |
| HOST_DATA | 0 | rdev->mc.gtt_size | 0-s32max[c] |
| HOST_DATA | 0 | rdev->mc.gtt_start | 0-u64max[c] |
| HOST_DATA | 0 | rdev->mc.mc_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.real_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.vram_end | 0-4504699121172479,u64max[c] |
| HOST_DATA | 0 | rdev->mc.vram_start | 0-9223372036854775807[c] |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.current_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.default_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.num_power_states | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->rmmio_size | |
| LOCK2 | &rdev->pm.mutex | ||
| TYPE_LOCK | (struct radeon_pm)->mutex |
drivers/gpu/drm/radeon/si_dpm.c si_program_response_times() -> si_write_smc_soft_register()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic->get_xclk | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->family | 52-56 |
| PARAM_VALUE | 0 | rdev->mman.bdev.pool.dev->iommu->attach_deferred | 0-1 |
| PARAM_VALUE | 0 | rdev->mmio_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->fb_base | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->io_mode | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->mutex->first_waiter->task->blocked_lock.owner | (-4611686018427387904)-4611686018427387903 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->reg_block | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->scratch_mutex.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->scratch_mutex.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->scratch_mutex.first_waiter->list.prev->prev | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->scratch_mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pcie_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->pciep_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.boot_ps | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->arb_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->bsp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->bsu | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->cac_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dsp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dte_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->fan_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mc_reg_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mvdd_control | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->papm_cfg_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->papm_parm.NearTDPLimitPAPM | 4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->papm_parm.NearTDPLimitTherm | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->papm_parm.PlatformPowerLimit | 4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->papm_parm.dGPU_T_Hysteresis | 5 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->papm_parm.dGPU_T_Limit | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->papm_parm.dGPU_T_Warning | 95 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pbsp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pbsu | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->psp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.flags | 0,2-254 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.level.SQPowerThrottle | 0,1073692671 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.level.SQPowerThrottle_2 | 0,2080325631 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.level.aT | 0,u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.level.mcFlags | 0,3 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.level.mclk.vMCLK_PWRMGT_CNTL | 0,196608-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.level.sclk.vCG_SPLL_FUNC_CNTL_2 | 0,4-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.level.strobeMode | 0-31 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.levelCount | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.flags | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.ACIndex | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.MaxPoweredUpCU | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.SQPowerThrottle | 0,1073692671 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.SQPowerThrottle_2 | 0,2080325631 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.UVDWatermark | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.VCEWatermark | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.aT | 0,u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.arbRefreshState | 0,2 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.bSP | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.displayWatermark | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.dpm2.MaxPS_StepDec | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.dpm2.MaxPS_StepInc | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.dpm2.PSDeltaLimit | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.dpm2.PSDeltaWin | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.dpm2.PSSamplingTime | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.dpm2.TgtAct | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.gen2PCIE | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.high_temp_vddc.index | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.high_temp_vddc.phase_settings | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.high_temp_vddc.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.hysteresisDown | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.hysteresisUp | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.low_temp_vddc.index | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.low_temp_vddc.phase_settings | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.low_temp_vddc.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mcFlags | 0-3,8-11,25-27 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.mclk_value | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vDLL_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMCLK_PWRMGT_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMPLL_AD_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMPLL_DQ_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMPLL_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMPLL_FUNC_CNTL_1 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMPLL_FUNC_CNTL_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMPLL_SS | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMPLL_SS2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mvdd.index | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mvdd.phase_settings | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mvdd.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.padding | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.sclk.sclk_value | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.sclk.vCG_SPLL_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.sclk.vCG_SPLL_FUNC_CNTL_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.sclk.vCG_SPLL_FUNC_CNTL_3 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.sclk.vCG_SPLL_FUNC_CNTL_4 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.sclk.vCG_SPLL_SPREAD_SPECTRUM | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.sclk.vCG_SPLL_SPREAD_SPECTRUM_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.stateFlags | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.std_vddc.phase_settings | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.std_vddc.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.strobeMode | 0-31 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.vddc.phase_settings | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.vddc.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.vddci.phase_settings | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.vddci.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.levelCount | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.padding2 | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.padding3 | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.dpm2Params.NearTDPLimit | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.dpm2Params.SafePowerLimit | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.dpm2Params.TDPLimit | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.driverState.flags | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.driverState.levelCount | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.extraFlags | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.flags | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.SQPowerThrottle | 0,1073692671 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.SQPowerThrottle_2 | 0,2080325631 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.aT | 0,u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.bSP | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.gen2PCIE | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mcFlags | 0,3 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.mclk_value | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vDLL_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMCLK_PWRMGT_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMPLL_AD_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMPLL_DQ_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMPLL_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMPLL_FUNC_CNTL_1 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMPLL_FUNC_CNTL_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMPLL_SS | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMPLL_SS2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mvdd.index | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mvdd.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.sclk.sclk_value | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.sclk.vCG_SPLL_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.sclk.vCG_SPLL_FUNC_CNTL_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.sclk.vCG_SPLL_FUNC_CNTL_3 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.sclk.vCG_SPLL_FUNC_CNTL_4 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.sclk.vCG_SPLL_SPREAD_SPECTRUM | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.std_vddc.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.strobeMode | 0-31 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.vddc.phase_settings | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.vddc.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.vddci.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.levelCount | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.maxVDDCIndexInPPTable | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.systemFlags | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.thermalProtectType | 0-1,255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->soft_regs_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->spll_table_start | 1-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->state_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->pm.pm_method | 2 |
| PARAM_VALUE | 0 | rdev->smc_fw | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->smc_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->uvd.vcpu_bo->tbo.bdev->pool.dev->iommu->attach_deferred | 0-1 |
| PARAM_VALUE | 0 | rdev->wb.wb_obj->tbo.bdev->pool.dev->iommu->attach_deferred | 0-1 |
| PARAM_VALUE | 0 | *rdev->pm.dpm.priv->smc_statetable->lowSMIO | 0-4294967295 |
| PARAM_VALUE | 1 | reg_offset | 40 |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev->agp | (-1),144 |
| CAPPED_DATA | 0 | rdev->pm.dpm.priv->acpi_vddc | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.priv->vddc_voltage_table.count | 1 |
| CAPPED_DATA | 0 | rdev->rmmio_size | 1 |
| DATA_SOURCE | 0 | rdev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| HOST_DATA | 0 | rdev->gart.num_cpu_pages | 0-524287[c] |
| HOST_DATA | 0 | rdev->mc.aper_base | 0-1099511627775[c] |
| HOST_DATA | 0 | rdev->mc.gtt_size | 0-s32max[c] |
| HOST_DATA | 0 | rdev->mc.gtt_start | 0-u64max[c] |
| HOST_DATA | 0 | rdev->mc.mc_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.real_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.vram_end | 0-4504699121172479,u64max[c] |
| HOST_DATA | 0 | rdev->mc.vram_start | 0-9223372036854775807[c] |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.current_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.default_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.num_power_states | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->rmmio_size | |
| LOCK2 | &rdev->pm.mutex | ||
| TYPE_LOCK | (struct radeon_pm)->mutex |
drivers/gpu/drm/radeon/si_dpm.c si_program_response_times() -> si_write_smc_soft_register()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic->get_xclk | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->family | 52-56 |
| PARAM_VALUE | 0 | rdev->mman.bdev.pool.dev->iommu->attach_deferred | 0-1 |
| PARAM_VALUE | 0 | rdev->mmio_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->fb_base | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->io_mode | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->mutex->first_waiter->task->blocked_lock.owner | (-4611686018427387904)-4611686018427387903 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->reg_block | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->scratch_mutex.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->scratch_mutex.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->scratch_mutex.first_waiter->list.prev->prev | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->scratch_mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pcie_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->pciep_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.boot_ps | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->arb_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->bsp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->bsu | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->cac_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dsp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dte_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->fan_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mc_reg_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mvdd_control | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->papm_cfg_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->papm_parm.NearTDPLimitPAPM | 4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->papm_parm.NearTDPLimitTherm | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->papm_parm.PlatformPowerLimit | 4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->papm_parm.dGPU_T_Hysteresis | 5 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->papm_parm.dGPU_T_Limit | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->papm_parm.dGPU_T_Warning | 95 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pbsp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pbsu | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->psp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.flags | 0,2-254 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.level.SQPowerThrottle | 0,1073692671 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.level.SQPowerThrottle_2 | 0,2080325631 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.level.aT | 0,u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.level.mcFlags | 0,3 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.level.mclk.vMCLK_PWRMGT_CNTL | 0,196608-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.level.sclk.vCG_SPLL_FUNC_CNTL_2 | 0,4-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.level.strobeMode | 0-31 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.levelCount | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.flags | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.ACIndex | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.MaxPoweredUpCU | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.SQPowerThrottle | 0,1073692671 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.SQPowerThrottle_2 | 0,2080325631 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.UVDWatermark | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.VCEWatermark | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.aT | 0,u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.arbRefreshState | 0,2 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.bSP | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.displayWatermark | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.dpm2.MaxPS_StepDec | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.dpm2.MaxPS_StepInc | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.dpm2.PSDeltaLimit | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.dpm2.PSDeltaWin | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.dpm2.PSSamplingTime | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.dpm2.TgtAct | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.gen2PCIE | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.high_temp_vddc.index | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.high_temp_vddc.phase_settings | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.high_temp_vddc.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.hysteresisDown | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.hysteresisUp | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.low_temp_vddc.index | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.low_temp_vddc.phase_settings | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.low_temp_vddc.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mcFlags | 0-3,8-11,25-27 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.mclk_value | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vDLL_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMCLK_PWRMGT_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMPLL_AD_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMPLL_DQ_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMPLL_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMPLL_FUNC_CNTL_1 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMPLL_FUNC_CNTL_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMPLL_SS | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMPLL_SS2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mvdd.index | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mvdd.phase_settings | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mvdd.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.padding | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.sclk.sclk_value | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.sclk.vCG_SPLL_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.sclk.vCG_SPLL_FUNC_CNTL_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.sclk.vCG_SPLL_FUNC_CNTL_3 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.sclk.vCG_SPLL_FUNC_CNTL_4 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.sclk.vCG_SPLL_SPREAD_SPECTRUM | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.sclk.vCG_SPLL_SPREAD_SPECTRUM_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.stateFlags | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.std_vddc.phase_settings | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.std_vddc.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.strobeMode | 0-31 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.vddc.phase_settings | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.vddc.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.vddci.phase_settings | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.vddci.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.levelCount | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.padding2 | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.padding3 | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.dpm2Params.NearTDPLimit | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.dpm2Params.SafePowerLimit | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.dpm2Params.TDPLimit | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.driverState.flags | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.driverState.levelCount | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.extraFlags | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.flags | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.SQPowerThrottle | 0,1073692671 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.SQPowerThrottle_2 | 0,2080325631 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.aT | 0,u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.bSP | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.gen2PCIE | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mcFlags | 0,3 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.mclk_value | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vDLL_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMCLK_PWRMGT_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMPLL_AD_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMPLL_DQ_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMPLL_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMPLL_FUNC_CNTL_1 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMPLL_FUNC_CNTL_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMPLL_SS | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMPLL_SS2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mvdd.index | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mvdd.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.sclk.sclk_value | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.sclk.vCG_SPLL_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.sclk.vCG_SPLL_FUNC_CNTL_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.sclk.vCG_SPLL_FUNC_CNTL_3 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.sclk.vCG_SPLL_FUNC_CNTL_4 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.sclk.vCG_SPLL_SPREAD_SPECTRUM | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.std_vddc.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.strobeMode | 0-31 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.vddc.phase_settings | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.vddc.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.vddci.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.levelCount | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.maxVDDCIndexInPPTable | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.systemFlags | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.thermalProtectType | 0-1,255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->soft_regs_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->spll_table_start | 1-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->state_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->pm.pm_method | 2 |
| PARAM_VALUE | 0 | rdev->smc_fw | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->smc_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->uvd.vcpu_bo->tbo.bdev->pool.dev->iommu->attach_deferred | 0-1 |
| PARAM_VALUE | 0 | rdev->wb.wb_obj->tbo.bdev->pool.dev->iommu->attach_deferred | 0-1 |
| PARAM_VALUE | 0 | *rdev->pm.dpm.priv->smc_statetable->lowSMIO | 0-4294967295 |
| PARAM_VALUE | 1 | reg_offset | 0 |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev->agp | (-1),144 |
| CAPPED_DATA | 0 | rdev->pm.dpm.priv->acpi_vddc | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.priv->vddc_voltage_table.count | 1 |
| CAPPED_DATA | 0 | rdev->rmmio_size | 1 |
| DATA_SOURCE | 0 | rdev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| HOST_DATA | 0 | rdev->gart.num_cpu_pages | 0-524287[c] |
| HOST_DATA | 0 | rdev->mc.aper_base | 0-1099511627775[c] |
| HOST_DATA | 0 | rdev->mc.gtt_size | 0-s32max[c] |
| HOST_DATA | 0 | rdev->mc.gtt_start | 0-u64max[c] |
| HOST_DATA | 0 | rdev->mc.mc_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.real_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.vram_end | 0-4504699121172479,u64max[c] |
| HOST_DATA | 0 | rdev->mc.vram_start | 0-9223372036854775807[c] |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.current_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.default_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.num_power_states | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->rmmio_size | |
| LOCK2 | &rdev->pm.mutex | ||
| TYPE_LOCK | (struct radeon_pm)->mutex |
drivers/gpu/drm/radeon/si_dpm.c si_program_response_times() -> si_write_smc_soft_register()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic->get_xclk | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->family | 52-56 |
| PARAM_VALUE | 0 | rdev->mman.bdev.pool.dev->iommu->attach_deferred | 0-1 |
| PARAM_VALUE | 0 | rdev->mmio_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->fb_base | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->io_mode | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->mutex->first_waiter->task->blocked_lock.owner | (-4611686018427387904)-4611686018427387903 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->reg_block | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->scratch_mutex.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->scratch_mutex.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->scratch_mutex.first_waiter->list.prev->prev | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->scratch_mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pcie_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->pciep_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.boot_ps | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->arb_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->bsp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->bsu | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->cac_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dsp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dte_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->fan_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mc_reg_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mvdd_control | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->papm_cfg_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->papm_parm.NearTDPLimitPAPM | 4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->papm_parm.NearTDPLimitTherm | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->papm_parm.PlatformPowerLimit | 4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->papm_parm.dGPU_T_Hysteresis | 5 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->papm_parm.dGPU_T_Limit | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->papm_parm.dGPU_T_Warning | 95 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pbsp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pbsu | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->psp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.flags | 0,2-254 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.level.SQPowerThrottle | 0,1073692671 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.level.SQPowerThrottle_2 | 0,2080325631 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.level.aT | 0,u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.level.mcFlags | 0,3 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.level.mclk.vMCLK_PWRMGT_CNTL | 0,196608-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.level.sclk.vCG_SPLL_FUNC_CNTL_2 | 0,4-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.level.strobeMode | 0-31 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.levelCount | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.flags | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.ACIndex | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.MaxPoweredUpCU | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.SQPowerThrottle | 0,1073692671 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.SQPowerThrottle_2 | 0,2080325631 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.UVDWatermark | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.VCEWatermark | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.aT | 0,u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.arbRefreshState | 0,2 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.bSP | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.displayWatermark | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.dpm2.MaxPS_StepDec | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.dpm2.MaxPS_StepInc | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.dpm2.PSDeltaLimit | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.dpm2.PSDeltaWin | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.dpm2.PSSamplingTime | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.dpm2.TgtAct | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.gen2PCIE | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.high_temp_vddc.index | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.high_temp_vddc.phase_settings | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.high_temp_vddc.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.hysteresisDown | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.hysteresisUp | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.low_temp_vddc.index | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.low_temp_vddc.phase_settings | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.low_temp_vddc.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mcFlags | 0-3,8-11,25-27 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.mclk_value | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vDLL_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMCLK_PWRMGT_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMPLL_AD_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMPLL_DQ_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMPLL_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMPLL_FUNC_CNTL_1 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMPLL_FUNC_CNTL_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMPLL_SS | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMPLL_SS2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mvdd.index | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mvdd.phase_settings | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mvdd.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.padding | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.sclk.sclk_value | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.sclk.vCG_SPLL_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.sclk.vCG_SPLL_FUNC_CNTL_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.sclk.vCG_SPLL_FUNC_CNTL_3 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.sclk.vCG_SPLL_FUNC_CNTL_4 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.sclk.vCG_SPLL_SPREAD_SPECTRUM | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.sclk.vCG_SPLL_SPREAD_SPECTRUM_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.stateFlags | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.std_vddc.phase_settings | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.std_vddc.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.strobeMode | 0-31 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.vddc.phase_settings | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.vddc.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.vddci.phase_settings | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.vddci.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.levelCount | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.padding2 | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.padding3 | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.dpm2Params.NearTDPLimit | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.dpm2Params.SafePowerLimit | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.dpm2Params.TDPLimit | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.driverState.flags | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.driverState.levelCount | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.extraFlags | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.flags | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.SQPowerThrottle | 0,1073692671 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.SQPowerThrottle_2 | 0,2080325631 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.aT | 0,u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.bSP | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.gen2PCIE | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mcFlags | 0,3 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.mclk_value | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vDLL_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMCLK_PWRMGT_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMPLL_AD_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMPLL_DQ_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMPLL_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMPLL_FUNC_CNTL_1 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMPLL_FUNC_CNTL_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMPLL_SS | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMPLL_SS2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mvdd.index | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mvdd.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.sclk.sclk_value | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.sclk.vCG_SPLL_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.sclk.vCG_SPLL_FUNC_CNTL_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.sclk.vCG_SPLL_FUNC_CNTL_3 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.sclk.vCG_SPLL_FUNC_CNTL_4 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.sclk.vCG_SPLL_SPREAD_SPECTRUM | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.std_vddc.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.strobeMode | 0-31 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.vddc.phase_settings | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.vddc.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.vddci.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.levelCount | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.maxVDDCIndexInPPTable | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.systemFlags | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.thermalProtectType | 0-1,255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->soft_regs_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->spll_table_start | 1-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->state_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->pm.pm_method | 2 |
| PARAM_VALUE | 0 | rdev->smc_fw | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->smc_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->uvd.vcpu_bo->tbo.bdev->pool.dev->iommu->attach_deferred | 0-1 |
| PARAM_VALUE | 0 | rdev->wb.wb_obj->tbo.bdev->pool.dev->iommu->attach_deferred | 0-1 |
| PARAM_VALUE | 0 | *rdev->pm.dpm.priv->smc_statetable->lowSMIO | 0-4294967295 |
| PARAM_VALUE | 1 | reg_offset | 152 |
| PARAM_VALUE | 2 | value | 170 |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev->agp | (-1),144 |
| CAPPED_DATA | 0 | rdev->pm.dpm.priv->acpi_vddc | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.priv->vddc_voltage_table.count | 1 |
| CAPPED_DATA | 0 | rdev->rmmio_size | 1 |
| DATA_SOURCE | 0 | rdev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| HOST_DATA | 0 | rdev->gart.num_cpu_pages | 0-524287[c] |
| HOST_DATA | 0 | rdev->mc.aper_base | 0-1099511627775[c] |
| HOST_DATA | 0 | rdev->mc.gtt_size | 0-s32max[c] |
| HOST_DATA | 0 | rdev->mc.gtt_start | 0-u64max[c] |
| HOST_DATA | 0 | rdev->mc.mc_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.real_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.vram_end | 0-4504699121172479,u64max[c] |
| HOST_DATA | 0 | rdev->mc.vram_start | 0-9223372036854775807[c] |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.current_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.default_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.num_power_states | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->rmmio_size | |
| LOCK2 | &rdev->pm.mutex | ||
| TYPE_LOCK | (struct radeon_pm)->mutex |
drivers/gpu/drm/radeon/si_dpm.c si_program_ulv_memory_timing_parameters() -> si_write_smc_soft_register()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic->get_xclk | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->family | 52-56 |
| PARAM_VALUE | 0 | rdev->mmio_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->bios | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->fb_base | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->io_mode | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->mutex->first_waiter->task->blocked_lock.owner | (-4611686018427387904)-4611686018427387903 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->reg_block | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->scratch_mutex.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->scratch_mutex.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->scratch_mutex.first_waiter->list.prev->prev | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->scratch_mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.dpm.boot_ps | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->arb_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->bsp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->bsu | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->cac_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dsp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dte_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->fan_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mc_reg_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mvdd_control | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->papm_cfg_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pbsp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pbsu | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->psp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->soft_regs_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->spll_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->state_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->vddc_voltage_table.count | 1-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.raw_lock.val.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.pm_method | 2 |
| PARAM_VALUE | 0 | rdev->smc_fw | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->smc_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 1 | reg_offset | 140 |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev->agp | (-1),144 |
| CAPPED_DATA | 0 | rdev->pm.dpm.priv->acpi_vddc | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.priv->mclk_stutter_mode_threshold | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.priv->ulv.pl.mclk | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.priv->ulv.pl.vddc | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.priv->vddc_voltage_table.count | 1 |
| CAPPED_DATA | 0 | rdev->rmmio_size | 1 |
| DATA_SOURCE | 0 | rdev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| HOST_DATA | 0 | rdev->config.cik.tile_config | 0-16383[c] |
| HOST_DATA | 0 | rdev->config.r100.hdp_cntl | 0-u32max |
| HOST_DATA | 0 | rdev->config.r300.hdp_cntl | 0-u32max |
| HOST_DATA | 0 | rdev->config.r600.backend_map | 0-3[c] |
| HOST_DATA | 0 | rdev->config.r600.tile_config | 0-262143[c] |
| HOST_DATA | 0 | rdev->config.rv770.tile_config | 0,2048-u32max[c] |
| HOST_DATA | 0 | rdev->gart.num_cpu_pages | 0-524287[c] |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d1grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d2grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d3grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d4grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d5grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d6grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont2 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont3 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont4 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont5 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont6 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.r500.disp_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.r500.hdmi0_status | 0,268435456 |
| HOST_DATA | 0 | rdev->mc.aper_base | 0-1099511627775 |
| HOST_DATA | 0 | rdev->mc.gtt_size | 0-s32max[c] |
| HOST_DATA | 0 | rdev->mc.gtt_start | 0-u64max[c] |
| HOST_DATA | 0 | rdev->mc.mc_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.real_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.vram_end | 0-9223372039002259453,u64max[c] |
| HOST_DATA | 0 | rdev->mc.vram_start | 0-9223372036854775807[c] |
| HOST_DATA | 0 | rdev->num_gb_pipes | 2-4[c] |
| NO_OVERFLOW_SIMPLE | 0 | rdev->gart.table_size | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.current_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.default_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.num_power_states | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->rmmio_size | |
| LOCK2 | &rdev->pm.mutex | ||
| TYPE_LOCK | (struct radeon_pm)->mutex |
drivers/gpu/drm/radeon/si_dpm.c si_set_pcie_lane_width_in_smc() -> si_write_smc_soft_register()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->mmio_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->fb_base | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->io_mode | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->mutex->first_waiter->task->blocked_lock.owner | (-4611686018427387904)-4611686018427387903 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->reg_block | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->scratch_mutex.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->scratch_mutex.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->scratch_mutex.first_waiter->list.prev->prev | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->scratch_mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.dpm.high_pixelclock_count | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.dpm.new_active_crtc_count | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.driverState.flags | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.driverState.levelCount | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->uvd_enabled | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->vddc_voltage_table.count | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.requested_ps | 1-u64max |
| PARAM_VALUE | 0 | rdev->pm.dpm_enabled | 1 |
| PARAM_VALUE | 0 | rdev->pm.mclk_lock.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mclk_lock.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->pm.mclk_lock.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->pm.mclk_lock.wait_lock.raw_lock.val.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.raw_lock.val.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.pm_method | 2 |
| PARAM_VALUE | 0 | rdev->ring_lock.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->ring_lock.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->ring_lock.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->ring_lock.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->smc_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 1 | reg_offset | 244 |
| PARAM_VALUE | 2 | value | 0-2,4,8,12,16 |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| CAPPED_DATA | 0 | rdev->pm.dpm.num_ps | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.requested_ps | 1 |
| DATA_SOURCE | 0 | rdev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| HOST_DATA | 0 | rdev->config.cik.tile_config | 0-16383[c] |
| HOST_DATA | 0 | rdev->config.r100.hdp_cntl | 0-u32max |
| HOST_DATA | 0 | rdev->config.r300.hdp_cntl | 0-u32max |
| HOST_DATA | 0 | rdev->config.r600.backend_map | 0-3[c] |
| HOST_DATA | 0 | rdev->config.r600.tile_config | 0-262143[c] |
| HOST_DATA | 0 | rdev->config.rv770.tile_config | 0,2048-u32max[c] |
| HOST_DATA | 0 | rdev->gart.num_cpu_pages | 0-524287[c] |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d1grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d2grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d3grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d4grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d5grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d6grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont2 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont3 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont4 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont5 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont6 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.r500.disp_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.r500.hdmi0_status | 0,268435456 |
| HOST_DATA | 0 | rdev->mc.aper_base | 0-1099511627775 |
| HOST_DATA | 0 | rdev->mc.gtt_size | 0-s32max[c] |
| HOST_DATA | 0 | rdev->mc.gtt_start | 0-u64max[c] |
| HOST_DATA | 0 | rdev->mc.mc_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.real_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.vram_end | 0-9223372039002259453,u64max[c] |
| HOST_DATA | 0 | rdev->mc.vram_start | 0-9223372036854775807[c] |
| HOST_DATA | 0 | rdev->num_gb_pipes | 2-4[c] |
| LOCK2 | &rdev->pm.mclk_lock | ||
| LOCK2 | &rdev->pm.mutex | ||
| LOCK2 | &rdev->ring_lock | ||
| HALF_LOCKED2 | &of->mutex | ||
| HALF_LOCKED2 | &pool->lock | ||
| HALF_LOCKED2 | &rdev->exclusive_lock | ||
| TYPE_LOCK | (struct radeon_device)->ring_lock | ||
| TYPE_LOCK | (struct radeon_pm)->mclk_lock | ||
| TYPE_LOCK | (struct radeon_pm)->mutex |
drivers/gpu/drm/radeon/si_dpm.c si_upload_smc_data() -> si_write_smc_soft_register()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->mmio_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->fb_base | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->io_mode | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->reg_block | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->scratch_mutex.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->scratch_mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->mode_info.crtcs | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->num_crtc | 1-s32max |
| PARAM_VALUE | 0 | rdev->pm.dpm.high_pixelclock_count | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.dpm.new_active_crtc_count | 1-s32max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.driverState.flags | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.driverState.levelCount | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->uvd_enabled | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->vddc_voltage_table.count | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.requested_ps | 1-u64max |
| PARAM_VALUE | 0 | rdev->pm.dpm_enabled | 1 |
| PARAM_VALUE | 0 | rdev->pm.mclk_lock.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mclk_lock.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->pm.mclk_lock.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->pm.mclk_lock.wait_lock.raw_lock.val.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.raw_lock.val.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.pm_method | 2 |
| PARAM_VALUE | 0 | rdev->ring_lock.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->ring_lock.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->ring_lock.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->ring_lock.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->smc_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 1 | reg_offset | 196 |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| CAPPED_DATA | 0 | rdev->num_crtc | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.num_ps | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.requested_ps | 1 |
| DATA_SOURCE | 0 | rdev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HOST_DATA | 0 | rdev->config.cik.tile_config | 0-16383[c] |
| HOST_DATA | 0 | rdev->config.r100.hdp_cntl | 0-u32max |
| HOST_DATA | 0 | rdev->config.r300.hdp_cntl | 0-u32max |
| HOST_DATA | 0 | rdev->config.r600.backend_map | 0-3[c] |
| HOST_DATA | 0 | rdev->config.r600.tile_config | 0-262143[c] |
| HOST_DATA | 0 | rdev->config.rv770.tile_config | 0,2048-u32max[c] |
| HOST_DATA | 0 | rdev->gart.num_cpu_pages | 0-524287[c] |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d1grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d2grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d3grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d4grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d5grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d6grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont2 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont3 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont4 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont5 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont6 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.r500.disp_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.r500.hdmi0_status | 0,268435456 |
| HOST_DATA | 0 | rdev->mc.aper_base | 0-1099511627775 |
| HOST_DATA | 0 | rdev->mc.gtt_size | 0-s32max[c] |
| HOST_DATA | 0 | rdev->mc.gtt_start | 0-u64max[c] |
| HOST_DATA | 0 | rdev->mc.mc_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.real_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.vram_end | 0-9223372039002259453,u64max[c] |
| HOST_DATA | 0 | rdev->mc.vram_start | 0-9223372036854775807[c] |
| HOST_DATA | 0 | rdev->num_gb_pipes | 2-4[c] |
| LOCK2 | &rdev->pm.mclk_lock | ||
| LOCK2 | &rdev->pm.mutex | ||
| LOCK2 | &rdev->ring_lock | ||
| HALF_LOCKED2 | &of->mutex | ||
| HALF_LOCKED2 | &pool->lock | ||
| HALF_LOCKED2 | &rdev->exclusive_lock | ||
| TYPE_LOCK | (struct radeon_device)->ring_lock | ||
| TYPE_LOCK | (struct radeon_pm)->mclk_lock | ||
| TYPE_LOCK | (struct radeon_pm)->mutex |
drivers/gpu/drm/radeon/si_dpm.c si_upload_smc_data() -> si_write_smc_soft_register()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->mmio_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->fb_base | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->io_mode | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->reg_block | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->scratch_mutex.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->scratch_mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->mode_info.crtcs | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->num_crtc | 1-s32max |
| PARAM_VALUE | 0 | rdev->pm.dpm.high_pixelclock_count | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.dpm.new_active_crtc_count | 1-s32max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.driverState.flags | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.driverState.levelCount | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->uvd_enabled | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->vddc_voltage_table.count | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.requested_ps | 1-u64max |
| PARAM_VALUE | 0 | rdev->pm.dpm_enabled | 1 |
| PARAM_VALUE | 0 | rdev->pm.mclk_lock.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mclk_lock.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->pm.mclk_lock.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->pm.mclk_lock.wait_lock.raw_lock.val.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.raw_lock.val.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.pm_method | 2 |
| PARAM_VALUE | 0 | rdev->ring_lock.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->ring_lock.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->ring_lock.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->ring_lock.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->smc_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 1 | reg_offset | 200 |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| CAPPED_DATA | 0 | rdev->num_crtc | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.num_ps | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.requested_ps | 1 |
| DATA_SOURCE | 0 | rdev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HOST_DATA | 0 | rdev->config.cik.tile_config | 0-16383[c] |
| HOST_DATA | 0 | rdev->config.r100.hdp_cntl | 0-u32max |
| HOST_DATA | 0 | rdev->config.r300.hdp_cntl | 0-u32max |
| HOST_DATA | 0 | rdev->config.r600.backend_map | 0-3[c] |
| HOST_DATA | 0 | rdev->config.r600.tile_config | 0-262143[c] |
| HOST_DATA | 0 | rdev->config.rv770.tile_config | 0,2048-u32max[c] |
| HOST_DATA | 0 | rdev->gart.num_cpu_pages | 0-524287[c] |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d1grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d2grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d3grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d4grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d5grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d6grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont2 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont3 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont4 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont5 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont6 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.r500.disp_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.r500.hdmi0_status | 0,268435456 |
| HOST_DATA | 0 | rdev->mc.aper_base | 0-1099511627775 |
| HOST_DATA | 0 | rdev->mc.gtt_size | 0-s32max[c] |
| HOST_DATA | 0 | rdev->mc.gtt_start | 0-u64max[c] |
| HOST_DATA | 0 | rdev->mc.mc_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.real_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.vram_end | 0-9223372039002259453,u64max[c] |
| HOST_DATA | 0 | rdev->mc.vram_start | 0-9223372036854775807[c] |
| HOST_DATA | 0 | rdev->num_gb_pipes | 2-4[c] |
| LOCK2 | &rdev->pm.mclk_lock | ||
| LOCK2 | &rdev->pm.mutex | ||
| LOCK2 | &rdev->ring_lock | ||
| HALF_LOCKED2 | &of->mutex | ||
| HALF_LOCKED2 | &pool->lock | ||
| HALF_LOCKED2 | &rdev->exclusive_lock | ||
| TYPE_LOCK | (struct radeon_device)->ring_lock | ||
| TYPE_LOCK | (struct radeon_pm)->mclk_lock | ||
| TYPE_LOCK | (struct radeon_pm)->mutex |
drivers/gpu/drm/radeon/si_dpm.c si_upload_smc_data() -> si_write_smc_soft_register()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->mmio_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->fb_base | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->io_mode | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->reg_block | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->scratch_mutex.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->scratch_mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->mode_info.crtcs | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->num_crtc | 1-s32max |
| PARAM_VALUE | 0 | rdev->pm.dpm.high_pixelclock_count | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.dpm.new_active_crtc_count | 1-s32max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.driverState.flags | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.driverState.levelCount | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->uvd_enabled | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->vddc_voltage_table.count | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.requested_ps | 1-u64max |
| PARAM_VALUE | 0 | rdev->pm.dpm_enabled | 1 |
| PARAM_VALUE | 0 | rdev->pm.mclk_lock.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mclk_lock.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->pm.mclk_lock.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->pm.mclk_lock.wait_lock.raw_lock.val.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.raw_lock.val.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.pm_method | 2 |
| PARAM_VALUE | 0 | rdev->ring_lock.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->ring_lock.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->ring_lock.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->ring_lock.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->smc_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 1 | reg_offset | 204 |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| CAPPED_DATA | 0 | rdev->num_crtc | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.num_ps | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.requested_ps | 1 |
| DATA_SOURCE | 0 | rdev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HOST_DATA | 0 | rdev->config.cik.tile_config | 0-16383[c] |
| HOST_DATA | 0 | rdev->config.r100.hdp_cntl | 0-u32max |
| HOST_DATA | 0 | rdev->config.r300.hdp_cntl | 0-u32max |
| HOST_DATA | 0 | rdev->config.r600.backend_map | 0-3[c] |
| HOST_DATA | 0 | rdev->config.r600.tile_config | 0-262143[c] |
| HOST_DATA | 0 | rdev->config.rv770.tile_config | 0,2048-u32max[c] |
| HOST_DATA | 0 | rdev->gart.num_cpu_pages | 0-524287[c] |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d1grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d2grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d3grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d4grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d5grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d6grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont2 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont3 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont4 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont5 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont6 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.r500.disp_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.r500.hdmi0_status | 0,268435456 |
| HOST_DATA | 0 | rdev->mc.aper_base | 0-1099511627775 |
| HOST_DATA | 0 | rdev->mc.gtt_size | 0-s32max[c] |
| HOST_DATA | 0 | rdev->mc.gtt_start | 0-u64max[c] |
| HOST_DATA | 0 | rdev->mc.mc_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.real_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.vram_end | 0-9223372039002259453,u64max[c] |
| HOST_DATA | 0 | rdev->mc.vram_start | 0-9223372036854775807[c] |
| HOST_DATA | 0 | rdev->num_gb_pipes | 2-4[c] |
| LOCK2 | &rdev->pm.mclk_lock | ||
| LOCK2 | &rdev->pm.mutex | ||
| LOCK2 | &rdev->ring_lock | ||
| HALF_LOCKED2 | &of->mutex | ||
| HALF_LOCKED2 | &pool->lock | ||
| HALF_LOCKED2 | &rdev->exclusive_lock | ||
| TYPE_LOCK | (struct radeon_device)->ring_lock | ||
| TYPE_LOCK | (struct radeon_pm)->mclk_lock | ||
| TYPE_LOCK | (struct radeon_pm)->mutex |
drivers/gpu/drm/amd/amdgpu/../pm/legacy-dpm/si_dpm.c si_convert_power_state_to_smc() -> si_write_smc_soft_register()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden->first_waiter->task->blocked_lock.owner | (-4611686018427387904)-4611686018427387903 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->list.next | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mes.saved_flags | 0,2048 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->cac_enabled | 0-1 |
| PARAM_VALUE | 0 | rdev->reset_domain->sem.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->reset_domain->sem.first_waiter->handoff_set | 0-1 |
| PARAM_VALUE | 0 | rdev->reset_domain->sem.first_waiter->type | 0-1 |
| PARAM_VALUE | 0 | *rdev->mes.mutex_hidden.first_waiter->task->blocked_lock.owner | (-4611686018427387904)-4611686018427387903 |
| PARAM_VALUE | 1 | reg_offset | 120 |
| BUF_SIZE | 0 | rdev | 1256,3984 |
| BUF_SIZE | 0 | rdev | 1256,3984 |
| DATA_SOURCE | 0 | rdev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| LOCK2 | &adev->pm.mutex | ||
| HALF_LOCKED2 | &pool->lock | ||
| TYPE_LOCK | (struct amdgpu_pm)->mutex |
drivers/gpu/drm/amd/amdgpu/../pm/legacy-dpm/si_dpm.c si_init_smc_table() -> si_write_smc_soft_register()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic_funcs | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic_funcs->get_xclk | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden->first_waiter->task->blocked_lock.owner | (-4611686018427387904)-4611686018427387903 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->list.next | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->list.prev->prev | 0,5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->magic | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->task->blocked_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->task->blocked_lock.owner_cpu | 4294967295 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->task->blocked_lock.raw_lock.val.counter | s32min-s32max |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->task->blocked_on | (-1)-0 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->task->usage.refs.counter | s32min-s32max |
| PARAM_VALUE | 0 | rdev->pm.dpm.platform_caps | 2097152-u32max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->arb_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->bsp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->bsu | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->cac_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.cg_spll_func_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.cg_spll_func_cntl_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.cg_spll_func_cntl_3 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.cg_spll_func_cntl_4 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.cg_spll_spread_spectrum | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.cg_spll_spread_spectrum_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.dll_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mclk_pwrmgt_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mpll_ad_func_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mpll_dq_func_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mpll_func_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mpll_func_cntl_1 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mpll_func_cntl_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mpll_ss1 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mpll_ss2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dsp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dte_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->fan_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mc_reg_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->papm_cfg_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pbsp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pbsu | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->psp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->soft_regs_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->spll_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->state_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.fw | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.mutex.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter->list.prev->prev | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->pm.mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->reset_domain->sem.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->reset_domain->sem.first_waiter->handoff_set | 0-1 |
| PARAM_VALUE | 0 | rdev->reset_domain->sem.first_waiter->type | 0-1 |
| PARAM_VALUE | 0 | *rdev->mes.mutex_hidden.first_waiter->task->blocked_lock.owner | (-4611686018427387904)-4611686018427387903 |
| PARAM_VALUE | 1 | reg_offset | 256 |
| DATA_SOURCE | 0 | rdev | $0 |
| BIT_INFO | 0 | rdev->pm.dpm.platform_caps | 0x200000,0xffffffff |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| LOCK2 | 0 | &rdev->pm.mutex | |
| TYPE_LOCK | (struct amdgpu_pm)->mutex |
drivers/gpu/drm/amd/amdgpu/../pm/legacy-dpm/si_dpm.c si_init_smc_table() -> si_write_smc_soft_register()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic_funcs | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic_funcs->get_xclk | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden->first_waiter->task->blocked_lock.owner | (-4611686018427387904)-4611686018427387903 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->list.next | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->list.prev->prev | 0,5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->magic | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->task->blocked_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->task->blocked_lock.owner_cpu | 4294967295 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->task->blocked_lock.raw_lock.val.counter | s32min-s32max |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->task->blocked_on | (-1)-0 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->task->usage.refs.counter | s32min-s32max |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->bios | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->execute_depth | 0-31 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->fb_base | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->io_mode | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->reg_block | 0 |
| PARAM_VALUE | 0 | rdev->pm.dpm.boot_ps | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.boot_ps->ps_priv | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->arb_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->bsp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->bsu | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->cac_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.cg_spll_func_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.cg_spll_func_cntl_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.cg_spll_func_cntl_3 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.cg_spll_func_cntl_4 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.cg_spll_spread_spectrum | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.cg_spll_spread_spectrum_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.dll_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mclk_pwrmgt_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mpll_ad_func_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mpll_dq_func_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mpll_func_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mpll_func_cntl_1 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mpll_func_cntl_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mpll_ss1 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mpll_ss2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dsp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dte_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->fan_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mc_reg_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->papm_cfg_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pbsp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pbsu | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->psp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->soft_regs_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->spll_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->state_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->vddc_voltage_table.count | 1-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.fw | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.mutex.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter->list.prev->prev | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->pm.mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->reset_domain->sem.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->reset_domain->sem.first_waiter->handoff_set | 0-1 |
| PARAM_VALUE | 0 | rdev->reset_domain->sem.first_waiter->type | 0-1 |
| PARAM_VALUE | 1 | reg_offset | 244 |
| PARAM_VALUE | 2 | value | 0-2,4,8,16 |
| CAPPED_DATA | 0 | rdev->pm.dpm.priv->acpi_vddc | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.priv->mclk_stutter_mode_threshold | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.priv->ulv.pl.mclk | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.priv->ulv.pl.vddc | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.priv->vddc_voltage_table.count | 1 |
| DATA_SOURCE | 0 | rdev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| LOCK2 | 0 | &rdev->pm.mutex | |
| TYPE_LOCK | (struct amdgpu_pm)->mutex |
drivers/gpu/drm/amd/amdgpu/../pm/legacy-dpm/si_dpm.c si_initialize_smc_cac_tables() -> si_write_smc_soft_register()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic_funcs | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic_funcs->get_xclk | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden->first_waiter->task->blocked_lock.owner | (-4611686018427387904)-4611686018427387903 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->list.next | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->list.prev->prev | 0,5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->magic | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->task->blocked_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->task->blocked_lock.owner_cpu | 4294967295 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->task->blocked_lock.raw_lock.val.counter | s32min-s32max |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->task->blocked_on | (-1)-0 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->task->usage.refs.counter | s32min-s32max |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->execute_depth | 0-31 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->fb_base | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->io_mode | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->mutex->first_waiter->task->blocked_lock.owner | (-4611686018427387904)-4611686018427387903 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->reg_block | 0 |
| PARAM_VALUE | 0 | rdev->pm.dpm.boot_ps | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.boot_ps->ps_priv | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.dyn_state.cac_leakage_table.count | 1-u32max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->arb_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->bsp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->bsu | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->cac_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.cg_spll_func_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.cg_spll_func_cntl_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.cg_spll_func_cntl_3 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.cg_spll_func_cntl_4 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.cg_spll_spread_spectrum | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.cg_spll_spread_spectrum_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.dll_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mclk_pwrmgt_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mpll_ad_func_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mpll_dq_func_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mpll_func_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mpll_func_cntl_1 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mpll_func_cntl_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mpll_ss1 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mpll_ss2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dsp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dte_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->fan_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mc_reg_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->papm_cfg_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pbsp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pbsu | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->powertune_data | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->powertune_data->leakage_coefficients.av | 51,4521550,7194395 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->powertune_data->leakage_coefficients.bv | 2957,309631529 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->powertune_data->lkge_lut_v0_percent | 12 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->psp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.flags | 0,2-254 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.level.SQPowerThrottle | 1073692671 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.level.SQPowerThrottle_2 | 2080325631 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.level.aT | u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.level.mcFlags | 0,3 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.level.mclk.vMCLK_PWRMGT_CNTL | 196608-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.level.sclk.vCG_SPLL_FUNC_CNTL_2 | 0,4-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.level.strobeMode | 0-31 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.levelCount | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.flags | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.ACIndex | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.MaxPoweredUpCU | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.SQPowerThrottle | 1073692671 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.SQPowerThrottle_2 | 2080325631 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.UVDWatermark | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.VCEWatermark | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.aT | u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.arbRefreshState | 0,2 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.bSP | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.displayWatermark | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.dpm2.MaxPS_StepDec | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.dpm2.MaxPS_StepInc | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.dpm2.PSDeltaLimit | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.dpm2.PSDeltaWin | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.dpm2.PSSamplingTime | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.dpm2.TgtAct | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.gen2PCIE | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.high_temp_vddc.index | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.high_temp_vddc.phase_settings | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.high_temp_vddc.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.hysteresisDown | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.hysteresisUp | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.low_temp_vddc.index | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.low_temp_vddc.phase_settings | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.low_temp_vddc.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mcFlags | 0-3,8-11 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.mclk_value | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vDLL_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMCLK_PWRMGT_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMPLL_AD_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMPLL_DQ_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMPLL_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMPLL_FUNC_CNTL_1 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMPLL_FUNC_CNTL_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMPLL_SS | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMPLL_SS2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mvdd.index | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mvdd.phase_settings | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mvdd.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.padding | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.sclk.sclk_value | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.sclk.vCG_SPLL_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.sclk.vCG_SPLL_FUNC_CNTL_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.sclk.vCG_SPLL_FUNC_CNTL_3 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.sclk.vCG_SPLL_FUNC_CNTL_4 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.sclk.vCG_SPLL_SPREAD_SPECTRUM | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.sclk.vCG_SPLL_SPREAD_SPECTRUM_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.stateFlags | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.std_vddc.phase_settings | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.std_vddc.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.strobeMode | 0-31 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.vddc.phase_settings | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.vddc.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.vddci.phase_settings | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.vddci.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.levelCount | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.padding2 | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.padding3 | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.driverState.flags | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.driverState.levelCount | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.extraFlags | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.flags | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.SQPowerThrottle | 1073692671 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.SQPowerThrottle_2 | 2080325631 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.aT | u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.bSP | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.gen2PCIE | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mcFlags | 0,3 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.mclk_value | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vDLL_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMCLK_PWRMGT_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMPLL_AD_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMPLL_DQ_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMPLL_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMPLL_FUNC_CNTL_1 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMPLL_FUNC_CNTL_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMPLL_SS | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMPLL_SS2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mvdd.index | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mvdd.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.sclk.sclk_value | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.sclk.vCG_SPLL_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.sclk.vCG_SPLL_FUNC_CNTL_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.sclk.vCG_SPLL_FUNC_CNTL_3 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.sclk.vCG_SPLL_FUNC_CNTL_4 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.sclk.vCG_SPLL_SPREAD_SPECTRUM | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.std_vddc.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.strobeMode | 0-31 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.vddc.phase_settings | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.vddc.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.vddci.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.levelCount | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.maxVDDCIndexInPPTable | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.systemFlags | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.thermalProtectType | 0-1,255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->soft_regs_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->spll_table_start | 1-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->state_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.fw | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.mutex.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter->list.prev->prev | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->pm.mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->reset_domain->sem.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->reset_domain->sem.first_waiter->handoff_set | 0-1 |
| PARAM_VALUE | 0 | rdev->reset_domain->sem.first_waiter->type | 0-1 |
| PARAM_VALUE | 0 | *rdev->pm.dpm.priv->smc_statetable->lowSMIO | 0-4294967295 |
| PARAM_VALUE | 1 | reg_offset | 168 |
| CAPPED_DATA | 0 | rdev->pm.dpm.boot_ps->ps_priv->performance_level_count | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.dyn_state.cac_leakage_table.count | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.priv->acpi_vddc | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.priv->vddc_voltage_table.count | 1 |
| DATA_SOURCE | 0 | rdev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| LOCK2 | 0 | &rdev->pm.mutex | |
| TYPE_LOCK | (struct amdgpu_pm)->mutex |
drivers/gpu/drm/amd/amdgpu/../pm/legacy-dpm/si_dpm.c si_populate_mc_reg_table() -> si_write_smc_soft_register()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic_funcs | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic_funcs->get_xclk | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden->first_waiter->task->blocked_lock.owner | (-4611686018427387904)-4611686018427387903 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->list.next | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->list.prev->prev | 0,5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->magic | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->task->blocked_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->task->blocked_lock.owner_cpu | 4294967295 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->task->blocked_lock.raw_lock.val.counter | s32min-s32max |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->task->blocked_on | (-1)-0 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->task->usage.refs.counter | s32min-s32max |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->execute_depth | 0-31 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->fb_base | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->io_mode | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->mutex->first_waiter->task->blocked_lock.owner | (-4611686018427387904)-4611686018427387903 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->reg_block | 0 |
| PARAM_VALUE | 0 | rdev->pm.dpm.boot_ps | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.boot_ps->ps_priv | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->arb_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->bsp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->bsu | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->cac_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.cg_spll_func_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.cg_spll_func_cntl_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.cg_spll_func_cntl_3 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.cg_spll_func_cntl_4 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.cg_spll_spread_spectrum | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.cg_spll_spread_spectrum_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.dll_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mclk_pwrmgt_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mpll_ad_func_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mpll_dq_func_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mpll_func_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mpll_func_cntl_1 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mpll_func_cntl_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mpll_ss1 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mpll_ss2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dsp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dte_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->fan_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mc_reg_table.last | 0 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mc_reg_table.num_entries | 0-16 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mc_reg_table.valid_flag | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mc_reg_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->papm_cfg_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pbsp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pbsu | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->psp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.flags | 0,2-254 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.level.SQPowerThrottle | 1073692671 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.level.SQPowerThrottle_2 | 2080325631 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.level.aT | u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.level.mcFlags | 0,3 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.level.mclk.vMCLK_PWRMGT_CNTL | 196608-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.level.sclk.vCG_SPLL_FUNC_CNTL_2 | 0,4-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.level.strobeMode | 0-31 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.levelCount | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.flags | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.ACIndex | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.MaxPoweredUpCU | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.SQPowerThrottle | 1073692671 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.SQPowerThrottle_2 | 2080325631 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.UVDWatermark | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.VCEWatermark | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.aT | u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.arbRefreshState | 0,2 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.bSP | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.displayWatermark | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.dpm2.MaxPS_StepDec | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.dpm2.MaxPS_StepInc | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.dpm2.PSDeltaLimit | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.dpm2.PSDeltaWin | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.dpm2.PSSamplingTime | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.dpm2.TgtAct | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.gen2PCIE | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.high_temp_vddc.index | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.high_temp_vddc.phase_settings | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.high_temp_vddc.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.hysteresisDown | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.hysteresisUp | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.low_temp_vddc.index | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.low_temp_vddc.phase_settings | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.low_temp_vddc.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mcFlags | 0-3,8-11 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.mclk_value | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vDLL_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMCLK_PWRMGT_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMPLL_AD_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMPLL_DQ_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMPLL_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMPLL_FUNC_CNTL_1 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMPLL_FUNC_CNTL_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMPLL_SS | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMPLL_SS2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mvdd.index | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mvdd.phase_settings | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mvdd.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.padding | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.sclk.sclk_value | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.sclk.vCG_SPLL_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.sclk.vCG_SPLL_FUNC_CNTL_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.sclk.vCG_SPLL_FUNC_CNTL_3 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.sclk.vCG_SPLL_FUNC_CNTL_4 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.sclk.vCG_SPLL_SPREAD_SPECTRUM | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.sclk.vCG_SPLL_SPREAD_SPECTRUM_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.stateFlags | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.std_vddc.phase_settings | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.std_vddc.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.strobeMode | 0-31 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.vddc.phase_settings | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.vddc.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.vddci.phase_settings | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.vddci.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.levelCount | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.padding2 | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.padding3 | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.driverState.flags | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.driverState.levelCount | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.extraFlags | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.flags | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.SQPowerThrottle | 1073692671 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.SQPowerThrottle_2 | 2080325631 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.aT | u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.bSP | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.gen2PCIE | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mcFlags | 0,3 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.mclk_value | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vDLL_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMCLK_PWRMGT_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMPLL_AD_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMPLL_DQ_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMPLL_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMPLL_FUNC_CNTL_1 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMPLL_FUNC_CNTL_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMPLL_SS | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMPLL_SS2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mvdd.index | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mvdd.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.sclk.sclk_value | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.sclk.vCG_SPLL_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.sclk.vCG_SPLL_FUNC_CNTL_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.sclk.vCG_SPLL_FUNC_CNTL_3 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.sclk.vCG_SPLL_FUNC_CNTL_4 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.sclk.vCG_SPLL_SPREAD_SPECTRUM | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.std_vddc.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.strobeMode | 0-31 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.vddc.phase_settings | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.vddc.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.vddci.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.levelCount | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.maxVDDCIndexInPPTable | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.systemFlags | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.thermalProtectType | 0-1,255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->soft_regs_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->spll_table_start | 1-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->state_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.fw | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.mutex.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter->list.prev->prev | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->pm.mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->reset_domain->sem.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->reset_domain->sem.first_waiter->handoff_set | 0-1 |
| PARAM_VALUE | 0 | rdev->reset_domain->sem.first_waiter->type | 0-1 |
| PARAM_VALUE | 0 | *rdev->mes.mutex_hidden.first_waiter->task->blocked_lock.owner | (-4611686018427387904)-4611686018427387903 |
| PARAM_VALUE | 0 | *rdev->pm.dpm.priv->smc_statetable->lowSMIO | 0-4294967295 |
| PARAM_VALUE | 1 | reg_offset | 92 |
| PARAM_VALUE | 2 | value | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.boot_ps->ps_priv->performance_level_count | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.priv->acpi_vddc | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.priv->mc_reg_table.num_entries | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.priv->vddc_voltage_table.count | 1 |
| DATA_SOURCE | 0 | rdev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| LOCK2 | 0 | &rdev->pm.mutex | |
| TYPE_LOCK | (struct amdgpu_pm)->mutex |
drivers/gpu/drm/amd/amdgpu/../pm/legacy-dpm/si_dpm.c si_populate_smc_voltage_tables() -> si_write_smc_soft_register()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic_funcs | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic_funcs->get_xclk | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden->first_waiter->task->blocked_lock.owner | (-4611686018427387904)-4611686018427387903 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->list.next | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->list.prev->prev | 0,5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->magic | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->task->blocked_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->task->blocked_lock.owner_cpu | 4294967295 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->task->blocked_lock.raw_lock.val.counter | s32min-s32max |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->task->blocked_on | (-1)-0 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->task->usage.refs.counter | s32min-s32max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->arb_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->bsp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->bsu | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->cac_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.cg_spll_func_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.cg_spll_func_cntl_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.cg_spll_func_cntl_3 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.cg_spll_func_cntl_4 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.cg_spll_spread_spectrum | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.cg_spll_spread_spectrum_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.dll_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mclk_pwrmgt_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mpll_ad_func_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mpll_dq_func_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mpll_func_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mpll_func_cntl_1 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mpll_func_cntl_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mpll_ss1 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mpll_ss2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dsp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dte_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->fan_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mc_reg_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->papm_cfg_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pbsp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pbsu | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->psp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->soft_regs_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->spll_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->state_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.fw | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.mutex.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter->list.prev->prev | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->pm.mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.raw_lock.val.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->reset_domain->sem.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->reset_domain->sem.first_waiter->handoff_set | 0-1 |
| PARAM_VALUE | 0 | rdev->reset_domain->sem.first_waiter->type | 0-1 |
| PARAM_VALUE | 1 | reg_offset | 288 |
| DATA_SOURCE | 0 | rdev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| LOCK2 | 0 | &rdev->pm.mutex | |
| TYPE_LOCK | (struct amdgpu_pm)->mutex |
drivers/gpu/drm/amd/amdgpu/../pm/legacy-dpm/si_dpm.c si_populate_smc_voltage_tables() -> si_write_smc_soft_register()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic_funcs | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic_funcs->get_xclk | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden->first_waiter->task->blocked_lock.owner | (-4611686018427387904)-4611686018427387903 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->list.next | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->list.prev->prev | 0,5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->magic | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->task->blocked_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->task->blocked_lock.owner_cpu | 4294967295 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->task->blocked_lock.raw_lock.val.counter | s32min-s32max |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->task->blocked_on | (-1)-0 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->task->usage.refs.counter | s32min-s32max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->arb_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->bsp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->bsu | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->cac_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.cg_spll_func_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.cg_spll_func_cntl_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.cg_spll_func_cntl_3 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.cg_spll_func_cntl_4 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.cg_spll_spread_spectrum | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.cg_spll_spread_spectrum_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.dll_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mclk_pwrmgt_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mpll_ad_func_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mpll_dq_func_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mpll_func_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mpll_func_cntl_1 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mpll_func_cntl_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mpll_ss1 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mpll_ss2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dsp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dte_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->fan_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mc_reg_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->papm_cfg_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pbsp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pbsu | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->psp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->soft_regs_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->spll_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->state_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.fw | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.mutex.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter->list.prev->prev | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->pm.mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.raw_lock.val.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->reset_domain->sem.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->reset_domain->sem.first_waiter->handoff_set | 0-1 |
| PARAM_VALUE | 0 | rdev->reset_domain->sem.first_waiter->type | 0-1 |
| PARAM_VALUE | 1 | reg_offset | 284 |
| DATA_SOURCE | 0 | rdev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| LOCK2 | 0 | &rdev->pm.mutex | |
| TYPE_LOCK | (struct amdgpu_pm)->mutex |
drivers/gpu/drm/amd/amdgpu/../pm/legacy-dpm/si_dpm.c si_populate_smc_voltage_tables() -> si_write_smc_soft_register()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic_funcs | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic_funcs->get_xclk | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden->first_waiter->task->blocked_lock.owner | (-4611686018427387904)-4611686018427387903 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->list.next | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->list.prev->prev | 0,5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->magic | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->task->blocked_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->task->blocked_lock.owner_cpu | 4294967295 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->task->blocked_lock.raw_lock.val.counter | s32min-s32max |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->task->blocked_on | (-1)-0 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->task->usage.refs.counter | s32min-s32max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->arb_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->bsp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->bsu | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->cac_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.cg_spll_func_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.cg_spll_func_cntl_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.cg_spll_func_cntl_3 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.cg_spll_func_cntl_4 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.cg_spll_spread_spectrum | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.cg_spll_spread_spectrum_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.dll_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mclk_pwrmgt_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mpll_ad_func_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mpll_dq_func_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mpll_func_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mpll_func_cntl_1 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mpll_func_cntl_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mpll_ss1 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mpll_ss2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dsp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dte_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->fan_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mc_reg_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->papm_cfg_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pbsp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pbsu | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->psp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->soft_regs_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->spll_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->state_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.fw | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.mutex.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter->list.prev->prev | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->pm.mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.raw_lock.val.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->reset_domain->sem.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->reset_domain->sem.first_waiter->handoff_set | 0-1 |
| PARAM_VALUE | 0 | rdev->reset_domain->sem.first_waiter->type | 0-1 |
| PARAM_VALUE | 1 | reg_offset | 280 |
| PARAM_VALUE | 2 | value | 2 |
| DATA_SOURCE | 0 | rdev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| LOCK2 | 0 | &rdev->pm.mutex | |
| TYPE_LOCK | (struct amdgpu_pm)->mutex |
drivers/gpu/drm/amd/amdgpu/../pm/legacy-dpm/si_dpm.c si_populate_smc_voltage_tables() -> si_write_smc_soft_register()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic_funcs | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic_funcs->get_xclk | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden->first_waiter->task->blocked_lock.owner | (-4611686018427387904)-4611686018427387903 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->list.next | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->list.prev->prev | 0,5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->magic | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->task->blocked_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->task->blocked_lock.owner_cpu | 4294967295 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->task->blocked_lock.raw_lock.val.counter | s32min-s32max |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->task->blocked_on | (-1)-0 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->task->usage.refs.counter | s32min-s32max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->arb_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->bsp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->bsu | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->cac_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.cg_spll_func_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.cg_spll_func_cntl_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.cg_spll_func_cntl_3 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.cg_spll_func_cntl_4 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.cg_spll_spread_spectrum | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.cg_spll_spread_spectrum_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.dll_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mclk_pwrmgt_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mpll_ad_func_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mpll_dq_func_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mpll_func_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mpll_func_cntl_1 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mpll_func_cntl_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mpll_ss1 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mpll_ss2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dsp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dte_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->fan_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mc_reg_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->papm_cfg_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pbsp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pbsu | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->psp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->soft_regs_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->spll_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->state_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.fw | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.mutex.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter->list.prev->prev | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->pm.mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.raw_lock.val.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->reset_domain->sem.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->reset_domain->sem.first_waiter->handoff_set | 0-1 |
| PARAM_VALUE | 0 | rdev->reset_domain->sem.first_waiter->type | 0-1 |
| PARAM_VALUE | 1 | reg_offset | 136 |
| CAPPED_DATA | 0 | rdev->pm.dpm.dyn_state.phase_shedding_limits_table.count | 1 |
| DATA_SOURCE | 0 | rdev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| LOCK2 | 0 | &rdev->pm.mutex | |
| TYPE_LOCK | (struct amdgpu_pm)->mutex |
drivers/gpu/drm/amd/amdgpu/../pm/legacy-dpm/si_dpm.c si_program_response_times() -> si_write_smc_soft_register()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic_funcs | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic_funcs->get_xclk | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden->first_waiter->task->blocked_lock.owner | (-4611686018427387904)-4611686018427387903 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->list.next | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->list.prev->prev | 0,5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->magic | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->task->blocked_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->task->blocked_lock.owner_cpu | 4294967295 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->task->blocked_lock.raw_lock.val.counter | s32min-s32max |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->task->blocked_on | (-1)-0 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->task->usage.refs.counter | s32min-s32max |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->execute_depth | 0-31 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->fb_base | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->io_mode | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->mutex->first_waiter->task->blocked_lock.owner | (-4611686018427387904)-4611686018427387903 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->reg_block | 0 |
| PARAM_VALUE | 0 | rdev->pm.dpm.boot_ps | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.boot_ps->ps_priv | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->arb_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->bsp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->bsu | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->cac_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.cg_spll_func_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.cg_spll_func_cntl_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.cg_spll_func_cntl_3 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.cg_spll_func_cntl_4 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.cg_spll_spread_spectrum | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.cg_spll_spread_spectrum_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.dll_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mclk_pwrmgt_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mpll_ad_func_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mpll_dq_func_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mpll_func_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mpll_func_cntl_1 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mpll_func_cntl_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mpll_ss1 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mpll_ss2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dsp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dte_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->fan_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mc_reg_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->papm_cfg_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->papm_parm.NearTDPLimitPAPM | 4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->papm_parm.NearTDPLimitTherm | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->papm_parm.PlatformPowerLimit | 4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->papm_parm.dGPU_T_Hysteresis | 5 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->papm_parm.dGPU_T_Limit | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->papm_parm.dGPU_T_Warning | 95 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pbsp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pbsu | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->psp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.flags | 0,2-254 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.level.SQPowerThrottle | 1073692671 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.level.SQPowerThrottle_2 | 2080325631 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.level.aT | u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.level.mcFlags | 0,3 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.level.mclk.vMCLK_PWRMGT_CNTL | 196608-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.level.sclk.vCG_SPLL_FUNC_CNTL_2 | 0,4-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.level.strobeMode | 0-31 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.levelCount | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.flags | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.ACIndex | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.MaxPoweredUpCU | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.SQPowerThrottle | 1073692671 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.SQPowerThrottle_2 | 2080325631 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.UVDWatermark | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.VCEWatermark | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.aT | u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.arbRefreshState | 0,2 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.bSP | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.displayWatermark | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.dpm2.MaxPS_StepDec | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.dpm2.MaxPS_StepInc | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.dpm2.PSDeltaLimit | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.dpm2.PSDeltaWin | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.dpm2.PSSamplingTime | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.dpm2.TgtAct | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.gen2PCIE | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.high_temp_vddc.index | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.high_temp_vddc.phase_settings | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.high_temp_vddc.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.hysteresisDown | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.hysteresisUp | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.low_temp_vddc.index | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.low_temp_vddc.phase_settings | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.low_temp_vddc.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mcFlags | 0-3,8-11 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.mclk_value | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vDLL_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMCLK_PWRMGT_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMPLL_AD_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMPLL_DQ_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMPLL_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMPLL_FUNC_CNTL_1 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMPLL_FUNC_CNTL_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMPLL_SS | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMPLL_SS2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mvdd.index | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mvdd.phase_settings | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mvdd.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.padding | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.sclk.sclk_value | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.sclk.vCG_SPLL_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.sclk.vCG_SPLL_FUNC_CNTL_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.sclk.vCG_SPLL_FUNC_CNTL_3 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.sclk.vCG_SPLL_FUNC_CNTL_4 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.sclk.vCG_SPLL_SPREAD_SPECTRUM | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.sclk.vCG_SPLL_SPREAD_SPECTRUM_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.stateFlags | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.std_vddc.phase_settings | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.std_vddc.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.strobeMode | 0-31 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.vddc.phase_settings | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.vddc.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.vddci.phase_settings | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.vddci.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.levelCount | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.padding2 | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.padding3 | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.dpm2Params.NearTDPLimit | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.dpm2Params.SafePowerLimit | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.dpm2Params.TDPLimit | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.driverState.flags | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.driverState.levelCount | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.extraFlags | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.flags | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.SQPowerThrottle | 1073692671 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.SQPowerThrottle_2 | 2080325631 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.aT | u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.bSP | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.gen2PCIE | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mcFlags | 0,3 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.mclk_value | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vDLL_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMCLK_PWRMGT_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMPLL_AD_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMPLL_DQ_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMPLL_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMPLL_FUNC_CNTL_1 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMPLL_FUNC_CNTL_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMPLL_SS | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMPLL_SS2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mvdd.index | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mvdd.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.sclk.sclk_value | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.sclk.vCG_SPLL_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.sclk.vCG_SPLL_FUNC_CNTL_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.sclk.vCG_SPLL_FUNC_CNTL_3 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.sclk.vCG_SPLL_FUNC_CNTL_4 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.sclk.vCG_SPLL_SPREAD_SPECTRUM | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.std_vddc.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.strobeMode | 0-31 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.vddc.phase_settings | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.vddc.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.vddci.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.levelCount | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.maxVDDCIndexInPPTable | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.systemFlags | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.thermalProtectType | 0-1,255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->soft_regs_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->spll_table_start | 1-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->state_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.fw | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.mutex.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter->list.prev->prev | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->pm.mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->reset_domain->sem.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->reset_domain->sem.first_waiter->handoff_set | 0-1 |
| PARAM_VALUE | 0 | rdev->reset_domain->sem.first_waiter->type | 0-1 |
| PARAM_VALUE | 0 | *rdev->pm.dpm.priv->smc_statetable->lowSMIO | 0-4294967295 |
| PARAM_VALUE | 1 | reg_offset | 96 |
| PARAM_VALUE | 2 | value | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.boot_ps->ps_priv->performance_level_count | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.priv->acpi_vddc | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.priv->vddc_voltage_table.count | 1 |
| DATA_SOURCE | 0 | rdev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| LOCK2 | 0 | &rdev->pm.mutex | |
| TYPE_LOCK | (struct amdgpu_pm)->mutex |
drivers/gpu/drm/amd/amdgpu/../pm/legacy-dpm/si_dpm.c si_program_response_times() -> si_write_smc_soft_register()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic_funcs | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic_funcs->get_xclk | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden->first_waiter->task->blocked_lock.owner | (-4611686018427387904)-4611686018427387903 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->list.next | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->list.prev->prev | 0,5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->magic | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->task->blocked_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->task->blocked_lock.owner_cpu | 4294967295 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->task->blocked_lock.raw_lock.val.counter | s32min-s32max |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->task->blocked_on | (-1)-0 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->task->usage.refs.counter | s32min-s32max |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->execute_depth | 0-31 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->fb_base | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->io_mode | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->mutex->first_waiter->task->blocked_lock.owner | (-4611686018427387904)-4611686018427387903 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->reg_block | 0 |
| PARAM_VALUE | 0 | rdev->pm.dpm.boot_ps | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.boot_ps->ps_priv | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->arb_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->bsp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->bsu | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->cac_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.cg_spll_func_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.cg_spll_func_cntl_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.cg_spll_func_cntl_3 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.cg_spll_func_cntl_4 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.cg_spll_spread_spectrum | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.cg_spll_spread_spectrum_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.dll_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mclk_pwrmgt_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mpll_ad_func_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mpll_dq_func_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mpll_func_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mpll_func_cntl_1 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mpll_func_cntl_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mpll_ss1 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mpll_ss2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dsp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dte_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->fan_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mc_reg_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->papm_cfg_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->papm_parm.NearTDPLimitPAPM | 4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->papm_parm.NearTDPLimitTherm | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->papm_parm.PlatformPowerLimit | 4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->papm_parm.dGPU_T_Hysteresis | 5 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->papm_parm.dGPU_T_Limit | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->papm_parm.dGPU_T_Warning | 95 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pbsp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pbsu | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->psp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.flags | 0,2-254 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.level.SQPowerThrottle | 1073692671 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.level.SQPowerThrottle_2 | 2080325631 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.level.aT | u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.level.mcFlags | 0,3 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.level.mclk.vMCLK_PWRMGT_CNTL | 196608-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.level.sclk.vCG_SPLL_FUNC_CNTL_2 | 0,4-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.level.strobeMode | 0-31 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.levelCount | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.flags | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.ACIndex | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.MaxPoweredUpCU | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.SQPowerThrottle | 1073692671 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.SQPowerThrottle_2 | 2080325631 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.UVDWatermark | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.VCEWatermark | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.aT | u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.arbRefreshState | 0,2 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.bSP | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.displayWatermark | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.dpm2.MaxPS_StepDec | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.dpm2.MaxPS_StepInc | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.dpm2.PSDeltaLimit | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.dpm2.PSDeltaWin | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.dpm2.PSSamplingTime | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.dpm2.TgtAct | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.gen2PCIE | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.high_temp_vddc.index | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.high_temp_vddc.phase_settings | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.high_temp_vddc.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.hysteresisDown | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.hysteresisUp | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.low_temp_vddc.index | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.low_temp_vddc.phase_settings | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.low_temp_vddc.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mcFlags | 0-3,8-11 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.mclk_value | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vDLL_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMCLK_PWRMGT_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMPLL_AD_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMPLL_DQ_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMPLL_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMPLL_FUNC_CNTL_1 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMPLL_FUNC_CNTL_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMPLL_SS | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMPLL_SS2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mvdd.index | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mvdd.phase_settings | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mvdd.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.padding | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.sclk.sclk_value | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.sclk.vCG_SPLL_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.sclk.vCG_SPLL_FUNC_CNTL_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.sclk.vCG_SPLL_FUNC_CNTL_3 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.sclk.vCG_SPLL_FUNC_CNTL_4 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.sclk.vCG_SPLL_SPREAD_SPECTRUM | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.sclk.vCG_SPLL_SPREAD_SPECTRUM_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.stateFlags | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.std_vddc.phase_settings | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.std_vddc.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.strobeMode | 0-31 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.vddc.phase_settings | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.vddc.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.vddci.phase_settings | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.vddci.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.levelCount | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.padding2 | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.padding3 | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.dpm2Params.NearTDPLimit | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.dpm2Params.SafePowerLimit | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.dpm2Params.TDPLimit | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.driverState.flags | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.driverState.levelCount | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.extraFlags | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.flags | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.SQPowerThrottle | 1073692671 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.SQPowerThrottle_2 | 2080325631 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.aT | u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.bSP | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.gen2PCIE | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mcFlags | 0,3 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.mclk_value | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vDLL_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMCLK_PWRMGT_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMPLL_AD_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMPLL_DQ_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMPLL_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMPLL_FUNC_CNTL_1 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMPLL_FUNC_CNTL_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMPLL_SS | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMPLL_SS2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mvdd.index | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mvdd.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.sclk.sclk_value | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.sclk.vCG_SPLL_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.sclk.vCG_SPLL_FUNC_CNTL_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.sclk.vCG_SPLL_FUNC_CNTL_3 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.sclk.vCG_SPLL_FUNC_CNTL_4 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.sclk.vCG_SPLL_SPREAD_SPECTRUM | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.std_vddc.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.strobeMode | 0-31 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.vddc.phase_settings | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.vddc.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.vddci.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.levelCount | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.maxVDDCIndexInPPTable | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.systemFlags | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.thermalProtectType | 0-1,255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->soft_regs_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->spll_table_start | 1-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->state_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.fw | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.mutex.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter->list.prev->prev | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->pm.mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->reset_domain->sem.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->reset_domain->sem.first_waiter->handoff_set | 0-1 |
| PARAM_VALUE | 0 | rdev->reset_domain->sem.first_waiter->type | 0-1 |
| PARAM_VALUE | 0 | *rdev->pm.dpm.priv->smc_statetable->lowSMIO | 0-4294967295 |
| PARAM_VALUE | 1 | reg_offset | 12 |
| CAPPED_DATA | 0 | rdev->pm.dpm.boot_ps->ps_priv->performance_level_count | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.priv->acpi_vddc | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.priv->vddc_voltage_table.count | 1 |
| DATA_SOURCE | 0 | rdev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| LOCK2 | 0 | &rdev->pm.mutex | |
| TYPE_LOCK | (struct amdgpu_pm)->mutex |
drivers/gpu/drm/amd/amdgpu/../pm/legacy-dpm/si_dpm.c si_program_response_times() -> si_write_smc_soft_register()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic_funcs | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic_funcs->get_xclk | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden->first_waiter->task->blocked_lock.owner | (-4611686018427387904)-4611686018427387903 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->list.next | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->list.prev->prev | 0,5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->magic | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->task->blocked_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->task->blocked_lock.owner_cpu | 4294967295 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->task->blocked_lock.raw_lock.val.counter | s32min-s32max |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->task->blocked_on | (-1)-0 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->task->usage.refs.counter | s32min-s32max |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->execute_depth | 0-31 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->fb_base | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->io_mode | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->mutex->first_waiter->task->blocked_lock.owner | (-4611686018427387904)-4611686018427387903 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->reg_block | 0 |
| PARAM_VALUE | 0 | rdev->pm.dpm.boot_ps | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.boot_ps->ps_priv | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->arb_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->bsp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->bsu | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->cac_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.cg_spll_func_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.cg_spll_func_cntl_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.cg_spll_func_cntl_3 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.cg_spll_func_cntl_4 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.cg_spll_spread_spectrum | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.cg_spll_spread_spectrum_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.dll_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mclk_pwrmgt_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mpll_ad_func_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mpll_dq_func_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mpll_func_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mpll_func_cntl_1 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mpll_func_cntl_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mpll_ss1 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mpll_ss2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dsp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dte_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->fan_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mc_reg_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->papm_cfg_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->papm_parm.NearTDPLimitPAPM | 4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->papm_parm.NearTDPLimitTherm | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->papm_parm.PlatformPowerLimit | 4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->papm_parm.dGPU_T_Hysteresis | 5 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->papm_parm.dGPU_T_Limit | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->papm_parm.dGPU_T_Warning | 95 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pbsp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pbsu | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->psp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.flags | 0,2-254 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.level.SQPowerThrottle | 1073692671 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.level.SQPowerThrottle_2 | 2080325631 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.level.aT | u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.level.mcFlags | 0,3 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.level.mclk.vMCLK_PWRMGT_CNTL | 196608-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.level.sclk.vCG_SPLL_FUNC_CNTL_2 | 0,4-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.level.strobeMode | 0-31 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.levelCount | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.flags | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.ACIndex | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.MaxPoweredUpCU | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.SQPowerThrottle | 1073692671 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.SQPowerThrottle_2 | 2080325631 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.UVDWatermark | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.VCEWatermark | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.aT | u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.arbRefreshState | 0,2 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.bSP | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.displayWatermark | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.dpm2.MaxPS_StepDec | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.dpm2.MaxPS_StepInc | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.dpm2.PSDeltaLimit | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.dpm2.PSDeltaWin | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.dpm2.PSSamplingTime | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.dpm2.TgtAct | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.gen2PCIE | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.high_temp_vddc.index | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.high_temp_vddc.phase_settings | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.high_temp_vddc.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.hysteresisDown | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.hysteresisUp | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.low_temp_vddc.index | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.low_temp_vddc.phase_settings | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.low_temp_vddc.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mcFlags | 0-3,8-11 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.mclk_value | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vDLL_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMCLK_PWRMGT_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMPLL_AD_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMPLL_DQ_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMPLL_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMPLL_FUNC_CNTL_1 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMPLL_FUNC_CNTL_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMPLL_SS | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMPLL_SS2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mvdd.index | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mvdd.phase_settings | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mvdd.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.padding | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.sclk.sclk_value | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.sclk.vCG_SPLL_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.sclk.vCG_SPLL_FUNC_CNTL_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.sclk.vCG_SPLL_FUNC_CNTL_3 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.sclk.vCG_SPLL_FUNC_CNTL_4 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.sclk.vCG_SPLL_SPREAD_SPECTRUM | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.sclk.vCG_SPLL_SPREAD_SPECTRUM_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.stateFlags | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.std_vddc.phase_settings | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.std_vddc.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.strobeMode | 0-31 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.vddc.phase_settings | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.vddc.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.vddci.phase_settings | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.vddci.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.levelCount | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.padding2 | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.padding3 | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.dpm2Params.NearTDPLimit | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.dpm2Params.SafePowerLimit | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.dpm2Params.TDPLimit | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.driverState.flags | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.driverState.levelCount | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.extraFlags | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.flags | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.SQPowerThrottle | 1073692671 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.SQPowerThrottle_2 | 2080325631 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.aT | u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.bSP | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.gen2PCIE | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mcFlags | 0,3 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.mclk_value | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vDLL_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMCLK_PWRMGT_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMPLL_AD_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMPLL_DQ_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMPLL_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMPLL_FUNC_CNTL_1 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMPLL_FUNC_CNTL_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMPLL_SS | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMPLL_SS2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mvdd.index | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mvdd.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.sclk.sclk_value | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.sclk.vCG_SPLL_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.sclk.vCG_SPLL_FUNC_CNTL_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.sclk.vCG_SPLL_FUNC_CNTL_3 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.sclk.vCG_SPLL_FUNC_CNTL_4 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.sclk.vCG_SPLL_SPREAD_SPECTRUM | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.std_vddc.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.strobeMode | 0-31 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.vddc.phase_settings | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.vddc.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.vddci.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.levelCount | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.maxVDDCIndexInPPTable | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.systemFlags | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.thermalProtectType | 0-1,255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->soft_regs_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->spll_table_start | 1-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->state_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.fw | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.mutex.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter->list.prev->prev | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->pm.mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->reset_domain->sem.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->reset_domain->sem.first_waiter->handoff_set | 0-1 |
| PARAM_VALUE | 0 | rdev->reset_domain->sem.first_waiter->type | 0-1 |
| PARAM_VALUE | 0 | *rdev->pm.dpm.priv->smc_statetable->lowSMIO | 0-4294967295 |
| PARAM_VALUE | 1 | reg_offset | 40 |
| CAPPED_DATA | 0 | rdev->pm.dpm.boot_ps->ps_priv->performance_level_count | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.priv->acpi_vddc | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.priv->vddc_voltage_table.count | 1 |
| DATA_SOURCE | 0 | rdev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| LOCK2 | 0 | &rdev->pm.mutex | |
| TYPE_LOCK | (struct amdgpu_pm)->mutex |
drivers/gpu/drm/amd/amdgpu/../pm/legacy-dpm/si_dpm.c si_program_response_times() -> si_write_smc_soft_register()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic_funcs | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic_funcs->get_xclk | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden->first_waiter->task->blocked_lock.owner | (-4611686018427387904)-4611686018427387903 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->list.next | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->list.prev->prev | 0,5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->magic | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->task->blocked_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->task->blocked_lock.owner_cpu | 4294967295 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->task->blocked_lock.raw_lock.val.counter | s32min-s32max |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->task->blocked_on | (-1)-0 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->task->usage.refs.counter | s32min-s32max |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->execute_depth | 0-31 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->fb_base | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->io_mode | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->mutex->first_waiter->task->blocked_lock.owner | (-4611686018427387904)-4611686018427387903 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->reg_block | 0 |
| PARAM_VALUE | 0 | rdev->pm.dpm.boot_ps | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.boot_ps->ps_priv | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->arb_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->bsp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->bsu | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->cac_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.cg_spll_func_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.cg_spll_func_cntl_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.cg_spll_func_cntl_3 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.cg_spll_func_cntl_4 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.cg_spll_spread_spectrum | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.cg_spll_spread_spectrum_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.dll_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mclk_pwrmgt_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mpll_ad_func_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mpll_dq_func_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mpll_func_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mpll_func_cntl_1 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mpll_func_cntl_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mpll_ss1 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mpll_ss2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dsp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dte_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->fan_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mc_reg_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->papm_cfg_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->papm_parm.NearTDPLimitPAPM | 4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->papm_parm.NearTDPLimitTherm | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->papm_parm.PlatformPowerLimit | 4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->papm_parm.dGPU_T_Hysteresis | 5 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->papm_parm.dGPU_T_Limit | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->papm_parm.dGPU_T_Warning | 95 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pbsp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pbsu | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->psp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.flags | 0,2-254 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.level.SQPowerThrottle | 1073692671 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.level.SQPowerThrottle_2 | 2080325631 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.level.aT | u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.level.mcFlags | 0,3 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.level.mclk.vMCLK_PWRMGT_CNTL | 196608-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.level.sclk.vCG_SPLL_FUNC_CNTL_2 | 0,4-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.level.strobeMode | 0-31 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.levelCount | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.flags | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.ACIndex | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.MaxPoweredUpCU | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.SQPowerThrottle | 1073692671 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.SQPowerThrottle_2 | 2080325631 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.UVDWatermark | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.VCEWatermark | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.aT | u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.arbRefreshState | 0,2 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.bSP | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.displayWatermark | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.dpm2.MaxPS_StepDec | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.dpm2.MaxPS_StepInc | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.dpm2.PSDeltaLimit | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.dpm2.PSDeltaWin | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.dpm2.PSSamplingTime | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.dpm2.TgtAct | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.gen2PCIE | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.high_temp_vddc.index | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.high_temp_vddc.phase_settings | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.high_temp_vddc.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.hysteresisDown | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.hysteresisUp | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.low_temp_vddc.index | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.low_temp_vddc.phase_settings | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.low_temp_vddc.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mcFlags | 0-3,8-11 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.mclk_value | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vDLL_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMCLK_PWRMGT_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMPLL_AD_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMPLL_DQ_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMPLL_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMPLL_FUNC_CNTL_1 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMPLL_FUNC_CNTL_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMPLL_SS | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMPLL_SS2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mvdd.index | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mvdd.phase_settings | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mvdd.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.padding | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.sclk.sclk_value | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.sclk.vCG_SPLL_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.sclk.vCG_SPLL_FUNC_CNTL_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.sclk.vCG_SPLL_FUNC_CNTL_3 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.sclk.vCG_SPLL_FUNC_CNTL_4 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.sclk.vCG_SPLL_SPREAD_SPECTRUM | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.sclk.vCG_SPLL_SPREAD_SPECTRUM_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.stateFlags | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.std_vddc.phase_settings | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.std_vddc.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.strobeMode | 0-31 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.vddc.phase_settings | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.vddc.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.vddci.phase_settings | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.vddci.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.levelCount | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.padding2 | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.padding3 | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.dpm2Params.NearTDPLimit | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.dpm2Params.SafePowerLimit | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.dpm2Params.TDPLimit | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.driverState.flags | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.driverState.levelCount | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.extraFlags | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.flags | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.SQPowerThrottle | 1073692671 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.SQPowerThrottle_2 | 2080325631 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.aT | u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.bSP | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.gen2PCIE | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mcFlags | 0,3 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.mclk_value | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vDLL_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMCLK_PWRMGT_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMPLL_AD_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMPLL_DQ_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMPLL_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMPLL_FUNC_CNTL_1 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMPLL_FUNC_CNTL_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMPLL_SS | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMPLL_SS2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mvdd.index | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mvdd.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.sclk.sclk_value | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.sclk.vCG_SPLL_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.sclk.vCG_SPLL_FUNC_CNTL_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.sclk.vCG_SPLL_FUNC_CNTL_3 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.sclk.vCG_SPLL_FUNC_CNTL_4 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.sclk.vCG_SPLL_SPREAD_SPECTRUM | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.std_vddc.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.strobeMode | 0-31 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.vddc.phase_settings | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.vddc.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.vddci.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.levelCount | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.maxVDDCIndexInPPTable | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.systemFlags | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.thermalProtectType | 0-1,255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->soft_regs_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->spll_table_start | 1-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->state_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.fw | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.mutex.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter->list.prev->prev | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->pm.mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->reset_domain->sem.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->reset_domain->sem.first_waiter->handoff_set | 0-1 |
| PARAM_VALUE | 0 | rdev->reset_domain->sem.first_waiter->type | 0-1 |
| PARAM_VALUE | 0 | *rdev->pm.dpm.priv->smc_statetable->lowSMIO | 0-4294967295 |
| PARAM_VALUE | 1 | reg_offset | 0 |
| CAPPED_DATA | 0 | rdev->pm.dpm.boot_ps->ps_priv->performance_level_count | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.priv->acpi_vddc | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.priv->vddc_voltage_table.count | 1 |
| DATA_SOURCE | 0 | rdev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| LOCK2 | 0 | &rdev->pm.mutex | |
| TYPE_LOCK | (struct amdgpu_pm)->mutex |
drivers/gpu/drm/amd/amdgpu/../pm/legacy-dpm/si_dpm.c si_program_response_times() -> si_write_smc_soft_register()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic_funcs | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic_funcs->get_xclk | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden->first_waiter->task->blocked_lock.owner | (-4611686018427387904)-4611686018427387903 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->list.next | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->list.prev->prev | 0,5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->magic | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->task->blocked_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->task->blocked_lock.owner_cpu | 4294967295 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->task->blocked_lock.raw_lock.val.counter | s32min-s32max |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->task->blocked_on | (-1)-0 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->task->usage.refs.counter | s32min-s32max |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->execute_depth | 0-31 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->fb_base | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->io_mode | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->mutex->first_waiter->task->blocked_lock.owner | (-4611686018427387904)-4611686018427387903 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->reg_block | 0 |
| PARAM_VALUE | 0 | rdev->pm.dpm.boot_ps | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.boot_ps->ps_priv | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->arb_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->bsp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->bsu | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->cac_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.cg_spll_func_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.cg_spll_func_cntl_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.cg_spll_func_cntl_3 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.cg_spll_func_cntl_4 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.cg_spll_spread_spectrum | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.cg_spll_spread_spectrum_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.dll_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mclk_pwrmgt_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mpll_ad_func_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mpll_dq_func_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mpll_func_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mpll_func_cntl_1 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mpll_func_cntl_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mpll_ss1 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mpll_ss2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dsp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dte_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->fan_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mc_reg_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->papm_cfg_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->papm_parm.NearTDPLimitPAPM | 4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->papm_parm.NearTDPLimitTherm | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->papm_parm.PlatformPowerLimit | 4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->papm_parm.dGPU_T_Hysteresis | 5 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->papm_parm.dGPU_T_Limit | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->papm_parm.dGPU_T_Warning | 95 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pbsp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pbsu | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->psp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.flags | 0,2-254 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.level.SQPowerThrottle | 1073692671 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.level.SQPowerThrottle_2 | 2080325631 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.level.aT | u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.level.mcFlags | 0,3 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.level.mclk.vMCLK_PWRMGT_CNTL | 196608-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.level.sclk.vCG_SPLL_FUNC_CNTL_2 | 0,4-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.level.strobeMode | 0-31 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ACPIState.levelCount | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.flags | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.ACIndex | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.MaxPoweredUpCU | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.SQPowerThrottle | 1073692671 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.SQPowerThrottle_2 | 2080325631 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.UVDWatermark | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.VCEWatermark | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.aT | u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.arbRefreshState | 0,2 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.bSP | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.displayWatermark | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.dpm2.MaxPS_StepDec | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.dpm2.MaxPS_StepInc | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.dpm2.PSDeltaLimit | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.dpm2.PSDeltaWin | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.dpm2.PSSamplingTime | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.dpm2.TgtAct | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.gen2PCIE | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.high_temp_vddc.index | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.high_temp_vddc.phase_settings | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.high_temp_vddc.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.hysteresisDown | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.hysteresisUp | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.low_temp_vddc.index | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.low_temp_vddc.phase_settings | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.low_temp_vddc.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mcFlags | 0-3,8-11 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.mclk_value | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vDLL_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMCLK_PWRMGT_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMPLL_AD_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMPLL_DQ_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMPLL_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMPLL_FUNC_CNTL_1 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMPLL_FUNC_CNTL_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMPLL_SS | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mclk.vMPLL_SS2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mvdd.index | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mvdd.phase_settings | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.mvdd.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.padding | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.sclk.sclk_value | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.sclk.vCG_SPLL_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.sclk.vCG_SPLL_FUNC_CNTL_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.sclk.vCG_SPLL_FUNC_CNTL_3 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.sclk.vCG_SPLL_FUNC_CNTL_4 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.sclk.vCG_SPLL_SPREAD_SPECTRUM | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.sclk.vCG_SPLL_SPREAD_SPECTRUM_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.stateFlags | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.std_vddc.phase_settings | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.std_vddc.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.strobeMode | 0-31 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.vddc.phase_settings | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.vddc.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.vddci.phase_settings | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.level.vddci.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.levelCount | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.padding2 | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.ULVState.padding3 | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.dpm2Params.NearTDPLimit | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.dpm2Params.SafePowerLimit | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.dpm2Params.TDPLimit | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.driverState.flags | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.driverState.levelCount | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.extraFlags | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.flags | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.SQPowerThrottle | 1073692671 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.SQPowerThrottle_2 | 2080325631 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.aT | u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.bSP | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.gen2PCIE | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mcFlags | 0,3 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.mclk_value | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vDLL_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMCLK_PWRMGT_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMPLL_AD_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMPLL_DQ_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMPLL_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMPLL_FUNC_CNTL_1 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMPLL_FUNC_CNTL_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMPLL_SS | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mclk.vMPLL_SS2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mvdd.index | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.mvdd.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.sclk.sclk_value | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.sclk.vCG_SPLL_FUNC_CNTL | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.sclk.vCG_SPLL_FUNC_CNTL_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.sclk.vCG_SPLL_FUNC_CNTL_3 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.sclk.vCG_SPLL_FUNC_CNTL_4 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.sclk.vCG_SPLL_SPREAD_SPECTRUM | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.std_vddc.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.strobeMode | 0-31 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.vddc.phase_settings | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.vddc.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.level.vddci.value | 0-u16max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.initialState.levelCount | 1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.maxVDDCIndexInPPTable | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.systemFlags | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->smc_statetable.thermalProtectType | 0-1,255 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->soft_regs_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->spll_table_start | 1-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->state_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.fw | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.mutex.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter->list.prev->prev | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->pm.mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->reset_domain->sem.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->reset_domain->sem.first_waiter->handoff_set | 0-1 |
| PARAM_VALUE | 0 | rdev->reset_domain->sem.first_waiter->type | 0-1 |
| PARAM_VALUE | 0 | *rdev->pm.dpm.priv->smc_statetable->lowSMIO | 0-4294967295 |
| PARAM_VALUE | 1 | reg_offset | 152 |
| PARAM_VALUE | 2 | value | 170 |
| CAPPED_DATA | 0 | rdev->pm.dpm.boot_ps->ps_priv->performance_level_count | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.priv->acpi_vddc | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.priv->vddc_voltage_table.count | 1 |
| DATA_SOURCE | 0 | rdev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| LOCK2 | 0 | &rdev->pm.mutex | |
| TYPE_LOCK | (struct amdgpu_pm)->mutex |
drivers/gpu/drm/amd/amdgpu/../pm/legacy-dpm/si_dpm.c si_program_ulv_memory_timing_parameters() -> si_write_smc_soft_register()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic_funcs | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic_funcs->get_xclk | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden->first_waiter->task->blocked_lock.owner | (-4611686018427387904)-4611686018427387903 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->list.next | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->list.prev->prev | 0,5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->magic | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->task->blocked_lock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->task->blocked_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->task->blocked_lock.owner_cpu | 4294967295 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->task->blocked_lock.raw_lock.val.counter | s32min-s32max |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->task->blocked_on | (-1)-0 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->task->usage.refs.counter | s32min-s32max |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->bios | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->execute_depth | 0-31 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->fb_base | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->io_mode | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->mutex->first_waiter->task->blocked_lock.owner | (-4611686018427387904)-4611686018427387903 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->reg_block | 0 |
| PARAM_VALUE | 0 | rdev->pm.dpm.boot_ps | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.boot_ps->ps_priv | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->arb_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->bsp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->bsu | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->cac_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.cg_spll_func_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.cg_spll_func_cntl_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.cg_spll_func_cntl_3 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.cg_spll_func_cntl_4 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.cg_spll_spread_spectrum | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.cg_spll_spread_spectrum_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.dll_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mclk_pwrmgt_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mpll_ad_func_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mpll_dq_func_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mpll_func_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mpll_func_cntl_1 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mpll_func_cntl_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mpll_ss1 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mpll_ss2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dsp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->dte_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->fan_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mc_reg_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->papm_cfg_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pbsp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pbsu | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->psp | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->soft_regs_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->spll_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->state_table_start | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->vddc_voltage_table.count | 1-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.fw | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.mutex.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter->list.prev->prev | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->pm.mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.raw_lock.val.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->reset_domain->sem.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->reset_domain->sem.first_waiter->handoff_set | 0-1 |
| PARAM_VALUE | 0 | rdev->reset_domain->sem.first_waiter->type | 0-1 |
| PARAM_VALUE | 1 | reg_offset | 140 |
| CAPPED_DATA | 0 | rdev->pm.dpm.priv->acpi_vddc | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.priv->mclk_stutter_mode_threshold | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.priv->ulv.pl.mclk | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.priv->ulv.pl.vddc | 1 |
| CAPPED_DATA | 0 | rdev->pm.dpm.priv->vddc_voltage_table.count | 1 |
| DATA_SOURCE | 0 | rdev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| LOCK2 | 0 | &rdev->pm.mutex | |
| TYPE_LOCK | (struct amdgpu_pm)->mutex |
drivers/gpu/drm/amd/amdgpu/../pm/legacy-dpm/si_dpm.c si_set_pcie_lane_width_in_smc() -> si_write_smc_soft_register()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic_funcs | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden->first_waiter->task->blocked_lock.owner | (-4611686018427387904)-4611686018427387903 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->list.next | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->task->blocked_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->task->blocked_lock.owner_cpu | 4294967295 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->task->blocked_lock.raw_lock.val.counter | s32min-s32max |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->execute_depth | 0-31 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->fb_base | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->io_mode | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->mutex->first_waiter->task->blocked_lock.owner | (-4611686018427387904)-4611686018427387903 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->reg_block | 0 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->cac_enabled | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->enable_power_containment | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->enable_sq_ramping | 0 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->uvd_enabled | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->vddc_voltage_table.count | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->reset_domain->sem.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->reset_domain->sem.first_waiter->handoff_set | 0-1 |
| PARAM_VALUE | 0 | rdev->reset_domain->sem.first_waiter->type | 0-1 |
| PARAM_VALUE | 1 | reg_offset | 244 |
| PARAM_VALUE | 2 | value | 0-2,4,8,16 |
| BUF_SIZE | 0 | rdev | 1256,3984 |
| BUF_SIZE | 0 | rdev | 1256,3984 |
| DATA_SOURCE | 0 | rdev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| LOCK2 | &adev->pm.mutex | ||
| HALF_LOCKED2 | &pool->lock | ||
| TYPE_LOCK | (struct amdgpu_pm)->mutex |
drivers/gpu/drm/amd/amdgpu/../pm/legacy-dpm/si_dpm.c si_upload_smc_data() -> si_write_smc_soft_register()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden->first_waiter->task->blocked_lock.owner | (-4611686018427387904)-4611686018427387903 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->list.next | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->execute_depth | 0-31 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->fb_base | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->io_mode | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->mutex->first_waiter->task->blocked_lock.owner | (-4611686018427387904)-4611686018427387903 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->reg_block | 0 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->cac_enabled | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->enable_power_containment | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->enable_sq_ramping | 0 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->uvd_enabled | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->vddc_voltage_table.count | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->reset_domain->sem.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->reset_domain->sem.first_waiter->handoff_set | 0-1 |
| PARAM_VALUE | 0 | rdev->reset_domain->sem.first_waiter->type | 0-1 |
| PARAM_VALUE | 1 | reg_offset | 196 |
| BUF_SIZE | 0 | rdev | 1256,3984 |
| BUF_SIZE | 0 | rdev | 1256,3984 |
| DATA_SOURCE | 0 | rdev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| UNITS | 2 | value | unit_array_size |
| LOCK2 | &adev->pm.mutex | ||
| HALF_LOCKED2 | &pool->lock | ||
| TYPE_LOCK | (struct amdgpu_pm)->mutex |
drivers/gpu/drm/amd/amdgpu/../pm/legacy-dpm/si_dpm.c si_upload_smc_data() -> si_write_smc_soft_register()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden->first_waiter->task->blocked_lock.owner | (-4611686018427387904)-4611686018427387903 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->list.next | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->execute_depth | 0-31 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->fb_base | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->io_mode | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->mutex->first_waiter->task->blocked_lock.owner | (-4611686018427387904)-4611686018427387903 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->reg_block | 0 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->cac_enabled | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->enable_power_containment | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->enable_sq_ramping | 0 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->uvd_enabled | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->vddc_voltage_table.count | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->reset_domain->sem.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->reset_domain->sem.first_waiter->handoff_set | 0-1 |
| PARAM_VALUE | 0 | rdev->reset_domain->sem.first_waiter->type | 0-1 |
| PARAM_VALUE | 1 | reg_offset | 200 |
| PARAM_VALUE | 2 | value | 0-200 |
| BUF_SIZE | 0 | rdev | 1256,3984 |
| BUF_SIZE | 0 | rdev | 1256,3984 |
| DATA_SOURCE | 0 | rdev | $0 |
| FUZZY_MAX | 2 | value | 0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| LOCK2 | &adev->pm.mutex | ||
| HALF_LOCKED2 | &pool->lock | ||
| TYPE_LOCK | (struct amdgpu_pm)->mutex |
drivers/gpu/drm/amd/amdgpu/../pm/legacy-dpm/si_dpm.c si_upload_smc_data() -> si_write_smc_soft_register()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden->first_waiter->task->blocked_lock.owner | (-4611686018427387904)-4611686018427387903 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->mes.mutex_hidden.first_waiter->list.next | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->execute_depth | 0-31 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->fb_base | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->io_mode | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->mutex->first_waiter->task->blocked_lock.owner | (-4611686018427387904)-4611686018427387903 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->reg_block | 0 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->cac_enabled | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->enable_power_containment | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->enable_sq_ramping | 0 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->uvd_enabled | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->vddc_voltage_table.count | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->reset_domain->sem.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->reset_domain->sem.first_waiter->handoff_set | 0-1 |
| PARAM_VALUE | 0 | rdev->reset_domain->sem.first_waiter->type | 0-1 |
| PARAM_VALUE | 1 | reg_offset | 204 |
| PARAM_VALUE | 2 | value | 0-100 |
| BUF_SIZE | 0 | rdev | 1256,3984 |
| BUF_SIZE | 0 | rdev | 1256,3984 |
| DATA_SOURCE | 0 | rdev | $0 |
| FUZZY_MAX | 2 | value | 0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| LOCK2 | &adev->pm.mutex | ||
| HALF_LOCKED2 | &pool->lock | ||
| TYPE_LOCK | (struct amdgpu_pm)->mutex |