Defined in 1 files as a prototype:
Defined in 1 files as a function:
Referenced in 4 files:
- drivers/gpu/drm/radeon/btc_dpm.c, line 2519
- drivers/gpu/drm/radeon/cypress_dpm.c, line 1803
- drivers/gpu/drm/radeon/ni_dpm.c, line 3558
- drivers/gpu/drm/radeon/rv770_dpm.c, line 2107
Smatch caller information:
drivers/gpu/drm/radeon/rv770_dpm.c rv770_dpm_setup_asic() -> rv770_enable_acpi_pm()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->mmio_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->pciep_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->pciep_rreg | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->boot_in_gen2 | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clk_regs.rv730.cg_spll_func_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clk_regs.rv730.cg_spll_func_cntl_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clk_regs.rv730.cg_spll_func_cntl_3 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clk_regs.rv730.cg_spll_spread_spectrum | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clk_regs.rv730.cg_spll_spread_spectrum_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clk_regs.rv730.dll_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clk_regs.rv730.mclk_pwrmgt_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clk_regs.rv730.mpll_func_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clk_regs.rv730.mpll_func_cntl2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clk_regs.rv730.mpll_func_cntl3 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clk_regs.rv730.mpll_ss | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clk_regs.rv730.mpll_ss2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clk_regs.rv770.cg_spll_func_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clk_regs.rv770.cg_spll_func_cntl_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clk_regs.rv770.cg_spll_func_cntl_3 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clk_regs.rv770.cg_spll_spread_spectrum | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clk_regs.rv770.cg_spll_spread_spectrum_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clk_regs.rv770.dll_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clk_regs.rv770.mclk_pwrmgt_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clk_regs.rv770.mpll_ad_func_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clk_regs.rv770.mpll_ad_func_cntl_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clk_regs.rv770.mpll_dq_func_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clk_regs.rv770.mpll_dq_func_cntl_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clk_regs.rv770.mpll_ss1 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clk_regs.rv770.mpll_ss2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mem_gddr5 | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_gen2 | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->s0_vid_lower_smio_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->pm.pm_method | 2 |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev->agp | (-1),144 |
| CAPPED_DATA | 0 | rdev->rmmio_size | 1 |
| DATA_SOURCE | 0 | rdev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| HOST_DATA | 0 | rdev->config.cik.tile_config | 0-16383[c] |
| HOST_DATA | 0 | rdev->config.r100.hdp_cntl | 0-u32max |
| HOST_DATA | 0 | rdev->config.r300.hdp_cntl | 0-u32max |
| HOST_DATA | 0 | rdev->config.r600.backend_map | 0-3[c] |
| HOST_DATA | 0 | rdev->config.r600.tile_config | 0-262143[c] |
| HOST_DATA | 0 | rdev->config.rv770.tile_config | 0,2048-u32max[c] |
| HOST_DATA | 0 | rdev->gart.num_cpu_pages | 0-524287[c] |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d1grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d2grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d3grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d4grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d5grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d6grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont2 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont3 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont4 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont5 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont6 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.r500.disp_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.r500.hdmi0_status | 0,268435456 |
| HOST_DATA | 0 | rdev->mc.aper_base | 0-1099511627775 |
| HOST_DATA | 0 | rdev->mc.gtt_size | 0-s32max[c] |
| HOST_DATA | 0 | rdev->mc.gtt_start | 0-u64max[c] |
| HOST_DATA | 0 | rdev->mc.mc_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.real_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.vram_end | 0-9223372039002259453,u64max[c] |
| HOST_DATA | 0 | rdev->mc.vram_start | 0-9223372036854775807[c] |
| HOST_DATA | 0 | rdev->num_gb_pipes | 2-4[c] |
| HOST_DATA | 0 | rdev->pm.dpm.priv->clk_regs.rv730.cg_spll_func_cntl | 0-4294967295 |
| HOST_DATA | 0 | rdev->pm.dpm.priv->clk_regs.rv730.cg_spll_func_cntl_2 | 0-4294967295 |
| HOST_DATA | 0 | rdev->pm.dpm.priv->clk_regs.rv730.cg_spll_func_cntl_3 | 0-4294967295 |
| HOST_DATA | 0 | rdev->pm.dpm.priv->clk_regs.rv730.cg_spll_spread_spectrum | 0-4294967295 |
| HOST_DATA | 0 | rdev->pm.dpm.priv->clk_regs.rv730.cg_spll_spread_spectrum_2 | 0-4294967295 |
| HOST_DATA | 0 | rdev->pm.dpm.priv->clk_regs.rv730.dll_cntl | 0-4294967295 |
| HOST_DATA | 0 | rdev->pm.dpm.priv->clk_regs.rv730.mclk_pwrmgt_cntl | 0-4294967295 |
| HOST_DATA | 0 | rdev->pm.dpm.priv->clk_regs.rv730.mpll_func_cntl | 0-4294967295 |
| HOST_DATA | 0 | rdev->pm.dpm.priv->clk_regs.rv730.mpll_func_cntl2 | 0-4294967295 |
| HOST_DATA | 0 | rdev->pm.dpm.priv->clk_regs.rv730.mpll_func_cntl3 | 0-4294967295 |
| HOST_DATA | 0 | rdev->pm.dpm.priv->clk_regs.rv730.mpll_ss | 0-4294967295 |
| HOST_DATA | 0 | rdev->pm.dpm.priv->clk_regs.rv730.mpll_ss2 | 0-4294967295 |
| HOST_DATA | 0 | rdev->pm.dpm.priv->clk_regs.rv770.cg_spll_func_cntl | 0-4294967295 |
| HOST_DATA | 0 | rdev->pm.dpm.priv->clk_regs.rv770.cg_spll_func_cntl_2 | 0-4294967295 |
| HOST_DATA | 0 | rdev->pm.dpm.priv->clk_regs.rv770.cg_spll_func_cntl_3 | 0-4294967295 |
| HOST_DATA | 0 | rdev->pm.dpm.priv->clk_regs.rv770.cg_spll_spread_spectrum | 0-4294967295 |
| HOST_DATA | 0 | rdev->pm.dpm.priv->clk_regs.rv770.cg_spll_spread_spectrum_2 | 0-4294967295 |
| HOST_DATA | 0 | rdev->pm.dpm.priv->clk_regs.rv770.dll_cntl | 0-4294967295 |
| HOST_DATA | 0 | rdev->pm.dpm.priv->clk_regs.rv770.mclk_pwrmgt_cntl | 0-4294967295 |
| HOST_DATA | 0 | rdev->pm.dpm.priv->clk_regs.rv770.mpll_ad_func_cntl | 0-4294967295 |
| HOST_DATA | 0 | rdev->pm.dpm.priv->clk_regs.rv770.mpll_ad_func_cntl_2 | 0-4294967295 |
| HOST_DATA | 0 | rdev->pm.dpm.priv->clk_regs.rv770.mpll_dq_func_cntl | 0-4294967295 |
| HOST_DATA | 0 | rdev->pm.dpm.priv->clk_regs.rv770.mpll_dq_func_cntl_2 | 0-4294967295 |
| HOST_DATA | 0 | rdev->pm.dpm.priv->clk_regs.rv770.mpll_ss1 | 0-4294967295 |
| HOST_DATA | 0 | rdev->pm.dpm.priv->clk_regs.rv770.mpll_ss2 | 0-4294967295 |
| HOST_DATA | 0 | rdev->pm.dpm.priv->s0_vid_lower_smio_cntl | 0-4294967295 |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.current_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.default_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.num_power_states | |
| LOCK2 | &rdev->pm.mutex | ||
| TYPE_LOCK | (struct radeon_pm)->mutex |
drivers/gpu/drm/radeon/btc_dpm.c btc_dpm_setup_asic() -> rv770_enable_acpi_pm()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->mmio_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->pciep_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->pciep_rreg | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->boot_in_gen2 | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->bootup_arb_registers.mc_arb_burst_time | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->bootup_arb_registers.mc_arb_dram_timing | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->bootup_arb_registers.mc_arb_dram_timing2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->bootup_arb_registers.mc_arb_rfsh_rate | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clk_regs.rv770.cg_spll_func_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clk_regs.rv770.cg_spll_func_cntl_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clk_regs.rv770.cg_spll_func_cntl_3 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clk_regs.rv770.cg_spll_spread_spectrum | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clk_regs.rv770.cg_spll_spread_spectrum_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clk_regs.rv770.dll_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clk_regs.rv770.mclk_pwrmgt_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clk_regs.rv770.mpll_ad_func_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clk_regs.rv770.mpll_ad_func_cntl_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clk_regs.rv770.mpll_dq_func_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clk_regs.rv770.mpll_dq_func_cntl_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clk_regs.rv770.mpll_ss1 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clk_regs.rv770.mpll_ss2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mem_gddr5 | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_gen2 | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->s0_vid_lower_smio_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->pm.pm_method | 2 |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev->agp | (-1),144 |
| CAPPED_DATA | 0 | rdev->rmmio_size | 1 |
| DATA_SOURCE | 0 | rdev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| HOST_DATA | 0 | rdev->config.cik.tile_config | 0-16383[c] |
| HOST_DATA | 0 | rdev->config.r100.hdp_cntl | 0-u32max |
| HOST_DATA | 0 | rdev->config.r300.hdp_cntl | 0-u32max |
| HOST_DATA | 0 | rdev->config.r600.backend_map | 0-3[c] |
| HOST_DATA | 0 | rdev->config.r600.tile_config | 0-262143[c] |
| HOST_DATA | 0 | rdev->config.rv770.tile_config | 0,2048-u32max[c] |
| HOST_DATA | 0 | rdev->gart.num_cpu_pages | 0-524287[c] |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d1grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d2grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d3grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d4grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d5grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d6grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont2 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont3 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont4 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont5 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont6 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.r500.disp_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.r500.hdmi0_status | 0,268435456 |
| HOST_DATA | 0 | rdev->mc.aper_base | 0-1099511627775 |
| HOST_DATA | 0 | rdev->mc.gtt_size | 0-s32max[c] |
| HOST_DATA | 0 | rdev->mc.gtt_start | 0-u64max[c] |
| HOST_DATA | 0 | rdev->mc.mc_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.real_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.vram_end | 0-9223372039002259453,u64max[c] |
| HOST_DATA | 0 | rdev->mc.vram_start | 0-9223372036854775807[c] |
| HOST_DATA | 0 | rdev->num_gb_pipes | 2-4[c] |
| HOST_DATA | 0 | rdev->pm.dpm.priv->bootup_arb_registers.mc_arb_burst_time | 0-4294967295 |
| HOST_DATA | 0 | rdev->pm.dpm.priv->bootup_arb_registers.mc_arb_dram_timing | 0-4294967295 |
| HOST_DATA | 0 | rdev->pm.dpm.priv->bootup_arb_registers.mc_arb_dram_timing2 | 0-4294967295 |
| HOST_DATA | 0 | rdev->pm.dpm.priv->bootup_arb_registers.mc_arb_rfsh_rate | 0-4294967295 |
| HOST_DATA | 0 | rdev->pm.dpm.priv->clk_regs.rv770.cg_spll_func_cntl | 0-4294967295 |
| HOST_DATA | 0 | rdev->pm.dpm.priv->clk_regs.rv770.cg_spll_func_cntl_2 | 0-4294967295 |
| HOST_DATA | 0 | rdev->pm.dpm.priv->clk_regs.rv770.cg_spll_func_cntl_3 | 0-4294967295 |
| HOST_DATA | 0 | rdev->pm.dpm.priv->clk_regs.rv770.cg_spll_spread_spectrum | 0-4294967295 |
| HOST_DATA | 0 | rdev->pm.dpm.priv->clk_regs.rv770.cg_spll_spread_spectrum_2 | 0-4294967295 |
| HOST_DATA | 0 | rdev->pm.dpm.priv->clk_regs.rv770.dll_cntl | 0-4294967295 |
| HOST_DATA | 0 | rdev->pm.dpm.priv->clk_regs.rv770.mclk_pwrmgt_cntl | 0-4294967295 |
| HOST_DATA | 0 | rdev->pm.dpm.priv->clk_regs.rv770.mpll_ad_func_cntl | 0-4294967295 |
| HOST_DATA | 0 | rdev->pm.dpm.priv->clk_regs.rv770.mpll_ad_func_cntl_2 | 0-4294967295 |
| HOST_DATA | 0 | rdev->pm.dpm.priv->clk_regs.rv770.mpll_dq_func_cntl | 0-4294967295 |
| HOST_DATA | 0 | rdev->pm.dpm.priv->clk_regs.rv770.mpll_dq_func_cntl_2 | 0-4294967295 |
| HOST_DATA | 0 | rdev->pm.dpm.priv->clk_regs.rv770.mpll_ss1 | 0-4294967295 |
| HOST_DATA | 0 | rdev->pm.dpm.priv->clk_regs.rv770.mpll_ss2 | 0-4294967295 |
| HOST_DATA | 0 | rdev->pm.dpm.priv->s0_vid_lower_smio_cntl | 0-4294967295 |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.current_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.default_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.num_power_states | |
| LOCK2 | &rdev->pm.mutex | ||
| TYPE_LOCK | (struct radeon_pm)->mutex |
drivers/gpu/drm/radeon/ni_dpm.c ni_dpm_setup_asic() -> rv770_enable_acpi_pm()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->mmio_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->pciep_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->pciep_rreg | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->boot_in_gen2 | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->bootup_arb_registers.mc_arb_burst_time | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->bootup_arb_registers.mc_arb_dram_timing | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->bootup_arb_registers.mc_arb_dram_timing2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->bootup_arb_registers.mc_arb_rfsh_rate | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.cg_spll_func_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.cg_spll_func_cntl_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.cg_spll_func_cntl_3 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.cg_spll_func_cntl_4 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.cg_spll_spread_spectrum | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.cg_spll_spread_spectrum_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.dll_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mclk_pwrmgt_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mpll_ad_func_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mpll_ad_func_cntl_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mpll_dq_func_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mpll_dq_func_cntl_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mpll_ss1 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clock_registers.mpll_ss2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mem_gddr5 | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_gen2 | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->pm.pm_method | 2 |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev->agp | (-1),144 |
| DATA_SOURCE | 0 | rdev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| HOST_DATA | 0 | rdev->config.cik.tile_config | 0-16383[c] |
| HOST_DATA | 0 | rdev->config.r100.hdp_cntl | 0-u32max |
| HOST_DATA | 0 | rdev->config.r300.hdp_cntl | 0-u32max |
| HOST_DATA | 0 | rdev->config.r600.backend_map | 0-3[c] |
| HOST_DATA | 0 | rdev->config.r600.tile_config | 0-262143[c] |
| HOST_DATA | 0 | rdev->config.rv770.tile_config | 0,2048-u32max[c] |
| HOST_DATA | 0 | rdev->gart.num_cpu_pages | 0-524287[c] |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d1grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d2grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d3grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d4grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d5grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d6grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont2 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont3 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont4 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont5 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont6 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.r500.disp_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.r500.hdmi0_status | 0,268435456 |
| HOST_DATA | 0 | rdev->mc.aper_base | 0-1099511627775 |
| HOST_DATA | 0 | rdev->mc.gtt_size | 0-s32max[c] |
| HOST_DATA | 0 | rdev->mc.gtt_start | 0-u64max[c] |
| HOST_DATA | 0 | rdev->mc.mc_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.real_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.vram_end | 0-9223372039002259453,u64max[c] |
| HOST_DATA | 0 | rdev->mc.vram_start | 0-9223372036854775807[c] |
| HOST_DATA | 0 | rdev->num_gb_pipes | 2-4[c] |
| HOST_DATA | 0 | rdev->pm.dpm.priv->bootup_arb_registers.mc_arb_burst_time | 0-4294967295 |
| HOST_DATA | 0 | rdev->pm.dpm.priv->bootup_arb_registers.mc_arb_dram_timing | 0-4294967295 |
| HOST_DATA | 0 | rdev->pm.dpm.priv->bootup_arb_registers.mc_arb_dram_timing2 | 0-4294967295 |
| HOST_DATA | 0 | rdev->pm.dpm.priv->bootup_arb_registers.mc_arb_rfsh_rate | 0-4294967295 |
| HOST_DATA | 0 | rdev->pm.dpm.priv->clock_registers.cg_spll_func_cntl | 0-4294967295 |
| HOST_DATA | 0 | rdev->pm.dpm.priv->clock_registers.cg_spll_func_cntl_2 | 0-4294967295 |
| HOST_DATA | 0 | rdev->pm.dpm.priv->clock_registers.cg_spll_func_cntl_3 | 0-4294967295 |
| HOST_DATA | 0 | rdev->pm.dpm.priv->clock_registers.cg_spll_func_cntl_4 | 0-4294967295 |
| HOST_DATA | 0 | rdev->pm.dpm.priv->clock_registers.cg_spll_spread_spectrum | 0-4294967295 |
| HOST_DATA | 0 | rdev->pm.dpm.priv->clock_registers.cg_spll_spread_spectrum_2 | 0-4294967295 |
| HOST_DATA | 0 | rdev->pm.dpm.priv->clock_registers.dll_cntl | 0-4294967295 |
| HOST_DATA | 0 | rdev->pm.dpm.priv->clock_registers.mclk_pwrmgt_cntl | 0-4294967295 |
| HOST_DATA | 0 | rdev->pm.dpm.priv->clock_registers.mpll_ad_func_cntl | 0-4294967295 |
| HOST_DATA | 0 | rdev->pm.dpm.priv->clock_registers.mpll_ad_func_cntl_2 | 0-4294967295 |
| HOST_DATA | 0 | rdev->pm.dpm.priv->clock_registers.mpll_dq_func_cntl | 0-4294967295 |
| HOST_DATA | 0 | rdev->pm.dpm.priv->clock_registers.mpll_dq_func_cntl_2 | 0-4294967295 |
| HOST_DATA | 0 | rdev->pm.dpm.priv->clock_registers.mpll_ss1 | 0-4294967295 |
| HOST_DATA | 0 | rdev->pm.dpm.priv->clock_registers.mpll_ss2 | 0-4294967295 |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.current_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.default_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.num_power_states | |
| LOCK2 | &rdev->pm.mutex | ||
| TYPE_LOCK | (struct radeon_pm)->mutex |
drivers/gpu/drm/radeon/cypress_dpm.c cypress_dpm_setup_asic() -> rv770_enable_acpi_pm()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->asic->get_xclk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->mmio_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->bios | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->fb_base | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->io_mode | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->reg_block | 0 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->scratch_mutex.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->scratch_mutex.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->mode_info.atom_context->scratch_mutex.first_waiter->list.prev->prev | 5159360019465732096 |
| PARAM_VALUE | 0 | rdev->pciep_idx_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rdev->pciep_rreg | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv | 4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->boot_in_gen2 | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clk_regs.rv770.cg_spll_func_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clk_regs.rv770.cg_spll_func_cntl_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clk_regs.rv770.cg_spll_func_cntl_3 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clk_regs.rv770.cg_spll_spread_spectrum | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clk_regs.rv770.cg_spll_spread_spectrum_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clk_regs.rv770.dll_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clk_regs.rv770.mclk_pwrmgt_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clk_regs.rv770.mpll_ad_func_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clk_regs.rv770.mpll_ad_func_cntl_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clk_regs.rv770.mpll_dq_func_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clk_regs.rv770.mpll_dq_func_cntl_2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clk_regs.rv770.mpll_ss1 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->clk_regs.rv770.mpll_ss2 | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->max_vddc | 0 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->mem_gddr5 | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->pcie_gen2 | 0-1 |
| PARAM_VALUE | 0 | rdev->pm.dpm.priv->s0_vid_lower_smio_cntl | 0-4294967295 |
| PARAM_VALUE | 0 | rdev->pm.mutex.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rdev->pm.mutex.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | rdev->pm.mutex.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | rdev->pm.pm_method | 2 |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev | s32min-(-1),1-s32max |
| BUF_SIZE | 0 | rdev->agp | (-1),144 |
| DATA_SOURCE | 0 | rdev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| HOST_DATA | 0 | rdev->config.cik.tile_config | 0-16383[c] |
| HOST_DATA | 0 | rdev->config.r100.hdp_cntl | 0-u32max |
| HOST_DATA | 0 | rdev->config.r300.hdp_cntl | 0-u32max |
| HOST_DATA | 0 | rdev->config.r600.backend_map | 0-3[c] |
| HOST_DATA | 0 | rdev->config.r600.tile_config | 0-262143[c] |
| HOST_DATA | 0 | rdev->config.rv770.tile_config | 0,2048-u32max[c] |
| HOST_DATA | 0 | rdev->gart.num_cpu_pages | 0-524287[c] |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d1grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d2grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d3grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d4grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d5grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.d6grph_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont2 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont3 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont4 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont5 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.cik.disp_int_cont6 | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.r500.disp_int | 0-u32max |
| HOST_DATA | 0 | rdev->irq.stat_regs.r500.hdmi0_status | 0,268435456 |
| HOST_DATA | 0 | rdev->mc.aper_base | 0-1099511627775 |
| HOST_DATA | 0 | rdev->mc.gtt_size | 0-s32max[c] |
| HOST_DATA | 0 | rdev->mc.gtt_start | 0-u64max[c] |
| HOST_DATA | 0 | rdev->mc.mc_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.real_vram_size | 0-4503599626321920 |
| HOST_DATA | 0 | rdev->mc.vram_end | 0-9223372039002259453,u64max[c] |
| HOST_DATA | 0 | rdev->mc.vram_start | 0-9223372036854775807[c] |
| HOST_DATA | 0 | rdev->num_gb_pipes | 2-4[c] |
| HOST_DATA | 0 | rdev->pm.dpm.priv->clk_regs.rv770.cg_spll_func_cntl | 0-4294967295 |
| HOST_DATA | 0 | rdev->pm.dpm.priv->clk_regs.rv770.cg_spll_func_cntl_2 | 0-4294967295 |
| HOST_DATA | 0 | rdev->pm.dpm.priv->clk_regs.rv770.cg_spll_func_cntl_3 | 0-4294967295 |
| HOST_DATA | 0 | rdev->pm.dpm.priv->clk_regs.rv770.cg_spll_spread_spectrum | 0-4294967295 |
| HOST_DATA | 0 | rdev->pm.dpm.priv->clk_regs.rv770.cg_spll_spread_spectrum_2 | 0-4294967295 |
| HOST_DATA | 0 | rdev->pm.dpm.priv->clk_regs.rv770.dll_cntl | 0-4294967295 |
| HOST_DATA | 0 | rdev->pm.dpm.priv->clk_regs.rv770.mclk_pwrmgt_cntl | 0-4294967295 |
| HOST_DATA | 0 | rdev->pm.dpm.priv->clk_regs.rv770.mpll_ad_func_cntl | 0-4294967295 |
| HOST_DATA | 0 | rdev->pm.dpm.priv->clk_regs.rv770.mpll_ad_func_cntl_2 | 0-4294967295 |
| HOST_DATA | 0 | rdev->pm.dpm.priv->clk_regs.rv770.mpll_dq_func_cntl | 0-4294967295 |
| HOST_DATA | 0 | rdev->pm.dpm.priv->clk_regs.rv770.mpll_dq_func_cntl_2 | 0-4294967295 |
| HOST_DATA | 0 | rdev->pm.dpm.priv->clk_regs.rv770.mpll_ss1 | 0-4294967295 |
| HOST_DATA | 0 | rdev->pm.dpm.priv->clk_regs.rv770.mpll_ss2 | 0-4294967295 |
| HOST_DATA | 0 | rdev->pm.dpm.priv->s0_vid_lower_smio_cntl | 0-4294967295 |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.current_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.default_power_state_index | |
| NO_OVERFLOW_SIMPLE | 0 | rdev->pm.num_power_states | |
| LOCK2 | &rdev->pm.mutex | ||
| TYPE_LOCK | (struct radeon_pm)->mutex |