| PARAM_VALUE |
0 |
rtwdev |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->afh_5g |
0,4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->afh_5g_num |
0-1,19 |
| PARAM_VALUE |
0 |
rtwdev->chip->agc_tbl |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->agc_tbl->parse |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->ampdu_density |
4,7 |
| PARAM_VALUE |
0 |
rtwdev->chip->ant_isolation |
10,15 |
| PARAM_VALUE |
0 |
rtwdev->chip->band |
1-255 |
| PARAM_VALUE |
0 |
rtwdev->chip->bb_tbl |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->bb_tbl->parse |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->bfer_mu_max_num |
0-1 |
| PARAM_VALUE |
0 |
rtwdev->chip->bfer_su_max_num |
0,2 |
| PARAM_VALUE |
0 |
rtwdev->chip->bt_afh_span_bw20 |
32,36 |
| PARAM_VALUE |
0 |
rtwdev->chip->bt_afh_span_bw40 |
48,54 |
| PARAM_VALUE |
0 |
rtwdev->chip->bt_desired_ver |
0,6,28,32,47,70,98 |
| PARAM_VALUE |
0 |
rtwdev->chip->bt_rssi_step |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->bt_rssi_type |
0-1 |
| PARAM_VALUE |
0 |
rtwdev->chip->btg_reg |
0,4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->btg_reg->addr |
103,256,1360-1361,1400-1402,1552,1560,1704,1792,1800,1808,2124,2156,2212,2572,3152,3584,3588,3592,3600,3604,3664,4352,5632,5636,5640,5664,5672,5680,5688,5696,5704,6224,6736,7536 |
| PARAM_VALUE |
0 |
rtwdev->chip->btg_reg->mask |
0,3,12,48,127-128,255,1671,2047,16128,32512,65280,196608,786432,16711680,4278190080 |
| PARAM_VALUE |
0 |
rtwdev->chip->c2h_ra_report_size |
4,6-7 |
| PARAM_VALUE |
0 |
rtwdev->chip->coex_info_hw_regs |
0,4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->coex_info_hw_regs_num |
0,19,22,24 |
| PARAM_VALUE |
0 |
rtwdev->chip->coex_para_ver |
0,20180330,20190509,420030278,537330182,537330223,637666336 |
| PARAM_VALUE |
0 |
rtwdev->chip->csi_buf_pg_num |
0,50 |
| PARAM_VALUE |
0 |
rtwdev->chip->default_1ss_tx_path |
0-1 |
| PARAM_VALUE |
0 |
rtwdev->chip->dig_max |
0 |
| PARAM_VALUE |
0 |
rtwdev->chip->dig_min |
28,32 |
| PARAM_VALUE |
0 |
rtwdev->chip->dpd_ratemask |
0,1023 |
| PARAM_VALUE |
0 |
rtwdev->chip->edcca_th |
0,4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->edcca_th->hw_reg.addr |
103,256,1360-1361,1400-1402,1552,1560,1704,1792,1800,1808,2124,2156,2212,2572,3152,3584,3588,3592,3600,3604,3664,4352,5632,5636,5640,5664,5672,5680,5688,5696,5704,6224,6736,7536 |
| PARAM_VALUE |
0 |
rtwdev->chip->edcca_th->hw_reg.mask |
0,3,12,48,127-128,255,1671,2047,16128,32512,65280,196608,786432,16711680,4278190080 |
| PARAM_VALUE |
0 |
rtwdev->chip->edcca_th->offset |
0,128 |
| PARAM_VALUE |
0 |
rtwdev->chip->fix_rf_phy_num |
0,2 |
| PARAM_VALUE |
0 |
rtwdev->chip->fw_name |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->fw_rxff_size |
0,12288 |
| PARAM_VALUE |
0 |
rtwdev->chip->fwcd_segs |
0,4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->fwcd_segs->num |
5 |
| PARAM_VALUE |
0 |
rtwdev->chip->ht_supported |
1 |
| PARAM_VALUE |
0 |
rtwdev->chip->id |
0-7 |
| PARAM_VALUE |
0 |
rtwdev->chip->intf_table |
0,4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->intf_table->usb2_para |
0,3135563856572149760,3227200450893516800,7960269108459917312 |
| PARAM_VALUE |
0 |
rtwdev->chip->intf_table->usb2_para->value |
0,384,4096,6208,12352,12828,13718-13719,18978,24774,25472,38143,38435,43073,49158,65294,65487 |
| PARAM_VALUE |
0 |
rtwdev->chip->intf_table->usb3_para |
0,163768296244809728,1802327836022038528,8132137887571505152 |
| PARAM_VALUE |
0 |
rtwdev->chip->intf_table->usb3_para->value |
0,384,4096,6208,12352,12828,13718-13719,18978,24774,25472,38143,38435,43073,49158,65294,65487 |
| PARAM_VALUE |
0 |
rtwdev->chip->iqk_threshold |
8 |
| PARAM_VALUE |
0 |
rtwdev->chip->l2h_th_ini_ad |
0,36,45 |
| PARAM_VALUE |
0 |
rtwdev->chip->l2h_th_ini_cs |
0,60 |
| PARAM_VALUE |
0 |
rtwdev->chip->lck_threshold |
0,8 |
| PARAM_VALUE |
0 |
rtwdev->chip->log_efuse_size |
512,768 |
| PARAM_VALUE |
0 |
rtwdev->chip->lps_deep_mode_supported |
0,2,6 |
| PARAM_VALUE |
0 |
rtwdev->chip->ltecoex_addr |
0,4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->ltecoex_addr->ctrl |
1984,5888 |
| PARAM_VALUE |
0 |
rtwdev->chip->ltecoex_addr->rdata |
1992,5896 |
| PARAM_VALUE |
0 |
rtwdev->chip->ltecoex_addr->wdata |
1988,5892 |
| PARAM_VALUE |
0 |
rtwdev->chip->mac_tbl |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->mac_tbl->parse |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->max_power_index |
63,127 |
| PARAM_VALUE |
0 |
rtwdev->chip->max_scan_ie_len |
384,2304 |
| PARAM_VALUE |
0 |
rtwdev->chip->max_sched_scan_ssids |
0,4 |
| PARAM_VALUE |
0 |
rtwdev->chip->ops |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->ops->cfg_csi_rate |
0,7303305894888177664 |
| PARAM_VALUE |
0 |
rtwdev->chip->ops->cfg_ldo25 |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->ops->coex_set_ant_switch |
0,699282874203996160,3208798019526348800,5235621370525954048,7644151621245079552 |
| PARAM_VALUE |
0 |
rtwdev->chip->ops->coex_set_gnt_fix |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->ops->coex_set_init |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->ops->coex_set_rfe_type |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->ops->coex_set_wl_rx_gain |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->ops->coex_set_wl_tx_power |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->ops->config_bfee |
0,3066690316628549632,6458267715663458304,7023931636680990720 |
| PARAM_VALUE |
0 |
rtwdev->chip->ops->config_txrx_mode |
0,8536711685404151808 |
| PARAM_VALUE |
0 |
rtwdev->chip->ops->dump_fw_crash |
0,8550957186331455488 |
| PARAM_VALUE |
0 |
rtwdev->chip->ops->efuse_grant |
0,642987823147896832,923716167126835200,3738210981134782464,5635832924971470848 |
| PARAM_VALUE |
0 |
rtwdev->chip->ops->false_alarm_statistics |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->ops->fill_txdesc_checksum |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->ops->mac_postinit |
0,4560463045825736704,8103904664606908416 |
| PARAM_VALUE |
0 |
rtwdev->chip->ops->phy_calibration |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->ops->power_off |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->ops->power_on |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->ops->pwr_track |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->ops->query_phy_status |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->ops->read_efuse |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->ops->read_rf |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->ops->set_ampdu_factor |
0,5283071514421735424 |
| PARAM_VALUE |
0 |
rtwdev->chip->ops->set_antenna |
0,5758865020968366080,7730124460713713664 |
| PARAM_VALUE |
0 |
rtwdev->chip->ops->set_channel |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->ops->set_tx_power_index |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->ops->shutdown |
0,8122490915271680000 |
| PARAM_VALUE |
0 |
rtwdev->chip->ops->write_rf |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->page_size |
128,256,512 |
| PARAM_VALUE |
0 |
rtwdev->chip->page_table |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->phy_efuse_size |
256,512,1024 |
| PARAM_VALUE |
0 |
rtwdev->chip->prioq_addrs |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->pstdma_type |
0 |
| PARAM_VALUE |
0 |
rtwdev->chip->ptct_efuse_size |
0,15,96-97,124 |
| PARAM_VALUE |
0 |
rtwdev->chip->pwr_off_seq |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->pwr_off_seq->offset |
0-8,16,18,20-21,28-29,31-37,40-41,45-46,64-71,73-74,78-79,88,90,97-99,102-105,112-113,116-119,124,127-129,134,144-147,175,239-240,256-257,768-769,1314,1363,1528-1531,3072,3584,4098,4120,4165,4196,4264-4266,4290-s64max |
| PARAM_VALUE |
0 |
rtwdev->chip->pwr_on_seq |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->pwr_on_seq->offset |
0-8,16,18,20-21,28-29,31-37,40-41,45-46,64-71,73-74,78-79,88,90,97-99,102-105,112-113,116-119,124,127-129,134,144-147,175,239-240,256-257,768-769,1314,1363,1528-1531,3072,3584,4098,4120,4165,4196,4264-4266,4290-s64max |
| PARAM_VALUE |
0 |
rtwdev->chip->rfe_defs |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->rfe_defs_size |
1-2,4,6-7 |
| PARAM_VALUE |
0 |
rtwdev->chip->rfk_init_tbl |
0,4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->rqpn_table |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->rssi_tolerance |
2 |
| PARAM_VALUE |
0 |
rtwdev->chip->rsvd_drv_pg_num |
8-9,16 |
| PARAM_VALUE |
0 |
rtwdev->chip->rx_buf_desc_sz |
8 |
| PARAM_VALUE |
0 |
rtwdev->chip->rx_pkt_desc_sz |
24 |
| PARAM_VALUE |
0 |
rtwdev->chip->rxff_size |
16128,16384,23552,24576 |
| PARAM_VALUE |
0 |
rtwdev->chip->sys_func_en |
216,220,253 |
| PARAM_VALUE |
0 |
rtwdev->chip->table_nsant |
0,4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->table_nsant_num |
0,24 |
| PARAM_VALUE |
0 |
rtwdev->chip->table_sant |
0,4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->table_sant_num |
0,38 |
| PARAM_VALUE |
0 |
rtwdev->chip->tdma_nsant |
0,4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->tdma_nsant_num |
0,22 |
| PARAM_VALUE |
0 |
rtwdev->chip->tdma_sant |
0,4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->tdma_sant_num |
0,28 |
| PARAM_VALUE |
0 |
rtwdev->chip->tx_buf_desc_sz |
16 |
| PARAM_VALUE |
0 |
rtwdev->chip->tx_pkt_desc_sz |
40,48 |
| PARAM_VALUE |
0 |
rtwdev->chip->txff_size |
32768,65536,131072,260864,262144 |
| PARAM_VALUE |
0 |
rtwdev->chip->txgi_factor |
1-2 |
| PARAM_VALUE |
0 |
rtwdev->chip->usb_tx_agg_desc_num |
1,3,6 |
| PARAM_VALUE |
0 |
rtwdev->chip->wl_fw_desired_ver |
0 |
| PARAM_VALUE |
0 |
rtwdev->chip->wl_rf_para_num |
6-7 |
| PARAM_VALUE |
0 |
rtwdev->chip->wl_rf_para_rx |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->wl_rf_para_tx |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->wl_rssi_step |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->wlan_cpu |
0-1 |
| PARAM_VALUE |
0 |
rtwdev->chip->wow_fw_name |
0,4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->wowlan_stub |
0,4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->fifo.rqpn->dma_map_be |
1-2 |
| PARAM_VALUE |
0 |
rtwdev->fifo.rqpn->dma_map_bk |
1-3 |
| PARAM_VALUE |
0 |
rtwdev->fifo.rqpn->dma_map_hi |
3 |
| PARAM_VALUE |
0 |
rtwdev->fifo.rqpn->dma_map_mg |
0,3 |
| PARAM_VALUE |
0 |
rtwdev->fifo.rqpn->dma_map_vi |
2-3 |
| PARAM_VALUE |
0 |
rtwdev->fifo.rqpn->dma_map_vo |
2-3 |
| PARAM_VALUE |
0 |
rtwdev->hci.ops |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->hci.ops->deep_ps |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->hci.ops->dynamic_rx_agg |
0,4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->hci.ops->flush_queues |
0,4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->hci.ops->interface_cfg |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->hci.ops->link_ps |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->hci.ops->read16 |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->hci.ops->read32 |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->hci.ops->read8 |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->hci.ops->setup |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->hci.ops->start |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->hci.ops->stop |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->hci.ops->tx_write |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->hci.ops->write16 |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->hci.ops->write32 |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->hci.ops->write8 |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->hci.ops->write_data_h2c |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->hci.ops->write_data_rsvd_page |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->hci.ops->write_firmware_page |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->regd.regulatory->txpwr_regd_2g |
0-12 |
| PARAM_VALUE |
0 |
rtwdev->regd.regulatory->txpwr_regd_5g |
0-12 |
| PARAM_VALUE |
2 |
len |
2 |
| BUF_SIZE |
0 |
rtwdev |
s32min-(-1),1-s32max |
| BUF_SIZE |
0 |
rtwdev |
s32min-(-1),1-s32max |
| BUF_SIZE |
0 |
rtwdev->dev |
(-1),1616 |
| BUF_SIZE |
0 |
rtwdev->hci.ops |
(-1),152 |
| BUF_SIZE |
0 |
rtwdev->hw |
(-1),208 |
| DATA_SOURCE |
0 |
rtwdev |
$0 |
| DATA_SOURCE |
1 |
addr |
$1 |
| RX_PATH |
|
|
|
| TASK_NOT_RUNNING |
|
|
|
| HOST_DATA |
0 |
rtwdev->coex.stat.ampdu_max_time |
0-255 |
| HOST_DATA |
0 |
rtwdev->coex.stat.darfrc |
0-u32max |
| HOST_DATA |
0 |
rtwdev->coex.stat.darfrch |
0-u32max |
| HOST_DATA |
0 |
rtwdev->coex.stat.hi_pri_tx |
0-u32max[c] |
| HOST_DATA |
0 |
rtwdev->coex.stat.lo_pri_rx |
0-u32max |
| HOST_DATA |
0 |
rtwdev->coex.stat.lo_pri_tx |
0-u32max[c] |
| HOST_DATA |
0 |
rtwdev->coex.stat.retry_limit |
0-u16max |
| HOST_DATA |
0 |
rtwdev->dm_info.cck_cca_cnt |
0-u32max |
| HOST_DATA |
0 |
rtwdev->dm_info.cck_err_cnt |
0-u32max |
| HOST_DATA |
0 |
rtwdev->dm_info.cck_fa_avg |
0-1073741823 |
| HOST_DATA |
0 |
rtwdev->dm_info.cck_fa_cnt |
0-u16max |
| HOST_DATA |
0 |
rtwdev->dm_info.cck_ok_cnt |
0-u32max[c] |
| HOST_DATA |
0 |
rtwdev->dm_info.cck_pd_default |
0-31 |
| HOST_DATA |
0 |
rtwdev->dm_info.ht_err_cnt |
0-u32max |
| HOST_DATA |
0 |
rtwdev->dm_info.ht_ok_cnt |
0-u32max[c] |
| HOST_DATA |
0 |
rtwdev->dm_info.ofdm_cca_cnt |
0-u32max |
| HOST_DATA |
0 |
rtwdev->dm_info.ofdm_err_cnt |
0-u32max |
| HOST_DATA |
0 |
rtwdev->dm_info.ofdm_fa_cnt |
0-524280 |
| HOST_DATA |
0 |
rtwdev->dm_info.ofdm_ok_cnt |
0-u32max[c] |
| HOST_DATA |
0 |
rtwdev->dm_info.total_cca_cnt |
0-u32max |
| HOST_DATA |
0 |
rtwdev->dm_info.total_fa_cnt |
0-589815 |
| HOST_DATA |
0 |
rtwdev->dm_info.vht_err_cnt |
0-u32max |
| HOST_DATA |
0 |
rtwdev->dm_info.vht_ok_cnt |
0-u32max[c] |
| HOST_DATA |
0 |
rtwdev->hal.chip_version |
0-u32max |
| HOST_DATA |
0 |
rtwdev->wow.txpause |
0-255 |
| USER_DATA |
0 |
rtwdev->ap_active |
0-1[u] |
| USER_DATA |
0 |
rtwdev->ba_work.data.counter |
s64min-s64max[u] |
| USER_DATA |
0 |
rtwdev->beacon_loss |
0-1[u] |
| USER_DATA |
0 |
rtwdev->bf_info.bfer_mu_cnt |
0-255[u] |
| USER_DATA |
0 |
rtwdev->bf_info.bfer_su_cnt |
0-255[u] |
| USER_DATA |
0 |
rtwdev->bf_info.cur_csi_rpt_rate |
0-255[u] |
| USER_DATA |
0 |
rtwdev->c2h_queue.qlen |
0-u32max[u] |
| USER_DATA |
0 |
rtwdev->c2h_work.data.counter |
s64min-s64max[u] |
| USER_DATA |
0 |
rtwdev->coex.bt_multi_link_remain_work.cpu |
s32min-s32max[u] |
| USER_DATA |
0 |
rtwdev->coex.bt_multi_link_remain_work.timer.expires |
0-u64max[u] |
| USER_DATA |
0 |
rtwdev->coex.bt_multi_link_remain_work.timer.flags |
0-u32max[u] |
| USER_DATA |
0 |
rtwdev->coex.bt_multi_link_remain_work.work.data.counter |
s64min-s64max[u] |
| USER_DATA |
0 |
rtwdev->coex.bt_reenable_work.cpu |
s32min-s32max[u] |
| USER_DATA |
0 |
rtwdev->coex.bt_reenable_work.timer.expires |
0-u64max[u] |
| USER_DATA |
0 |
rtwdev->coex.bt_reenable_work.timer.flags |
0-u32max[u] |
| USER_DATA |
0 |
rtwdev->coex.bt_reenable_work.work.data.counter |
s64min-s64max[u] |
| USER_DATA |
0 |
rtwdev->coex.bt_relink_work.cpu |
s32min-s32max[u] |
| USER_DATA |
0 |
rtwdev->coex.bt_relink_work.timer.expires |
0-u64max[u] |
| USER_DATA |
0 |
rtwdev->coex.bt_relink_work.timer.flags |
0-u32max[u] |
| USER_DATA |
0 |
rtwdev->coex.bt_relink_work.work.data.counter |
s64min-s64max[u] |
| USER_DATA |
0 |
rtwdev->coex.bt_remain_work.cpu |
s32min-s32max[u] |
| USER_DATA |
0 |
rtwdev->coex.bt_remain_work.timer.expires |
0-u64max[u] |
| USER_DATA |
0 |
rtwdev->coex.bt_remain_work.timer.flags |
0-u32max[u] |
| USER_DATA |
0 |
rtwdev->coex.bt_remain_work.work.data.counter |
s64min-s64max[u] |
| USER_DATA |
0 |
rtwdev->coex.defreeze_work.cpu |
s32min-s32max[u] |
| USER_DATA |
0 |
rtwdev->coex.defreeze_work.timer.expires |
0-u64max[u] |
| USER_DATA |
0 |
rtwdev->coex.defreeze_work.timer.flags |
0-u32max[u] |
| USER_DATA |
0 |
rtwdev->coex.defreeze_work.work.data.counter |
s64min-s64max[u] |
| USER_DATA |
0 |
rtwdev->coex.dm.bt_status |
0-255[u] |
| USER_DATA |
0 |
rtwdev->coex.dm.cur_ant_pos_type |
0-u32max[u] |
| USER_DATA |
0 |
rtwdev->coex.dm.cur_bt_lna_lvl |
0-255[u] |
| USER_DATA |
0 |
rtwdev->coex.dm.cur_bt_pwr_lvl |
0-255[u] |
| USER_DATA |
0 |
rtwdev->coex.dm.cur_ps_tdma |
0-255[u] |
| USER_DATA |
0 |
rtwdev->coex.dm.cur_ps_tdma_on |
0-1[u] |
| USER_DATA |
0 |
rtwdev->coex.dm.cur_switch_status |
0-u32max[u] |
| USER_DATA |
0 |
rtwdev->coex.dm.cur_table |
0-255[u] |
| USER_DATA |
0 |
rtwdev->coex.dm.cur_wl_pwr_lvl |
0-255[u] |
| USER_DATA |
0 |
rtwdev->coex.dm.cur_wl_rx_low_gain_en |
0-1[u] |
| USER_DATA |
0 |
rtwdev->coex.dm.ignore_wl_act |
0-1[u] |
| USER_DATA |
0 |
rtwdev->coex.dm.reason |
0-255[u] |
| USER_DATA |
0 |
rtwdev->coex.dm.setting_tdma |
0-u32max[u] |
| USER_DATA |
0 |
rtwdev->coex.freerun |
0-1[u] |
| USER_DATA |
0 |
rtwdev->coex.freeze |
0-1[u] |
| USER_DATA |
0 |
rtwdev->coex.manual_control |
0-1[u] |
| USER_DATA |
0 |
rtwdev->coex.queue.qlen |
0-u32max[u] |
| USER_DATA |
0 |
rtwdev->coex.rfe.ant_switch_diversity |
0-1[u] |
| USER_DATA |
0 |
rtwdev->coex.rfe.ant_switch_exist |
0-1[u] |
| USER_DATA |
0 |
rtwdev->coex.rfe.ant_switch_polarity |
0-255[u] |
| USER_DATA |
0 |
rtwdev->coex.rfe.ant_switch_with_bt |
0-1[u] |
| USER_DATA |
0 |
rtwdev->coex.rfe.rfe_module_type |
0-255[u] |
| USER_DATA |
0 |
rtwdev->coex.rfe.wlg_at_btg |
0-1[u] |
| USER_DATA |
0 |
rtwdev->coex.stat.ampdu_max_time |
0-255[u] |
| USER_DATA |
0 |
rtwdev->coex.stat.bt_418_hid_exist |
0-1[u] |
| USER_DATA |
0 |
rtwdev->coex.stat.bt_a2dp_active |
0-1[u] |
| USER_DATA |
0 |
rtwdev->coex.stat.bt_a2dp_bitpool |
0-255[u] |
| USER_DATA |
0 |
rtwdev->coex.stat.bt_a2dp_exist |
0-1[u] |
| USER_DATA |
0 |
rtwdev->coex.stat.bt_a2dp_sink |
0-1[u] |
| USER_DATA |
0 |
rtwdev->coex.stat.bt_acl_busy |
0-1[u] |
| USER_DATA |
0 |
rtwdev->coex.stat.bt_ble_exist |
0-1[u] |
| USER_DATA |
0 |
rtwdev->coex.stat.bt_ble_hid_exist |
0-1[u] |
| USER_DATA |
0 |
rtwdev->coex.stat.bt_ble_scan_en |
0-1[u] |
| USER_DATA |
0 |
rtwdev->coex.stat.bt_ble_scan_type |
0-255[u] |
| USER_DATA |
0 |
rtwdev->coex.stat.bt_ble_voice |
0-1[u] |
| USER_DATA |
0 |
rtwdev->coex.stat.bt_ctr_ok |
0-1[u] |
| USER_DATA |
0 |
rtwdev->coex.stat.bt_disable_cnt |
0-255[u] |
| USER_DATA |
0 |
rtwdev->coex.stat.bt_disabled |
0-1[u] |
| USER_DATA |
0 |
rtwdev->coex.stat.bt_disabled_pre |
0-1[u] |
| USER_DATA |
0 |
rtwdev->coex.stat.bt_fix_2M |
0-1[u] |
| USER_DATA |
0 |
rtwdev->coex.stat.bt_game_hid_exist |
0-1[u] |
| USER_DATA |
0 |
rtwdev->coex.stat.bt_hfp_exist |
0-1[u] |
| USER_DATA |
0 |
rtwdev->coex.stat.bt_hid_exist |
0-1[u] |
| USER_DATA |
0 |
rtwdev->coex.stat.bt_hid_handle_cnt |
0-1[u] |
| USER_DATA |
0 |
rtwdev->coex.stat.bt_hid_pair_num |
0-255[u] |
| USER_DATA |
0 |
rtwdev->coex.stat.bt_hid_slot |
0-255[u] |
| USER_DATA |
0 |
rtwdev->coex.stat.bt_info_hb0 |
0-255[u] |
| USER_DATA |
0 |
rtwdev->coex.stat.bt_info_hb1 |
0-255[u] |
| USER_DATA |
0 |
rtwdev->coex.stat.bt_info_hb2 |
0-255[u] |
| USER_DATA |
0 |
rtwdev->coex.stat.bt_info_hb3 |
0-255[u] |
| USER_DATA |
0 |
rtwdev->coex.stat.bt_info_lb2 |
0-255[u] |
| USER_DATA |
0 |
rtwdev->coex.stat.bt_info_lb3 |
0-255[u] |
| USER_DATA |
0 |
rtwdev->coex.stat.bt_init_scan |
0-1[u] |
| USER_DATA |
0 |
rtwdev->coex.stat.bt_inq |
0-1[u] |
| USER_DATA |
0 |
rtwdev->coex.stat.bt_inq_page |
0-1[u] |
| USER_DATA |
0 |
rtwdev->coex.stat.bt_inq_remain |
0-1[u] |
| USER_DATA |
0 |
rtwdev->coex.stat.bt_iqk_state |
0-255[u] |
| USER_DATA |
0 |
rtwdev->coex.stat.bt_link_exist |
0-1[u] |
| USER_DATA |
0 |
rtwdev->coex.stat.bt_mailbox_reply |
0-1[u] |
| USER_DATA |
0 |
rtwdev->coex.stat.bt_multi_link |
0-1[u] |
| USER_DATA |
0 |
rtwdev->coex.stat.bt_multi_link_pre |
0-1[u] |
| USER_DATA |
0 |
rtwdev->coex.stat.bt_multi_link_remain |
0-1[u] |
| USER_DATA |
0 |
rtwdev->coex.stat.bt_opp_exist |
0-1[u] |
| USER_DATA |
0 |
rtwdev->coex.stat.bt_page |
0-1[u] |
| USER_DATA |
0 |
rtwdev->coex.stat.bt_pan_exist |
0-1[u] |
| USER_DATA |
0 |
rtwdev->coex.stat.bt_profile_num |
0-255[u] |
| USER_DATA |
0 |
rtwdev->coex.stat.bt_reenable |
0-1[u] |
| USER_DATA |
0 |
rtwdev->coex.stat.bt_reg_vendor_ac |
0-u16max[u] |
| USER_DATA |
0 |
rtwdev->coex.stat.bt_reg_vendor_ae |
0-u16max[u] |
| USER_DATA |
0 |
rtwdev->coex.stat.bt_rssi |
(-128)-127[u] |
| USER_DATA |
0 |
rtwdev->coex.stat.bt_setup_link |
0-1[u] |
| USER_DATA |
0 |
rtwdev->coex.stat.bt_slave |
0-1[u] |
| USER_DATA |
0 |
rtwdev->coex.stat.bt_supported_feature |
0-u32max[u] |
| USER_DATA |
0 |
rtwdev->coex.stat.bt_supported_version |
0-u32max[u] |
| USER_DATA |
0 |
rtwdev->coex.stat.bt_whck_test |
0-1[u] |
| USER_DATA |
0 |
rtwdev->coex.stat.darfrc |
0-u32max[u] |
| USER_DATA |
0 |
rtwdev->coex.stat.darfrch |
0-u32max[u] |
| USER_DATA |
0 |
rtwdev->coex.stat.gnt_workaround_state |
0-255[u] |
| USER_DATA |
0 |
rtwdev->coex.stat.hi_pri_rx |
0-u32max[u] |
| USER_DATA |
0 |
rtwdev->coex.stat.hi_pri_tx |
0-u32max[u] |
| USER_DATA |
0 |
rtwdev->coex.stat.hid_handle_list.cmd_id |
0-255[u] |
| USER_DATA |
0 |
rtwdev->coex.stat.hid_handle_list.handle_cnt |
0-255[u] |
| USER_DATA |
0 |
rtwdev->coex.stat.hid_handle_list.len |
0-255[u] |
| USER_DATA |
0 |
rtwdev->coex.stat.hid_handle_list.subid |
0-255[u] |
| USER_DATA |
0 |
rtwdev->coex.stat.kt_ver |
0-255[u] |
| USER_DATA |
0 |
rtwdev->coex.stat.lo_pri_rx |
0-u32max[u] |
| USER_DATA |
0 |
rtwdev->coex.stat.lo_pri_tx |
0-u32max[u] |
| USER_DATA |
0 |
rtwdev->coex.stat.patch_ver |
0-u32max[u] |
| USER_DATA |
0 |
rtwdev->coex.stat.retry_limit |
0-u16max[u] |
| USER_DATA |
0 |
rtwdev->coex.stat.score_board |
0-u16max[u] |
| USER_DATA |
0 |
rtwdev->coex.stat.tdma_timer_base |
0-255[u] |
| USER_DATA |
0 |
rtwdev->coex.stat.wl_ampdu_limit_en |
0-1[u] |
| USER_DATA |
0 |
rtwdev->coex.stat.wl_beacon_interval |
0-u16max[u] |
| USER_DATA |
0 |
rtwdev->coex.stat.wl_cck_lock |
0-1[u] |
| USER_DATA |
0 |
rtwdev->coex.stat.wl_cck_lock_ever |
0-1[u] |
| USER_DATA |
0 |
rtwdev->coex.stat.wl_cck_lock_pre |
0-1[u] |
| USER_DATA |
0 |
rtwdev->coex.stat.wl_coex_mode |
0-255[u] |
| USER_DATA |
0 |
rtwdev->coex.stat.wl_connected |
0-1[u] |
| USER_DATA |
0 |
rtwdev->coex.stat.wl_connecting |
0-1[u] |
| USER_DATA |
0 |
rtwdev->coex.stat.wl_force_lps_ctrl |
0-1[u] |
| USER_DATA |
0 |
rtwdev->coex.stat.wl_gl_busy |
0-1[u] |
| USER_DATA |
0 |
rtwdev->coex.stat.wl_hi_pri_task1 |
0-1[u] |
| USER_DATA |
0 |
rtwdev->coex.stat.wl_hi_pri_task2 |
0-1[u] |
| USER_DATA |
0 |
rtwdev->coex.stat.wl_iot_peer |
0-255[u] |
| USER_DATA |
0 |
rtwdev->coex.stat.wl_linkscan_proc |
0-1[u] |
| USER_DATA |
0 |
rtwdev->coex.stat.wl_mimo_ps |
0-1[u] |
| USER_DATA |
0 |
rtwdev->coex.stat.wl_noisy_level |
0-255[u] |
| USER_DATA |
0 |
rtwdev->coex.stat.wl_ps_state_fail |
0-1[u] |
| USER_DATA |
0 |
rtwdev->coex.stat.wl_rts_rx_rate |
0-255[u] |
| USER_DATA |
0 |
rtwdev->coex.stat.wl_rx_rate |
0-255[u] |
| USER_DATA |
0 |
rtwdev->coex.stat.wl_slot_extend |
0-1[u] |
| USER_DATA |
0 |
rtwdev->coex.stat.wl_slot_toggle |
0-1[u] |
| USER_DATA |
0 |
rtwdev->coex.stat.wl_slot_toggle_change |
0-1[u] |
| USER_DATA |
0 |
rtwdev->coex.stat.wl_toggle_interval |
0-255[u] |
| USER_DATA |
0 |
rtwdev->coex.stat.wl_tput_dir |
0-255[u] |
| USER_DATA |
0 |
rtwdev->coex.stat.wl_tx_limit_en |
0-1[u] |
| USER_DATA |
0 |
rtwdev->coex.stat.wl_tx_rate |
0-255[u] |
| USER_DATA |
0 |
rtwdev->coex.stat.wl_under_ips |
0-1[u] |
| USER_DATA |
0 |
rtwdev->coex.stat.wl_under_lps |
0-1[u] |
| USER_DATA |
0 |
rtwdev->coex.stop_dm |
0-1[u] |
| USER_DATA |
0 |
rtwdev->coex.under_5g |
0-1[u] |
| USER_DATA |
0 |
rtwdev->coex.wl_ccklock_work.cpu |
s32min-s32max[u] |
| USER_DATA |
0 |
rtwdev->coex.wl_ccklock_work.timer.expires |
0-u64max[u] |
| USER_DATA |
0 |
rtwdev->coex.wl_ccklock_work.timer.flags |
0-u32max[u] |
| USER_DATA |
0 |
rtwdev->coex.wl_ccklock_work.work.data.counter |
s64min-s64max[u] |
| USER_DATA |
0 |
rtwdev->coex.wl_connecting_work.cpu |
s32min-s32max[u] |
| USER_DATA |
0 |
rtwdev->coex.wl_connecting_work.timer.expires |
0-u64max[u] |
| USER_DATA |
0 |
rtwdev->coex.wl_connecting_work.timer.flags |
0-u32max[u] |
| USER_DATA |
0 |
rtwdev->coex.wl_connecting_work.work.data.counter |
s64min-s64max[u] |
| USER_DATA |
0 |
rtwdev->coex.wl_remain_work.cpu |
s32min-s32max[u] |
| USER_DATA |
0 |
rtwdev->coex.wl_remain_work.timer.expires |
0-u64max[u] |
| USER_DATA |
0 |
rtwdev->coex.wl_remain_work.timer.flags |
0-u32max[u] |
| USER_DATA |
0 |
rtwdev->coex.wl_remain_work.work.data.counter |
s64min-s64max[u] |
| USER_DATA |
0 |
rtwdev->coex.wl_rf_off |
0-1[u] |
| USER_DATA |
0 |
rtwdev->dm_info.cck_cca_cnt |
0-u32max[u] |
| USER_DATA |
0 |
rtwdev->dm_info.cck_err_cnt |
0-u32max[u] |
| USER_DATA |
0 |
rtwdev->dm_info.cck_fa_avg |
0-u32max[u] |
| USER_DATA |
0 |
rtwdev->dm_info.cck_fa_cnt |
0-u32max[u] |
| USER_DATA |
0 |
rtwdev->dm_info.cck_gi_l_bnd |
0-255[u] |
| USER_DATA |
0 |
rtwdev->dm_info.cck_gi_u_bnd |
0-255[u] |
| USER_DATA |
0 |
rtwdev->dm_info.cck_ok_cnt |
0-u32max[u] |
| USER_DATA |
0 |
rtwdev->dm_info.cck_pd_default |
0-255[u] |
| USER_DATA |
0 |
rtwdev->dm_info.cfo_track.crystal_cap |
0-255[u] |
| USER_DATA |
0 |
rtwdev->dm_info.cfo_track.is_adjust |
0-1[u] |
| USER_DATA |
0 |
rtwdev->dm_info.cfo_track.packet_count |
0-u32max[u] |
| USER_DATA |
0 |
rtwdev->dm_info.cfo_track.packet_count_pre |
0-u32max[u] |
| USER_DATA |
0 |
rtwdev->dm_info.cur_pkt_count.num_bcn_pkt |
0-u16max[u] |
| USER_DATA |
0 |
rtwdev->dm_info.curr_rx_rate |
0-255[u] |
| USER_DATA |
0 |
rtwdev->dm_info.damping |
0-1[u] |
| USER_DATA |
0 |
rtwdev->dm_info.damping_cnt |
0-255[u] |
| USER_DATA |
0 |
rtwdev->dm_info.damping_rssi |
0-255[u] |
| USER_DATA |
0 |
rtwdev->dm_info.default_cck_index |
0-255[u] |
| USER_DATA |
0 |
rtwdev->dm_info.default_ofdm_index |
0-255[u] |
| USER_DATA |
0 |
rtwdev->dm_info.dm_flags |
0-u32max[u] |
| USER_DATA |
0 |
rtwdev->dm_info.dpk_info.dpk_band |
0-255[u] |
| USER_DATA |
0 |
rtwdev->dm_info.dpk_info.dpk_bw |
0-255[u] |
| USER_DATA |
0 |
rtwdev->dm_info.dpk_info.dpk_ch |
0-255[u] |
| USER_DATA |
0 |
rtwdev->dm_info.dpk_info.gnt_control |
0-u32max[u] |
| USER_DATA |
0 |
rtwdev->dm_info.dpk_info.gnt_value |
0-u32max[u] |
| USER_DATA |
0 |
rtwdev->dm_info.dpk_info.is_dpk_pwr_on |
0-1[u] |
| USER_DATA |
0 |
rtwdev->dm_info.dpk_info.is_reload |
0-1[u] |
| USER_DATA |
0 |
rtwdev->dm_info.edcca_mode |
0-u32max[u] |
| USER_DATA |
0 |
rtwdev->dm_info.fix_rate |
0-255[u] |
| USER_DATA |
0 |
rtwdev->dm_info.gapk.channel |
0-255[u] |
| USER_DATA |
0 |
rtwdev->dm_info.gapk.read_txgain |
0-255[u] |
| USER_DATA |
0 |
rtwdev->dm_info.gapk.txgapk_bp_done |
0-1[u] |
| USER_DATA |
0 |
rtwdev->dm_info.ht_err_cnt |
0-u32max[u] |
| USER_DATA |
0 |
rtwdev->dm_info.ht_ok_cnt |
0-u32max[u] |
| USER_DATA |
0 |
rtwdev->dm_info.igi_bitmap |
0-255[u] |
| USER_DATA |
0 |
rtwdev->dm_info.iqk.done |
0-1[u] |
| USER_DATA |
0 |
rtwdev->dm_info.iqk.result.s0_x |
0-u32max[u] |
| USER_DATA |
0 |
rtwdev->dm_info.iqk.result.s0_y |
0-u32max[u] |
| USER_DATA |
0 |
rtwdev->dm_info.iqk.result.s1_x |
0-u32max[u] |
| USER_DATA |
0 |
rtwdev->dm_info.iqk.result.s1_y |
0-u32max[u] |
| USER_DATA |
0 |
rtwdev->dm_info.is_bt_iqk_timeout |
0-1[u] |
| USER_DATA |
0 |
rtwdev->dm_info.l2h_th_ini |
(-128)-127[u] |
| USER_DATA |
0 |
rtwdev->dm_info.last_pkt_count.num_bcn_pkt |
0-u16max[u] |
| USER_DATA |
0 |
rtwdev->dm_info.min_rssi |
0-255[u] |
| USER_DATA |
0 |
rtwdev->dm_info.ofdm_cca_cnt |
0-u32max[u] |
| USER_DATA |
0 |
rtwdev->dm_info.ofdm_err_cnt |
0-u32max[u] |
| USER_DATA |
0 |
rtwdev->dm_info.ofdm_fa_cnt |
0-u32max[u] |
| USER_DATA |
0 |
rtwdev->dm_info.ofdm_ok_cnt |
0-u32max[u] |
| USER_DATA |
0 |
rtwdev->dm_info.pre_min_rssi |
0-255[u] |
| USER_DATA |
0 |
rtwdev->dm_info.pwr_trk_init_trigger |
0-1[u] |
| USER_DATA |
0 |
rtwdev->dm_info.pwr_trk_triggered |
0-1[u] |
| USER_DATA |
0 |
rtwdev->dm_info.rrsr_mask_min |
0-u32max[u] |
| USER_DATA |
0 |
rtwdev->dm_info.rrsr_val_init |
0-u32max[u] |
| USER_DATA |
0 |
rtwdev->dm_info.rx_cck_agc_report_type |
0-255[u] |
| USER_DATA |
0 |
rtwdev->dm_info.scan_density |
0-255[u] |
| USER_DATA |
0 |
rtwdev->dm_info.thermal_meter_k |
0-255[u] |
| USER_DATA |
0 |
rtwdev->dm_info.thermal_meter_lck |
0-255[u] |
| USER_DATA |
0 |
rtwdev->dm_info.total_cca_cnt |
0-u32max[u] |
| USER_DATA |
0 |
rtwdev->dm_info.total_fa_cnt |
0-u32max[u] |
| USER_DATA |
0 |
rtwdev->dm_info.tx_rate |
0-255[u] |
| USER_DATA |
0 |
rtwdev->dm_info.txagc_remnant_cck |
(-128)-127[u] |
| USER_DATA |
0 |
rtwdev->dm_info.vht_err_cnt |
0-u32max[u] |
| USER_DATA |
0 |
rtwdev->dm_info.vht_ok_cnt |
0-u32max[u] |
| USER_DATA |
0 |
rtwdev->dm_path_div.current_tx_path |
0-u32max[u] |
| USER_DATA |
0 |
rtwdev->dm_path_div.path_a_cnt |
0-u16max[u] |
| USER_DATA |
0 |
rtwdev->dm_path_div.path_a_sum |
0-u32max[u] |
| USER_DATA |
0 |
rtwdev->dm_path_div.path_b_cnt |
0-u16max[u] |
| USER_DATA |
0 |
rtwdev->dm_path_div.path_b_sum |
0-u32max[u] |
| USER_DATA |
0 |
rtwdev->efuse.afe |
0-255[u] |
| USER_DATA |
0 |
rtwdev->efuse.alna_type |
0-255[u] |
| USER_DATA |
0 |
rtwdev->efuse.ant_div_cfg |
0-255[u] |
| USER_DATA |
0 |
rtwdev->efuse.ant_div_type |
0-255[u] |
| USER_DATA |
0 |
rtwdev->efuse.apa_type |
0-255[u] |
| USER_DATA |
0 |
rtwdev->efuse.bt_setting |
0-255[u] |
| USER_DATA |
0 |
rtwdev->efuse.btcoex |
0-1[u] |
| USER_DATA |
0 |
rtwdev->efuse.channel_plan |
0-255[u] |
| USER_DATA |
0 |
rtwdev->efuse.crystal_cap |
0-255[u] |
| USER_DATA |
0 |
rtwdev->efuse.ext_lna_2g |
0-1[u] |
| USER_DATA |
0 |
rtwdev->efuse.ext_lna_5g |
0-1[u] |
| USER_DATA |
0 |
rtwdev->efuse.ext_pa_2g |
0-1[u] |
| USER_DATA |
0 |
rtwdev->efuse.ext_pa_5g |
0-1[u] |
| USER_DATA |
0 |
rtwdev->efuse.glna_type |
0-255[u] |
| USER_DATA |
0 |
rtwdev->efuse.gpa_type |
0-255[u] |
| USER_DATA |
0 |
rtwdev->efuse.hw_cap.ant_num |
0-255[u] |
| USER_DATA |
0 |
rtwdev->efuse.hw_cap.bw |
0-255[u] |
| USER_DATA |
0 |
rtwdev->efuse.hw_cap.hci |
0-255[u] |
| USER_DATA |
0 |
rtwdev->efuse.hw_cap.nss |
0-255[u] |
| USER_DATA |
0 |
rtwdev->efuse.hw_cap.ptcl |
0-255[u] |
| USER_DATA |
0 |
rtwdev->efuse.lna_type_2g |
0-255[u] |
| USER_DATA |
0 |
rtwdev->efuse.lna_type_5g |
0-255[u] |
| USER_DATA |
0 |
rtwdev->efuse.logical_size |
0-u32max[u] |
| USER_DATA |
0 |
rtwdev->efuse.pa_type_2g |
0-255[u] |
| USER_DATA |
0 |
rtwdev->efuse.pa_type_5g |
0-255[u] |
| USER_DATA |
0 |
rtwdev->efuse.physical_size |
0-u32max[u] |
| USER_DATA |
0 |
rtwdev->efuse.power_track_type |
0-255[u] |
| USER_DATA |
0 |
rtwdev->efuse.protect_size |
0-u32max[u] |
| USER_DATA |
0 |
rtwdev->efuse.regd |
0-255[u] |
| USER_DATA |
0 |
rtwdev->efuse.rf_board_option |
0-255[u] |
| USER_DATA |
0 |
rtwdev->efuse.rfe_option |
0-255[u] |
| USER_DATA |
0 |
rtwdev->efuse.share_ant |
0-1[u] |
| USER_DATA |
0 |
rtwdev->efuse.size |
0-u32max[u] |
| USER_DATA |
0 |
rtwdev->efuse.thermal_meter_k |
0-255[u] |
| USER_DATA |
0 |
rtwdev->efuse.tx_bb_swing_setting_2g |
0-255[u] |
| USER_DATA |
0 |
rtwdev->efuse.tx_bb_swing_setting_5g |
0-255[u] |
| USER_DATA |
0 |
rtwdev->efuse.usb_mode_switch |
0-255[u] |
| USER_DATA |
0 |
rtwdev->fifo.acq_pg_num |
0-u16max[u] |
| USER_DATA |
0 |
rtwdev->fifo.rsvd_boundary |
0-u16max[u] |
| USER_DATA |
0 |
rtwdev->fifo.rsvd_cpu_instr_addr |
0-u16max[u] |
| USER_DATA |
0 |
rtwdev->fifo.rsvd_csibuf_addr |
0-u16max[u] |
| USER_DATA |
0 |
rtwdev->fifo.rsvd_drv_addr |
0-u16max[u] |
| USER_DATA |
0 |
rtwdev->fifo.rsvd_drv_pg_num |
0-u16max[u] |
| USER_DATA |
0 |
rtwdev->fifo.rsvd_fw_txbuf_addr |
0-u16max[u] |
| USER_DATA |
0 |
rtwdev->fifo.rsvd_h2c_info_addr |
0-u16max[u] |
| USER_DATA |
0 |
rtwdev->fifo.rsvd_h2c_sta_info_addr |
0-u16max[u] |
| USER_DATA |
0 |
rtwdev->fifo.rsvd_h2cq_addr |
0-u16max[u] |
| USER_DATA |
0 |
rtwdev->fifo.rsvd_pg_num |
0-u16max[u] |
| USER_DATA |
0 |
rtwdev->fifo.txff_pg_num |
0-u16max[u] |
| USER_DATA |
0 |
rtwdev->fw.completion.done |
0-u32max[u] |
| USER_DATA |
0 |
rtwdev->fw.feature |
0-u32max[u] |
| USER_DATA |
0 |
rtwdev->fw.feature_ext |
0-u32max[u] |
| USER_DATA |
0 |
rtwdev->fw.fwcd_desc.size |
0-u32max[u] |
| USER_DATA |
0 |
rtwdev->fw.h2c_version |
0-u16max[u] |
| USER_DATA |
0 |
rtwdev->fw.sub_index |
0-255[u] |
| USER_DATA |
0 |
rtwdev->fw.sub_version |
0-255[u] |
| USER_DATA |
0 |
rtwdev->fw.type |
0-u32max[u] |
| USER_DATA |
0 |
rtwdev->fw.version |
0-u16max[u] |
| USER_DATA |
0 |
rtwdev->fw_recovery_work.data.counter |
s64min-s64max[u] |
| USER_DATA |
0 |
rtwdev->fw_scan_density.done |
0-u32max[u] |
| USER_DATA |
0 |
rtwdev->fw_scan_density.wait.lock.magic |
0-u32max[u] |
| USER_DATA |
0 |
rtwdev->fw_scan_density.wait.lock.owner_cpu |
0-u32max[u] |
| USER_DATA |
0 |
rtwdev->fw_scan_density.wait.lock.raw_lock.locked |
0-255[u] |
| USER_DATA |
0 |
rtwdev->fw_scan_density.wait.lock.raw_lock.locked_pending |
0-u16max[u] |
| USER_DATA |
0 |
rtwdev->fw_scan_density.wait.lock.raw_lock.pending |
0-255[u] |
| USER_DATA |
0 |
rtwdev->fw_scan_density.wait.lock.raw_lock.tail |
0-u16max[u] |
| USER_DATA |
0 |
rtwdev->fw_scan_density.wait.lock.raw_lock.val.counter |
s32min-s32max[u] |
| USER_DATA |
0 |
rtwdev->h2c.last_box_num |
0-255[u] |
| USER_DATA |
0 |
rtwdev->h2c.seq |
0-u32max[u] |
| USER_DATA |
0 |
rtwdev->hal.antenna_rx |
0-u32max[u] |
| USER_DATA |
0 |
rtwdev->hal.antenna_tx |
0-u32max[u] |
| USER_DATA |
0 |
rtwdev->hal.bfee_sts_cap |
0-255[u] |
| USER_DATA |
0 |
rtwdev->hal.cck_high_power |
0-1[u] |
| USER_DATA |
0 |
rtwdev->hal.chip_version |
0-u32max[u] |
| USER_DATA |
0 |
rtwdev->hal.current_band_type |
0-255[u] |
| USER_DATA |
0 |
rtwdev->hal.current_band_width |
0-255[u] |
| USER_DATA |
0 |
rtwdev->hal.current_channel |
0-255[u] |
| USER_DATA |
0 |
rtwdev->hal.current_primary_channel_index |
0-255[u] |
| USER_DATA |
0 |
rtwdev->hal.cut_version |
0-255[u] |
| USER_DATA |
0 |
rtwdev->hal.mp_chip |
0-255[u] |
| USER_DATA |
0 |
rtwdev->hal.oem_id |
0-255[u] |
| USER_DATA |
0 |
rtwdev->hal.phy_cond.branch |
0-3[u] |
| USER_DATA |
0 |
rtwdev->hal.phy_cond.cut |
0-15[u] |
| USER_DATA |
0 |
rtwdev->hal.phy_cond.intf |
0-15[u] |
| USER_DATA |
0 |
rtwdev->hal.phy_cond.intf_rsvd |
0-15[u] |
| USER_DATA |
0 |
rtwdev->hal.phy_cond.neg |
0-1[u] |
| USER_DATA |
0 |
rtwdev->hal.phy_cond.pkg |
0-15[u] |
| USER_DATA |
0 |
rtwdev->hal.phy_cond.plat |
0-15[u] |
| USER_DATA |
0 |
rtwdev->hal.phy_cond.pos |
0-1[u] |
| USER_DATA |
0 |
rtwdev->hal.phy_cond.rfe |
0-255[u] |
| USER_DATA |
0 |
rtwdev->hal.phy_cond2.type_alna |
0-255[u] |
| USER_DATA |
0 |
rtwdev->hal.phy_cond2.type_apa |
0-255[u] |
| USER_DATA |
0 |
rtwdev->hal.phy_cond2.type_glna |
0-255[u] |
| USER_DATA |
0 |
rtwdev->hal.phy_cond2.type_gpa |
0-255[u] |
| USER_DATA |
0 |
rtwdev->hal.pkg_type |
0-255[u] |
| USER_DATA |
0 |
rtwdev->hal.primary_channel |
0-255[u] |
| USER_DATA |
0 |
rtwdev->hal.ps_mode |
0-255[u] |
| USER_DATA |
0 |
rtwdev->hal.rcr |
0-u32max[u] |
| USER_DATA |
0 |
rtwdev->hal.rf_path_num |
0-255[u] |
| USER_DATA |
0 |
rtwdev->hal.rf_phy_num |
0-255[u] |
| USER_DATA |
0 |
rtwdev->hal.rf_type |
0-255[u] |
| USER_DATA |
0 |
rtwdev->hal.rfe_btg |
0-1[u] |
| USER_DATA |
0 |
rtwdev->hal.sar.src |
0-u32max[u] |
| USER_DATA |
0 |
rtwdev->hal.sar_band |
0-u32max[u] |
| USER_DATA |
0 |
rtwdev->hal.sec_ch_offset |
0-255[u] |
| USER_DATA |
0 |
rtwdev->hal.tx_power_mutex.osq.tail.counter |
s32min-s32max[u] |
| USER_DATA |
0 |
rtwdev->hal.tx_power_mutex.owner.counter |
s64min-s64max[u] |
| USER_DATA |
0 |
rtwdev->hal.txrx_1ss |
0-1[u] |
| USER_DATA |
0 |
rtwdev->hci.bulkout_num |
0-255[u] |
| USER_DATA |
0 |
rtwdev->hci.cpwm_addr |
0-u32max[u] |
| USER_DATA |
0 |
rtwdev->hci.rpwm_addr |
0-u32max[u] |
| USER_DATA |
0 |
rtwdev->hci.type |
0-u32max[u] |
| USER_DATA |
0 |
rtwdev->ips_work.data.counter |
s64min-s64max[u] |
| USER_DATA |
0 |
rtwdev->led_cdev.activated |
0-1[u] |
| USER_DATA |
0 |
rtwdev->led_cdev.blink_brightness |
s32min-s32max[u] |
| USER_DATA |
0 |
rtwdev->led_cdev.blink_delay_off |
0-u64max[u] |
| USER_DATA |
0 |
rtwdev->led_cdev.blink_delay_on |
0-u64max[u] |
| USER_DATA |
0 |
rtwdev->led_cdev.blink_timer.expires |
0-u64max[u] |
| USER_DATA |
0 |
rtwdev->led_cdev.blink_timer.flags |
0-u32max[u] |
| USER_DATA |
0 |
rtwdev->led_cdev.brightness |
0-u32max[u] |
| USER_DATA |
0 |
rtwdev->led_cdev.brightness_hw_changed |
s32min-s32max[u] |
| USER_DATA |
0 |
rtwdev->led_cdev.color |
0-u32max[u] |
| USER_DATA |
0 |
rtwdev->led_cdev.delayed_delay_off |
0-u64max[u] |
| USER_DATA |
0 |
rtwdev->led_cdev.delayed_delay_on |
0-u64max[u] |
| USER_DATA |
0 |
rtwdev->led_cdev.delayed_set_value |
s32min-s32max[u] |
| USER_DATA |
0 |
rtwdev->led_cdev.flags |
s32min-s32max[u] |
| USER_DATA |
0 |
rtwdev->led_cdev.led_access.osq.tail.counter |
s32min-s32max[u] |
| USER_DATA |
0 |
rtwdev->led_cdev.led_access.owner.counter |
s64min-s64max[u] |
| USER_DATA |
0 |
rtwdev->led_cdev.max_brightness |
0-u32max[u] |
| USER_DATA |
0 |
rtwdev->led_cdev.new_blink_brightness |
s32min-s32max[u] |
| USER_DATA |
0 |
rtwdev->led_cdev.set_brightness_work.data.counter |
s64min-s64max[u] |
| USER_DATA |
0 |
rtwdev->led_cdev.trigger_lock.count.counter |
s64min-s64max[u] |
| USER_DATA |
0 |
rtwdev->led_cdev.trigger_lock.osq.tail.counter |
s32min-s32max[u] |
| USER_DATA |
0 |
rtwdev->led_cdev.trigger_lock.owner.counter |
s64min-s64max[u] |
| USER_DATA |
0 |
rtwdev->led_cdev.work_flags |
0-u64max[u] |
| USER_DATA |
0 |
rtwdev->led_registered |
0-1[u] |
| USER_DATA |
0 |
rtwdev->lps_conf.awake_interval |
0-255[u] |
| USER_DATA |
0 |
rtwdev->lps_conf.deep_mode |
0-u32max[u] |
| USER_DATA |
0 |
rtwdev->lps_conf.mode |
0-u32max[u] |
| USER_DATA |
0 |
rtwdev->lps_conf.pattern_cam_backup |
0-1[u] |
| USER_DATA |
0 |
rtwdev->lps_conf.port_id |
0-255[u] |
| USER_DATA |
0 |
rtwdev->lps_conf.rlbm |
0-255[u] |
| USER_DATA |
0 |
rtwdev->lps_conf.sec_cam_backup |
0-1[u] |
| USER_DATA |
0 |
rtwdev->lps_conf.smart_ps |
0-255[u] |
| USER_DATA |
0 |
rtwdev->lps_conf.state |
0-u32max[u] |
| USER_DATA |
0 |
rtwdev->lps_conf.wow_deep_mode |
0-u32max[u] |
| USER_DATA |
0 |
rtwdev->lps_leave_check.done |
0-u32max[u] |
| USER_DATA |
0 |
rtwdev->lps_leave_check.wait.lock.magic |
0-u32max[u] |
| USER_DATA |
0 |
rtwdev->lps_leave_check.wait.lock.owner_cpu |
0-u32max[u] |
| USER_DATA |
0 |
rtwdev->lps_leave_check.wait.lock.raw_lock.locked |
0-255[u] |
| USER_DATA |
0 |
rtwdev->lps_leave_check.wait.lock.raw_lock.locked_pending |
0-u16max[u] |
| USER_DATA |
0 |
rtwdev->lps_leave_check.wait.lock.raw_lock.pending |
0-255[u] |
| USER_DATA |
0 |
rtwdev->lps_leave_check.wait.lock.raw_lock.tail |
0-u16max[u] |
| USER_DATA |
0 |
rtwdev->lps_leave_check.wait.lock.raw_lock.val.counter |
s32min-s32max[u] |
| USER_DATA |
0 |
rtwdev->mp_mode |
0-255[u] |
| USER_DATA |
0 |
rtwdev->need_rfk |
0-1[u] |
| USER_DATA |
0 |
rtwdev->ps_enabled |
0-1[u] |
| USER_DATA |
0 |
rtwdev->regd.dfs_region |
0-u32max[u] |
| USER_DATA |
0 |
rtwdev->regd.state |
0-u32max[u] |
| USER_DATA |
0 |
rtwdev->rts_threshold |
0-u32max[u] |
| USER_DATA |
0 |
rtwdev->scan_info.op_bw |
0-255[u] |
| USER_DATA |
0 |
rtwdev->scan_info.op_chan |
0-255[u] |
| USER_DATA |
0 |
rtwdev->scan_info.op_pri_ch |
0-255[u] |
| USER_DATA |
0 |
rtwdev->scan_info.op_pri_ch_idx |
0-255[u] |
| USER_DATA |
0 |
rtwdev->scan_info.probe_pg_size |
0-255[u] |
| USER_DATA |
0 |
rtwdev->sec.default_key_search |
0-1[u] |
| USER_DATA |
0 |
rtwdev->sec.total_cam_num |
0-u32max[u] |
| USER_DATA |
0 |
rtwdev->sta_cnt |
0-255[u] |
| USER_DATA |
0 |
rtwdev->stats.rx_cnt |
0-u64max[u] |
| USER_DATA |
0 |
rtwdev->stats.rx_ewma_tp.internal |
0-u64max[u] |
| USER_DATA |
0 |
rtwdev->stats.rx_throughput |
0-u32max[u] |
| USER_DATA |
0 |
rtwdev->stats.rx_unicast |
0-u64max[u] |
| USER_DATA |
0 |
rtwdev->stats.tx_cnt |
0-u64max[u] |
| USER_DATA |
0 |
rtwdev->stats.tx_ewma_tp.internal |
0-u64max[u] |
| USER_DATA |
0 |
rtwdev->stats.tx_throughput |
0-u32max[u] |
| USER_DATA |
0 |
rtwdev->stats.tx_unicast |
0-u64max[u] |
| USER_DATA |
0 |
rtwdev->tx_report.purge_timer.expires |
0-u64max[u] |
| USER_DATA |
0 |
rtwdev->tx_report.purge_timer.flags |
0-u32max[u] |
| USER_DATA |
0 |
rtwdev->tx_report.queue.qlen |
0-u32max[u] |
| USER_DATA |
0 |
rtwdev->tx_report.sn.counter |
s32min-s32max[u] |
| USER_DATA |
0 |
rtwdev->tx_work.data.counter |
s64min-s64max[u] |
| USER_DATA |
0 |
rtwdev->update_beacon_work.data.counter |
s64min-s64max[u] |
| USER_DATA |
0 |
rtwdev->watch_dog_cnt |
0-u32max[u] |
| USER_DATA |
0 |
rtwdev->watch_dog_work.cpu |
s32min-s32max[u] |
| USER_DATA |
0 |
rtwdev->watch_dog_work.timer.expires |
0-u64max[u] |
| USER_DATA |
0 |
rtwdev->watch_dog_work.timer.flags |
0-u32max[u] |
| USER_DATA |
0 |
rtwdev->watch_dog_work.work.data.counter |
s64min-s64max[u] |
| USER_DATA |
0 |
rtwdev->wow.ips_enabled |
0-1[u] |
| USER_DATA |
0 |
rtwdev->wow.pattern_cnt |
0-255[u] |
| USER_DATA |
0 |
rtwdev->wow.pno_req.channel_cnt |
0-255[u] |
| USER_DATA |
0 |
rtwdev->wow.pno_req.inited |
0-1[u] |
| USER_DATA |
0 |
rtwdev->wow.pno_req.match_set_cnt |
0-u32max[u] |
| USER_DATA |
0 |
rtwdev->wow.pno_req.scan_plan.interval |
0-u32max[u] |
| USER_DATA |
0 |
rtwdev->wow.pno_req.scan_plan.iterations |
0-u32max[u] |
| USER_DATA |
0 |
rtwdev->wow.txpause |
0-255[u] |
| USER_DATA |
0 |
rtwdev->wow_fw.completion.done |
0-u32max[u] |
| USER_DATA |
0 |
rtwdev->wow_fw.feature |
0-u32max[u] |
| USER_DATA |
0 |
rtwdev->wow_fw.feature_ext |
0-u32max[u] |
| USER_DATA |
0 |
rtwdev->wow_fw.fwcd_desc.size |
0-u32max[u] |
| USER_DATA |
0 |
rtwdev->wow_fw.h2c_version |
0-u16max[u] |
| USER_DATA |
0 |
rtwdev->wow_fw.sub_index |
0-255[u] |
| USER_DATA |
0 |
rtwdev->wow_fw.sub_version |
0-255[u] |
| USER_DATA |
0 |
rtwdev->wow_fw.type |
0-u32max[u] |
| USER_DATA |
0 |
rtwdev->wow_fw.version |
0-u16max[u] |
| NO_OVERFLOW_SIMPLE |
0 |
rtwdev->scan_info.scanning_vif->active_links |
|
| USER_PTR |
0 |
rtwdev |
|
| HALF_LOCKED2 |
|
&m->lock |
|
| HALF_LOCKED2 |
0 |
&rtwdev->mutex |
|