| PARAM_VALUE |
0 |
rtwdev |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->bb_table |
0,4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->bss_clr_vld.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->bss_clr_vld.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->c2h_counter_reg.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->c2h_counter_reg.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->c2h_regs |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->chip_gen |
0-1 |
| PARAM_VALUE |
0 |
rtwdev->chip->dav_phy_efuse_size |
0,96 |
| PARAM_VALUE |
0 |
rtwdev->chip->dcfo_comp |
0,4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->dflt_parms |
0,4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->dig_regs |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->dig_table |
0,4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->edcca_regs |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->fw_def.fw_format_max |
0-2,4 |
| PARAM_VALUE |
0 |
rtwdev->chip->h2c_counter_reg.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->h2c_counter_reg.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->h2c_regs |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->imr_info |
0,4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->mac_def |
308444759750025216,8356547646888521728 |
| PARAM_VALUE |
0 |
rtwdev->chip->mon_reg |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->nctl_post_table->defs->addr |
0,17,32,36,81-82,85,96,143,239,768,772,776,780,788,792,804,812 |
| PARAM_VALUE |
0 |
rtwdev->chip->nctl_post_table->defs->data |
0-8,10-12,14-17,19,22,24-25,28-32,40,46-48,51,57,62-66,68,92,99 |
| PARAM_VALUE |
0 |
rtwdev->chip->nctl_post_table->defs->mask |
0-4,7-8,14-16,31-32,48,56,63-64,112,127-128,192,240,255,448,511 |
| PARAM_VALUE |
0 |
rtwdev->chip->nctl_table |
0,4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->nhm_report |
0,4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->nhm_th |
0,4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->ops |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->page_regs |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->phy_def |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->phycap_addr |
1408,1424,5888 |
| PARAM_VALUE |
0 |
rtwdev->chip->phycap_size |
56,96,128 |
| PARAM_VALUE |
0 |
rtwdev->chip->physical_efuse_size |
1216,4864 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->ampdu_miss.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->ampdu_miss.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->brk.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->brk.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->brk_option.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->brk_option.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->cca_spoofing.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->cca_spoofing.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->cck_brk.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->cck_brk.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->cck_cca.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->cck_cca.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->cck_sfd_gg.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->cck_sfd_gg.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->cck_sig_gg.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->cck_sig_gg.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->cck_spoofing.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->cck_spoofing.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->cck_txen.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->cck_txen.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->cck_txon.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->cck_txon.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->enable_all_cnt.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->enable_all_cnt.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->lsig_brk_l_th.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->lsig_brk_l_th.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->lsig_brk_s_th.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->lsig_brk_s_th.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->ofdm_cca.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->ofdm_cca.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->r1b_rr_sel.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->r1b_rr_sel.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->r1b_rx_rpt_rst.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->r1b_rx_rpt_rst.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->rst_all_cnt.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->rst_all_cnt.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->rxl_err_parity.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->rxl_err_parity.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->rxl_err_rate.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->rxl_err_rate.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->search_fail.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->search_fail.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->pwr_on_seq |
0,4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->rf_path_num |
1-2 |
| PARAM_VALUE |
0 |
rtwdev->chip->rfkill_get.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->rfkill_get.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->rrsr_cfgs |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->rx_nss |
1-2 |
| PARAM_VALUE |
0 |
rtwdev->chip->support_chanctx_num |
0-2 |
| PARAM_VALUE |
0 |
rtwdev->chip->support_link_num |
0,2 |
| PARAM_VALUE |
0 |
rtwdev->chip->tx_nss |
1-2 |
| PARAM_VALUE |
0 |
rtwdev->chip->xtal_info |
0,4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->hal.thermal_prot_th |
0,50,53,172-173,180 |
| PARAM_VALUE |
0 |
rtwdev->hci.ops |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->priv->continual_io_error.counter |
s32min-s32max |
| PARAM_VALUE |
0 |
rtwdev->quirks |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->variant->no_mcs_12_13 |
1 |
| PARAM_VALUE |
0 |
*rtwdev->pwr_trim->pa_bias_trim |
0-255 |
| PARAM_VALUE |
0 |
*rtwdev->pwr_trim->pad_bias_trim |
0-255 |
| PARAM_VALUE |
0 |
*rtwdev->pwr_trim->thermal_trim |
0-255 |
| DATA_SOURCE |
0 |
rtwdev |
$0 |
| CONTAINER |
0 |
-136-0-1792+0 |
$(-1) |