| PARAM_VALUE |
0 |
rtwdev |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->btc.cx.wl.role_info.active_role->role |
0-255 |
| PARAM_VALUE |
0 |
rtwdev->btc.cx.wl.role_info_v1.active_role_v1->noa |
0-1 |
| PARAM_VALUE |
0 |
rtwdev->btc.cx.wl.role_info_v1.active_role_v1->role |
0-255 |
| PARAM_VALUE |
0 |
rtwdev->btc.cx.wl.role_info_v2.active_role_v2->noa |
0-1 |
| PARAM_VALUE |
0 |
rtwdev->btc.cx.wl.role_info_v2.active_role_v2->role |
0-255 |
| PARAM_VALUE |
0 |
rtwdev->chip |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->bacam_ver |
0-1,99 |
| PARAM_VALUE |
0 |
rtwdev->chip->bb_table |
0,4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->bbmcu_nr |
0-1 |
| PARAM_VALUE |
0 |
rtwdev->chip->bss_clr_vld.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->bss_clr_vld.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->c2h_counter_reg.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->c2h_counter_reg.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->c2h_regs |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->chip_gen |
0-1 |
| PARAM_VALUE |
0 |
rtwdev->chip->dcfo_comp |
0,4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->dcfo_comp->addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->dcfo_comp->mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->dflt_parms |
0,4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->dig_regs |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->dig_regs->p0_lna_init.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->dig_regs->p0_lna_init.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->dig_regs->p0_p20_pagcugc_en.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->dig_regs->p0_p20_pagcugc_en.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->dig_regs->p0_rxb_init.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->dig_regs->p0_rxb_init.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->dig_regs->p0_s20_pagcugc_en.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->dig_regs->p0_s20_pagcugc_en.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->dig_regs->p0_tia_init.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->dig_regs->p0_tia_init.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->dig_regs->p1_lna_init.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->dig_regs->p1_lna_init.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->dig_regs->p1_p20_pagcugc_en.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->dig_regs->p1_p20_pagcugc_en.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->dig_regs->p1_rxb_init.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->dig_regs->p1_rxb_init.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->dig_regs->p1_s20_pagcugc_en.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->dig_regs->p1_s20_pagcugc_en.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->dig_regs->p1_tia_init.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->dig_regs->p1_tia_init.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->dig_table |
0,4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->edcca_regs |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->h2c_counter_reg.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->h2c_counter_reg.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->h2c_regs |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->imr_info |
0,4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->mac_def |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->mac_def->agg_limit.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->mac_def->agg_limit.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->mac_def->bfee_ctrl.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->mac_def->bfee_ctrl.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->mac_def->muedca_ctrl.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->mac_def->muedca_ctrl.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->mac_def->narrow_bw_ru_dis.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->mac_def->narrow_bw_ru_dis.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->mac_def->port_base |
4397738915123544064,8322278866126368768 |
| PARAM_VALUE |
0 |
rtwdev->chip->mac_def->ra_agg_limit.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->mac_def->ra_agg_limit.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->mac_def->txcnt_limit.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->mac_def->txcnt_limit.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->mac_def->wow_ctrl.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->mac_def->wow_ctrl.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->mon_reg |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->nctl_post_table->defs->addr |
0,17,32,36,81-82,85,96,143,239,768,772,776,780,788,792,804,812 |
| PARAM_VALUE |
0 |
rtwdev->chip->nctl_post_table->defs->data |
0-8,10-12,14-17,19,22,24-25,28-32,40,46-48,51,57,62-66,68,92,99 |
| PARAM_VALUE |
0 |
rtwdev->chip->nctl_post_table->defs->mask |
0-4,7-8,14-16,31-32,48,56,63-64,112,127-128,192,240,255,448,511 |
| PARAM_VALUE |
0 |
rtwdev->chip->nctl_table |
0,4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->nhm_report |
0,4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->nhm_th |
0,4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->ops |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->page_regs |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->phy_def |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->phy_def->physts->tx_common_ctrl.reg_nr |
2,4,6 |
| PARAM_VALUE |
0 |
rtwdev->chip->phy_def->physts->tx_info.reg_nr |
2,4,6 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->ampdu_miss.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->ampdu_miss.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->brk.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->brk.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->brk_option.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->brk_option.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->cca_spoofing.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->cca_spoofing.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->cck_brk.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->cck_brk.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->cck_cca.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->cck_cca.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->cck_sfd_gg.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->cck_sfd_gg.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->cck_sig_gg.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->cck_sig_gg.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->cck_spoofing.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->cck_spoofing.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->cck_txen.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->cck_txen.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->cck_txon.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->cck_txon.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->enable_all_cnt.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->enable_all_cnt.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->lsig_brk_l_th.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->lsig_brk_l_th.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->lsig_brk_s_th.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->lsig_brk_s_th.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->ofdm_cca.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->ofdm_cca.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->r1b_rr_sel.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->r1b_rr_sel.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->r1b_rx_rpt_rst.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->r1b_rx_rpt_rst.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->rst_all_cnt.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->rst_all_cnt.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->rxl_err_parity.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->rxl_err_parity.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->rxl_err_rate.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->rxl_err_rate.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->search_fail.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->search_fail.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->pwr_off_seq->addr |
2,5-7,16,36,113,128,130-131,136,145-146,198,420,672,674,752-753,4205,4230,u16max |
| PARAM_VALUE |
0 |
rtwdev->chip->pwr_on_seq |
0,4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->pwr_on_seq->addr |
2,5-7,16,36,113,128,130-131,136,145-146,198,420,672,674,752-753,4205,4230,u16max |
| PARAM_VALUE |
0 |
rtwdev->chip->rf_path_num |
1-2 |
| PARAM_VALUE |
0 |
rtwdev->chip->rfkill_get.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->rfkill_get.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->rfkill_init->mode.addr |
98,724,728,780,812,1792,3100,3132,3168,3180,3184,4768,4792,8200 |
| PARAM_VALUE |
0 |
rtwdev->chip->rfkill_init->mode.mask |
1-4,7-8,15-16,31-32,51,56,63-64,128,192,240,255-256,448,511-512,514,992,1023-1024,1536,2047-2048,3072,3584,3840,4032,4096,6144,8192,16383-16384,24576,28672,31744,32768,65280,u16max,98304,130560,131072,229376,258048-u32max |
| PARAM_VALUE |
0 |
rtwdev->chip->rfkill_init->pinmux.addr |
98,724,728,780,812,1792,3100,3132,3168,3180,3184,4768,4792,8200 |
| PARAM_VALUE |
0 |
rtwdev->chip->rfkill_init->pinmux.mask |
1-4,7-8,15-16,31-32,51,56,63-64,128,192,240,255-256,448,511-512,514,992,1023-1024,1536,2047-2048,3072,3584,3840,4032,4096,6144,8192,16383-16384,24576,28672,31744,32768,65280,u16max,98304,130560,131072,229376,258048-u32max |
| PARAM_VALUE |
0 |
rtwdev->chip->rrsr_cfgs |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->rrsr_cfgs->ref_rate.addr |
98,724,728,780,812,1792,3100,3132,3168,3180,3184,4768,4792,8200 |
| PARAM_VALUE |
0 |
rtwdev->chip->rrsr_cfgs->ref_rate.mask |
1-4,7-8,15-16,31-32,51,56,63-64,128,192,240,255-256,448,511-512,514,992,1024,1536,2047-2048,3072,3584,3840,4032,4096,6144,8192,16383-16384,24576,28672,31744,65280,u16max,98304,130560,131072,229376,258048,261632-u32max |
| PARAM_VALUE |
0 |
rtwdev->chip->rrsr_cfgs->rsc.addr |
98,724,728,780,812,1792,3100,3132,3168,3180,3184,4768,4792,8200 |
| PARAM_VALUE |
0 |
rtwdev->chip->rrsr_cfgs->rsc.mask |
1-4,7-8,15-16,31-32,51,56,63-64,128,192,240,255-256,448,511-512,514,992,1024,1536,2047-2048,3072,3584,3840,4032,4096,6144,8192,16383-16384,24576,28672,31744,65280,u16max,98304,130560,131072,229376,258048,261632-u32max |
| PARAM_VALUE |
0 |
rtwdev->chip->xtal_info |
0,4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->xtal_info->sc_xi_mask |
127,130048 |
| PARAM_VALUE |
0 |
rtwdev->chip->xtal_info->sc_xo_mask |
32512,16646144 |
| PARAM_VALUE |
0 |
rtwdev->dev->iommu_group->default_domain |
0-s64max |
| PARAM_VALUE |
0 |
rtwdev->flags |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->fw_cmd_ofld_info->accu_delay |
0 |
| PARAM_VALUE |
0 |
rtwdev->fw_cmd_ofld_info->cnt |
0 |
| PARAM_VALUE |
0 |
rtwdev->hci.ops->check_and_reclaim_tx_resource |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->hci.ops->deinit |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->hci.ops->pause |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->hci.ops->read16 |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->hci.ops->read32 |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->hci.ops->read8 |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->hci.ops->recalc_int_mit |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->hci.ops->start |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->hci.ops->stop |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->hci.ops->tx_kick_off |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->hci.ops->write16 |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->hci.ops->write32 |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->hci.ops->write8 |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->io->do_mdelay |
0,4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->io->do_udelay |
0,4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->io->pack |
0,4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->io->phy_write32 |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->io->unpack |
0,4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->io->write16 |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->io->write32 |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->io->write8 |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->io->write_rf |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->rfk_mcc.data->table_idx |
0-255 |
| PARAM_VALUE |
0 |
*rtwdev->rfk_mcc.data->rf18 |
0-4294967295 |
| DATA_SOURCE |
0 |
rtwdev |
$0 |
| RX_PATH |
|
|
|
| TASK_NOT_RUNNING |
|
|
|
| NOCHECK_CALL |
|
|
|
| NO_OVERFLOW_SIMPLE |
0 |
rtwdev->stats.rx_unicast |
|
| NO_OVERFLOW_SIMPLE |
0 |
rtwdev->stats.tx_unicast |
|
| HALF_LOCKED2 |
|
rcu_read |
|