Defined in 1 files as a prototype:
Defined in 1 files as a function:
Referenced in 1 files:
Smatch caller information:
drivers/net/wireless/realtek/rtw89/fw.c __rtw89_fw_h2c_add_pkt_offload() -> rtw89_h2c_tx_and_wait()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rtwdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->acam_num | 32,128 |
| PARAM_VALUE | 0 | rtwdev->chip->bb_table | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->bbmcu_nr | 0-1 |
| PARAM_VALUE | 0 | rtwdev->chip->bcam_num | 10,16,20 |
| PARAM_VALUE | 0 | rtwdev->chip->bss_clr_vld.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->bss_clr_vld.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->c2h_counter_reg.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->c2h_counter_reg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->c2h_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->chip_gen | 0-1 |
| PARAM_VALUE | 0 | rtwdev->chip->dcfo_comp | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->dcfo_comp->addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dcfo_comp->mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dflt_parms | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs | 55741727998066688,803437807997702144,1768518975955636224,2503213399767965696,3854751121840869376,4424864825566580736,9133489519956684800 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_lna_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_lna_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_p20_pagcugc_en.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_p20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_rxb_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_rxb_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_s20_pagcugc_en.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_s20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_tia_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_tia_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_lna_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_lna_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_p20_pagcugc_en.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_p20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_rxb_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_rxb_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_s20_pagcugc_en.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_s20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_tia_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_tia_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_table | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->edcca_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->h2c_counter_reg.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->h2c_counter_reg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->h2c_desc_size | 16,24 |
| PARAM_VALUE | 0 | rtwdev->chip->h2c_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->imr_info | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->agg_limit.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->agg_limit.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->bfee_ctrl.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->bfee_ctrl.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->muedca_ctrl.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->muedca_ctrl.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->narrow_bw_ru_dis.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->narrow_bw_ru_dis.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->ra_agg_limit.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->ra_agg_limit.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->txcnt_limit.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->txcnt_limit.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->wow_ctrl.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->wow_ctrl.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mon_reg | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->nctl_post_table->defs->addr | 0,17,32,36,81-82,85,96,143,239,768,772,776,780,788,792,804,812,1616,1792,1796,1840,3100,3132,3168,3180,3184,3196,4620,4768,4776,4792,4796,4800,4824,4828,4832,4836,4840,4844,8200,8432,8436,8440,8444,8992,9028,9808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->nctl_post_table->defs->data | 0-8,10-12,14-17,19,22,24-25,28-32,40,46-48,51,57,62-66,68,92,99,101-102,104-105,107,110-121,124-125,127-128,136-137,156,181,191-192,205,212,229,239,252-257,289,316,364,431,460,464,469,471-472,476,482,485,488,496-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->nctl_post_table->defs->mask | 0-4,7-8,14-16,31-32,48,56,63-64,112,127-128,192,240,255,448,511-512,768,992,1023-1024,1536,2048,3072,3584,3840,4095-4096,7936,8191-8192,14336,16384,24576,28672,32512,32768,61440,64512,65280,u16max-65536,122880-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->nctl_table | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->needed_fw_elms | 107426,487220,524085,671612724,1074032436,1074229012,1074229044 |
| PARAM_VALUE | 0 | rtwdev->chip->nhm_report | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->nhm_th | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->ops | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->ops->h2c_assoc_cmac_tbl | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->ch_page_ctrl | 5892,35332,46852 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->hci_fc_ctrl | 5888,35328,46848 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_ctrl1 | 6032,35472,46992 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_ctrl2 | 6036,35476,46996 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_info1 | 6040,35480,47004 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_info2 | 6044,35484,47008 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_info3 | 6028,35468,46988 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->wp_page_ctrl1 | 6048,35488,47012 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->wp_page_ctrl2 | 6052,35492,47016 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->wp_page_info1 | 6056,35496,47020 |
| PARAM_VALUE | 0 | rtwdev->chip->phy_def | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->phy_def->cr_base | 65536 |
| PARAM_VALUE | 0 | rtwdev->chip->phy_def->physt_bmp_eht | 252 |
| PARAM_VALUE | 0 | rtwdev->chip->phy_def->physt_bmp_start | 1852 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs | 326666126119956480,2102092507123609600,4494408767216488448,5023200399873142784,5944714512642146304,7583733320221130752,7706346100708524032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->ampdu_miss.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->ampdu_miss.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->brk.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->brk.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->brk_option.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->brk_option.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cca_spoofing.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cca_spoofing.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_brk.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_brk.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_cca.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_cca.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_sfd_gg.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_sfd_gg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_sig_gg.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_sig_gg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_spoofing.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_spoofing.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_txen.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_txen.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_txon.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_txon.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->enable_all_cnt.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->enable_all_cnt.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->lsig_brk_l_th.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->lsig_brk_l_th.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->lsig_brk_s_th.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->lsig_brk_s_th.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->ofdm_cca.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->ofdm_cca.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->r1b_rr_sel.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->r1b_rr_sel.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->r1b_rx_rpt_rst.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->r1b_rx_rpt_rst.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rst_all_cnt.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rst_all_cnt.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rxl_err_parity.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rxl_err_parity.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rxl_err_rate.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rxl_err_rate.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->search_fail.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->search_fail.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pwr_off_seq->addr | 2,5-7,16,36,113,128,130-131,136,145-146,198,420,672,674,752-753 |
| PARAM_VALUE | 0 | rtwdev->chip->pwr_on_seq | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->pwr_on_seq->addr | 2,5-7,16,36,113,128,130-131,136,145-146,198,420,672,674,752-753 |
| PARAM_VALUE | 0 | rtwdev->chip->rf_path_num | 1-2 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_get.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_get.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->mode.addr | 98,724,728,17712,17716,17720,17724,17728,17732,17736,17740 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->mode.data | 0-3,7-8,15-16,18,24,26,30,38,42,52,64,75,96,128,131467,205831 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->mode.mask | 2-4,7-8,15-16,31-32,51,56,63-64,128,192,240,255-256,448,511-512 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->pinmux.addr | 98,724,728,17712,17716,17720,17724,17728,17732,17736,17740 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->pinmux.data | 0-3,7-8,15-16,18,24,26,30,38,42,52,64,75,96,128,131467,205831 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->pinmux.mask | 2-4,7-8,15-16,31-32,51,56,63-64,128,192,240,255-256,448,511-512 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->ref_rate.addr | 98,724,728,17712,17716,17720,17724,17728,17732,17736,17740 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->ref_rate.mask | 2-4,7-8,15-16,31-32,51,56,63-64,128,192,240,255-256,448,511-512 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->rsc.addr | 98,724,728,17712,17716,17720,17724,17728,17732,17736,17740 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->rsc.mask | 2-4,7-8,15-16,31-32,51,56,63-64,128,192,240,255-256,448,511-512 |
| PARAM_VALUE | 0 | rtwdev->chip->wow_reason_reg | 186438479882158080,2013360131996618752,2241025523120345088,2933131042081980416,5215841756251774976,6924004867136643072,8077265333668331520 |
| PARAM_VALUE | 0 | rtwdev->chip->xtal_info | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->fw_cmd_ofld_info->accu_delay | 0 |
| PARAM_VALUE | 0 | rtwdev->fw_cmd_ofld_info->cnt | 0 |
| PARAM_VALUE | 0 | rtwdev->hci.ops->deinit | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->pause | 8058544814367502336,8565105663092830208 |
| PARAM_VALUE | 0 | rtwdev->hci.ops->read16 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->read32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->read8 | 46945382387916800,4074854045564776448 |
| PARAM_VALUE | 0 | rtwdev->hci.ops->start | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->stop | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->write16 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->write32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->write8 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->do_mdelay | 0,7863426807049793536 |
| PARAM_VALUE | 0 | rtwdev->io->do_udelay | 0,2093413182654996480 |
| PARAM_VALUE | 0 | rtwdev->io->pack | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->phy_write32 | 1827526559544733696,3656485933696888832 |
| PARAM_VALUE | 0 | rtwdev->io->unpack | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write16 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write8 | 4265019043309531136,8564023758273626112 |
| PARAM_VALUE | 0 | rtwdev->io->write_rf | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->rfk_mcc.data->table_idx | 0-255 |
| PARAM_VALUE | 0 | *rtwdev->rfk_mcc.data->rf18 | 0-4294967295 |
| PARAM_VALUE | 1 | skb | 4096-ptr_max |
| PARAM_VALUE | 1 | skb->data_len | 0 |
| PARAM_VALUE | 2 | wait | 4096-ptr_max |
| PARAM_VALUE | 3 | cond | 1-10177 |
| BUF_SIZE | 1 | skb | (-1)-s32max |
| BUF_SIZE | 1 | skb | (-1)-s32max |
| BUF_SIZE | 2 | wait | 56 |
| CAPPED_DATA | 1 | skb->head | 1 |
| CAPPED_DATA | 3 | cond | 1 |
| DATA_SOURCE | 0 | rtwdev | $0 |
| DATA_SOURCE | 1 | skb | r rtw89_fw_h2c_alloc_skb_with_hdr |
| PARAM_COMPARE | 0 | &rtwdev->mac.fw_ofld_wait | == $2 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HALF_LOCKED2 | global &rtnl_mutex |
drivers/net/wireless/realtek/rtw89/fw.c rtw89_fw_h2c_add_mcc() -> rtw89_h2c_tx_and_wait()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rtwdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->bb_table | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->bss_clr_vld.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->bss_clr_vld.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->c2h_counter_reg.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->c2h_counter_reg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->c2h_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->chip_gen | 0 |
| PARAM_VALUE | 0 | rtwdev->chip->dcfo_comp | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->dcfo_comp->addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dcfo_comp->mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dflt_parms | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_lna_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_lna_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_p20_pagcugc_en.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_p20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_rxb_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_rxb_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_s20_pagcugc_en.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_s20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_tia_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_tia_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_lna_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_lna_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_p20_pagcugc_en.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_p20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_rxb_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_rxb_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_s20_pagcugc_en.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_s20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_tia_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_tia_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_table | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->edcca_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->h2c_counter_reg.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->h2c_counter_reg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->h2c_desc_size | 16,24 |
| PARAM_VALUE | 0 | rtwdev->chip->h2c_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->imr_info | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->agg_limit.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->agg_limit.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->bfee_ctrl.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->bfee_ctrl.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->muedca_ctrl.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->muedca_ctrl.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->narrow_bw_ru_dis.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->narrow_bw_ru_dis.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->ra_agg_limit.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->ra_agg_limit.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->txcnt_limit.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->txcnt_limit.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->wow_ctrl.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->wow_ctrl.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mon_reg | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->nctl_post_table->defs->addr | 0,17,32,36,81-82,85,96,143,239,768,772,776,780,788,792,804,812,1616,1792,1796,1840,3100,3132,3168,3180,3184,3196,4620,4768,4776,4792,4796,4800,4824,4828,4832,4836,4840,4844,8200,8432,8436,8440,8444,8992,9028,9808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->nctl_post_table->defs->data | 0-8,10-12,14-17,19,22,24-25,28-32,40,46-48,51,57,62-66,68,92,99,101-102,104-105,107,110-121,124-125,127-128,136-137,156,181,191-192,205,212,229,239,252-257,289,316,364,431,460,464,469,471-472,476,482,485,488,496-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->nctl_post_table->defs->mask | 0-4,7-8,14-16,31-32,48,56,63-64,112,127-128,192,240,255,448,511-512,768,992,1023-1024,1536,2048,3072,3584,3840,4095-4096,7936,8191-8192,14336,16384,24576,28672,32512,32768,61440,64512,65280,u16max-65536,122880-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->nctl_table | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->needed_fw_elms | 107426,487220,524085,671612724,1074032436,1074229012,1074229044 |
| PARAM_VALUE | 0 | rtwdev->chip->nhm_report | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->nhm_th | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->ch_page_ctrl | 5892,35332,46852 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->hci_fc_ctrl | 5888,35328,46848 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_ctrl1 | 6032,35472,46992 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_ctrl2 | 6036,35476,46996 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_info1 | 6040,35480,47004 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_info2 | 6044,35484,47008 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_info3 | 6028,35468,46988 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->wp_page_ctrl1 | 6048,35488,47012 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->wp_page_ctrl2 | 6052,35492,47016 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->wp_page_info1 | 6056,35496,47020 |
| PARAM_VALUE | 0 | rtwdev->chip->phy_def | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->phy_def->cr_base | 65536 |
| PARAM_VALUE | 0 | rtwdev->chip->phy_def->physt_bmp_eht | 252 |
| PARAM_VALUE | 0 | rtwdev->chip->phy_def->physt_bmp_start | 1852 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->ampdu_miss.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->brk.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->brk_option.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cca_spoofing.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_brk.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_cca.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_sfd_gg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_sig_gg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_spoofing.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_txen.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_txon.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->enable_all_cnt.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->lsig_brk_l_th.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->lsig_brk_s_th.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->ofdm_cca.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->r1b_rr_sel.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->r1b_rx_rpt_rst.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rst_all_cnt.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rxl_err_parity.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rxl_err_rate.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->search_fail.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pwr_off_seq->addr | 2,5-7,16,36,113,128,130-131,136,145-146,198,420,672,674,752-753 |
| PARAM_VALUE | 0 | rtwdev->chip->pwr_on_seq | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->pwr_on_seq->addr | 2,5-7,16,36,113,128,130-131,136,145-146,198,420,672,674,752-753 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_get.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_get.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->mode.addr | 98,724,728 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->mode.data | 0-3,7-8,15-16,18,24,26,30,38,42,52,64,75,96,128,131467,205831 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->mode.mask | 2-4,7-8,15-16,31-32,51,56,63-64,128,192,240,255-256,448,511-512 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->pinmux.addr | 98,724,728 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->pinmux.data | 0-3,7-8,15-16,18,24,26,30,38,42,52,64,75,96,128,131467,205831 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->pinmux.mask | 2-4,7-8,15-16,31-32,51,56,63-64,128,192,240,255-256,448,511-512 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->ref_rate.addr | 98,724,728,17712,17716,17720,17724,17728,17732,17736,17740 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->ref_rate.mask | 2-4,7-8,15-16,31-32,51,56,63-64,128,192,240,255-256,448,511-512 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->rsc.addr | 98,724,728,17712,17716,17720,17724,17728,17732,17736,17740 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->rsc.mask | 2-4,7-8,15-16,31-32,51,56,63-64,128,192,240,255-256,448,511-512 |
| PARAM_VALUE | 0 | rtwdev->chip->xtal_info | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->flags | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->fw_cmd_ofld_info->cnt | 0 |
| PARAM_VALUE | 0 | rtwdev->hci.ops->deinit | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->pause | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->read16 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->read32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->read8 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->start | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->stop | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->write16 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->write32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->write8 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->do_mdelay | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->do_udelay | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->pack | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->phy_write32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->unpack | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write16 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write8 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write_rf | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->mac.dle_info.rsvd_qt->b0_csi | 0,44,56,107 |
| PARAM_VALUE | 0 | rtwdev->mac.dle_info.rsvd_qt->b0_ftm | 0,6 |
| PARAM_VALUE | 0 | rtwdev->mac.dle_info.rsvd_qt->b0_lmr | 0,6 |
| PARAM_VALUE | 0 | rtwdev->mac.dle_info.rsvd_qt->b0_smr | 0,69 |
| PARAM_VALUE | 0 | rtwdev->mac.dle_info.rsvd_qt->b1_csi | 0,28,44,107 |
| PARAM_VALUE | 0 | rtwdev->mac.dle_info.rsvd_qt->b1_ftm | 0,6 |
| PARAM_VALUE | 0 | rtwdev->mac.dle_info.rsvd_qt->b1_lmr | 0,6 |
| PARAM_VALUE | 0 | rtwdev->mac.dle_info.rsvd_qt->b1_smr | 0 |
| PARAM_VALUE | 0 | rtwdev->mac.dle_info.rsvd_qt->mpdu_info_tbl | 0-2 |
| PARAM_VALUE | 0 | rtwdev->mac.dle_info.rsvd_qt->others | 0 |
| PARAM_VALUE | 0 | rtwdev->mac.hfc_param.ch_cfg->grp | 0-1 |
| PARAM_VALUE | 0 | rtwdev->mac.hfc_param.ch_cfg->max | 0,196,210,222,226,311,341-344,402,606,742-743,1614,1641,1896 |
| PARAM_VALUE | 0 | rtwdev->mac.hfc_param.ch_cfg->min | 0,2,4-5,13,15-16,18,22,24,32,40,54,128 |
| PARAM_VALUE | 0 | rtwdev->mcc.role_aux.crtz->macid_tgt | 0 |
| PARAM_VALUE | 0 | rtwdev->mcc.role_aux.crtz->slot_num | 0 |
| PARAM_VALUE | 0 | rtwdev->mcc.role_ref.crtz->macid_tgt | 0 |
| PARAM_VALUE | 0 | rtwdev->mcc.role_ref.crtz->slot_num | 0 |
| PARAM_VALUE | 0 | rtwdev->napi.thread->delays->blkio_count | 0-4294967295 |
| PARAM_VALUE | 0 | rtwdev->napi.thread->kcov->mode | 0-4294967295 |
| PARAM_VALUE | 0 | rtwdev->napi.thread->kcov->remote | 0-1 |
| PARAM_VALUE | 0 | rtwdev->napi.thread->kcov->remote_size | 0-4294967295 |
| PARAM_VALUE | 0 | rtwdev->napi.thread->kcov_remote->mode | 0-4294967295 |
| PARAM_VALUE | 0 | rtwdev->napi.thread->kcov_remote->remote | 0-1 |
| PARAM_VALUE | 0 | rtwdev->napi.thread->kcov_remote->remote_size | 0-4294967295 |
| PARAM_VALUE | 0 | rtwdev->napi.thread->sched_task_group->idle | s32min-s32max |
| PARAM_VALUE | 0 | rtwdev->napi.thread->sched_task_group->parent | 0-s64max |
| PARAM_VALUE | 0 | rtwdev->napi.thread->thread_pid->attr->exit_code | s32min-s32max |
| PARAM_VALUE | 0 | rtwdev->priv->h2c_queue.qlen | 0-4294967295 |
| PARAM_VALUE | 0 | rtwdev->priv->h2c_release_queue.qlen | 0-4294967295 |
| PARAM_VALUE | 0 | rtwdev->priv->pdev->dev.dma_io_tlb_mem->dyn_alloc.flags | 0-4294967295 |
| PARAM_VALUE | 0 | rtwdev->priv->pdev->dev.dma_io_tlb_mem->dyn_alloc.is_hard | 0-1 |
| PARAM_VALUE | 0 | rtwdev->priv->pdev->dev.dma_io_tlb_mem->dyn_alloc.is_lazy | 0-1 |
| PARAM_VALUE | 0 | rtwdev->priv->pdev->dev.dma_io_tlb_mem->dyn_alloc.is_queued | 0-1 |
| PARAM_VALUE | 0 | rtwdev->priv->pdev->dev.dma_io_tlb_mem->dyn_alloc.is_soft | 0-1 |
| PARAM_VALUE | 0 | rtwdev->priv->pdev->dev.dma_uses_io_tlb | 1 |
| PARAM_VALUE | 0 | rtwdev->priv->pdev->dev.iommu->pci_32bit_workaround | 0-1 |
| PARAM_VALUE | 0 | rtwdev->rfk_mcc.data->table_idx | 0-2 |
| PARAM_VALUE | 0 | rtwdev->variant->qta_def_override | 0 |
| PARAM_VALUE | 0 | *rtwdev->rfk_mcc.data->rf18 | 0-4294967295 |
| PARAM_VALUE | 1 | skb | 4096-ptr_max |
| PARAM_VALUE | 1 | skb->data_len | 0 |
| PARAM_VALUE | 2 | wait | 4096-ptr_max |
| BUF_SIZE | 1 | skb | (-1)-s32max |
| BUF_SIZE | 1 | skb | (-1)-s32max |
| BUF_SIZE | 2 | wait | 56 |
| CAPPED_DATA | 1 | skb->head | 1 |
| DATA_SOURCE | 0 | rtwdev | $0 |
| DATA_SOURCE | 1 | skb | r rtw89_fw_h2c_alloc_skb_with_hdr |
| PARAM_COMPARE | 0 | &rtwdev->mcc.wait | == $2 |
| BIT_INFO | 3 | cond | 0x0,0x7fffffff |
| MEM_ZERO | 0 | &rtwdev->mcc.bt_role | |
| MEM_ZERO | 0 | &rtwdev->mcc.config | |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NO_OVERFLOW_SIMPLE | 0 | rtwdev->stats.rx_unicast | |
| NO_OVERFLOW_SIMPLE | 0 | rtwdev->stats.tx_unicast |
drivers/net/wireless/realtek/rtw89/fw.c rtw89_fw_h2c_del_mcc_group() -> rtw89_h2c_tx_and_wait()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rtwdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->bacam_ver | 0-1,99 |
| PARAM_VALUE | 0 | rtwdev->chip->bb_table | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->bbmcu_nr | 0-1 |
| PARAM_VALUE | 0 | rtwdev->chip->bss_clr_vld.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->bss_clr_vld.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->c2h_counter_reg.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->c2h_counter_reg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->c2h_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->chip_gen | 0 |
| PARAM_VALUE | 0 | rtwdev->chip->dcfo_comp | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->dcfo_comp->addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dcfo_comp->mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dflt_parms | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_lna_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_lna_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_p20_pagcugc_en.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_p20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_rxb_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_rxb_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_s20_pagcugc_en.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_s20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_tia_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_tia_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_lna_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_lna_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_p20_pagcugc_en.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_p20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_rxb_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_rxb_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_s20_pagcugc_en.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_s20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_tia_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_tia_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_table | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->edcca_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->fw_def.fw_b_aid | 0,28768,28930 |
| PARAM_VALUE | 0 | rtwdev->chip->fw_def.fw_format_max | 0-2,4 |
| PARAM_VALUE | 0 | rtwdev->chip->h2c_counter_reg.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->h2c_counter_reg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->h2c_desc_size | 16,24 |
| PARAM_VALUE | 0 | rtwdev->chip->h2c_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->imr_info | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->agg_limit.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->agg_limit.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->bfee_ctrl.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->bfee_ctrl.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->muedca_ctrl.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->muedca_ctrl.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->narrow_bw_ru_dis.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->narrow_bw_ru_dis.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->port_base | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->ra_agg_limit.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->ra_agg_limit.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->txcnt_limit.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->txcnt_limit.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->wow_ctrl.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->wow_ctrl.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mon_reg | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->nctl_post_table->defs->addr | 0,17,32,36,81-82,85,96,143,239,768,772,776,780,788,792,804,812,1616,1792,1796,1840,3100,3132,3168,3180,3184,3196,4620,4768,4776,4792,4796,4800,4824,4828,4832,4836,4840,4844,8200,8432,8436,8440,8444,8992,9028,9808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->nctl_post_table->defs->data | 0-8,10-12,14-17,19,22,24-25,28-32,40,46-48,51,57,62-66,68,92,99,101-102,104-105,107,110-121,124-125,127-128,136-137,156,181,191-192,205,212,229,239,252-257,289,316,364,431,460,464,469,471-472,476,482,485,488,496-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->nctl_post_table->defs->mask | 0-4,7-8,14-16,31-32,48,56,63-64,112,127-128,192,240,255,448,511-512,768,992,1023-1024,1536,2048,3072,3584,3840,4095-4096,7936,8191-8192,14336,16384,24576,28672,32512,32768,61440,64512,65280,u16max-65536,122880-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->nctl_table | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->needed_fw_elms | 107426,487220,524085,671612724,1074032436,1074229012,1074229044 |
| PARAM_VALUE | 0 | rtwdev->chip->nhm_report | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->nhm_th | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->ops | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->ch_page_ctrl | 5892,35332,46852 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->hci_fc_ctrl | 5888,35328,46848 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_ctrl1 | 6032,35472,46992 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_ctrl2 | 6036,35476,46996 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_info1 | 6040,35480,47004 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_info2 | 6044,35484,47008 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_info3 | 6028,35468,46988 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->wp_page_ctrl1 | 6048,35488,47012 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->wp_page_ctrl2 | 6052,35492,47016 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->wp_page_info1 | 6056,35496,47020 |
| PARAM_VALUE | 0 | rtwdev->chip->phy_def | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->phy_def->cr_base | 65536 |
| PARAM_VALUE | 0 | rtwdev->chip->phy_def->physt_bmp_eht | 252 |
| PARAM_VALUE | 0 | rtwdev->chip->phy_def->physt_bmp_start | 1852 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->ampdu_miss.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->ampdu_miss.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->brk.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->brk.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->brk_option.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->brk_option.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cca_spoofing.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cca_spoofing.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_brk.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_brk.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_cca.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_cca.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_sfd_gg.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_sfd_gg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_sig_gg.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_sig_gg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_spoofing.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_spoofing.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_txen.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_txen.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_txon.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_txon.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->enable_all_cnt.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->enable_all_cnt.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->lsig_brk_l_th.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->lsig_brk_l_th.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->lsig_brk_s_th.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->lsig_brk_s_th.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->ofdm_cca.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->ofdm_cca.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->r1b_rr_sel.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->r1b_rr_sel.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->r1b_rx_rpt_rst.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->r1b_rx_rpt_rst.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rst_all_cnt.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rst_all_cnt.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rxl_err_parity.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rxl_err_parity.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rxl_err_rate.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rxl_err_rate.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->search_fail.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->search_fail.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pwr_off_seq->addr | 2,5-7,16,36,113,128,130-131,136,145-146,198,420,672,674,752-753 |
| PARAM_VALUE | 0 | rtwdev->chip->pwr_on_seq | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->pwr_on_seq->addr | 2,5-7,16,36,113,128,130-131,136,145-146,198,420,672,674,752-753 |
| PARAM_VALUE | 0 | rtwdev->chip->rf_path_num | 1-2 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_get.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_get.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->mode.addr | 98,724,728,17712,17716,17720,17724,17728,17732,17736,17740 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->mode.data | 0-3,7-8,15-16,18,24,26,30,38,42,52,64,75,96,128,131467,205831 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->mode.mask | 2-4,7-8,15-16,31-32,51,56,63-64,128,192,240,255-256,448,511-512 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->pinmux.addr | 98,724,728,17712,17716,17720,17724,17728,17732,17736,17740 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->pinmux.data | 0-3,7-8,15-16,18,24,26,30,38,42,52,64,75,96,128,131467,205831 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->pinmux.mask | 2-4,7-8,15-16,31-32,51,56,63-64,128,192,240,255-256,448,511-512 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->ref_rate.addr | 98,724,728,17712,17716,17720,17724,17728,17732,17736,17740 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->ref_rate.mask | 2-4,7-8,15-16,31-32,51,56,63-64,128,192,240,255-256,448,511-512 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->rsc.addr | 98,724,728,17712,17716,17720,17724,17728,17732,17736,17740 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->rsc.mask | 2-4,7-8,15-16,31-32,51,56,63-64,128,192,240,255-256,448,511-512 |
| PARAM_VALUE | 0 | rtwdev->chip->support_chanctx_num | 0-2 |
| PARAM_VALUE | 0 | rtwdev->chip->xtal_info | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->xtal_info->sc_xi_mask | 127,130048 |
| PARAM_VALUE | 0 | rtwdev->chip->xtal_info->sc_xo_mask | 32512,16646144 |
| PARAM_VALUE | 0 | rtwdev->chip->xtal_info->xcap_reg | 640,652 |
| PARAM_VALUE | 0 | rtwdev->fw_cmd_ofld_info->accu_delay | 0 |
| PARAM_VALUE | 0 | rtwdev->fw_cmd_ofld_info->cnt | 0 |
| PARAM_VALUE | 0 | rtwdev->hci.ops->deinit | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->pause | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->read16 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->read32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->read8 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->recalc_int_mit | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->start | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->stop | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->write16 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->write32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->write8 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->do_mdelay | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->do_udelay | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->pack | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->phy_write32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->unpack | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write16 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write8 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write_rf | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->napi.thread->delays->blkio_count | 0-4294967295 |
| PARAM_VALUE | 0 | rtwdev->pci_info->bd_ram_table | 0,643063650462019584,6331576261147430912 |
| PARAM_VALUE | 0 | rtwdev->priv->h2c_queue.qlen | 0-4294967295 |
| PARAM_VALUE | 0 | rtwdev->priv->h2c_release_queue.qlen | 0-4294967295 |
| PARAM_VALUE | 0 | rtwdev->priv->pdev->dev.dma_io_tlb_mem->dyn_alloc.flags | 0-4294967295 |
| PARAM_VALUE | 0 | rtwdev->priv->pdev->dev.dma_io_tlb_mem->dyn_alloc.is_hard | 0-1 |
| PARAM_VALUE | 0 | rtwdev->priv->pdev->dev.dma_io_tlb_mem->dyn_alloc.is_lazy | 0-1 |
| PARAM_VALUE | 0 | rtwdev->priv->pdev->dev.dma_io_tlb_mem->dyn_alloc.is_queued | 0-1 |
| PARAM_VALUE | 0 | rtwdev->priv->pdev->dev.dma_io_tlb_mem->dyn_alloc.is_soft | 0-1 |
| PARAM_VALUE | 0 | rtwdev->priv->pdev->dev.dma_uses_io_tlb | 1 |
| PARAM_VALUE | 0 | rtwdev->priv->pdev->dev.iommu->pci_32bit_workaround | 0-1 |
| PARAM_VALUE | 0 | rtwdev->rfk_mcc.data->table_idx | 0-2 |
| PARAM_VALUE | 0 | *rtwdev->rfk_mcc.data->rf18 | 0-4294967295 |
| PARAM_VALUE | 1 | skb | 4096-ptr_max |
| PARAM_VALUE | 1 | skb->data_len | 0 |
| PARAM_VALUE | 2 | wait | 4096-ptr_max |
| BUF_SIZE | 1 | skb | (-1)-s32max |
| BUF_SIZE | 1 | skb | (-1)-s32max |
| BUF_SIZE | 2 | wait | 56 |
| CAPPED_DATA | 1 | skb->head | 1 |
| DATA_SOURCE | 0 | rtwdev | $0 |
| DATA_SOURCE | 1 | skb | r rtw89_fw_h2c_alloc_skb_with_hdr |
| PARAM_COMPARE | 0 | &rtwdev->mcc.wait | == $2 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NO_OVERFLOW_SIMPLE | 0 | rtwdev->stats.rx_unicast | |
| NO_OVERFLOW_SIMPLE | 0 | rtwdev->stats.tx_unicast |
drivers/net/wireless/realtek/rtw89/fw.c rtw89_fw_h2c_del_pkt_offload() -> rtw89_h2c_tx_and_wait()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rtwdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->acam_num | 32,128 |
| PARAM_VALUE | 0 | rtwdev->chip->bb_table | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->bbmcu_nr | 0-1 |
| PARAM_VALUE | 0 | rtwdev->chip->bss_clr_vld.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->bss_clr_vld.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->c2h_counter_reg.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->c2h_counter_reg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->c2h_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->chip_gen | 0-1 |
| PARAM_VALUE | 0 | rtwdev->chip->dcfo_comp | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->dcfo_comp->addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dcfo_comp->mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dflt_parms | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_lna_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_lna_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_p20_pagcugc_en.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_p20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_rxb_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_rxb_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_s20_pagcugc_en.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_s20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_tia_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_tia_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_lna_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_lna_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_p20_pagcugc_en.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_p20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_rxb_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_rxb_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_s20_pagcugc_en.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_s20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_tia_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_tia_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_table | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->edcca_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->h2c_counter_reg.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->h2c_counter_reg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->h2c_desc_size | 16,24 |
| PARAM_VALUE | 0 | rtwdev->chip->h2c_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->imr_info | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->agg_limit.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->agg_limit.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->bfee_ctrl.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->bfee_ctrl.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->disable_cpu | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->filter_model_addr | 3076 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->fwdl_enable_wcpu | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->indir_access_addr | 262144,524288 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->mem_page_size | 262144,524288 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->muedca_ctrl.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->muedca_ctrl.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->narrow_bw_ru_dis.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->narrow_bw_ru_dis.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->port_base | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->ra_agg_limit.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->ra_agg_limit.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->txcnt_limit.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->txcnt_limit.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->wow_ctrl.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->wow_ctrl.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mon_reg | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->nctl_post_table->defs->addr | 0,17,32,36,81-82,85,96,143,239,768,772,776,780,788,792,804,812,1616,1792,1796,1840,3100,3132,3168,3180,3184,3196,4620,4768,4776,4792,4796,4800,4824,4828,4832,4836,4840,4844,8200,8432,8436,8440,8444,8992,9028,9808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->nctl_post_table->defs->data | 0-8,10-12,14-17,19,22,24-25,28-32,40,46-48,51,57,62-66,68,92,99,101-102,104-105,107,110-121,124-125,127-128,136-137,156,181,191-192,205,212,229,239,252-257,289,316,364,431,460,464,469,471-472,476,482,485,488,496-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->nctl_post_table->defs->mask | 0-4,7-8,14-16,31-32,48,56,63-64,112,127-128,192,240,255,448,511-512,768,992,1023-1024,1536,2048,3072,3584,3840,4095-4096,7936,8191-8192,14336,16384,24576,28672,32512,32768,61440,64512,65280,u16max-65536,122880-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->nctl_table | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->needed_fw_elms | 107426,487220,524085,671612724,1074032436,1074229012,1074229044 |
| PARAM_VALUE | 0 | rtwdev->chip->nhm_report | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->nhm_th | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->ops | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->ops->h2c_assoc_cmac_tbl | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->ch_page_ctrl | 5892,35332,46852 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->hci_fc_ctrl | 5888,35328,46848 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_ctrl1 | 6032,35472,46992 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_ctrl2 | 6036,35476,46996 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_info1 | 6040,35480,47004 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_info2 | 6044,35484,47008 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_info3 | 6028,35468,46988 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->wp_page_ctrl1 | 6048,35488,47012 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->wp_page_ctrl2 | 6052,35492,47016 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->wp_page_info1 | 6056,35496,47020 |
| PARAM_VALUE | 0 | rtwdev->chip->phy_def | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->phy_def->cr_base | 65536 |
| PARAM_VALUE | 0 | rtwdev->chip->phy_def->physt_bmp_eht | 252 |
| PARAM_VALUE | 0 | rtwdev->chip->phy_def->physt_bmp_start | 1852 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->ampdu_miss.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->ampdu_miss.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->brk.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->brk.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->brk_option.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->brk_option.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cca_spoofing.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cca_spoofing.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_brk.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_brk.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_cca.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_cca.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_sfd_gg.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_sfd_gg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_sig_gg.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_sig_gg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_spoofing.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_spoofing.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_txen.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_txen.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_txon.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_txon.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->enable_all_cnt.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->enable_all_cnt.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->lsig_brk_l_th.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->lsig_brk_l_th.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->lsig_brk_s_th.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->lsig_brk_s_th.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->ofdm_cca.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->ofdm_cca.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->r1b_rr_sel.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->r1b_rr_sel.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->r1b_rx_rpt_rst.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->r1b_rx_rpt_rst.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rst_all_cnt.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rst_all_cnt.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rxl_err_parity.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rxl_err_parity.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rxl_err_rate.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rxl_err_rate.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->search_fail.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->search_fail.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pwr_off_seq->addr | 2,5-7,16,36,113,128,130-131,136,145-146,198,420,672,674,752-753 |
| PARAM_VALUE | 0 | rtwdev->chip->pwr_on_seq | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->pwr_on_seq->addr | 2,5-7,16,36,113,128,130-131,136,145-146,198,420,672,674,752-753 |
| PARAM_VALUE | 0 | rtwdev->chip->rf_path_num | 1-2 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_get.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_get.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->mode.addr | 98,724,728,17712,17716,17720,17724,17728,17732,17736,17740 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->mode.data | 0-3,7-8,15-16,18,24,26,30,38,42,52,64,75,96,128,131467,205831 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->mode.mask | 2-4,7-8,15-16,31-32,51,56,63-64,128,192,240,255-256,448,511-512 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->pinmux.addr | 98,724,728,17712,17716,17720,17724,17728,17732,17736,17740 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->pinmux.data | 0-3,7-8,15-16,18,24,26,30,38,42,52,64,75,96,128,131467,205831 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->pinmux.mask | 2-4,7-8,15-16,31-32,51,56,63-64,128,192,240,255-256,448,511-512 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->ref_rate.addr | 98,724,728,17712,17716,17720,17724,17728,17732,17736,17740 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->ref_rate.mask | 2-4,7-8,15-16,31-32,51,56,63-64,128,192,240,255-256,448,511-512 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->rsc.addr | 98,724,728,17712,17716,17720,17724,17728,17732,17736,17740 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->rsc.mask | 2-4,7-8,15-16,31-32,51,56,63-64,128,192,240,255-256,448,511-512 |
| PARAM_VALUE | 0 | rtwdev->chip->rsvd_ple_ofst | 194560,391168,456704,587776 |
| PARAM_VALUE | 0 | rtwdev->chip->wow_reason_reg | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->xtal_info | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->deinit | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->pause | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->read16 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->read32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->read8 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->start | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->stop | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->write16 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->write32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->write8 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->do_mdelay | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->do_udelay | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->pack | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->phy_write32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->unpack | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write16 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write8 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write_rf | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->pci_info->gen_def | 1514654105865453568,7955639482977693696 |
| PARAM_VALUE | 0 | rtwdev->pci_info->group_bd_addr | 0-1 |
| PARAM_VALUE | 0 | rtwdev->pci_info->rxbd_rwptr_clr_reg | 4120,4608,45080 |
| PARAM_VALUE | 0 | rtwdev->pci_info->txbd_rwptr_clr2_reg | 0,4548,4884,45076 |
| PARAM_VALUE | 0 | rtwdev->pci_info->wp_sel_addr | 0,4916,46112 |
| PARAM_VALUE | 0 | rtwdev->rfk_mcc.data->table_idx | 0-255 |
| PARAM_VALUE | 0 | rtwdev->wow.patterns->bc | 0-1 |
| PARAM_VALUE | 0 | rtwdev->wow.patterns->crc | 0-u16max |
| PARAM_VALUE | 0 | rtwdev->wow.patterns->idx | 0-255 |
| PARAM_VALUE | 0 | rtwdev->wow.patterns->mc | 0-1 |
| PARAM_VALUE | 0 | rtwdev->wow.patterns->r_w | 0-1 |
| PARAM_VALUE | 0 | rtwdev->wow.patterns->skip_mac_hdr | 0-1 |
| PARAM_VALUE | 0 | rtwdev->wow.patterns->uc | 0-1 |
| PARAM_VALUE | 0 | rtwdev->wow.patterns->valid | 0-1 |
| PARAM_VALUE | 0 | *rtwdev->rfk_mcc.data->rf18 | 0-4294967295 |
| PARAM_VALUE | 1 | skb | 4096-ptr_max |
| PARAM_VALUE | 1 | skb->data_len | 0 |
| PARAM_VALUE | 2 | wait | 4096-ptr_max |
| PARAM_VALUE | 3 | cond | 54-40599 |
| BUF_SIZE | 1 | skb | (-1)-s32max |
| BUF_SIZE | 1 | skb | (-1)-s32max |
| BUF_SIZE | 2 | wait | 56 |
| CAPPED_DATA | 1 | skb->head | 1 |
| DATA_SOURCE | 0 | rtwdev | $0 |
| DATA_SOURCE | 1 | skb | r rtw89_fw_h2c_alloc_skb_with_hdr |
| PARAM_COMPARE | 0 | &rtwdev->mac.fw_ofld_wait | == $2 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HALF_LOCKED2 | global &rtnl_mutex |
drivers/net/wireless/realtek/rtw89/fw.c rtw89_fw_h2c_fwips() -> rtw89_h2c_tx_and_wait()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rtwdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->bacam_ver | 0-1,99 |
| PARAM_VALUE | 0 | rtwdev->chip->bb_table | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->bbmcu_nr | 0-1 |
| PARAM_VALUE | 0 | rtwdev->chip->bss_clr_vld.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->bss_clr_vld.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->c2h_counter_reg.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->c2h_counter_reg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->c2h_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->chip_gen | 0-1 |
| PARAM_VALUE | 0 | rtwdev->chip->dcfo_comp | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->dcfo_comp->addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dcfo_comp->mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dflt_parms | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_lna_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_lna_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_p20_pagcugc_en.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_p20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_rxb_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_rxb_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_s20_pagcugc_en.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_s20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_tia_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_tia_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_lna_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_lna_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_p20_pagcugc_en.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_p20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_rxb_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_rxb_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_s20_pagcugc_en.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_s20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_tia_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_tia_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_table | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->edcca_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->h2c_counter_reg.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->h2c_counter_reg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->h2c_desc_size | 16,24 |
| PARAM_VALUE | 0 | rtwdev->chip->h2c_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->imr_info | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->agg_limit.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->agg_limit.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->bfee_ctrl.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->bfee_ctrl.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->muedca_ctrl.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->muedca_ctrl.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->narrow_bw_ru_dis.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->narrow_bw_ru_dis.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->ra_agg_limit.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->ra_agg_limit.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->txcnt_limit.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->txcnt_limit.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->wow_ctrl.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->wow_ctrl.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mon_reg | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->nctl_post_table->defs->addr | 0,17,32,36,81-82,85,96,143,239,768,772,776,780,788,792,804,812,1616,1792,1796,1840,3100,3132,3168,3180,3184,3196,4620,4768,4776,4792,4796,4800,4824,4828,4832,4836,4840,4844,8200,8432,8436,8440,8444,8992,9028,9808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->nctl_post_table->defs->data | 0-8,10-12,14-17,19,22,24-25,28-32,40,46-48,51,57,62-66,68,92,99,101-102,104-105,107,110-121,124-125,127-128,136-137,156,181,191-192,205,212,229,239,252-257,289,316,364,431,460,464,469,471-472,476,482,485,488,496-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->nctl_post_table->defs->mask | 0-4,7-8,14-16,31-32,48,56,63-64,112,127-128,192,240,255,448,511-512,768,992,1023-1024,1536,2048,3072,3584,3840,4095-4096,7936,8191-8192,14336,16384,24576,28672,32512,32768,61440,64512,65280,u16max-65536,122880-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->nctl_table | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->needed_fw_elms | 107426,487220,524085,671612724,1074032436,1074229012,1074229044 |
| PARAM_VALUE | 0 | rtwdev->chip->nhm_report | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->nhm_th | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->ops | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->ch_page_ctrl | 5892,35332,46852 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->hci_fc_ctrl | 5888,35328,46848 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_ctrl1 | 6032,35472,46992 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_ctrl2 | 6036,35476,46996 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_info1 | 6040,35480,47004 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_info2 | 6044,35484,47008 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_info3 | 6028,35468,46988 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->wp_page_ctrl1 | 6048,35488,47012 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->wp_page_ctrl2 | 6052,35492,47016 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->wp_page_info1 | 6056,35496,47020 |
| PARAM_VALUE | 0 | rtwdev->chip->phy_def | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->phy_def->cr_base | 65536 |
| PARAM_VALUE | 0 | rtwdev->chip->phy_def->physt_bmp_eht | 252 |
| PARAM_VALUE | 0 | rtwdev->chip->phy_def->physt_bmp_start | 1852 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->ampdu_miss.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->ampdu_miss.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->brk.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->brk.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->brk_option.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->brk_option.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cca_spoofing.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cca_spoofing.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_brk.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_brk.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_cca.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_cca.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_sfd_gg.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_sfd_gg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_sig_gg.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_sig_gg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_spoofing.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_spoofing.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_txen.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_txen.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_txon.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_txon.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->enable_all_cnt.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->enable_all_cnt.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->lsig_brk_l_th.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->lsig_brk_l_th.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->lsig_brk_s_th.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->lsig_brk_s_th.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->ofdm_cca.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->ofdm_cca.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->r1b_rr_sel.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->r1b_rr_sel.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->r1b_rx_rpt_rst.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->r1b_rx_rpt_rst.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rst_all_cnt.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rst_all_cnt.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rxl_err_parity.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rxl_err_parity.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rxl_err_rate.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rxl_err_rate.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->search_fail.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->search_fail.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pwr_off_seq->addr | 2,5-7,16,36,113,128,130-131,136,145-146,198,420,672,674,752-753 |
| PARAM_VALUE | 0 | rtwdev->chip->pwr_on_seq | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->pwr_on_seq->addr | 2,5-7,16,36,113,128,130-131,136,145-146,198,420,672,674,752-753 |
| PARAM_VALUE | 0 | rtwdev->chip->rf_path_num | 1-2 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_get.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_get.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->mode.addr | 98,724,728,17712,17716,17720,17724,17728,17732,17736,17740 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->mode.data | 0-3,7-8,15-16,18,24,26,30,38,42,52,64,75,96,128,131467,205831 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->mode.mask | 2-4,7-8,15-16,31-32,51,56,63-64,128,192,240,255-256,448,511-512 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->pinmux.addr | 98,724,728,17712,17716,17720,17724,17728,17732,17736,17740 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->pinmux.data | 0-3,7-8,15-16,18,24,26,30,38,42,52,64,75,96,128,131467,205831 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->pinmux.mask | 2-4,7-8,15-16,31-32,51,56,63-64,128,192,240,255-256,448,511-512 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->ref_rate.addr | 98,724,728,17712,17716,17720,17724,17728,17732,17736,17740 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->ref_rate.mask | 2-4,7-8,15-16,31-32,51,56,63-64,128,192,240,255-256,448,511-512 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->rsc.addr | 98,724,728,17712,17716,17720,17724,17728,17732,17736,17740 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->rsc.mask | 2-4,7-8,15-16,31-32,51,56,63-64,128,192,240,255-256,448,511-512 |
| PARAM_VALUE | 0 | rtwdev->chip->wow_reason_reg | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->xtal_info | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->flags | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->deinit | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->read16 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->read32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->read8 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->start | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->stop | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->write16 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->write32 | 512921870830526464,3250867206361939968 |
| PARAM_VALUE | 0 | rtwdev->hci.ops->write8 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->do_mdelay | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->do_udelay | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->pack | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->phy_write32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->unpack | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write16 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write8 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write_rf | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->napi.thread->delays->blkio_count | 0-4294967295 |
| PARAM_VALUE | 0 | rtwdev->napi.thread->pushable_tasks.node_list.next->next | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->napi.thread->pushable_tasks.node_list.prev->prev | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->napi.thread->pushable_tasks.prio_list.prev->prev | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->napi.thread->sched_task_group->idle | s32min-s32max |
| PARAM_VALUE | 0 | rtwdev->napi.thread->se.cfs_rq->rq->donor->__state | 0,512 |
| PARAM_VALUE | 0 | rtwdev->napi.thread->se.cfs_rq->rq->donor->core_node.__rb_parent_color | 1 |
| PARAM_VALUE | 0 | rtwdev->napi.thread->se.cfs_rq->rq->donor->dl.dl_timer.base->clockid | 0-1,7,11 |
| PARAM_VALUE | 0 | rtwdev->napi.thread->se.cfs_rq->rq->donor->dl.dl_timer.base->cpu_base->expires_next | 0-s64max |
| PARAM_VALUE | 0 | rtwdev->napi.thread->se.cfs_rq->rq->donor->dl.dl_timer.base->index | 0-7 |
| PARAM_VALUE | 0 | rtwdev->napi.thread->se.cfs_rq->rq->donor->dl.inactive_timer.base->clockid | 0-1,7,11 |
| PARAM_VALUE | 0 | rtwdev->napi.thread->se.cfs_rq->rq->donor->dl.inactive_timer.base->index | 0-7 |
| PARAM_VALUE | 0 | rtwdev->napi.thread->se.cfs_rq->rq->donor->dl.rb_node.__rb_parent_color | 1,4096-s64max |
| PARAM_VALUE | 0 | rtwdev->napi.thread->se.cfs_rq->rq->donor->mm->mm_cid.irq_work.node.a_flags.counter | 0-s32max |
| PARAM_VALUE | 0 | rtwdev->napi.thread->se.cfs_rq->rq->donor->pushable_dl_tasks.__rb_parent_color | 1 |
| PARAM_VALUE | 0 | rtwdev->napi.thread->se.cfs_rq->rq->donor->rseq.event.ids_changed | 1 |
| PARAM_VALUE | 0 | rtwdev->napi.thread->se.cfs_rq->rq->donor->sched_migrated | 1 |
| PARAM_VALUE | 0 | rtwdev->napi.thread->se.cfs_rq->rq->donor->se.run_node.rb_left->__rb_parent_color | 4096-s64max |
| PARAM_VALUE | 0 | rtwdev->napi.thread->se.cfs_rq->rq->donor->se.run_node.rb_right->__rb_parent_color | 4096-s64max |
| PARAM_VALUE | 0 | rtwdev->pci_info->rxbd_rwptr_clr_reg | 4120,4608,45080 |
| PARAM_VALUE | 0 | rtwdev->pci_info->txbd_rwptr_clr2_reg | 0,4548,4884,45076 |
| PARAM_VALUE | 0 | rtwdev->priv->continual_io_error.counter | s32min-s32max |
| PARAM_VALUE | 0 | rtwdev->priv->h2c_queue.qlen | 0-4294967295 |
| PARAM_VALUE | 0 | rtwdev->priv->h2c_release_queue.qlen | 0-4294967295 |
| PARAM_VALUE | 0 | rtwdev->priv->pdev->dev.dma_io_tlb_mem->dyn_alloc.flags | 0-4294967295 |
| PARAM_VALUE | 0 | rtwdev->priv->pdev->dev.dma_io_tlb_mem->dyn_alloc.is_hard | 0-1 |
| PARAM_VALUE | 0 | rtwdev->priv->pdev->dev.dma_io_tlb_mem->dyn_alloc.is_lazy | 0-1 |
| PARAM_VALUE | 0 | rtwdev->priv->pdev->dev.dma_io_tlb_mem->dyn_alloc.is_queued | 0-1 |
| PARAM_VALUE | 0 | rtwdev->priv->pdev->dev.dma_io_tlb_mem->dyn_alloc.is_soft | 0-1 |
| PARAM_VALUE | 0 | rtwdev->priv->pdev->dev.dma_uses_io_tlb | 0-1 |
| PARAM_VALUE | 0 | rtwdev->rfk_mcc.data->table_idx | 0-2 |
| PARAM_VALUE | 0 | rtwdev->wow.patterns->bc | 0-1 |
| PARAM_VALUE | 0 | rtwdev->wow.patterns->crc | 0-u16max |
| PARAM_VALUE | 0 | rtwdev->wow.patterns->idx | 0-255 |
| PARAM_VALUE | 0 | rtwdev->wow.patterns->mc | 0-1 |
| PARAM_VALUE | 0 | rtwdev->wow.patterns->r_w | 0-1 |
| PARAM_VALUE | 0 | rtwdev->wow.patterns->skip_mac_hdr | 0-1 |
| PARAM_VALUE | 0 | rtwdev->wow.patterns->uc | 0-1 |
| PARAM_VALUE | 0 | rtwdev->wow.patterns->valid | 0-1 |
| PARAM_VALUE | 0 | rtwdev->wow.rtwvif_link | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->wow.rtwvif_link->net_type | 0 |
| PARAM_VALUE | 0 | *rtwdev->is_tssi_mode | 0-1 |
| PARAM_VALUE | 0 | *rtwdev->rfk_mcc.data->band | 0-255 |
| PARAM_VALUE | 0 | *rtwdev->rfk_mcc.data->bw | 0-255 |
| PARAM_VALUE | 0 | *rtwdev->rfk_mcc.data->ch | 0-255 |
| PARAM_VALUE | 0 | *rtwdev->rfk_mcc.data->rf18 | 0-4294967295 |
| PARAM_VALUE | 1 | skb | 4096-ptr_max |
| PARAM_VALUE | 1 | skb->data_len | 0 |
| PARAM_VALUE | 2 | wait | 4096-ptr_max |
| PARAM_VALUE | 3 | cond | 3 |
| BUF_SIZE | 1 | skb | (-1)-s32max |
| BUF_SIZE | 1 | skb | (-1)-s32max |
| BUF_SIZE | 2 | wait | 56 |
| CAPPED_DATA | 1 | skb->head | 1 |
| DATA_SOURCE | 0 | rtwdev | $0 |
| DATA_SOURCE | 1 | skb | r rtw89_fw_h2c_alloc_skb_with_hdr |
| PARAM_COMPARE | 0 | &rtwdev->mac.ps_wait | == $2 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| LOCK2 | global &rtnl_mutex | ||
| HALF_LOCKED2 | &local->hw.wiphy->mtx | ||
| HALF_LOCKED2 | &rdev->wiphy.mtx | ||
| TYPE_LOCK | (struct wiphy)->mtx |
drivers/net/wireless/realtek/rtw89/fw.c rtw89_fw_h2c_mcc_macid_bitmap() -> rtw89_h2c_tx_and_wait()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rtwdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->acam_num | 32,128 |
| PARAM_VALUE | 0 | rtwdev->chip->addrcam_ver | 0-1 |
| PARAM_VALUE | 0 | rtwdev->chip->afh_guard_ch | 6 |
| PARAM_VALUE | 0 | rtwdev->chip->bacam_dynamic_num | 4,8 |
| PARAM_VALUE | 0 | rtwdev->chip->bacam_num | 2,8,24 |
| PARAM_VALUE | 0 | rtwdev->chip->bacam_ver | 0-1,99 |
| PARAM_VALUE | 0 | rtwdev->chip->bb_table | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->bbmcu_nr | 0-1 |
| PARAM_VALUE | 0 | rtwdev->chip->bcam_num | 10,16,20 |
| PARAM_VALUE | 0 | rtwdev->chip->bss_clr_map_reg | 17324,17328,20144,157972 |
| PARAM_VALUE | 0 | rtwdev->chip->bss_clr_vld.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->bss_clr_vld.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->c2h_counter_reg.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->c2h_counter_reg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->c2h_ctrl_reg | 29028,33124 |
| PARAM_VALUE | 0 | rtwdev->chip->c2h_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->chip_gen | 0 |
| PARAM_VALUE | 0 | rtwdev->chip->dav_log_efuse_size | 0,16 |
| PARAM_VALUE | 0 | rtwdev->chip->dav_phy_efuse_size | 0,96 |
| PARAM_VALUE | 0 | rtwdev->chip->dcfo_comp | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->dcfo_comp->addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dcfo_comp->mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dcfo_comp_sft | 0,10,12 |
| PARAM_VALUE | 0 | rtwdev->chip->default_quirks | 0,2 |
| PARAM_VALUE | 0 | rtwdev->chip->dflt_parms | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_lna_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_lna_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_p20_pagcugc_en.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_p20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_rxb_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_rxb_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_s20_pagcugc_en.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_s20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_tia_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_tia_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_lna_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_lna_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_p20_pagcugc_en.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_p20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_rxb_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_rxb_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_s20_pagcugc_en.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_s20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_tia_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_tia_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_table | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->dle_scc_rsvd_size | 0,98304 |
| PARAM_VALUE | 0 | rtwdev->chip->dma_ch_mask | 0,2730,3312 |
| PARAM_VALUE | 0 | rtwdev->chip->edcca_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->fifo_size | 196608,393216,458752,589824 |
| PARAM_VALUE | 0 | rtwdev->chip->fw_def.fw_b_aid | 0,28768,28930 |
| PARAM_VALUE | 0 | rtwdev->chip->fw_def.fw_format_max | 0-2,4 |
| PARAM_VALUE | 0 | rtwdev->chip->h2c_cctl_func_id | 2,10,17 |
| PARAM_VALUE | 0 | rtwdev->chip->h2c_counter_reg.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->h2c_counter_reg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->h2c_ctrl_reg | 29024,33120 |
| PARAM_VALUE | 0 | rtwdev->chip->h2c_desc_size | 16,24 |
| PARAM_VALUE | 0 | rtwdev->chip->h2c_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->hci_func_en_addr | 30848,33664 |
| PARAM_VALUE | 0 | rtwdev->chip->imr_info | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->limit_efuse_size | 1152,1280,262144 |
| PARAM_VALUE | 0 | rtwdev->chip->logical_efuse_size | 1536,2048,458752 |
| PARAM_VALUE | 0 | rtwdev->chip->low_power_hci_modes | 0,12 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->agg_len_ht | 50708,67604 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->agg_limit.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->agg_limit.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->band1_offset | 8192,16384 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->bfee_ctrl.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->bfee_ctrl.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->filter_model_addr | 3076 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->indir_access_addr | 262144,524288 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->mem_page_size | 262144,524288 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->muedca_ctrl.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->muedca_ctrl.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->narrow_bw_ru_dis.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->narrow_bw_ru_dis.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->ps_status | 51724,69132 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->ra_agg_limit.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->ra_agg_limit.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->rx_fltr | 52768,70688 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->txcnt_limit.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->txcnt_limit.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->wow_ctrl.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->wow_ctrl.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mailbox | 1 |
| PARAM_VALUE | 0 | rtwdev->chip->max_amsdu_limit | 3500,5000,8000,11000 |
| PARAM_VALUE | 0 | rtwdev->chip->max_eht_mpdu_cap | 0-1 |
| PARAM_VALUE | 0 | rtwdev->chip->max_rx_agg_num | 64,256 |
| PARAM_VALUE | 0 | rtwdev->chip->max_tx_agg_num | 128 |
| PARAM_VALUE | 0 | rtwdev->chip->max_vht_mpdu_cap | 1-2 |
| PARAM_VALUE | 0 | rtwdev->chip->mon_reg | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->mon_reg_num | 12,15-16,19 |
| PARAM_VALUE | 0 | rtwdev->chip->nctl_post_table->defs->addr | 0,17,32,36,81-82,85,96,143,239,768,772,776,780,788,792,804,812,1616,1792,1796,1840,3100,3132,3168,3180,3184,3196,4620,4768,4776,4792,4796,4800,4824,4828,4832,4836,4840,4844,8200,8432,8436,8440,8444,8992,9028,9808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->nctl_post_table->defs->data | 0-8,10-12,14-17,19,22,24-25,28-32,40,46-48,51,57,62-66,68,92,99,101-102,104-105,107,110-121,124-125,127-128,136-137,156,181,191-192,205,212,229,239,252-257,289,316,364,431,460,464,469,471-472,476,482,485,488,496-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->nctl_post_table->defs->mask | 0-4,7-8,14-16,31-32,48,56,63-64,112,127-128,192,240,255,448,511-512,768,992,1023-1024,1536,2048,3072,3584,3840,4095-4096,7936,8191-8192,14336,16384,24576,28672,32512,32768,61440,64512,65280,u16max-65536,122880-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->nctl_table | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->needed_fw_elms | 487220,524085,671612724,1074032436,1074229012,1074229044 |
| PARAM_VALUE | 0 | rtwdev->chip->nhm_report | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->nhm_th | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->ops | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->ch_page_ctrl | 5892,35332,46852 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->hci_fc_ctrl | 5888,35328,46848 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_ctrl1 | 6032,35472,46992 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_ctrl2 | 6036,35476,46996 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_info1 | 6040,35480,47004 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_info2 | 6044,35484,47008 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_info3 | 6028,35468,46988 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->wp_page_ctrl1 | 6048,35488,47012 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->wp_page_ctrl2 | 6052,35492,47016 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->wp_page_info1 | 6056,35496,47020 |
| PARAM_VALUE | 0 | rtwdev->chip->para_ver | 0-1,15,1023 |
| PARAM_VALUE | 0 | rtwdev->chip->phy_def | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->phy_def->cr_base | 65536 |
| PARAM_VALUE | 0 | rtwdev->chip->phy_def->physt_bmp_eht | 252 |
| PARAM_VALUE | 0 | rtwdev->chip->phy_def->physt_bmp_start | 1852 |
| PARAM_VALUE | 0 | rtwdev->chip->phycap_addr | 1408,1424,5888 |
| PARAM_VALUE | 0 | rtwdev->chip->phycap_size | 56,96,128 |
| PARAM_VALUE | 0 | rtwdev->chip->physical_efuse_size | 1216,4864 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->ampdu_miss.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->ampdu_miss.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->brk.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->brk.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->brk_option.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->brk_option.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cca_spoofing.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cca_spoofing.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_brk.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_brk.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_cca.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_cca.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_sfd_gg.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_sfd_gg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_sig_gg.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_sig_gg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_spoofing.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_spoofing.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_txen.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_txen.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_txon.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_txon.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->enable_all_cnt.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->enable_all_cnt.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->lsig_brk_l_th.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->lsig_brk_l_th.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->lsig_brk_s_th.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->lsig_brk_s_th.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->ofdm_cca.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->ofdm_cca.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->r1b_rr_sel.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->r1b_rr_sel.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->r1b_rx_rpt_rst.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->r1b_rx_rpt_rst.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rst_all_cnt.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rst_all_cnt.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rxl_err_parity.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rxl_err_parity.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rxl_err_rate.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rxl_err_rate.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->search_fail.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->search_fail.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->ppdu_max_usr | 4,8,16 |
| PARAM_VALUE | 0 | rtwdev->chip->ps_mode_supported | 6,14 |
| PARAM_VALUE | 0 | rtwdev->chip->pwr_off_seq->addr | 2,5-7,16,36,113,128,130-131,136,145-146,198,420,672,674,752-753 |
| PARAM_VALUE | 0 | rtwdev->chip->pwr_on_seq | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->pwr_on_seq->addr | 2,5-7,16,36,113,128,130-131,136,145-146,198,420,672,674,752-753 |
| PARAM_VALUE | 0 | rtwdev->chip->rf_para_dlink_num_v9 | 0,9 |
| PARAM_VALUE | 0 | rtwdev->chip->rf_para_dlink_v9 | 0,6306072171210809344 |
| PARAM_VALUE | 0 | rtwdev->chip->rf_para_ulink_num_v9 | 0,9 |
| PARAM_VALUE | 0 | rtwdev->chip->rf_para_ulink_v9 | 0,3842558352950398976 |
| PARAM_VALUE | 0 | rtwdev->chip->rf_path_num | 1-2 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_get.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_get.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->mode.addr | 98,724,728,1774,17712,17716,17720,17724,17728,17732,17736,17740 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->mode.data | 0-3,7-8,15-16,18,24,26,30,38,42,52,64,75,96,128,131467,205831 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->mode.mask | 2-4,7-8,15-16,31-32,51,56,63-64,128,192,240,255-256,448,511-512 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->pinmux.addr | 98,724,728,1774,17712,17716,17720,17724,17728,17732,17736,17740 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->pinmux.data | 0-3,7-8,15-16,18,24,26,30,38,42,52,64,75,96,128,131467,205831 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->pinmux.mask | 2-4,7-8,15-16,31-32,51,56,63-64,128,192,240,255-256,448,511-512 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->ref_rate.addr | 98,724,728,17712,17716,17720,17724,17728,17732,17736,17740 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->ref_rate.mask | 2-4,7-8,15-16,31-32,51,56,63-64,128,192,240,255-256,448,511-512 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->rsc.addr | 98,724,728,17712,17716,17720,17724,17728,17732,17736,17740 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->rsc.mask | 2-4,7-8,15-16,31-32,51,56,63-64,128,192,240,255-256,448,511-512 |
| PARAM_VALUE | 0 | rtwdev->chip->rssi_tol | 2 |
| PARAM_VALUE | 0 | rtwdev->chip->rsvd_ple_ofst | 194560,391168,456704,587776 |
| PARAM_VALUE | 0 | rtwdev->chip->rx_nss | 1-2 |
| PARAM_VALUE | 0 | rtwdev->chip->scam_num | 32,128 |
| PARAM_VALUE | 0 | rtwdev->chip->scbd | 1 |
| PARAM_VALUE | 0 | rtwdev->chip->sec_ctrl_efuse_size | 4 |
| PARAM_VALUE | 0 | rtwdev->chip->support_bands | 3,11 |
| PARAM_VALUE | 0 | rtwdev->chip->support_bandwidths | 14,46 |
| PARAM_VALUE | 0 | rtwdev->chip->support_chanctx_num | 0-2 |
| PARAM_VALUE | 0 | rtwdev->chip->support_link_num | 0,2 |
| PARAM_VALUE | 0 | rtwdev->chip->support_macid_num | 32,64,128 |
| PARAM_VALUE | 0 | rtwdev->chip->tx_nss | 1-2 |
| PARAM_VALUE | 0 | rtwdev->chip->txpwr_factor_bb | 3 |
| PARAM_VALUE | 0 | rtwdev->chip->txpwr_factor_mac | 1 |
| PARAM_VALUE | 0 | rtwdev->chip->txpwr_factor_rf | 2 |
| PARAM_VALUE | 0 | rtwdev->chip->txwd_body_size | 24,32 |
| PARAM_VALUE | 0 | rtwdev->chip->txwd_info_size | 24,32 |
| PARAM_VALUE | 0 | rtwdev->chip->wde_qempty_acq_grpnum | 4,8,16 |
| PARAM_VALUE | 0 | rtwdev->chip->wde_qempty_mgq_grpsel | 4,8,16 |
| PARAM_VALUE | 0 | rtwdev->chip->wlcx_desired | 84213760,100663296,118358016,118554624,152371200 |
| PARAM_VALUE | 0 | rtwdev->chip->xtal_info | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->xtal_info->sc_xi_mask | 127,130048 |
| PARAM_VALUE | 0 | rtwdev->chip->xtal_info->sc_xo_mask | 32512,16646144 |
| PARAM_VALUE | 0 | rtwdev->chip->xtal_info->xcap_reg | 640,652 |
| PARAM_VALUE | 0 | rtwdev->hci.ops->deinit | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->pause | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->read16 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->read32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->read8 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->recalc_int_mit | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->start | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->stop | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->write16 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->write32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->write8 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->do_mdelay | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->do_udelay | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->pack | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->phy_write32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->unpack | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write16 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write8 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write_rf | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->mac.dle_info.rsvd_qt->b0_csi | 0,44,56,107 |
| PARAM_VALUE | 0 | rtwdev->mac.dle_info.rsvd_qt->b0_ftm | 0,6 |
| PARAM_VALUE | 0 | rtwdev->mac.dle_info.rsvd_qt->b0_lmr | 0,6 |
| PARAM_VALUE | 0 | rtwdev->mac.dle_info.rsvd_qt->b0_smr | 0,69 |
| PARAM_VALUE | 0 | rtwdev->mac.dle_info.rsvd_qt->b1_csi | 0,28,44,107 |
| PARAM_VALUE | 0 | rtwdev->mac.dle_info.rsvd_qt->b1_ftm | 0,6 |
| PARAM_VALUE | 0 | rtwdev->mac.dle_info.rsvd_qt->b1_lmr | 0,6 |
| PARAM_VALUE | 0 | rtwdev->mac.dle_info.rsvd_qt->b1_smr | 0 |
| PARAM_VALUE | 0 | rtwdev->mac.dle_info.rsvd_qt->mpdu_info_tbl | 0-2 |
| PARAM_VALUE | 0 | rtwdev->mac.dle_info.rsvd_qt->others | 0 |
| PARAM_VALUE | 0 | rtwdev->mac.hfc_param.ch_cfg->grp | 0-1 |
| PARAM_VALUE | 0 | rtwdev->mac.hfc_param.ch_cfg->max | 0,196,210,222,226,311,341-344,402,601,603,606,730,732,742-743,1614,1641,1896 |
| PARAM_VALUE | 0 | rtwdev->mac.hfc_param.ch_cfg->min | 0,2,4-5,13,15-16,18,22,24,32,40,54,128 |
| PARAM_VALUE | 0 | rtwdev->napi.thread->delays->blkio_count | 0-4294967295 |
| PARAM_VALUE | 0 | rtwdev->napi.thread->sched_task_group->idle | s32min-s32max |
| PARAM_VALUE | 0 | rtwdev->napi.thread->sched_task_group->parent | 0-s64max |
| PARAM_VALUE | 0 | rtwdev->pci_info->autok_en | 0 |
| PARAM_VALUE | 0 | rtwdev->pci_info->cpwm_addr | 12484,33136 |
| PARAM_VALUE | 0 | rtwdev->pci_info->dma_busy2_reg | 0,4552,4892 |
| PARAM_VALUE | 0 | rtwdev->pci_info->dma_busy3_reg | 4124,4616,45084 |
| PARAM_VALUE | 0 | rtwdev->pci_info->exp_ctrl_reg | 4612,5104,45088 |
| PARAM_VALUE | 0 | rtwdev->pci_info->group_bd_addr | 0-1 |
| PARAM_VALUE | 0 | rtwdev->pci_info->init_cfg_reg | 4096,45056 |
| PARAM_VALUE | 0 | rtwdev->pci_info->io_rcy_en | 0-1 |
| PARAM_VALUE | 0 | rtwdev->pci_info->io_rcy_tmr | 254,72000 |
| PARAM_VALUE | 0 | rtwdev->pci_info->lbc_en | 1 |
| PARAM_VALUE | 0 | rtwdev->pci_info->lbc_tmr | 8 |
| PARAM_VALUE | 0 | rtwdev->pci_info->max_tag_num_mask | 7,15,458752 |
| PARAM_VALUE | 0 | rtwdev->pci_info->mit_addr | 4308,4484,13112 |
| PARAM_VALUE | 0 | rtwdev->pci_info->multi_tag_num | 7 |
| PARAM_VALUE | 0 | rtwdev->pci_info->rpp_fmt_size | 4,8 |
| PARAM_VALUE | 0 | rtwdev->pci_info->rpwm_addr | 4288,12480 |
| PARAM_VALUE | 0 | rtwdev->pci_info->rx_burst | 1,3 |
| PARAM_VALUE | 0 | rtwdev->pci_info->rxbd_mode | 0 |
| PARAM_VALUE | 0 | rtwdev->pci_info->rxbd_mode_bit | 6144,16384,262144 |
| PARAM_VALUE | 0 | rtwdev->pci_info->rxbd_rwptr_clr_reg | 4120,4608,45080 |
| PARAM_VALUE | 0 | rtwdev->pci_info->rxbd_trunc_mode | 1 |
| PARAM_VALUE | 0 | rtwdev->pci_info->rxhci_en_bit | 32,8192,32768 |
| PARAM_VALUE | 0 | rtwdev->pci_info->tag_mode | 1 |
| PARAM_VALUE | 0 | rtwdev->pci_info->tx_burst | 2,7 |
| PARAM_VALUE | 0 | rtwdev->pci_info->tx_dma_ch_mask | 0,2730,3312 |
| PARAM_VALUE | 0 | rtwdev->pci_info->txbd_rwptr_clr2_reg | 0,4548,4884,45076 |
| PARAM_VALUE | 0 | rtwdev->pci_info->txbd_trunc_mode | 1 |
| PARAM_VALUE | 0 | rtwdev->pci_info->txhci_en_bit | 16,128,2048 |
| PARAM_VALUE | 0 | rtwdev->pci_info->wd_dma_act_intvl | 1 |
| PARAM_VALUE | 0 | rtwdev->pci_info->wd_dma_idle_intvl | 1 |
| PARAM_VALUE | 0 | rtwdev->pci_info->wp_sel_addr | 0,4916,46112 |
| PARAM_VALUE | 0 | rtwdev->rfk_mcc.data->table_idx | 0-255 |
| PARAM_VALUE | 0 | rtwdev->variant->qta_def_override | 0,927467491008073728 |
| PARAM_VALUE | 0 | *rtwdev->rfk_mcc.data->rf18 | 0-4294967295 |
| PARAM_VALUE | 1 | skb | 4096-ptr_max |
| PARAM_VALUE | 1 | skb->data_len | 0 |
| PARAM_VALUE | 2 | wait | 4096-ptr_max |
| BUF_SIZE | 1 | skb | (-1)-s32max |
| BUF_SIZE | 1 | skb | (-1)-s32max |
| BUF_SIZE | 2 | wait | 56 |
| CAPPED_DATA | 1 | skb->head | 1 |
| DATA_SOURCE | 0 | rtwdev | $0 |
| DATA_SOURCE | 1 | skb | r rtw89_fw_h2c_alloc_skb_with_hdr |
| PARAM_COMPARE | 0 | &rtwdev->mcc.wait | == $2 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NO_OVERFLOW_SIMPLE | 0 | rtwdev->stats.rx_unicast | |
| NO_OVERFLOW_SIMPLE | 0 | rtwdev->stats.tx_unicast |
drivers/net/wireless/realtek/rtw89/fw.c rtw89_fw_h2c_mcc_req_tsf() -> rtw89_h2c_tx_and_wait()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rtwdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->bb_table | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->bss_clr_vld.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->bss_clr_vld.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->c2h_counter_reg.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->c2h_counter_reg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->c2h_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->chip_gen | 0 |
| PARAM_VALUE | 0 | rtwdev->chip->dcfo_comp | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->dcfo_comp->addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dcfo_comp->mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dflt_parms | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_lna_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_lna_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_p20_pagcugc_en.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_p20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_rxb_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_rxb_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_s20_pagcugc_en.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_s20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_tia_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_tia_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_lna_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_lna_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_p20_pagcugc_en.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_p20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_rxb_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_rxb_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_s20_pagcugc_en.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_s20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_tia_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_tia_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_table | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->edcca_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->h2c_counter_reg.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->h2c_counter_reg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->h2c_desc_size | 16,24 |
| PARAM_VALUE | 0 | rtwdev->chip->h2c_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->imr_info | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->agg_limit.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->agg_limit.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->bfee_ctrl.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->bfee_ctrl.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->muedca_ctrl.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->muedca_ctrl.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->narrow_bw_ru_dis.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->narrow_bw_ru_dis.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->ra_agg_limit.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->ra_agg_limit.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->txcnt_limit.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->txcnt_limit.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->wow_ctrl.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->wow_ctrl.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mon_reg | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->nctl_post_table->defs->addr | 0,17,32,36,81-82,85,96,143,239,768,772,776,780,788,792,804,812,1616,1792,1796,1840,3100,3132,3168,3180,3184,3196,4620,4768,4776,4792,4796,4800,4824,4828,4832,4836,4840,4844,8200,8432,8436,8440,8444,8992,9028,9808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->nctl_post_table->defs->data | 0-8,10-12,14-17,19,22,24-25,28-32,40,46-48,51,57,62-66,68,92,99,101-102,104-105,107,110-121,124-125,127-128,136-137,156,181,191-192,205,212,229,239,252-257,289,316,364,431,460,464,469,471-472,476,482,485,488,496-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->nctl_post_table->defs->mask | 0-4,7-8,14-16,31-32,48,56,63-64,112,127-128,192,240,255,448,511-512,768,992,1023-1024,1536,2048,3072,3584,3840,4095-4096,7936,8191-8192,14336,16384,24576,28672,32512,32768,61440,64512,65280,u16max-65536,122880-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->nctl_table | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->needed_fw_elms | 107426,487220,524085,671612724,1074032436,1074229012,1074229044 |
| PARAM_VALUE | 0 | rtwdev->chip->nhm_report | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->nhm_th | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->ops | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->ch_page_ctrl | 5892,35332,46852 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->hci_fc_ctrl | 5888,35328,46848 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_ctrl1 | 6032,35472,46992 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_ctrl2 | 6036,35476,46996 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_info1 | 6040,35480,47004 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_info2 | 6044,35484,47008 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_info3 | 6028,35468,46988 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->wp_page_ctrl1 | 6048,35488,47012 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->wp_page_ctrl2 | 6052,35492,47016 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->wp_page_info1 | 6056,35496,47020 |
| PARAM_VALUE | 0 | rtwdev->chip->phy_def | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->phy_def->cr_base | 65536 |
| PARAM_VALUE | 0 | rtwdev->chip->phy_def->physt_bmp_eht | 252 |
| PARAM_VALUE | 0 | rtwdev->chip->phy_def->physt_bmp_start | 1852 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->ampdu_miss.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->ampdu_miss.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->brk.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->brk.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->brk_option.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->brk_option.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cca_spoofing.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cca_spoofing.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_brk.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_brk.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_cca.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_cca.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_sfd_gg.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_sfd_gg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_sig_gg.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_sig_gg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_spoofing.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_spoofing.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_txen.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_txen.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_txon.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_txon.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->enable_all_cnt.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->enable_all_cnt.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->lsig_brk_l_th.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->lsig_brk_l_th.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->lsig_brk_s_th.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->lsig_brk_s_th.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->ofdm_cca.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->ofdm_cca.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->r1b_rr_sel.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->r1b_rr_sel.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->r1b_rx_rpt_rst.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->r1b_rx_rpt_rst.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rst_all_cnt.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rst_all_cnt.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rxl_err_parity.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rxl_err_parity.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rxl_err_rate.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rxl_err_rate.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->search_fail.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->search_fail.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pwr_off_seq->addr | 2,5-7,16,36,113,128,130-131,136,145-146,198,420,672,674,752-753 |
| PARAM_VALUE | 0 | rtwdev->chip->pwr_on_seq | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->pwr_on_seq->addr | 2,5-7,16,36,113,128,130-131,136,145-146,198,420,672,674,752-753 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_get.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_get.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->mode.addr | 98,724,728,17712,17716,17720,17724,17728,17732,17736,17740 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->mode.data | 0-3,7-8,15-16,18,24,26,30,38,42,52,64,75,96,128,131467,205831 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->mode.mask | 2-4,7-8,15-16,31-32,51,56,63-64,128,192,240,255-256,448,511-512 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->pinmux.addr | 98,724,728,17712,17716,17720,17724,17728,17732,17736,17740 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->pinmux.data | 0-3,7-8,15-16,18,24,26,30,38,42,52,64,75,96,128,131467,205831 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->pinmux.mask | 2-4,7-8,15-16,31-32,51,56,63-64,128,192,240,255-256,448,511-512 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->ref_rate.addr | 98,724,728,17712,17716,17720,17724,17728,17732,17736,17740 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->ref_rate.mask | 2-4,7-8,15-16,31-32,51,56,63-64,128,192,240,255-256,448,511-512 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->rsc.addr | 98,724,728,17712,17716,17720,17724,17728,17732,17736,17740 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->rsc.mask | 2-4,7-8,15-16,31-32,51,56,63-64,128,192,240,255-256,448,511-512 |
| PARAM_VALUE | 0 | rtwdev->chip->xtal_info | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->xtal_info->sc_xi_mask | 127,130048 |
| PARAM_VALUE | 0 | rtwdev->chip->xtal_info->sc_xo_mask | 32512,16646144 |
| PARAM_VALUE | 0 | rtwdev->dev->iommu_group->default_domain | 0-s64max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->deinit | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->pause | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->read16 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->read32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->read8 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->recalc_int_mit | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->start | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->stop | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->write16 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->write32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->write8 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->do_mdelay | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->do_udelay | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->pack | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->phy_write32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->unpack | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write16 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write8 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write_rf | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->mcc.role_aux.rtwvif_link | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->mcc.role_ref.rtwvif_link | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->napi.thread->delays->blkio_count | 0-4294967295 |
| PARAM_VALUE | 0 | rtwdev->napi.thread->sched_task_group->idle | s32min-s32max |
| PARAM_VALUE | 0 | rtwdev->rfk_mcc.data->table_idx | 0-255 |
| PARAM_VALUE | 0 | *rtwdev->rfk_mcc.data->rf18 | 0-4294967295 |
| PARAM_VALUE | 1 | skb | 4096-ptr_max |
| PARAM_VALUE | 1 | skb->data_len | 0 |
| PARAM_VALUE | 2 | wait | 4096-ptr_max |
| BUF_SIZE | 1 | skb | (-1)-s32max |
| BUF_SIZE | 1 | skb | (-1)-s32max |
| BUF_SIZE | 2 | wait | 56 |
| CAPPED_DATA | 1 | skb->head | 1 |
| DATA_SOURCE | 0 | rtwdev | $0 |
| DATA_SOURCE | 1 | skb | r rtw89_fw_h2c_alloc_skb_with_hdr |
| PARAM_COMPARE | 0 | &rtwdev->mcc.wait | == $2 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NO_OVERFLOW_SIMPLE | 0 | rtwdev->stats.rx_unicast | |
| NO_OVERFLOW_SIMPLE | 0 | rtwdev->stats.tx_unicast |
drivers/net/wireless/realtek/rtw89/fw.c rtw89_fw_h2c_mcc_set_duration() -> rtw89_h2c_tx_and_wait()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rtwdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->bss_clr_vld.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->c2h_counter_reg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->chip_gen | 0-1 |
| PARAM_VALUE | 0 | rtwdev->chip->dcfo_comp->mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_lna_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_p20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_rxb_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_s20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_tia_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_lna_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_p20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_rxb_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_s20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_tia_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->h2c_counter_reg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->h2c_desc_size | 16,24 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->agg_limit.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->bfee_ctrl.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->muedca_ctrl.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->narrow_bw_ru_dis.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->ra_agg_limit.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->txcnt_limit.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->wow_ctrl.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->needed_fw_elms | 107426,487220,524085,671612724,1074032436,1074229012,1074229044 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->ch_page_ctrl | 5892,35332,46852 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->hci_fc_ctrl | 5888,35328,46848 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_ctrl1 | 6032,35472,46992 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_ctrl2 | 6036,35476,46996 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_info1 | 6040,35480,47004 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_info2 | 6044,35484,47008 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_info3 | 6028,35468,46988 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->wp_page_ctrl1 | 6048,35488,47012 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->wp_page_ctrl2 | 6052,35492,47016 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->wp_page_info1 | 6056,35496,47020 |
| PARAM_VALUE | 0 | rtwdev->chip->phy_def->cr_base | 65536 |
| PARAM_VALUE | 0 | rtwdev->chip->phy_def->physt_bmp_eht | 252 |
| PARAM_VALUE | 0 | rtwdev->chip->phy_def->physt_bmp_start | 1852 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->ampdu_miss.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->brk.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->brk_option.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cca_spoofing.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_brk.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_cca.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_sfd_gg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_sig_gg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_spoofing.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_txen.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_txon.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->enable_all_cnt.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->lsig_brk_l_th.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->lsig_brk_s_th.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->ofdm_cca.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->r1b_rr_sel.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->r1b_rx_rpt_rst.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rst_all_cnt.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rxl_err_parity.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rxl_err_rate.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->search_fail.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pwr_off_seq->addr | 2,5-7,16,36,113,128,130-131,136,145-146,198,420,672,674,752-753 |
| PARAM_VALUE | 0 | rtwdev->chip->pwr_on_seq->addr | 2,5-7,16,36,113,128,130-131,136,145-146,198,420,672,674,752-753 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_get.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->mode.addr | 98,724,728,1774,17712,17716,17720,17724,17728,17732,17736,17740 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->mode.data | 0-3,7-8,15-16,18,24,26,30,38,42,52,64,75,96,128,131467,205831 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->mode.mask | 2-4,7-8,15-16,31-32,51,56,63-64,128,192,240,255-256,448,511-512 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->pinmux.addr | 98,724,728,1774,17712,17716,17720,17724,17728,17732,17736,17740 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->pinmux.data | 0-3,7-8,15-16,18,24,26,30,38,42,52,64,75,96,128,131467,205831 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->pinmux.mask | 2-4,7-8,15-16,31-32,51,56,63-64,128,192,240,255-256,448,511-512 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->ref_rate.addr | 98,724,728,1774,17712,17716,17720,17724,17728,17732,17736,17740 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->ref_rate.mask | 2-4,7-8,15-16,31-32,51,56,63-64,128,192,240,255-256,448,511-512 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->rsc.addr | 98,724,728,1774,17712,17716,17720,17724,17728,17732,17736,17740 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->rsc.mask | 2-4,7-8,15-16,31-32,51,56,63-64,128,192,240,255-256,448,511-512 |
| PARAM_VALUE | 0 | rtwdev->hci.ops->deinit | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->read16 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->read32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->read8 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->start | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->stop | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->write16 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->write32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->write8 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->do_mdelay | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->do_udelay | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->pack | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->phy_write32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->unpack | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write8 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write_rf | 4096-ptr_max |
| PARAM_VALUE | 1 | skb | 4096-ptr_max |
| PARAM_VALUE | 1 | skb->data_len | 0 |
| PARAM_VALUE | 2 | wait | 4096-ptr_max |
| BUF_SIZE | 1 | skb | (-1)-s32max |
| BUF_SIZE | 1 | skb | (-1)-s32max |
| BUF_SIZE | 2 | wait | 56 |
| CAPPED_DATA | 1 | skb->head | 1 |
| DATA_SOURCE | 0 | rtwdev | $0 |
| DATA_SOURCE | 1 | skb | r rtw89_fw_h2c_alloc_skb_with_hdr |
| PARAM_COMPARE | 0 | &rtwdev->mcc.wait | == $2 |
drivers/net/wireless/realtek/rtw89/fw.c rtw89_fw_h2c_mcc_sync() -> rtw89_h2c_tx_and_wait()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rtwdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->bss_clr_vld.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->c2h_counter_reg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->chip_gen | 0-1 |
| PARAM_VALUE | 0 | rtwdev->chip->dcfo_comp->mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_lna_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_p20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_rxb_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_s20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_tia_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_lna_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_p20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_rxb_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_s20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_tia_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->h2c_counter_reg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->h2c_desc_size | 16,24 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->agg_limit.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->bfee_ctrl.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->muedca_ctrl.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->narrow_bw_ru_dis.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->ra_agg_limit.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->txcnt_limit.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->wow_ctrl.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->needed_fw_elms | 107426,487220,524085,671612724,1074032436,1074229012,1074229044 |
| PARAM_VALUE | 0 | rtwdev->chip->ops | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->ch_page_ctrl | 5892,35332,46852 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->hci_fc_ctrl | 5888,35328,46848 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_ctrl1 | 6032,35472,46992 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_ctrl2 | 6036,35476,46996 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_info1 | 6040,35480,47004 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_info2 | 6044,35484,47008 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_info3 | 6028,35468,46988 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->wp_page_ctrl1 | 6048,35488,47012 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->wp_page_ctrl2 | 6052,35492,47016 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->wp_page_info1 | 6056,35496,47020 |
| PARAM_VALUE | 0 | rtwdev->chip->phy_def->cr_base | 65536 |
| PARAM_VALUE | 0 | rtwdev->chip->phy_def->physt_bmp_eht | 252 |
| PARAM_VALUE | 0 | rtwdev->chip->phy_def->physt_bmp_start | 1852 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->ampdu_miss.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->brk.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->brk_option.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cca_spoofing.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_brk.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_cca.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_sfd_gg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_sig_gg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_spoofing.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_txen.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_txon.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->enable_all_cnt.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->lsig_brk_l_th.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->lsig_brk_s_th.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->ofdm_cca.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->r1b_rr_sel.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->r1b_rx_rpt_rst.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rst_all_cnt.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rxl_err_parity.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rxl_err_rate.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->search_fail.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pwr_off_seq->addr | 2,5-7,16,36,113,128,130-131,136,145-146,198,420,672,674,752-753 |
| PARAM_VALUE | 0 | rtwdev->chip->pwr_on_seq->addr | 2,5-7,16,36,113,128,130-131,136,145-146,198,420,672,674,752-753 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_get.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->mode.addr | 98,724,728,17712,17716,17720,17724,17728,17732,17736,17740 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->mode.data | 0-3,7-8,15-16,18,24,26,30,38,42,52,64,75,96,128,131467,205831 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->mode.mask | 2-4,7-8,15-16,31-32,51,56,63-64,128,192,240,255-256,448,511-512 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->pinmux.addr | 98,724,728,17712,17716,17720,17724,17728,17732,17736,17740 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->pinmux.data | 0-3,7-8,15-16,18,24,26,30,38,42,52,64,75,96,128,131467,205831 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->pinmux.mask | 2-4,7-8,15-16,31-32,51,56,63-64,128,192,240,255-256,448,511-512 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->ref_rate.addr | 98,724,728,1774,17712,17716,17720,17724,17728,17732,17736,17740 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->ref_rate.mask | 2-4,7-8,15-16,31-32,51,56,63-64,128,192,240,255-256,448,511-512 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->rsc.addr | 98,724,728,1774,17712,17716,17720,17724,17728,17732,17736,17740 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->rsc.mask | 2-4,7-8,15-16,31-32,51,56,63-64,128,192,240,255-256,448,511-512 |
| PARAM_VALUE | 0 | rtwdev->hci.ops->deinit | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->read16 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->read32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->read8 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->start | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->stop | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->write16 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->write32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->write8 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->do_mdelay | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->do_udelay | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->pack | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->phy_write32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->unpack | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write8 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write_rf | 4096-ptr_max |
| PARAM_VALUE | 1 | skb | 4096-ptr_max |
| PARAM_VALUE | 1 | skb->data_len | 0 |
| PARAM_VALUE | 2 | wait | 4096-ptr_max |
| BUF_SIZE | 1 | skb | (-1)-s32max |
| BUF_SIZE | 1 | skb | (-1)-s32max |
| BUF_SIZE | 2 | wait | 56 |
| CAPPED_DATA | 1 | skb->head | 1 |
| DATA_SOURCE | 0 | rtwdev | $0 |
| DATA_SOURCE | 1 | skb | r rtw89_fw_h2c_alloc_skb_with_hdr |
| PARAM_COMPARE | 0 | &rtwdev->mcc.wait | == $2 |
drivers/net/wireless/realtek/rtw89/fw.c rtw89_fw_h2c_mlo_link_cfg() -> rtw89_h2c_tx_and_wait()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rtwdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->bss_clr_vld.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->c2h_counter_reg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->chip_gen | 0-1 |
| PARAM_VALUE | 0 | rtwdev->chip->dcfo_comp->mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_lna_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_p20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_rxb_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_s20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_tia_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_lna_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_p20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_rxb_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_s20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_tia_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->h2c_counter_reg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->h2c_desc_size | 16,24 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->agg_limit.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->bfee_ctrl.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->muedca_ctrl.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->narrow_bw_ru_dis.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->ra_agg_limit.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->txcnt_limit.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->wow_ctrl.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->needed_fw_elms | 107426,487220,524085,671612724,1074032436,1074229012,1074229044 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->ch_page_ctrl | 5892,35332,46852 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->hci_fc_ctrl | 5888,35328,46848 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_ctrl1 | 6032,35472,46992 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_ctrl2 | 6036,35476,46996 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_info1 | 6040,35480,47004 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_info2 | 6044,35484,47008 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_info3 | 6028,35468,46988 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->wp_page_ctrl1 | 6048,35488,47012 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->wp_page_ctrl2 | 6052,35492,47016 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->wp_page_info1 | 6056,35496,47020 |
| PARAM_VALUE | 0 | rtwdev->chip->phy_def->cr_base | 65536 |
| PARAM_VALUE | 0 | rtwdev->chip->phy_def->physt_bmp_eht | 252 |
| PARAM_VALUE | 0 | rtwdev->chip->phy_def->physt_bmp_start | 1852 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->ampdu_miss.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->brk.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->brk_option.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cca_spoofing.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_brk.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_cca.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_sfd_gg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_sig_gg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_spoofing.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_txen.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_txon.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->enable_all_cnt.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->lsig_brk_l_th.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->lsig_brk_s_th.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->ofdm_cca.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->r1b_rr_sel.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->r1b_rx_rpt_rst.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rst_all_cnt.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rxl_err_parity.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rxl_err_rate.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->search_fail.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pwr_off_seq->addr | 2,5-7,16,36,113,128,130-131,136,145-146,198,420,672,674,752-753 |
| PARAM_VALUE | 0 | rtwdev->chip->pwr_on_seq->addr | 2,5-7,16,36,113,128,130-131,136,145-146,198,420,672,674,752-753 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_get.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->mode.addr | 98,724,728,1774,17712,17716,17720,17724,17728,17732,17736,17740 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->mode.data | 0-3,7-8,15-16,18,24,26,30,38,42,52,64,75,96,128,131467,205831 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->mode.mask | 2-4,7-8,15-16,31-32,51,56,63-64,128,192,240,255-256,448,511-512 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->pinmux.addr | 98,724,728,1774,17712,17716,17720,17724,17728,17732,17736,17740 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->pinmux.data | 0-3,7-8,15-16,18,24,26,30,38,42,52,64,75,96,128,131467,205831 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->pinmux.mask | 2-4,7-8,15-16,31-32,51,56,63-64,128,192,240,255-256,448,511-512 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->ref_rate.addr | 98,724,728,1774,17712,17716,17720,17724,17728,17732,17736,17740 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->ref_rate.mask | 2-4,7-8,15-16,31-32,51,56,63-64,128,192,240,255-256,448,511-512 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->rsc.addr | 98,724,728,1774,17712,17716,17720,17724,17728,17732,17736,17740 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->rsc.mask | 2-4,7-8,15-16,31-32,51,56,63-64,128,192,240,255-256,448,511-512 |
| PARAM_VALUE | 0 | rtwdev->coex_rfk_chk_work.timer.is_hard | 0-1 |
| PARAM_VALUE | 0 | rtwdev->coex_rfk_chk_work.timer.is_lazy | 0-1 |
| PARAM_VALUE | 0 | rtwdev->coex_rfk_chk_work.timer.is_queued | 0-1 |
| PARAM_VALUE | 0 | rtwdev->coex_rfk_chk_work.timer.is_soft | 0-1 |
| PARAM_VALUE | 0 | rtwdev->coex_rfk_chk_work.work.entry.next->next | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->coex_rfk_chk_work.work.entry.next->prev | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->coex_rfk_chk_work.work.entry.prev->next | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->coex_rfk_chk_work.work.entry.prev->prev | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->fw_cmd_ofld_info->accu_delay | 0 |
| PARAM_VALUE | 0 | rtwdev->hal.entity_mgnt.active_list.next->next | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hal.entity_mgnt.active_list.next->prev | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->deinit | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->read16 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->read32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->read8 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->start | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->stop | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->write16 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->write32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->write8 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->do_mdelay | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->do_udelay | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->pack | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->phy_write32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->unpack | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write8 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write_rf | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->priv->continual_io_error.counter | s32min-s32max |
| PARAM_VALUE | 0 | rtwdev->priv->h2c_queue.qlen | 0-4294967295 |
| PARAM_VALUE | 0 | rtwdev->priv->h2c_release_queue.qlen | 0-4294967295 |
| PARAM_VALUE | 0 | rtwdev->priv->pdev->dev.dma_io_tlb_mem->dyn_alloc.flags | 0-4294967295 |
| PARAM_VALUE | 0 | rtwdev->priv->pdev->dev.dma_io_tlb_mem->dyn_alloc.is_hard | 0-1 |
| PARAM_VALUE | 0 | rtwdev->priv->pdev->dev.dma_io_tlb_mem->dyn_alloc.is_lazy | 0-1 |
| PARAM_VALUE | 0 | rtwdev->priv->pdev->dev.dma_io_tlb_mem->dyn_alloc.is_queued | 0-1 |
| PARAM_VALUE | 0 | rtwdev->priv->pdev->dev.dma_io_tlb_mem->dyn_alloc.is_soft | 0-1 |
| PARAM_VALUE | 0 | rtwdev->priv->pdev->dev.dma_uses_io_tlb | 0-1 |
| PARAM_VALUE | 0 | rtwdev->priv->pdev->dev.iommu->pci_32bit_workaround | 0-1 |
| PARAM_VALUE | 0 | rtwdev->rfk_mcc.data->table_idx | 0-255 |
| PARAM_VALUE | 0 | *rtwdev->dpk->dpk_order | 0-1,3 |
| PARAM_VALUE | 0 | *rtwdev->hal->entity_active | 1 |
| PARAM_VALUE | 0 | *rtwdev->iqk->bp_iqkenable | 0-4294967295 |
| PARAM_VALUE | 0 | *rtwdev->iqk->bp_rxkresult | 0-4294967295 |
| PARAM_VALUE | 0 | *rtwdev->iqk->bp_txkresult | 0-4294967295 |
| PARAM_VALUE | 0 | *rtwdev->iqk->iqk_channel | 0 |
| PARAM_VALUE | 0 | *rtwdev->iqk->is_wb_txiqk | 0-1 |
| PARAM_VALUE | 0 | *rtwdev->iqk->lok_fail | 0-1 |
| PARAM_VALUE | 0 | *rtwdev->is_tssi_mode | 0-1 |
| PARAM_VALUE | 0 | *rtwdev->priv->vendor_req_buf | 0-4294967295 |
| PARAM_VALUE | 0 | *rtwdev->rfk_mcc.data->band | 0-255 |
| PARAM_VALUE | 0 | *rtwdev->rfk_mcc.data->bw | 0-255 |
| PARAM_VALUE | 0 | *rtwdev->rfk_mcc.data->ch | 0-255 |
| PARAM_VALUE | 0 | *rtwdev->rfk_mcc.data->rf18 | 0-4294967295 |
| PARAM_VALUE | 1 | skb | 4096-ptr_max |
| PARAM_VALUE | 1 | skb->data_len | 0 |
| PARAM_VALUE | 2 | wait | 4096-ptr_max |
| PARAM_VALUE | 3 | cond | 8-2558 |
| BUF_SIZE | 1 | skb | (-1)-s32max |
| BUF_SIZE | 1 | skb | (-1)-s32max |
| BUF_SIZE | 2 | wait | 56 |
| CAPPED_DATA | 1 | skb->head | 1 |
| DATA_SOURCE | 0 | rtwdev | $0 |
| DATA_SOURCE | 1 | skb | r rtw89_fw_h2c_alloc_skb_with_hdr |
| PARAM_COMPARE | 0 | &rtwdev->mlo.wait | == $2 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HALF_LOCKED2 | global &rtnl_mutex |
drivers/net/wireless/realtek/rtw89/fw.c rtw89_fw_h2c_mrc_del() -> rtw89_h2c_tx_and_wait()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rtwdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->bacam_ver | 0-1,99 |
| PARAM_VALUE | 0 | rtwdev->chip->bb_table | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->bbmcu_nr | 0-1 |
| PARAM_VALUE | 0 | rtwdev->chip->bss_clr_vld.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->bss_clr_vld.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->c2h_counter_reg.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->c2h_counter_reg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->c2h_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->chip_gen | 1 |
| PARAM_VALUE | 0 | rtwdev->chip->dcfo_comp | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->dcfo_comp->addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dcfo_comp->mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dflt_parms | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_lna_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_lna_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_p20_pagcugc_en.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_p20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_rxb_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_rxb_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_s20_pagcugc_en.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_s20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_tia_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_tia_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_lna_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_lna_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_p20_pagcugc_en.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_p20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_rxb_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_rxb_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_s20_pagcugc_en.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_s20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_tia_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_tia_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_table | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->edcca_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->fw_def.fw_b_aid | 0,28768,28930 |
| PARAM_VALUE | 0 | rtwdev->chip->fw_def.fw_format_max | 0-2,4 |
| PARAM_VALUE | 0 | rtwdev->chip->h2c_counter_reg.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->h2c_counter_reg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->h2c_desc_size | 16,24 |
| PARAM_VALUE | 0 | rtwdev->chip->h2c_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->imr_info | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->agg_limit.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->agg_limit.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->bfee_ctrl.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->bfee_ctrl.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->muedca_ctrl.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->muedca_ctrl.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->narrow_bw_ru_dis.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->narrow_bw_ru_dis.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->port_base | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->ra_agg_limit.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->ra_agg_limit.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->txcnt_limit.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->txcnt_limit.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->wow_ctrl.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->wow_ctrl.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mon_reg | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->nctl_post_table->defs->addr | 0,17,32,36,81-82,85,96,143,239,768,772,776,780,788,792,804,812,1616,1792,1796,1840,3100,3132,3168,3180,3184,3196,4620,4768,4776,4792,4796,4800,4824,4828,4832,4836,4840,4844,8200,8432,8436,8440,8444,8992,9028,9808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->nctl_post_table->defs->data | 0-8,10-12,14-17,19,22,24-25,28-32,40,46-48,51,57,62-66,68,92,99,101-102,104-105,107,110-121,124-125,127-128,136-137,156,181,191-192,205,212,229,239,252-257,289,316,364,431,460,464,469,471-472,476,482,485,488,496-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->nctl_post_table->defs->mask | 0-4,7-8,14-16,31-32,48,56,63-64,112,127-128,192,240,255,448,511-512,768,992,1023-1024,1536,2048,3072,3584,3840,4095-4096,7936,8191-8192,14336,16384,24576,28672,32512,32768,61440,64512,65280,u16max-65536,122880-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->nctl_table | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->needed_fw_elms | 107426,487220,524085,671612724,1074032436,1074229012,1074229044 |
| PARAM_VALUE | 0 | rtwdev->chip->nhm_report | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->nhm_th | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->ops | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->ch_page_ctrl | 5892,35332,46852 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->hci_fc_ctrl | 5888,35328,46848 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_ctrl1 | 6032,35472,46992 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_ctrl2 | 6036,35476,46996 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_info1 | 6040,35480,47004 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_info2 | 6044,35484,47008 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_info3 | 6028,35468,46988 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->wp_page_ctrl1 | 6048,35488,47012 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->wp_page_ctrl2 | 6052,35492,47016 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->wp_page_info1 | 6056,35496,47020 |
| PARAM_VALUE | 0 | rtwdev->chip->phy_def | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->phy_def->cr_base | 65536 |
| PARAM_VALUE | 0 | rtwdev->chip->phy_def->physt_bmp_eht | 252 |
| PARAM_VALUE | 0 | rtwdev->chip->phy_def->physt_bmp_start | 1852 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->ampdu_miss.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->ampdu_miss.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->brk.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->brk.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->brk_option.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->brk_option.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cca_spoofing.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cca_spoofing.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_brk.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_brk.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_cca.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_cca.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_sfd_gg.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_sfd_gg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_sig_gg.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_sig_gg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_spoofing.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_spoofing.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_txen.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_txen.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_txon.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_txon.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->enable_all_cnt.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->enable_all_cnt.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->lsig_brk_l_th.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->lsig_brk_l_th.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->lsig_brk_s_th.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->lsig_brk_s_th.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->ofdm_cca.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->ofdm_cca.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->r1b_rr_sel.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->r1b_rr_sel.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->r1b_rx_rpt_rst.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->r1b_rx_rpt_rst.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rst_all_cnt.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rst_all_cnt.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rxl_err_parity.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rxl_err_parity.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rxl_err_rate.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rxl_err_rate.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->search_fail.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->search_fail.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pwr_off_seq->addr | 2,5-7,16,36,113,128,130-131,136,145-146,198,420,672,674,752-753 |
| PARAM_VALUE | 0 | rtwdev->chip->pwr_on_seq | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->pwr_on_seq->addr | 2,5-7,16,36,113,128,130-131,136,145-146,198,420,672,674,752-753 |
| PARAM_VALUE | 0 | rtwdev->chip->rf_path_num | 1-2 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_get.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_get.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->mode.addr | 98,724,728,17712,17716,17720,17724,17728,17732,17736,17740 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->mode.data | 0-3,7-8,15-16,18,24,26,30,38,42,52,64,75,96,128,131467,205831 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->mode.mask | 2-4,7-8,15-16,31-32,51,56,63-64,128,192,240,255-256,448,511-512 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->pinmux.addr | 98,724,728,17712,17716,17720,17724,17728,17732,17736,17740 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->pinmux.data | 0-3,7-8,15-16,18,24,26,30,38,42,52,64,75,96,128,131467,205831 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->pinmux.mask | 2-4,7-8,15-16,31-32,51,56,63-64,128,192,240,255-256,448,511-512 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->ref_rate.addr | 98,724,728,17712,17716,17720,17724,17728,17732,17736,17740 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->ref_rate.mask | 2-4,7-8,15-16,31-32,51,56,63-64,128,192,240,255-256,448,511-512 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->rsc.addr | 98,724,728,17712,17716,17720,17724,17728,17732,17736,17740 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->rsc.mask | 2-4,7-8,15-16,31-32,51,56,63-64,128,192,240,255-256,448,511-512 |
| PARAM_VALUE | 0 | rtwdev->chip->support_chanctx_num | 0-2 |
| PARAM_VALUE | 0 | rtwdev->chip->xtal_info | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->xtal_info->sc_xi_mask | 127,130048 |
| PARAM_VALUE | 0 | rtwdev->chip->xtal_info->sc_xo_mask | 32512,16646144 |
| PARAM_VALUE | 0 | rtwdev->chip->xtal_info->xcap_reg | 640,652 |
| PARAM_VALUE | 0 | rtwdev->fw_cmd_ofld_info->accu_delay | 0 |
| PARAM_VALUE | 0 | rtwdev->fw_cmd_ofld_info->cnt | 0 |
| PARAM_VALUE | 0 | rtwdev->hci.ops->deinit | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->pause | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->read16 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->read32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->read8 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->recalc_int_mit | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->start | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->stop | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->write16 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->write32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->write8 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->do_mdelay | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->do_udelay | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->pack | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->phy_write32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->unpack | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write16 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write8 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write_rf | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->napi.thread->delays->blkio_count | 0-4294967295 |
| PARAM_VALUE | 0 | rtwdev->pci_info->bd_ram_table | 0,643063650462019584,6331576261147430912 |
| PARAM_VALUE | 0 | rtwdev->priv->h2c_queue.qlen | 0-4294967295 |
| PARAM_VALUE | 0 | rtwdev->priv->h2c_release_queue.qlen | 0-4294967295 |
| PARAM_VALUE | 0 | rtwdev->priv->pdev->dev.dma_io_tlb_mem->dyn_alloc.flags | 0-4294967295 |
| PARAM_VALUE | 0 | rtwdev->priv->pdev->dev.dma_io_tlb_mem->dyn_alloc.is_hard | 0-1 |
| PARAM_VALUE | 0 | rtwdev->priv->pdev->dev.dma_io_tlb_mem->dyn_alloc.is_lazy | 0-1 |
| PARAM_VALUE | 0 | rtwdev->priv->pdev->dev.dma_io_tlb_mem->dyn_alloc.is_queued | 0-1 |
| PARAM_VALUE | 0 | rtwdev->priv->pdev->dev.dma_io_tlb_mem->dyn_alloc.is_soft | 0-1 |
| PARAM_VALUE | 0 | rtwdev->priv->pdev->dev.dma_uses_io_tlb | 1 |
| PARAM_VALUE | 0 | rtwdev->priv->pdev->dev.iommu->pci_32bit_workaround | 0-1 |
| PARAM_VALUE | 0 | rtwdev->rfk_mcc.data->table_idx | 0-255 |
| PARAM_VALUE | 0 | *rtwdev->rfk_mcc.data->rf18 | 0-4294967295 |
| PARAM_VALUE | 1 | skb | 4096-ptr_max |
| PARAM_VALUE | 1 | skb->data_len | 0 |
| PARAM_VALUE | 2 | wait | 4096-ptr_max |
| BUF_SIZE | 1 | skb | (-1)-s32max |
| BUF_SIZE | 1 | skb | (-1)-s32max |
| BUF_SIZE | 2 | wait | 56 |
| CAPPED_DATA | 1 | skb->head | 1 |
| DATA_SOURCE | 0 | rtwdev | $0 |
| DATA_SOURCE | 1 | skb | r rtw89_fw_h2c_alloc_skb_with_hdr |
| PARAM_COMPARE | 0 | &rtwdev->mcc.wait | == $2 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NO_OVERFLOW_SIMPLE | 0 | rtwdev->stats.rx_unicast | |
| NO_OVERFLOW_SIMPLE | 0 | rtwdev->stats.tx_unicast |
drivers/net/wireless/realtek/rtw89/fw.c rtw89_fw_h2c_mrc_req_tsf() -> rtw89_h2c_tx_and_wait()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rtwdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->bb_table | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->bss_clr_vld.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->bss_clr_vld.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->c2h_counter_reg.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->c2h_counter_reg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->c2h_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->chip_gen | 1 |
| PARAM_VALUE | 0 | rtwdev->chip->dcfo_comp | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->dcfo_comp->addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dcfo_comp->mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dflt_parms | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_lna_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_lna_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_p20_pagcugc_en.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_p20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_rxb_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_rxb_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_s20_pagcugc_en.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_s20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_tia_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_tia_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_lna_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_lna_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_p20_pagcugc_en.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_p20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_rxb_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_rxb_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_s20_pagcugc_en.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_s20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_tia_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_tia_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_table | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->edcca_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->h2c_counter_reg.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->h2c_counter_reg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->h2c_desc_size | 16,24 |
| PARAM_VALUE | 0 | rtwdev->chip->h2c_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->imr_info | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->agg_limit.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->agg_limit.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->bfee_ctrl.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->bfee_ctrl.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->muedca_ctrl.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->muedca_ctrl.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->narrow_bw_ru_dis.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->narrow_bw_ru_dis.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->ra_agg_limit.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->ra_agg_limit.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->txcnt_limit.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->txcnt_limit.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->wow_ctrl.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->wow_ctrl.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mon_reg | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->nctl_post_table->defs->addr | 0,17,32,36,81-82,85,96,143,239,768,772,776,780,788,792,804,812,1616,1792,1796,1840,3100,3132,3168,3180,3184,3196,4620,4768,4776,4792,4796,4800,4824,4828,4832,4836,4840,4844,8200,8432,8436,8440,8444,8992,9028,9808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->nctl_post_table->defs->data | 0-8,10-12,14-17,19,22,24-25,28-32,40,46-48,51,57,62-66,68,92,99,101-102,104-105,107,110-121,124-125,127-128,136-137,156,181,191-192,205,212,229,239,252-257,289,316,364,431,460,464,469,471-472,476,482,485,488,496-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->nctl_post_table->defs->mask | 0-4,7-8,14-16,31-32,48,56,63-64,112,127-128,192,240,255,448,511-512,768,992,1023-1024,1536,2048,3072,3584,3840,4095-4096,7936,8191-8192,14336,16384,24576,28672,32512,32768,61440,64512,65280,u16max-65536,122880-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->nctl_table | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->needed_fw_elms | 107426,487220,524085,671612724,1074032436,1074229012,1074229044 |
| PARAM_VALUE | 0 | rtwdev->chip->nhm_report | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->nhm_th | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->ops | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->ch_page_ctrl | 5892,35332,46852 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->hci_fc_ctrl | 5888,35328,46848 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_ctrl1 | 6032,35472,46992 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_ctrl2 | 6036,35476,46996 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_info1 | 6040,35480,47004 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_info2 | 6044,35484,47008 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_info3 | 6028,35468,46988 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->wp_page_ctrl1 | 6048,35488,47012 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->wp_page_ctrl2 | 6052,35492,47016 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->wp_page_info1 | 6056,35496,47020 |
| PARAM_VALUE | 0 | rtwdev->chip->phy_def | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->phy_def->cr_base | 65536 |
| PARAM_VALUE | 0 | rtwdev->chip->phy_def->physt_bmp_eht | 252 |
| PARAM_VALUE | 0 | rtwdev->chip->phy_def->physt_bmp_start | 1852 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->ampdu_miss.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->ampdu_miss.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->brk.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->brk.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->brk_option.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->brk_option.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cca_spoofing.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cca_spoofing.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_brk.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_brk.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_cca.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_cca.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_sfd_gg.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_sfd_gg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_sig_gg.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_sig_gg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_spoofing.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_spoofing.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_txen.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_txen.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_txon.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_txon.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->enable_all_cnt.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->enable_all_cnt.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->lsig_brk_l_th.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->lsig_brk_l_th.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->lsig_brk_s_th.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->lsig_brk_s_th.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->ofdm_cca.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->ofdm_cca.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->r1b_rr_sel.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->r1b_rr_sel.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->r1b_rx_rpt_rst.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->r1b_rx_rpt_rst.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rst_all_cnt.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rst_all_cnt.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rxl_err_parity.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rxl_err_parity.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rxl_err_rate.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rxl_err_rate.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->search_fail.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->search_fail.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pwr_off_seq->addr | 2,5-7,16,36,113,128,130-131,136,145-146,198,420,672,674,752-753 |
| PARAM_VALUE | 0 | rtwdev->chip->pwr_on_seq | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->pwr_on_seq->addr | 2,5-7,16,36,113,128,130-131,136,145-146,198,420,672,674,752-753 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_get.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_get.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->mode.addr | 98,724,728,17712,17716,17720,17724,17728,17732,17736,17740 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->mode.data | 0-3,7-8,15-16,18,24,26,30,38,42,52,64,75,96,128,131467,205831 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->mode.mask | 2-4,7-8,15-16,31-32,51,56,63-64,128,192,240,255-256,448,511-512 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->pinmux.addr | 98,724,728,17712,17716,17720,17724,17728,17732,17736,17740 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->pinmux.data | 0-3,7-8,15-16,18,24,26,30,38,42,52,64,75,96,128,131467,205831 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->pinmux.mask | 2-4,7-8,15-16,31-32,51,56,63-64,128,192,240,255-256,448,511-512 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->ref_rate.addr | 98,724,728,17712,17716,17720,17724,17728,17732,17736,17740 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->ref_rate.mask | 2-4,7-8,15-16,31-32,51,56,63-64,128,192,240,255-256,448,511-512 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->rsc.addr | 98,724,728,17712,17716,17720,17724,17728,17732,17736,17740 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->rsc.mask | 2-4,7-8,15-16,31-32,51,56,63-64,128,192,240,255-256,448,511-512 |
| PARAM_VALUE | 0 | rtwdev->chip->xtal_info | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->xtal_info->sc_xi_mask | 127,130048 |
| PARAM_VALUE | 0 | rtwdev->chip->xtal_info->sc_xo_mask | 32512,16646144 |
| PARAM_VALUE | 0 | rtwdev->dev->iommu_group->default_domain | 0-s64max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->deinit | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->pause | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->read16 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->read32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->read8 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->recalc_int_mit | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->start | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->stop | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->write16 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->write32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->write8 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->do_mdelay | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->do_udelay | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->pack | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->phy_write32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->unpack | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write16 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write8 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write_rf | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->mcc.role_aux.rtwvif_link | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->mcc.role_ref.rtwvif_link | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->napi.thread->delays->blkio_count | 0-4294967295 |
| PARAM_VALUE | 0 | rtwdev->napi.thread->sched_task_group->idle | s32min-s32max |
| PARAM_VALUE | 0 | rtwdev->rfk_mcc.data->table_idx | 0-255 |
| PARAM_VALUE | 0 | *rtwdev->rfk_mcc.data->rf18 | 0-4294967295 |
| PARAM_VALUE | 1 | skb | 4096-ptr_max |
| PARAM_VALUE | 1 | skb->data->infos | 4096-ptr_max |
| PARAM_VALUE | 1 | skb->data->req_tsf_num | 2 |
| PARAM_VALUE | 1 | skb->data_len | 0 |
| PARAM_VALUE | 2 | wait | 4096-ptr_max |
| PARAM_VALUE | 3 | cond | 0 |
| BUF_SIZE | 1 | skb | (-1)-s32max |
| BUF_SIZE | 1 | skb | (-1)-s32max |
| BUF_SIZE | 2 | wait | 56 |
| CAPPED_DATA | 1 | skb->head | 1 |
| DATA_SOURCE | 0 | rtwdev | $0 |
| DATA_SOURCE | 1 | skb | r rtw89_fw_h2c_alloc_skb_with_hdr |
| PARAM_COMPARE | 0 | &rtwdev->mcc.wait | == $2 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NO_OVERFLOW_SIMPLE | 0 | rtwdev->stats.rx_unicast | |
| NO_OVERFLOW_SIMPLE | 0 | rtwdev->stats.tx_unicast |
drivers/net/wireless/realtek/rtw89/fw.c rtw89_fw_h2c_mrc_start() -> rtw89_h2c_tx_and_wait()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rtwdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->bss_clr_vld.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->c2h_counter_reg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->chip_gen | 0-1 |
| PARAM_VALUE | 0 | rtwdev->chip->dcfo_comp->addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dcfo_comp->mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_lna_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_lna_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_p20_pagcugc_en.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_p20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_rxb_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_rxb_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_s20_pagcugc_en.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_s20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_tia_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_tia_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_lna_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_lna_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_p20_pagcugc_en.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_p20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_rxb_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_rxb_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_s20_pagcugc_en.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_s20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_tia_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_tia_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->h2c_counter_reg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->h2c_desc_size | 16,24 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->agg_limit.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->agg_limit.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->bfee_ctrl.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->bfee_ctrl.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->muedca_ctrl.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->muedca_ctrl.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->narrow_bw_ru_dis.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->narrow_bw_ru_dis.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->ra_agg_limit.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->ra_agg_limit.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->txcnt_limit.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->txcnt_limit.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->wow_ctrl.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->wow_ctrl.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->needed_fw_elms | 107426,487220,524085,671612724,1074032436,1074229012,1074229044 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->ch_page_ctrl | 5892,35332,46852 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->hci_fc_ctrl | 5888,35328,46848 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_ctrl1 | 6032,35472,46992 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_ctrl2 | 6036,35476,46996 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_info1 | 6040,35480,47004 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_info2 | 6044,35484,47008 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_info3 | 6028,35468,46988 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->wp_page_ctrl1 | 6048,35488,47012 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->wp_page_ctrl2 | 6052,35492,47016 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->wp_page_info1 | 6056,35496,47020 |
| PARAM_VALUE | 0 | rtwdev->chip->phy_def->cr_base | 65536 |
| PARAM_VALUE | 0 | rtwdev->chip->phy_def->physt_bmp_eht | 252 |
| PARAM_VALUE | 0 | rtwdev->chip->phy_def->physt_bmp_start | 1852 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->ampdu_miss.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->ampdu_miss.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->brk.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->brk.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->brk_option.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->brk_option.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cca_spoofing.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cca_spoofing.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_brk.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_brk.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_cca.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_cca.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_sfd_gg.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_sfd_gg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_sig_gg.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_sig_gg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_spoofing.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_spoofing.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_txen.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_txen.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_txon.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_txon.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->enable_all_cnt.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->enable_all_cnt.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->lsig_brk_l_th.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->lsig_brk_l_th.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->lsig_brk_s_th.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->lsig_brk_s_th.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->ofdm_cca.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->ofdm_cca.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->r1b_rr_sel.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->r1b_rr_sel.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->r1b_rx_rpt_rst.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->r1b_rx_rpt_rst.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rst_all_cnt.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rst_all_cnt.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rxl_err_parity.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rxl_err_parity.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rxl_err_rate.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rxl_err_rate.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->search_fail.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->search_fail.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pwr_off_seq->addr | 2,5-7,16,36,113,128,130-131,136,145-146,198,420,672,674,752-753 |
| PARAM_VALUE | 0 | rtwdev->chip->pwr_on_seq->addr | 2,5-7,16,36,113,128,130-131,136,145-146,198,420,672,674,752-753 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_get.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->mode.addr | 98,724,728,1774,17712,17716,17720,17724,17728,17732,17736,17740 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->mode.data | 0-3,7-8,15-16,18,24,26,30,38,42,52,64,75,96,128,131467,205831 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->mode.mask | 2-4,7-8,15-16,31-32,51,56,63-64,128,192,240,255-256,448,511-512 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->pinmux.addr | 98,724,728,1774,17712,17716,17720,17724,17728,17732,17736,17740 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->pinmux.data | 0-3,7-8,15-16,18,24,26,30,38,42,52,64,75,96,128,131467,205831 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->pinmux.mask | 2-4,7-8,15-16,31-32,51,56,63-64,128,192,240,255-256,448,511-512 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->ref_rate.addr | 98,724,728,17712,17716,17720,17724,17728,17732,17736,17740 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->ref_rate.mask | 2-4,7-8,15-16,31-32,51,56,63-64,128,192,240,255-256,448,511-512 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->rsc.addr | 98,724,728,17712,17716,17720,17724,17728,17732,17736,17740 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->rsc.mask | 2-4,7-8,15-16,31-32,51,56,63-64,128,192,240,255-256,448,511-512 |
| PARAM_VALUE | 0 | rtwdev->hci.ops->deinit | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->read16 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->read32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->read8 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->start | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->stop | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->write16 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->write32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->write8 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->do_mdelay | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->do_udelay | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->pack | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->phy_write32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->unpack | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write8 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write_rf | 4096-ptr_max |
| PARAM_VALUE | 1 | skb | 4096-ptr_max |
| PARAM_VALUE | 1 | skb->data_len | 0 |
| PARAM_VALUE | 2 | wait | 4096-ptr_max |
| BUF_SIZE | 1 | skb | (-1)-s32max |
| BUF_SIZE | 1 | skb | (-1)-s32max |
| BUF_SIZE | 2 | wait | 56 |
| CAPPED_DATA | 1 | skb->head | 1 |
| DATA_SOURCE | 0 | rtwdev | $0 |
| DATA_SOURCE | 1 | skb | r rtw89_fw_h2c_alloc_skb_with_hdr |
| PARAM_COMPARE | 0 | &rtwdev->mcc.wait | == $2 |
drivers/net/wireless/realtek/rtw89/fw.c rtw89_fw_h2c_reset_mcc_group() -> rtw89_h2c_tx_and_wait()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rtwdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->bss_clr_vld.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->c2h_counter_reg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->chip_gen | 0-1 |
| PARAM_VALUE | 0 | rtwdev->chip->dcfo_comp->mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_lna_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_p20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_rxb_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_s20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_tia_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_lna_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_p20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_rxb_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_s20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_tia_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->h2c_counter_reg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->h2c_desc_size | 16,24 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->agg_limit.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->bfee_ctrl.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->muedca_ctrl.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->narrow_bw_ru_dis.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->ra_agg_limit.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->txcnt_limit.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->wow_ctrl.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->needed_fw_elms | 107426,487220,524085,671612724,1074032436,1074229012,1074229044 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->ch_page_ctrl | 5892,35332,46852 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->hci_fc_ctrl | 5888,35328,46848 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_ctrl1 | 6032,35472,46992 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_ctrl2 | 6036,35476,46996 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_info1 | 6040,35480,47004 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_info2 | 6044,35484,47008 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_info3 | 6028,35468,46988 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->wp_page_ctrl1 | 6048,35488,47012 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->wp_page_ctrl2 | 6052,35492,47016 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->wp_page_info1 | 6056,35496,47020 |
| PARAM_VALUE | 0 | rtwdev->chip->phy_def->cr_base | 65536 |
| PARAM_VALUE | 0 | rtwdev->chip->phy_def->physt_bmp_eht | 252 |
| PARAM_VALUE | 0 | rtwdev->chip->phy_def->physt_bmp_start | 1852 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->ampdu_miss.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->brk.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->brk_option.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cca_spoofing.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_brk.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_cca.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_sfd_gg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_sig_gg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_spoofing.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_txen.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_txon.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->enable_all_cnt.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->lsig_brk_l_th.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->lsig_brk_s_th.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->ofdm_cca.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->r1b_rr_sel.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->r1b_rx_rpt_rst.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rst_all_cnt.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rxl_err_parity.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rxl_err_rate.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->search_fail.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pwr_off_seq->addr | 2,5-7,16,36,113,128,130-131,136,145-146,198,420,672,674,752-753 |
| PARAM_VALUE | 0 | rtwdev->chip->pwr_on_seq->addr | 2,5-7,16,36,113,128,130-131,136,145-146,198,420,672,674,752-753 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_get.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->mode.addr | 98,724,728,1774,17712,17716,17720,17724,17728,17732,17736,17740 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->mode.data | 0-3,7-8,15-16,18,24,26,30,38,42,52,64,75,96,128,131467,205831 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->mode.mask | 2-4,7-8,15-16,31-32,51,56,63-64,128,192,240,255-256,448,511-512 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->pinmux.addr | 98,724,728,1774,17712,17716,17720,17724,17728,17732,17736,17740 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->pinmux.data | 0-3,7-8,15-16,18,24,26,30,38,42,52,64,75,96,128,131467,205831 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->pinmux.mask | 2-4,7-8,15-16,31-32,51,56,63-64,128,192,240,255-256,448,511-512 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->ref_rate.addr | 98,724,728,1774,17712,17716,17720,17724,17728,17732,17736,17740 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->ref_rate.mask | 2-4,7-8,15-16,31-32,51,56,63-64,128,192,240,255-256,448,511-512 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->rsc.addr | 98,724,728,1774,17712,17716,17720,17724,17728,17732,17736,17740 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->rsc.mask | 2-4,7-8,15-16,31-32,51,56,63-64,128,192,240,255-256,448,511-512 |
| PARAM_VALUE | 0 | rtwdev->hci.ops->deinit | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->read16 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->read32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->read8 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->start | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->stop | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->write16 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->write32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->write8 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->do_mdelay | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->do_udelay | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->pack | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->phy_write32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->unpack | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write8 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write_rf | 4096-ptr_max |
| PARAM_VALUE | 1 | skb | 4096-ptr_max |
| PARAM_VALUE | 1 | skb->data_len | 0 |
| PARAM_VALUE | 2 | wait | 4096-ptr_max |
| BUF_SIZE | 1 | skb | (-1)-s32max |
| BUF_SIZE | 1 | skb | (-1)-s32max |
| BUF_SIZE | 2 | wait | 56 |
| CAPPED_DATA | 1 | skb->head | 1 |
| DATA_SOURCE | 0 | rtwdev | $0 |
| DATA_SOURCE | 1 | skb | r rtw89_fw_h2c_alloc_skb_with_hdr |
| PARAM_COMPARE | 0 | &rtwdev->mcc.wait | == $2 |
drivers/net/wireless/realtek/rtw89/fw.c rtw89_fw_h2c_scan_list_offload_ax() -> rtw89_h2c_tx_and_wait()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rtwdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->bacam_ver | 0-1,99 |
| PARAM_VALUE | 0 | rtwdev->chip->bb_table | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->bbmcu_nr | 0-1 |
| PARAM_VALUE | 0 | rtwdev->chip->bss_clr_vld.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->bss_clr_vld.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->c2h_counter_reg.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->c2h_counter_reg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->c2h_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->chip_gen | 0-1 |
| PARAM_VALUE | 0 | rtwdev->chip->dcfo_comp | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->dcfo_comp->mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dflt_parms | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_lna_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_lna_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_p20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_rxb_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_rxb_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_s20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_tia_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_tia_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_lna_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_lna_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_p20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_rxb_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_rxb_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_s20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_tia_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_tia_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_table | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->edcca_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->h2c_counter_reg.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->h2c_counter_reg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->h2c_desc_size | 16,24 |
| PARAM_VALUE | 0 | rtwdev->chip->h2c_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->imr_info | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->agg_limit.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->agg_limit.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->bfee_ctrl.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->bfee_ctrl.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->muedca_ctrl.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->muedca_ctrl.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->narrow_bw_ru_dis.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->narrow_bw_ru_dis.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->ra_agg_limit.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->ra_agg_limit.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->txcnt_limit.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->txcnt_limit.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->wow_ctrl.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->wow_ctrl.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mon_reg | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->nctl_post_table->defs->addr | 0,17,32,36,81-82,85,96,143,239,768,772,776,780,788,792,804,812,1616,1792,1796,1840,3100,3132,3168,3180,3184,3196,4620,4768,4776,4792,4796,4800,4824,4828,4832,4836,4840,4844,8200,8432,8436,8440,8444,8992,9028,9808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->nctl_post_table->defs->data | 0-8,10-12,14-17,19,22,24-25,28-32,40,46-48,51,57,62-66,68,92,99,101-102,104-105,107,110-121,124-125,127-128,136-137,156,181,191-192,205,212,229,239,252-257,289,316,364,431,460,464,469,471-472,476,482,485,488,496-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->nctl_post_table->defs->mask | 0-4,7-8,14-16,31-32,48,56,63-64,112,127-128,192,240,255,448,511-512,768,992,1023-1024,1536,2048,3072,3584,3840,4095-4096,7936,8191-8192,14336,16384,24576,28672,32512,32768,61440,64512,65280,u16max-65536,122880-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->nctl_table | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->needed_fw_elms | 107426,487220,524085,671612724,1074032436,1074229012,1074229044 |
| PARAM_VALUE | 0 | rtwdev->chip->nhm_report | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->nhm_th | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->ops | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->ch_page_ctrl | 5892,35332,46852 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->hci_fc_ctrl | 5888,35328,46848 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_ctrl1 | 6032,35472,46992 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_ctrl2 | 6036,35476,46996 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_info1 | 6040,35480,47004 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_info2 | 6044,35484,47008 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_info3 | 6028,35468,46988 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->wp_page_ctrl1 | 6048,35488,47012 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->wp_page_ctrl2 | 6052,35492,47016 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->wp_page_info1 | 6056,35496,47020 |
| PARAM_VALUE | 0 | rtwdev->chip->phy_def | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->phy_def->cr_base | 65536 |
| PARAM_VALUE | 0 | rtwdev->chip->phy_def->physt_bmp_eht | 252 |
| PARAM_VALUE | 0 | rtwdev->chip->phy_def->physt_bmp_start | 1852 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->ampdu_miss.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->ampdu_miss.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->brk.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->brk.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->brk_option.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->brk_option.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cca_spoofing.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cca_spoofing.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_brk.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_brk.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_cca.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_cca.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_sfd_gg.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_sfd_gg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_sig_gg.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_sig_gg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_spoofing.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_spoofing.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_txen.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_txen.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_txon.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_txon.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->enable_all_cnt.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->enable_all_cnt.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->lsig_brk_l_th.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->lsig_brk_l_th.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->lsig_brk_s_th.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->lsig_brk_s_th.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->ofdm_cca.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->ofdm_cca.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->r1b_rr_sel.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->r1b_rr_sel.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->r1b_rx_rpt_rst.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->r1b_rx_rpt_rst.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rst_all_cnt.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rst_all_cnt.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rxl_err_parity.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rxl_err_parity.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rxl_err_rate.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rxl_err_rate.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->search_fail.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->search_fail.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pwr_off_seq->addr | 2,5-7,16,36,113,128,130-131,136,145-146,198,420,672,674,752-753 |
| PARAM_VALUE | 0 | rtwdev->chip->pwr_on_seq | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->pwr_on_seq->addr | 2,5-7,16,36,113,128,130-131,136,145-146,198,420,672,674,752-753 |
| PARAM_VALUE | 0 | rtwdev->chip->rf_path_num | 1-2 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_get.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_get.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->mode.addr | 98,724,728,17712,17716,17720,17724,17728,17732,17736,17740 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->mode.data | 0-3,7-8,15-16,18,24,26,30,38,42,52,64,75,96,128,131467,205831 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->mode.mask | 2-4,7-8,15-16,31-32,51,56,63-64,128,192,240,255-256,448,511-512 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->pinmux.addr | 98,724,728,17712,17716,17720,17724,17728,17732,17736,17740 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->pinmux.data | 0-3,7-8,15-16,18,24,26,30,38,42,52,64,75,96,128,131467,205831 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->pinmux.mask | 2-4,7-8,15-16,31-32,51,56,63-64,128,192,240,255-256,448,511-512 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->ref_rate.addr | 98,724,728,1774,17712,17716,17720,17724,17728,17732,17736,17740 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->ref_rate.mask | 2-4,7-8,15-16,31-32,51,56,63-64,128,192,240,255-256,448,511-512 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->rsc.addr | 98,724,728,1774,17712,17716,17720,17724,17728,17732,17736,17740 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->rsc.mask | 2-4,7-8,15-16,31-32,51,56,63-64,128,192,240,255-256,448,511-512 |
| PARAM_VALUE | 0 | rtwdev->chip->wow_reason_reg | 186438479882158080,2013360131996618752,2241025523120345088,2933131042081980416,5215841756251774976,6924004867136643072,8077265333668331520 |
| PARAM_VALUE | 0 | rtwdev->chip->xtal_info | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->fw_cmd_ofld_info->accu_delay | 0 |
| PARAM_VALUE | 0 | rtwdev->fw_cmd_ofld_info->cnt | 0 |
| PARAM_VALUE | 0 | rtwdev->hci.ops->deinit | 5870993704545255424,7047000478612201472 |
| PARAM_VALUE | 0 | rtwdev->hci.ops->read16 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->read32 | 1680538268567429120,8369521901611995136 |
| PARAM_VALUE | 0 | rtwdev->hci.ops->read8 | 46945382387916800,4074854045564776448 |
| PARAM_VALUE | 0 | rtwdev->hci.ops->start | 6298190741264035840,7944254220755320832 |
| PARAM_VALUE | 0 | rtwdev->hci.ops->stop | 2834859396991115264,5976511990130012160 |
| PARAM_VALUE | 0 | rtwdev->hci.ops->write16 | 953816951750758400,1593842808872255488 |
| PARAM_VALUE | 0 | rtwdev->hci.ops->write32 | 512921870830526464,3250867206361939968 |
| PARAM_VALUE | 0 | rtwdev->hci.ops->write8 | 4889744893675319296,7776440232996438016 |
| PARAM_VALUE | 0 | rtwdev->io->do_mdelay | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->do_udelay | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->pack | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->phy_write32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->unpack | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write16 | 432860481457860608,1128088019024625664 |
| PARAM_VALUE | 0 | rtwdev->io->write32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write8 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write_rf | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->mac.dle_info.rsvd_qt->b0_csi | 0,44,56,107 |
| PARAM_VALUE | 0 | rtwdev->mac.dle_info.rsvd_qt->b0_ftm | 0,6 |
| PARAM_VALUE | 0 | rtwdev->mac.dle_info.rsvd_qt->b0_lmr | 0,6 |
| PARAM_VALUE | 0 | rtwdev->mac.dle_info.rsvd_qt->b0_smr | 0,69 |
| PARAM_VALUE | 0 | rtwdev->mac.dle_info.rsvd_qt->b1_csi | 0,28,44,107 |
| PARAM_VALUE | 0 | rtwdev->mac.dle_info.rsvd_qt->b1_ftm | 0,6 |
| PARAM_VALUE | 0 | rtwdev->mac.dle_info.rsvd_qt->b1_lmr | 0,6 |
| PARAM_VALUE | 0 | rtwdev->mac.dle_info.rsvd_qt->b1_smr | 0 |
| PARAM_VALUE | 0 | rtwdev->mac.dle_info.rsvd_qt->mpdu_info_tbl | 0-2 |
| PARAM_VALUE | 0 | rtwdev->mac.dle_info.rsvd_qt->others | 0 |
| PARAM_VALUE | 0 | rtwdev->mac.hfc_param.ch_cfg->grp | 0-1 |
| PARAM_VALUE | 0 | rtwdev->mac.hfc_param.ch_cfg->max | 0,196,210,222,226,311,341-344,402,601,603,606,730,732,742-743,1614,1641,1896 |
| PARAM_VALUE | 0 | rtwdev->mac.hfc_param.ch_cfg->min | 0,2,4-5,13,15-16,18,22,24,32,40,54,128 |
| PARAM_VALUE | 0 | rtwdev->napi.thread->delays->blkio_count | 0-4294967295 |
| PARAM_VALUE | 0 | rtwdev->napi.thread->sched_task_group->idle | s32min-s32max |
| PARAM_VALUE | 0 | rtwdev->pci_info->gen_def | 1514654105865453568,7955639482977693696 |
| PARAM_VALUE | 0 | rtwdev->pci_info->rxbd_rwptr_clr_reg | 4120,4608,45080 |
| PARAM_VALUE | 0 | rtwdev->pci_info->txbd_rwptr_clr2_reg | 0,4548,4884,45076 |
| PARAM_VALUE | 0 | rtwdev->rfk_mcc.data->table_idx | 0-255 |
| PARAM_VALUE | 0 | rtwdev->variant->qta_def_override | 0,927467491008073728 |
| PARAM_VALUE | 0 | rtwdev->wow.patterns->bc | 0-1 |
| PARAM_VALUE | 0 | rtwdev->wow.patterns->crc | 0-u16max |
| PARAM_VALUE | 0 | rtwdev->wow.patterns->idx | 0-255 |
| PARAM_VALUE | 0 | rtwdev->wow.patterns->mc | 0-1 |
| PARAM_VALUE | 0 | rtwdev->wow.patterns->r_w | 0-1 |
| PARAM_VALUE | 0 | rtwdev->wow.patterns->skip_mac_hdr | 0-1 |
| PARAM_VALUE | 0 | rtwdev->wow.patterns->uc | 0-1 |
| PARAM_VALUE | 0 | rtwdev->wow.patterns->valid | 0-1 |
| PARAM_VALUE | 0 | *rtwdev->is_tssi_mode | 0-1 |
| PARAM_VALUE | 0 | *rtwdev->rfk_mcc.data->band | 0-255 |
| PARAM_VALUE | 0 | *rtwdev->rfk_mcc.data->bw | 0-255 |
| PARAM_VALUE | 0 | *rtwdev->rfk_mcc.data->ch | 0-255 |
| PARAM_VALUE | 0 | *rtwdev->rfk_mcc.data->rf18 | 0-4294967295 |
| PARAM_VALUE | 1 | skb | 4096-ptr_max |
| PARAM_VALUE | 1 | skb->data->elem_size | 7 |
| PARAM_VALUE | 1 | skb->data_len | 0 |
| PARAM_VALUE | 2 | wait | 4096-ptr_max |
| PARAM_VALUE | 3 | cond | 22 |
| BUF_SIZE | 1 | skb | (-1)-s32max |
| BUF_SIZE | 1 | skb | (-1)-s32max |
| BUF_SIZE | 2 | wait | 56 |
| CAPPED_DATA | 1 | skb->head | 1 |
| DATA_SOURCE | 0 | rtwdev | $0 |
| DATA_SOURCE | 1 | skb | r rtw89_fw_h2c_alloc_skb_with_hdr |
| PARAM_COMPARE | 0 | &rtwdev->mac.fw_ofld_wait | == $2 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HALF_LOCKED2 | global &rtnl_mutex |
drivers/net/wireless/realtek/rtw89/fw.c rtw89_fw_h2c_scan_list_offload_be() -> rtw89_h2c_tx_and_wait()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rtwdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->bacam_ver | 0-1,99 |
| PARAM_VALUE | 0 | rtwdev->chip->bb_table | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->bbmcu_nr | 0-1 |
| PARAM_VALUE | 0 | rtwdev->chip->bss_clr_vld.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->bss_clr_vld.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->c2h_counter_reg.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->c2h_counter_reg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->c2h_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->chip_gen | 0-1 |
| PARAM_VALUE | 0 | rtwdev->chip->dcfo_comp | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->dcfo_comp->mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dflt_parms | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_lna_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_lna_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_p20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_rxb_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_rxb_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_s20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_tia_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_tia_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_lna_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_lna_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_p20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_rxb_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_rxb_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_s20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_tia_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_tia_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_table | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->edcca_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->h2c_counter_reg.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->h2c_counter_reg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->h2c_desc_size | 16,24 |
| PARAM_VALUE | 0 | rtwdev->chip->h2c_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->imr_info | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->agg_limit.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->agg_limit.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->bfee_ctrl.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->bfee_ctrl.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->muedca_ctrl.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->muedca_ctrl.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->narrow_bw_ru_dis.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->narrow_bw_ru_dis.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->ra_agg_limit.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->ra_agg_limit.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->txcnt_limit.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->txcnt_limit.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->wow_ctrl.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->wow_ctrl.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mon_reg | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->nctl_post_table->defs->addr | 0,17,32,36,81-82,85,96,143,239,768,772,776,780,788,792,804,812,1616,1792,1796,1840,3100,3132,3168,3180,3184,3196,4620,4768,4776,4792,4796,4800,4824,4828,4832,4836,4840,4844,8200,8432,8436,8440,8444,8992,9028,9808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->nctl_post_table->defs->data | 0-8,10-12,14-17,19,22,24-25,28-32,40,46-48,51,57,62-66,68,92,99,101-102,104-105,107,110-121,124-125,127-128,136-137,156,181,191-192,205,212,229,239,252-257,289,316,364,431,460,464,469,471-472,476,482,485,488,496-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->nctl_post_table->defs->mask | 0-4,7-8,14-16,31-32,48,56,63-64,112,127-128,192,240,255,448,511-512,768,992,1023-1024,1536,2048,3072,3584,3840,4095-4096,7936,8191-8192,14336,16384,24576,28672,32512,32768,61440,64512,65280,u16max-65536,122880-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->nctl_table | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->needed_fw_elms | 107426,487220,524085,671612724,1074032436,1074229012,1074229044 |
| PARAM_VALUE | 0 | rtwdev->chip->nhm_report | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->nhm_th | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->ops | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->ch_page_ctrl | 5892,35332,46852 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->hci_fc_ctrl | 5888,35328,46848 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_ctrl1 | 6032,35472,46992 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_ctrl2 | 6036,35476,46996 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_info1 | 6040,35480,47004 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_info2 | 6044,35484,47008 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_info3 | 6028,35468,46988 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->wp_page_ctrl1 | 6048,35488,47012 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->wp_page_ctrl2 | 6052,35492,47016 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->wp_page_info1 | 6056,35496,47020 |
| PARAM_VALUE | 0 | rtwdev->chip->phy_def | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->phy_def->cr_base | 65536 |
| PARAM_VALUE | 0 | rtwdev->chip->phy_def->physt_bmp_eht | 252 |
| PARAM_VALUE | 0 | rtwdev->chip->phy_def->physt_bmp_start | 1852 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->ampdu_miss.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->ampdu_miss.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->brk.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->brk.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->brk_option.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->brk_option.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cca_spoofing.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cca_spoofing.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_brk.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_brk.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_cca.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_cca.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_sfd_gg.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_sfd_gg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_sig_gg.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_sig_gg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_spoofing.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_spoofing.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_txen.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_txen.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_txon.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_txon.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->enable_all_cnt.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->enable_all_cnt.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->lsig_brk_l_th.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->lsig_brk_l_th.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->lsig_brk_s_th.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->lsig_brk_s_th.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->ofdm_cca.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->ofdm_cca.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->r1b_rr_sel.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->r1b_rr_sel.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->r1b_rx_rpt_rst.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->r1b_rx_rpt_rst.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rst_all_cnt.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rst_all_cnt.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rxl_err_parity.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rxl_err_parity.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rxl_err_rate.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rxl_err_rate.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->search_fail.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->search_fail.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pwr_off_seq->addr | 2,5-7,16,36,113,128,130-131,136,145-146,198,420,672,674,752-753 |
| PARAM_VALUE | 0 | rtwdev->chip->pwr_on_seq | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->pwr_on_seq->addr | 2,5-7,16,36,113,128,130-131,136,145-146,198,420,672,674,752-753 |
| PARAM_VALUE | 0 | rtwdev->chip->rf_path_num | 1-2 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_get.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_get.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->mode.addr | 98,724,728,17712,17716,17720,17724,17728,17732,17736,17740 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->mode.data | 0-3,7-8,15-16,18,24,26,30,38,42,52,64,75,96,128,131467,205831 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->mode.mask | 2-4,7-8,15-16,31-32,51,56,63-64,128,192,240,255-256,448,511-512 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->pinmux.addr | 98,724,728,17712,17716,17720,17724,17728,17732,17736,17740 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->pinmux.data | 0-3,7-8,15-16,18,24,26,30,38,42,52,64,75,96,128,131467,205831 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->pinmux.mask | 2-4,7-8,15-16,31-32,51,56,63-64,128,192,240,255-256,448,511-512 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->ref_rate.addr | 98,724,728,1774,17712,17716,17720,17724,17728,17732,17736,17740 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->ref_rate.mask | 2-4,7-8,15-16,31-32,51,56,63-64,128,192,240,255-256,448,511-512 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->rsc.addr | 98,724,728,1774,17712,17716,17720,17724,17728,17732,17736,17740 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->rsc.mask | 2-4,7-8,15-16,31-32,51,56,63-64,128,192,240,255-256,448,511-512 |
| PARAM_VALUE | 0 | rtwdev->chip->wow_reason_reg | 186438479882158080,2013360131996618752,2241025523120345088,2933131042081980416,5215841756251774976,6924004867136643072,8077265333668331520 |
| PARAM_VALUE | 0 | rtwdev->chip->xtal_info | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->fw_cmd_ofld_info->accu_delay | 0 |
| PARAM_VALUE | 0 | rtwdev->fw_cmd_ofld_info->cnt | 0 |
| PARAM_VALUE | 0 | rtwdev->hci.ops->deinit | 5870993704545255424,7047000478612201472 |
| PARAM_VALUE | 0 | rtwdev->hci.ops->read16 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->read32 | 1680538268567429120,8369521901611995136 |
| PARAM_VALUE | 0 | rtwdev->hci.ops->read8 | 46945382387916800,4074854045564776448 |
| PARAM_VALUE | 0 | rtwdev->hci.ops->start | 6298190741264035840,7944254220755320832 |
| PARAM_VALUE | 0 | rtwdev->hci.ops->stop | 2834859396991115264,5976511990130012160 |
| PARAM_VALUE | 0 | rtwdev->hci.ops->write16 | 953816951750758400,1593842808872255488 |
| PARAM_VALUE | 0 | rtwdev->hci.ops->write32 | 512921870830526464,3250867206361939968 |
| PARAM_VALUE | 0 | rtwdev->hci.ops->write8 | 4889744893675319296,7776440232996438016 |
| PARAM_VALUE | 0 | rtwdev->io->do_mdelay | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->do_udelay | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->pack | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->phy_write32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->unpack | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write16 | 432860481457860608,1128088019024625664 |
| PARAM_VALUE | 0 | rtwdev->io->write32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write8 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write_rf | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->mac.dle_info.rsvd_qt->b0_csi | 0,44,56,107 |
| PARAM_VALUE | 0 | rtwdev->mac.dle_info.rsvd_qt->b0_ftm | 0,6 |
| PARAM_VALUE | 0 | rtwdev->mac.dle_info.rsvd_qt->b0_lmr | 0,6 |
| PARAM_VALUE | 0 | rtwdev->mac.dle_info.rsvd_qt->b0_smr | 0,69 |
| PARAM_VALUE | 0 | rtwdev->mac.dle_info.rsvd_qt->b1_csi | 0,28,44,107 |
| PARAM_VALUE | 0 | rtwdev->mac.dle_info.rsvd_qt->b1_ftm | 0,6 |
| PARAM_VALUE | 0 | rtwdev->mac.dle_info.rsvd_qt->b1_lmr | 0,6 |
| PARAM_VALUE | 0 | rtwdev->mac.dle_info.rsvd_qt->b1_smr | 0 |
| PARAM_VALUE | 0 | rtwdev->mac.dle_info.rsvd_qt->mpdu_info_tbl | 0-2 |
| PARAM_VALUE | 0 | rtwdev->mac.dle_info.rsvd_qt->others | 0 |
| PARAM_VALUE | 0 | rtwdev->mac.hfc_param.ch_cfg->grp | 0-1 |
| PARAM_VALUE | 0 | rtwdev->mac.hfc_param.ch_cfg->max | 0,196,210,222,226,311,341-344,402,601,603,606,730,732,742-743,1614,1641,1896 |
| PARAM_VALUE | 0 | rtwdev->mac.hfc_param.ch_cfg->min | 0,2,4-5,13,15-16,18,22,24,32,40,54,128 |
| PARAM_VALUE | 0 | rtwdev->napi.thread->delays->blkio_count | 0-4294967295 |
| PARAM_VALUE | 0 | rtwdev->napi.thread->sched_task_group->idle | s32min-s32max |
| PARAM_VALUE | 0 | rtwdev->pci_info->gen_def | 1514654105865453568,7955639482977693696 |
| PARAM_VALUE | 0 | rtwdev->pci_info->rxbd_rwptr_clr_reg | 4120,4608,45080 |
| PARAM_VALUE | 0 | rtwdev->pci_info->txbd_rwptr_clr2_reg | 0,4548,4884,45076 |
| PARAM_VALUE | 0 | rtwdev->rfk_mcc.data->table_idx | 0-255 |
| PARAM_VALUE | 0 | rtwdev->variant->qta_def_override | 0,927467491008073728 |
| PARAM_VALUE | 0 | rtwdev->wow.patterns->bc | 0-1 |
| PARAM_VALUE | 0 | rtwdev->wow.patterns->crc | 0-u16max |
| PARAM_VALUE | 0 | rtwdev->wow.patterns->idx | 0-255 |
| PARAM_VALUE | 0 | rtwdev->wow.patterns->mc | 0-1 |
| PARAM_VALUE | 0 | rtwdev->wow.patterns->r_w | 0-1 |
| PARAM_VALUE | 0 | rtwdev->wow.patterns->skip_mac_hdr | 0-1 |
| PARAM_VALUE | 0 | rtwdev->wow.patterns->uc | 0-1 |
| PARAM_VALUE | 0 | rtwdev->wow.patterns->valid | 0-1 |
| PARAM_VALUE | 0 | *rtwdev->is_tssi_mode | 0-1 |
| PARAM_VALUE | 0 | *rtwdev->rfk_mcc.data->band | 0-255 |
| PARAM_VALUE | 0 | *rtwdev->rfk_mcc.data->bw | 0-255 |
| PARAM_VALUE | 0 | *rtwdev->rfk_mcc.data->ch | 0-255 |
| PARAM_VALUE | 0 | *rtwdev->rfk_mcc.data->rf18 | 0-4294967295 |
| PARAM_VALUE | 1 | skb | 4096-ptr_max |
| PARAM_VALUE | 1 | skb->data->elem_size | 8 |
| PARAM_VALUE | 1 | skb->data_len | 0 |
| PARAM_VALUE | 2 | wait | 4096-ptr_max |
| PARAM_VALUE | 3 | cond | 22 |
| BUF_SIZE | 1 | skb | (-1)-s32max |
| BUF_SIZE | 1 | skb | (-1)-s32max |
| BUF_SIZE | 2 | wait | 56 |
| CAPPED_DATA | 1 | skb->head | 1 |
| DATA_SOURCE | 0 | rtwdev | $0 |
| DATA_SOURCE | 1 | skb | r rtw89_fw_h2c_alloc_skb_with_hdr |
| PARAM_COMPARE | 0 | &rtwdev->mac.fw_ofld_wait | == $2 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HALF_LOCKED2 | global &rtnl_mutex |
drivers/net/wireless/realtek/rtw89/fw.c rtw89_fw_h2c_start_mcc() -> rtw89_h2c_tx_and_wait()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rtwdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->bss_clr_vld.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->c2h_counter_reg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->chip_gen | 0-1 |
| PARAM_VALUE | 0 | rtwdev->chip->dcfo_comp->mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_lna_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_p20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_rxb_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_s20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_tia_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_lna_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_p20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_rxb_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_s20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_tia_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->h2c_counter_reg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->h2c_desc_size | 16,24 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->agg_limit.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->bfee_ctrl.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->muedca_ctrl.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->narrow_bw_ru_dis.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->ra_agg_limit.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->txcnt_limit.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->wow_ctrl.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->needed_fw_elms | 107426,487220,524085,671612724,1074032436,1074229012,1074229044 |
| PARAM_VALUE | 0 | rtwdev->chip->ops | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->ch_page_ctrl | 5892,35332,46852 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->hci_fc_ctrl | 5888,35328,46848 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_ctrl1 | 6032,35472,46992 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_ctrl2 | 6036,35476,46996 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_info1 | 6040,35480,47004 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_info2 | 6044,35484,47008 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_info3 | 6028,35468,46988 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->wp_page_ctrl1 | 6048,35488,47012 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->wp_page_ctrl2 | 6052,35492,47016 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->wp_page_info1 | 6056,35496,47020 |
| PARAM_VALUE | 0 | rtwdev->chip->phy_def->cr_base | 65536 |
| PARAM_VALUE | 0 | rtwdev->chip->phy_def->physt_bmp_eht | 252 |
| PARAM_VALUE | 0 | rtwdev->chip->phy_def->physt_bmp_start | 1852 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->ampdu_miss.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->brk.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->brk_option.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cca_spoofing.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_brk.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_cca.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_sfd_gg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_sig_gg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_spoofing.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_txen.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_txon.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->enable_all_cnt.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->lsig_brk_l_th.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->lsig_brk_s_th.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->ofdm_cca.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->r1b_rr_sel.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->r1b_rx_rpt_rst.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rst_all_cnt.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rxl_err_parity.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rxl_err_rate.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->search_fail.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pwr_off_seq->addr | 2,5-7,16,36,113,128,130-131,136,145-146,198,420,672,674,752-753 |
| PARAM_VALUE | 0 | rtwdev->chip->pwr_on_seq->addr | 2,5-7,16,36,113,128,130-131,136,145-146,198,420,672,674,752-753 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_get.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->mode.addr | 98,724,728 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->mode.data | 0-3,7-8,15-16,18,24,26,30,38,42,52,64,75,96,128,131467,205831 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->mode.mask | 2-4,7-8,15-16,31-32,51,56,63-64,128,192,240,255-256,448,511-512 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->pinmux.addr | 98,724,728 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->pinmux.data | 0-3,7-8,15-16,18,24,26,30,38,42,52,64,75,96,128,131467,205831 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->pinmux.mask | 2-4,7-8,15-16,31-32,51,56,63-64,128,192,240,255-256,448,511-512 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->ref_rate.addr | 98,724,728,1774,17712,17716,17720,17724,17728,17732,17736,17740 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->ref_rate.mask | 2-4,7-8,15-16,31-32,51,56,63-64,128,192,240,255-256,448,511-512 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->rsc.addr | 98,724,728,1774,17712,17716,17720,17724,17728,17732,17736,17740 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->rsc.mask | 2-4,7-8,15-16,31-32,51,56,63-64,128,192,240,255-256,448,511-512 |
| PARAM_VALUE | 0 | rtwdev->hci.ops->deinit | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->read16 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->read32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->read8 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->start | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->stop | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->write16 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->write32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->write8 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->do_mdelay | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->do_udelay | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->pack | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->phy_write32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->unpack | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write8 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write_rf | 4096-ptr_max |
| PARAM_VALUE | 1 | skb | 4096-ptr_max |
| PARAM_VALUE | 1 | skb->data_len | 0 |
| PARAM_VALUE | 2 | wait | 4096-ptr_max |
| BUF_SIZE | 1 | skb | (-1)-s32max |
| BUF_SIZE | 1 | skb | (-1)-s32max |
| BUF_SIZE | 2 | wait | 56 |
| CAPPED_DATA | 1 | skb->head | 1 |
| DATA_SOURCE | 0 | rtwdev | $0 |
| DATA_SOURCE | 1 | skb | r rtw89_fw_h2c_alloc_skb_with_hdr |
| PARAM_COMPARE | 0 | &rtwdev->mcc.wait | == $2 |
drivers/net/wireless/realtek/rtw89/fw.c rtw89_fw_h2c_stop_mcc() -> rtw89_h2c_tx_and_wait()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rtwdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->bacam_ver | 0-1,99 |
| PARAM_VALUE | 0 | rtwdev->chip->bb_table | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->bbmcu_nr | 0-1 |
| PARAM_VALUE | 0 | rtwdev->chip->bss_clr_vld.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->bss_clr_vld.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->c2h_counter_reg.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->c2h_counter_reg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->c2h_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->chip_gen | 0 |
| PARAM_VALUE | 0 | rtwdev->chip->dcfo_comp | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->dcfo_comp->addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dcfo_comp->mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dflt_parms | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_lna_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_lna_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_p20_pagcugc_en.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_p20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_rxb_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_rxb_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_s20_pagcugc_en.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_s20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_tia_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_tia_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_lna_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_lna_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_p20_pagcugc_en.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_p20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_rxb_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_rxb_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_s20_pagcugc_en.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_s20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_tia_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_tia_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_table | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->edcca_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->fw_def.fw_b_aid | 0,28768,28930 |
| PARAM_VALUE | 0 | rtwdev->chip->fw_def.fw_format_max | 0-2,4 |
| PARAM_VALUE | 0 | rtwdev->chip->h2c_counter_reg.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->h2c_counter_reg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->h2c_desc_size | 16,24 |
| PARAM_VALUE | 0 | rtwdev->chip->h2c_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->imr_info | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->agg_limit.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->agg_limit.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->bfee_ctrl.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->bfee_ctrl.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->muedca_ctrl.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->muedca_ctrl.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->narrow_bw_ru_dis.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->narrow_bw_ru_dis.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->port_base | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->ra_agg_limit.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->ra_agg_limit.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->txcnt_limit.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->txcnt_limit.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->wow_ctrl.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->wow_ctrl.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mon_reg | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->nctl_post_table->defs->addr | 0,17,32,36,81-82,85,96,143,239,768,772,776,780,788,792,804,812,1616,1792,1796,1840,3100,3132,3168,3180,3184,3196,4620,4768,4776,4792,4796,4800,4824,4828,4832,4836,4840,4844,8200,8432,8436,8440,8444,8992,9028,9808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->nctl_post_table->defs->data | 0-8,10-12,14-17,19,22,24-25,28-32,40,46-48,51,57,62-66,68,92,99,101-102,104-105,107,110-121,124-125,127-128,136-137,156,181,191-192,205,212,229,239,252-257,289,316,364,431,460,464,469,471-472,476,482,485,488,496-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->nctl_post_table->defs->mask | 0-4,7-8,14-16,31-32,48,56,63-64,112,127-128,192,240,255,448,511-512,768,992,1023-1024,1536,2048,3072,3584,3840,4095-4096,7936,8191-8192,14336,16384,24576,28672,32512,32768,61440,64512,65280,u16max-65536,122880-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->nctl_table | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->needed_fw_elms | 107426,487220,524085,671612724,1074032436,1074229012,1074229044 |
| PARAM_VALUE | 0 | rtwdev->chip->nhm_report | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->nhm_th | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->ops | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->ch_page_ctrl | 5892,35332,46852 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->hci_fc_ctrl | 5888,35328,46848 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_ctrl1 | 6032,35472,46992 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_ctrl2 | 6036,35476,46996 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_info1 | 6040,35480,47004 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_info2 | 6044,35484,47008 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_info3 | 6028,35468,46988 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->wp_page_ctrl1 | 6048,35488,47012 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->wp_page_ctrl2 | 6052,35492,47016 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->wp_page_info1 | 6056,35496,47020 |
| PARAM_VALUE | 0 | rtwdev->chip->phy_def | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->phy_def->cr_base | 65536 |
| PARAM_VALUE | 0 | rtwdev->chip->phy_def->physt_bmp_eht | 252 |
| PARAM_VALUE | 0 | rtwdev->chip->phy_def->physt_bmp_start | 1852 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->ampdu_miss.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->ampdu_miss.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->brk.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->brk.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->brk_option.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->brk_option.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cca_spoofing.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cca_spoofing.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_brk.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_brk.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_cca.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_cca.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_sfd_gg.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_sfd_gg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_sig_gg.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_sig_gg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_spoofing.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_spoofing.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_txen.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_txen.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_txon.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_txon.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->enable_all_cnt.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->enable_all_cnt.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->lsig_brk_l_th.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->lsig_brk_l_th.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->lsig_brk_s_th.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->lsig_brk_s_th.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->ofdm_cca.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->ofdm_cca.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->r1b_rr_sel.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->r1b_rr_sel.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->r1b_rx_rpt_rst.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->r1b_rx_rpt_rst.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rst_all_cnt.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rst_all_cnt.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rxl_err_parity.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rxl_err_parity.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rxl_err_rate.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rxl_err_rate.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->search_fail.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->search_fail.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pwr_off_seq->addr | 2,5-7,16,36,113,128,130-131,136,145-146,198,420,672,674,752-753 |
| PARAM_VALUE | 0 | rtwdev->chip->pwr_on_seq | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->pwr_on_seq->addr | 2,5-7,16,36,113,128,130-131,136,145-146,198,420,672,674,752-753 |
| PARAM_VALUE | 0 | rtwdev->chip->rf_path_num | 1-2 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_get.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_get.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->mode.addr | 98,724,728,17712,17716,17720,17724,17728,17732,17736,17740 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->mode.data | 0-3,7-8,15-16,18,24,26,30,38,42,52,64,75,96,128,131467,205831 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->mode.mask | 2-4,7-8,15-16,31-32,51,56,63-64,128,192,240,255-256,448,511-512 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->pinmux.addr | 98,724,728,17712,17716,17720,17724,17728,17732,17736,17740 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->pinmux.data | 0-3,7-8,15-16,18,24,26,30,38,42,52,64,75,96,128,131467,205831 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->pinmux.mask | 2-4,7-8,15-16,31-32,51,56,63-64,128,192,240,255-256,448,511-512 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->ref_rate.addr | 98,724,728,17712,17716,17720,17724,17728,17732,17736,17740 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->ref_rate.mask | 2-4,7-8,15-16,31-32,51,56,63-64,128,192,240,255-256,448,511-512 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->rsc.addr | 98,724,728,17712,17716,17720,17724,17728,17732,17736,17740 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->rsc.mask | 2-4,7-8,15-16,31-32,51,56,63-64,128,192,240,255-256,448,511-512 |
| PARAM_VALUE | 0 | rtwdev->chip->support_chanctx_num | 0-2 |
| PARAM_VALUE | 0 | rtwdev->chip->xtal_info | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->xtal_info->sc_xi_mask | 127,130048 |
| PARAM_VALUE | 0 | rtwdev->chip->xtal_info->sc_xo_mask | 32512,16646144 |
| PARAM_VALUE | 0 | rtwdev->chip->xtal_info->xcap_reg | 640,652 |
| PARAM_VALUE | 0 | rtwdev->fw_cmd_ofld_info->accu_delay | 0 |
| PARAM_VALUE | 0 | rtwdev->fw_cmd_ofld_info->cnt | 0 |
| PARAM_VALUE | 0 | rtwdev->hci.ops->deinit | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->pause | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->read16 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->read32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->read8 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->recalc_int_mit | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->start | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->stop | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->write16 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->write32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->write8 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->do_mdelay | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->do_udelay | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->pack | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->phy_write32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->unpack | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write16 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write8 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write_rf | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->napi.thread->delays->blkio_count | 0-4294967295 |
| PARAM_VALUE | 0 | rtwdev->pci_info->bd_ram_table | 0,643063650462019584,6331576261147430912 |
| PARAM_VALUE | 0 | rtwdev->priv->h2c_queue.qlen | 0-4294967295 |
| PARAM_VALUE | 0 | rtwdev->priv->h2c_release_queue.qlen | 0-4294967295 |
| PARAM_VALUE | 0 | rtwdev->priv->pdev->dev.dma_io_tlb_mem->dyn_alloc.flags | 0-4294967295 |
| PARAM_VALUE | 0 | rtwdev->priv->pdev->dev.dma_io_tlb_mem->dyn_alloc.is_hard | 0-1 |
| PARAM_VALUE | 0 | rtwdev->priv->pdev->dev.dma_io_tlb_mem->dyn_alloc.is_lazy | 0-1 |
| PARAM_VALUE | 0 | rtwdev->priv->pdev->dev.dma_io_tlb_mem->dyn_alloc.is_queued | 0-1 |
| PARAM_VALUE | 0 | rtwdev->priv->pdev->dev.dma_io_tlb_mem->dyn_alloc.is_soft | 0-1 |
| PARAM_VALUE | 0 | rtwdev->priv->pdev->dev.dma_uses_io_tlb | 1 |
| PARAM_VALUE | 0 | rtwdev->priv->pdev->dev.iommu->pci_32bit_workaround | 0-1 |
| PARAM_VALUE | 0 | rtwdev->rfk_mcc.data->table_idx | 0-255 |
| PARAM_VALUE | 0 | *rtwdev->rfk_mcc.data->rf18 | 0-4294967295 |
| PARAM_VALUE | 1 | skb | 4096-ptr_max |
| PARAM_VALUE | 1 | skb->data_len | 0 |
| PARAM_VALUE | 2 | wait | 4096-ptr_max |
| BUF_SIZE | 1 | skb | (-1)-s32max |
| BUF_SIZE | 1 | skb | (-1)-s32max |
| BUF_SIZE | 2 | wait | 56 |
| CAPPED_DATA | 1 | skb->head | 1 |
| DATA_SOURCE | 0 | rtwdev | $0 |
| DATA_SOURCE | 1 | skb | r rtw89_fw_h2c_alloc_skb_with_hdr |
| PARAM_COMPARE | 0 | &rtwdev->mcc.wait | == $2 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NO_OVERFLOW_SIMPLE | 0 | rtwdev->stats.rx_unicast | |
| NO_OVERFLOW_SIMPLE | 0 | rtwdev->stats.tx_unicast |
drivers/net/wireless/realtek/rtw89/fw.c rtw89_fw_h2c_trx_protect() -> rtw89_h2c_tx_and_wait()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rtwdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->acam_num | 32,128 |
| PARAM_VALUE | 0 | rtwdev->chip->bacam_dynamic_num | 4,8 |
| PARAM_VALUE | 0 | rtwdev->chip->bacam_num | 2,8,24 |
| PARAM_VALUE | 0 | rtwdev->chip->bacam_ver | 0-1,99 |
| PARAM_VALUE | 0 | rtwdev->chip->bb_table | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->bbmcu_nr | 0-1 |
| PARAM_VALUE | 0 | rtwdev->chip->bcam_num | 10,16,20 |
| PARAM_VALUE | 0 | rtwdev->chip->bss_clr_map_reg | 17324,17328,20144,157972 |
| PARAM_VALUE | 0 | rtwdev->chip->bss_clr_vld.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->bss_clr_vld.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->c2h_counter_reg.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->c2h_counter_reg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->c2h_ctrl_reg | 29028,33124 |
| PARAM_VALUE | 0 | rtwdev->chip->c2h_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->chip_gen | 1 |
| PARAM_VALUE | 0 | rtwdev->chip->dav_log_efuse_size | 0,16 |
| PARAM_VALUE | 0 | rtwdev->chip->dav_phy_efuse_size | 0,96 |
| PARAM_VALUE | 0 | rtwdev->chip->dcfo_comp | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->dcfo_comp->addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dcfo_comp->mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dcfo_comp_sft | 0,10,12 |
| PARAM_VALUE | 0 | rtwdev->chip->dflt_parms | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_lna_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_lna_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_p20_pagcugc_en.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_p20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_rxb_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_rxb_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_s20_pagcugc_en.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_s20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_tia_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_tia_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_lna_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_lna_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_p20_pagcugc_en.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_p20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_rxb_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_rxb_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_s20_pagcugc_en.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_s20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_tia_init.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_tia_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_table | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->dle_scc_rsvd_size | 0,98304 |
| PARAM_VALUE | 0 | rtwdev->chip->dma_ch_mask | 0,2730,3312 |
| PARAM_VALUE | 0 | rtwdev->chip->edcca_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->fifo_size | 196608,393216,458752,589824 |
| PARAM_VALUE | 0 | rtwdev->chip->fw_def.fw_b_aid | 0,28768,28930 |
| PARAM_VALUE | 0 | rtwdev->chip->fw_def.fw_format_max | 0-2,4 |
| PARAM_VALUE | 0 | rtwdev->chip->h2c_cctl_func_id | 2,10,17 |
| PARAM_VALUE | 0 | rtwdev->chip->h2c_counter_reg.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->h2c_counter_reg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->h2c_ctrl_reg | 29024,33120 |
| PARAM_VALUE | 0 | rtwdev->chip->h2c_desc_size | 16,24 |
| PARAM_VALUE | 0 | rtwdev->chip->h2c_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->hci_func_en_addr | 30848,33664 |
| PARAM_VALUE | 0 | rtwdev->chip->imr_info | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->limit_efuse_size | 1152,1280,262144 |
| PARAM_VALUE | 0 | rtwdev->chip->logical_efuse_size | 1536,2048,458752 |
| PARAM_VALUE | 0 | rtwdev->chip->low_power_hci_modes | 0,12 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->agg_limit.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->agg_limit.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->bfee_ctrl.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->bfee_ctrl.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->muedca_ctrl.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->muedca_ctrl.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->narrow_bw_ru_dis.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->narrow_bw_ru_dis.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->ra_agg_limit.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->ra_agg_limit.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->txcnt_limit.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->txcnt_limit.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->wow_ctrl.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->wow_ctrl.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->max_amsdu_limit | 3500,5000,8000,11000 |
| PARAM_VALUE | 0 | rtwdev->chip->max_eht_mpdu_cap | 0-1 |
| PARAM_VALUE | 0 | rtwdev->chip->mon_reg | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->mon_reg_num | 12,15-16,19 |
| PARAM_VALUE | 0 | rtwdev->chip->nctl_post_table->defs->addr | 0,17,32,36,81-82,85,96,143,239,768,772,776,780,788,792,804,812,1616,1792,1796,1840,3100,3132,3168,3180,3184,3196,4620,4768,4776,4792,4796,4800,4824,4828,4832,4836,4840,4844,8200,8432,8436,8440,8444,8992,9028,9808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->nctl_post_table->defs->data | 0-8,10-12,14-17,19,22,24-25,28-32,40,46-48,51,57,62-66,68,92,99,101-102,104-105,107,110-121,124-125,127-128,136-137,156,181,191-192,205,212,229,239,252-257,289,316,364,431,460,464,469,471-472,476,482,485,488,496-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->nctl_post_table->defs->mask | 0-4,7-8,14-16,31-32,48,56,63-64,112,127-128,192,240,255,448,511-512,768,992,1023-1024,1536,2048,3072,3584,3840,4095-4096,7936,8191-8192,14336,16384,24576,28672,32512,32768,61440,64512,65280,u16max-65536,122880-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->nctl_table | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->needed_fw_elms | 487220,524085,671612724,1074032436,1074229012,1074229044 |
| PARAM_VALUE | 0 | rtwdev->chip->nhm_report | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->nhm_th | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->ops | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->ch_page_ctrl | 5892,35332,46852 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->hci_fc_ctrl | 5888,35328,46848 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_ctrl1 | 6032,35472,46992 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_ctrl2 | 6036,35476,46996 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_info1 | 6040,35480,47004 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_info2 | 6044,35484,47008 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_info3 | 6028,35468,46988 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->wp_page_ctrl1 | 6048,35488,47012 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->wp_page_ctrl2 | 6052,35492,47016 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->wp_page_info1 | 6056,35496,47020 |
| PARAM_VALUE | 0 | rtwdev->chip->para_ver | 0-1,15,1023 |
| PARAM_VALUE | 0 | rtwdev->chip->phy_def | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->phy_def->cr_base | 65536 |
| PARAM_VALUE | 0 | rtwdev->chip->phy_def->physt_bmp_eht | 252 |
| PARAM_VALUE | 0 | rtwdev->chip->phy_def->physt_bmp_start | 1852 |
| PARAM_VALUE | 0 | rtwdev->chip->phy_def->physts->tx_common_ctrl.reg_nr | 2,4,6 |
| PARAM_VALUE | 0 | rtwdev->chip->phy_def->physts->tx_info.reg_nr | 2,4,6 |
| PARAM_VALUE | 0 | rtwdev->chip->phycap_addr | 1408,1424,5888 |
| PARAM_VALUE | 0 | rtwdev->chip->phycap_size | 56,96,128 |
| PARAM_VALUE | 0 | rtwdev->chip->physical_efuse_size | 1216,4864 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->ampdu_miss.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->ampdu_miss.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->brk.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->brk.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->brk_option.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->brk_option.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cca_spoofing.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cca_spoofing.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_brk.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_brk.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_cca.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_cca.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_sfd_gg.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_sfd_gg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_sig_gg.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_sig_gg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_spoofing.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_spoofing.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_txen.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_txen.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_txon.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_txon.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->enable_all_cnt.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->enable_all_cnt.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->lsig_brk_l_th.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->lsig_brk_l_th.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->lsig_brk_s_th.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->lsig_brk_s_th.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->ofdm_cca.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->ofdm_cca.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->r1b_rr_sel.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->r1b_rr_sel.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->r1b_rx_rpt_rst.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->r1b_rx_rpt_rst.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rst_all_cnt.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rst_all_cnt.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rxl_err_parity.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rxl_err_parity.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rxl_err_rate.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rxl_err_rate.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->search_fail.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->search_fail.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->ppdu_max_usr | 4,8,16 |
| PARAM_VALUE | 0 | rtwdev->chip->ps_mode_supported | 6,14 |
| PARAM_VALUE | 0 | rtwdev->chip->pwr_off_seq->addr | 2,5-7,16,36,113,128,130-131,136,145-146,198,420,672,674,752-753 |
| PARAM_VALUE | 0 | rtwdev->chip->pwr_on_seq | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->pwr_on_seq->addr | 2,5-7,16,36,113,128,130-131,136,145-146,198,420,672,674,752-753 |
| PARAM_VALUE | 0 | rtwdev->chip->rf_path_num | 1-2 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_get.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_get.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->mode.addr | 98,724,728,17712,17716,17720,17724,17728,17732,17736,17740 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->mode.data | 0-3,7-8,15-16,18,24,26,30,38,42,52,64,75,96,128,131467,205831 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->mode.mask | 2-4,7-8,15-16,31-32,51,56,63-64,128,192,240,255-256,448,511-512 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->pinmux.addr | 98,724,728,17712,17716,17720,17724,17728,17732,17736,17740 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->pinmux.data | 0-3,7-8,15-16,18,24,26,30,38,42,52,64,75,96,128,131467,205831 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->pinmux.mask | 2-4,7-8,15-16,31-32,51,56,63-64,128,192,240,255-256,448,511-512 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->ref_rate.addr | 98,724,728,17712,17716,17720,17724,17728,17732,17736,17740 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->ref_rate.mask | 2-4,7-8,15-16,31-32,51,56,63-64,128,192,240,255-256,448,511-512 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->rsc.addr | 98,724,728,17712,17716,17720,17724,17728,17732,17736,17740 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->rsc.mask | 2-4,7-8,15-16,31-32,51,56,63-64,128,192,240,255-256,448,511-512 |
| PARAM_VALUE | 0 | rtwdev->chip->rsvd_ple_ofst | 194560,391168,456704,587776 |
| PARAM_VALUE | 0 | rtwdev->chip->rx_nss | 1-2 |
| PARAM_VALUE | 0 | rtwdev->chip->scam_num | 32,128 |
| PARAM_VALUE | 0 | rtwdev->chip->support_bands | 3,11 |
| PARAM_VALUE | 0 | rtwdev->chip->support_bandwidths | 14,46 |
| PARAM_VALUE | 0 | rtwdev->chip->support_chanctx_num | 0-2 |
| PARAM_VALUE | 0 | rtwdev->chip->support_link_num | 0,2 |
| PARAM_VALUE | 0 | rtwdev->chip->support_macid_num | 32,64,128 |
| PARAM_VALUE | 0 | rtwdev->chip->tx_nss | 1-2 |
| PARAM_VALUE | 0 | rtwdev->chip->txwd_body_size | 24,32 |
| PARAM_VALUE | 0 | rtwdev->chip->txwd_info_size | 24,32 |
| PARAM_VALUE | 0 | rtwdev->chip->wde_qempty_acq_grpnum | 4,8,16 |
| PARAM_VALUE | 0 | rtwdev->chip->wde_qempty_mgq_grpsel | 4,8,16 |
| PARAM_VALUE | 0 | rtwdev->chip->wlcx_desired | 84213760,100663296,118358016,118554624,152371200 |
| PARAM_VALUE | 0 | rtwdev->chip->wow_reason_reg | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->xtal_info | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->xtal_info->sc_xi_mask | 127,130048 |
| PARAM_VALUE | 0 | rtwdev->chip->xtal_info->sc_xo_mask | 32512,16646144 |
| PARAM_VALUE | 0 | rtwdev->hci.ops->deinit | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->pause | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->read16 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->read32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->read8 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->recalc_int_mit | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->start | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->stop | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->write16 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->write32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->write8 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->do_mdelay | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->do_udelay | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->pack | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->phy_write32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->unpack | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write16 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write8 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write_rf | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->mac.dle_info.rsvd_qt->b0_csi | 0,44,56,107 |
| PARAM_VALUE | 0 | rtwdev->mac.dle_info.rsvd_qt->b0_ftm | 0,6 |
| PARAM_VALUE | 0 | rtwdev->mac.dle_info.rsvd_qt->b0_lmr | 0,6 |
| PARAM_VALUE | 0 | rtwdev->mac.dle_info.rsvd_qt->b0_smr | 0,69 |
| PARAM_VALUE | 0 | rtwdev->mac.dle_info.rsvd_qt->b1_csi | 0,28,44,107 |
| PARAM_VALUE | 0 | rtwdev->mac.dle_info.rsvd_qt->b1_ftm | 0,6 |
| PARAM_VALUE | 0 | rtwdev->mac.dle_info.rsvd_qt->b1_lmr | 0,6 |
| PARAM_VALUE | 0 | rtwdev->mac.dle_info.rsvd_qt->b1_smr | 0 |
| PARAM_VALUE | 0 | rtwdev->mac.dle_info.rsvd_qt->mpdu_info_tbl | 0-2 |
| PARAM_VALUE | 0 | rtwdev->mac.dle_info.rsvd_qt->others | 0 |
| PARAM_VALUE | 0 | rtwdev->mac.hfc_param.ch_cfg->grp | 0-1 |
| PARAM_VALUE | 0 | rtwdev->mac.hfc_param.ch_cfg->max | 0,196,210,222,226,311,341-344,402,601,603,606,730,732,742-743,1614,1641,1896 |
| PARAM_VALUE | 0 | rtwdev->mac.hfc_param.ch_cfg->min | 0,2,4-5,13,15-16,18,22,24,32,40,54,128 |
| PARAM_VALUE | 0 | rtwdev->pci_info->gen_def | 1514654105865453568,7955639482977693696 |
| PARAM_VALUE | 0 | rtwdev->pci_info->rxbd_rwptr_clr_reg | 4120,4608,45080 |
| PARAM_VALUE | 0 | rtwdev->pci_info->txbd_rwptr_clr2_reg | 0,4548,4884,45076 |
| PARAM_VALUE | 0 | rtwdev->rfk_mcc.data->table_idx | 0-255 |
| PARAM_VALUE | 0 | rtwdev->variant->qta_def_override | 0,927467491008073728 |
| PARAM_VALUE | 0 | *rtwdev->rfk_mcc.data->rf18 | 0-4294967295 |
| PARAM_VALUE | 1 | skb | 4096-ptr_max |
| PARAM_VALUE | 1 | skb->data->m0 | 1048575 |
| PARAM_VALUE | 1 | skb->data->m1 | 3 |
| PARAM_VALUE | 1 | skb->data_len | 0 |
| PARAM_VALUE | 2 | wait | 4096-ptr_max |
| PARAM_VALUE | 3 | cond | 52 |
| BUF_SIZE | 1 | skb | (-1)-s32max |
| BUF_SIZE | 1 | skb | (-1)-s32max |
| BUF_SIZE | 2 | wait | 56 |
| CAPPED_DATA | 1 | skb->head | 1 |
| DATA_SOURCE | 0 | rtwdev | $0 |
| DATA_SOURCE | 1 | skb | r rtw89_fw_h2c_alloc_skb_with_hdr |
| PARAM_COMPARE | 0 | &rtwdev->mac.fw_ofld_wait | == $2 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NO_OVERFLOW_SIMPLE | 0 | rtwdev->stats.rx_unicast | |
| NO_OVERFLOW_SIMPLE | 0 | rtwdev->stats.tx_unicast | |
| HALF_LOCKED2 | 0 | &rtwdev->hw->wiphy->mtx |
drivers/net/wireless/realtek/rtw89/fw.c rtw89_fw_h2c_wow_request_aoac() -> rtw89_h2c_tx_and_wait()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | rtwdev | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->bb_table | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->bss_clr_vld.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->bss_clr_vld.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->c2h_counter_reg.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->c2h_counter_reg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->c2h_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->chip_gen | 0-1 |
| PARAM_VALUE | 0 | rtwdev->chip->dcfo_comp | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->dcfo_comp->mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dflt_parms | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_lna_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_p20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_rxb_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_s20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p0_tia_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_lna_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_p20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_rxb_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_s20_pagcugc_en.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_regs->p1_tia_init.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->dig_table | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->edcca_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->h2c_counter_reg.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->h2c_counter_reg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->h2c_desc_size | 16,24 |
| PARAM_VALUE | 0 | rtwdev->chip->h2c_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->imr_info | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->agg_limit.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->bfee_ctrl.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->muedca_ctrl.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->narrow_bw_ru_dis.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->ra_agg_limit.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->txcnt_limit.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->wow_config_mac | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->mac_def->wow_ctrl.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->mon_reg | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->nctl_post_table->defs->addr | 0,17,32,36,81-82,85,96,143,239,768,772,776,780,788,792,804,812,1616,1792,1796,1840,3100,3132,3168,3180,3184,3196,4620,4768,4776,4792,4796,4800,4824,4828,4832,4836,4840,4844,8200,8432,8436,8440,8444,8992,9028,9808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->nctl_post_table->defs->data | 0-8,10-12,14-17,19,22,24-25,28-32,40,46-48,51,57,62-66,68,92,99,101-102,104-105,107,110-121,124-125,127-128,136-137,156,181,191-192,205,212,229,239,252-257,289,316,364,431,460,464,469,471-472,476,482,485,488,496-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->nctl_post_table->defs->mask | 0-4,7-8,14-16,31-32,48,56,63-64,112,127-128,192,240,255,448,511-512,768,992,1023-1024,1536,2048,3072,3584,3840,4095-4096,7936,8191-8192,14336,16384,24576,28672,32512,32768,61440,64512,65280,u16max-65536,122880-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->nctl_table | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->needed_fw_elms | 107426,487220,524085,671612724,1074032436,1074229012,1074229044 |
| PARAM_VALUE | 0 | rtwdev->chip->nhm_report | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->nhm_th | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->ops | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->ch_page_ctrl | 5892,35332,46852 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->hci_fc_ctrl | 5888,35328,46848 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_ctrl1 | 6032,35472,46992 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_ctrl2 | 6036,35476,46996 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_info1 | 6040,35480,47004 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_info2 | 6044,35484,47008 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->pub_page_info3 | 6028,35468,46988 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->wp_page_ctrl1 | 6048,35488,47012 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->wp_page_ctrl2 | 6052,35492,47016 |
| PARAM_VALUE | 0 | rtwdev->chip->page_regs->wp_page_info1 | 6056,35496,47020 |
| PARAM_VALUE | 0 | rtwdev->chip->phy_def | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->phy_def->cr_base | 65536 |
| PARAM_VALUE | 0 | rtwdev->chip->phy_def->physt_bmp_eht | 252 |
| PARAM_VALUE | 0 | rtwdev->chip->phy_def->physt_bmp_start | 1852 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->ampdu_miss.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->brk.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->brk_option.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cca_spoofing.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_brk.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_cca.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_sfd_gg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_sig_gg.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_spoofing.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_txen.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->cck_txon.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->enable_all_cnt.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->lsig_brk_l_th.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->lsig_brk_s_th.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->ofdm_cca.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->r1b_rr_sel.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->r1b_rx_rpt_rst.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rst_all_cnt.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rxl_err_parity.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->rxl_err_rate.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pmac_regs->search_fail.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->pwr_off_seq->addr | 2,5-7,16,36,113,128,130-131,136,145-146,198,420,672,674,752-753 |
| PARAM_VALUE | 0 | rtwdev->chip->pwr_on_seq | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->pwr_on_seq->addr | 2,5-7,16,36,113,128,130-131,136,145-146,198,420,672,674,752-753 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_get.addr | 0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_get.mask | 0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->mode.addr | 98,724,728,1774,17712,17716,17720,17724,17728,17732,17736,17740 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->mode.data | 0-3,7-8,15-16,18,24,26,30,38,42,52,64,75,96,128,131467,205831 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->mode.mask | 2-4,7-8,15-16,31-32,51,56,63-64,128,192,240,255-256,448,511-512 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->pinmux.addr | 98,724,728,1774,17712,17716,17720,17724,17728,17732,17736,17740 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->pinmux.data | 0-3,7-8,15-16,18,24,26,30,38,42,52,64,75,96,128,131467,205831 |
| PARAM_VALUE | 0 | rtwdev->chip->rfkill_init->pinmux.mask | 2-4,7-8,15-16,31-32,51,56,63-64,128,192,240,255-256,448,511-512 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->ref_rate.addr | 98,724,728 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->ref_rate.mask | 2-4,7-8,15-16,31-32,51,56,63-64,128,192,240,255-256,448,511-512 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->rsc.addr | 98,724,728 |
| PARAM_VALUE | 0 | rtwdev->chip->rrsr_cfgs->rsc.mask | 2-4,7-8,15-16,31-32,51,56,63-64,128,192,240,255-256,448,511-512 |
| PARAM_VALUE | 0 | rtwdev->chip->wow_reason_reg | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->chip->xtal_info | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->flags | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->fw_cmd_ofld_info->cnt | 0 |
| PARAM_VALUE | 0 | rtwdev->hci.ops->deinit | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->pause | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->read16 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->read32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->read8 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->start | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->stop | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->write16 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->write32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->hci.ops->write8 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->do_mdelay | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->do_udelay | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->pack | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->phy_write32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->unpack | 0,4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write16 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write32 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write8 | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->io->write_rf | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->napi.thread->__state | 0,512 |
| PARAM_VALUE | 0 | rtwdev->napi.thread->blocked_on | 0 |
| PARAM_VALUE | 0 | rtwdev->napi.thread->core_node.__rb_parent_color | 1 |
| PARAM_VALUE | 0 | rtwdev->napi.thread->core_node.rb_left | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->napi.thread->core_node.rb_right | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->napi.thread->cpus_ptr | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->napi.thread->delays->blkio_count | 0-4294967295 |
| PARAM_VALUE | 0 | rtwdev->napi.thread->dl.pi_se->pi_se | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->napi.thread->dl.rq->active_balance | s32min-s32max |
| PARAM_VALUE | 0 | rtwdev->napi.thread->dl.rq->clock_update_flags | 0-4294967295 |
| PARAM_VALUE | 0 | rtwdev->napi.thread->dl.rq->core_enabled | 0-4294967295 |
| PARAM_VALUE | 0 | rtwdev->napi.thread->dl.rq->core_forceidle_count | 0-4294967295 |
| PARAM_VALUE | 0 | rtwdev->napi.thread->dl.rq->core_forceidle_occupation | 0-4294967295 |
| PARAM_VALUE | 0 | rtwdev->napi.thread->dl.rq->core_forceidle_seq | 0-4294967295 |
| PARAM_VALUE | 0 | rtwdev->napi.thread->dl.rq->core_pick_seq | 0-4294967295 |
| PARAM_VALUE | 0 | rtwdev->napi.thread->dl.rq->core_sched_seq | 0-4294967295 |
| PARAM_VALUE | 0 | rtwdev->napi.thread->dl.rq->core_task_seq | 0-4294967295 |
| PARAM_VALUE | 0 | rtwdev->napi.thread->dl.rq->cpu | s32min-s32max |
| PARAM_VALUE | 0 | rtwdev->napi.thread->dl.rq->has_blocked_load | 0-4294967295 |
| PARAM_VALUE | 0 | rtwdev->napi.thread->dl.rq->hrtick_sched | 0-4294967295 |
| PARAM_VALUE | 0 | rtwdev->napi.thread->dl.rq->idle_balance | 0-255 |
| PARAM_VALUE | 0 | rtwdev->napi.thread->dl.rq->membarrier_state | s32min-s32max |
| PARAM_VALUE | 0 | rtwdev->napi.thread->dl.rq->nohz_idle_balance | 0-255 |
| PARAM_VALUE | 0 | rtwdev->napi.thread->dl.rq->nohz_tick_stopped | 0-4294967295 |
| PARAM_VALUE | 0 | rtwdev->napi.thread->dl.rq->nr_llc_running | 0-4294967295 |
| PARAM_VALUE | 0 | rtwdev->napi.thread->dl.rq->nr_numa_running | 0-4294967295 |
| PARAM_VALUE | 0 | rtwdev->napi.thread->dl.rq->nr_pinned | 0-4294967295 |
| PARAM_VALUE | 0 | rtwdev->napi.thread->dl.rq->nr_pref_llc_running | 0-4294967295 |
| PARAM_VALUE | 0 | rtwdev->napi.thread->dl.rq->nr_preferred_running | 0-4294967295 |
| PARAM_VALUE | 0 | rtwdev->napi.thread->dl.rq->nr_running | 0-4294967295 |
| PARAM_VALUE | 0 | rtwdev->napi.thread->dl.rq->numa_migrate_on | 0-4294967295 |
| PARAM_VALUE | 0 | rtwdev->napi.thread->dl.rq->online | s32min-s32max |
| PARAM_VALUE | 0 | rtwdev->napi.thread->dl.rq->push_busy | 0-4294967295 |
| PARAM_VALUE | 0 | rtwdev->napi.thread->dl.rq->push_cpu | s32min-s32max |
| PARAM_VALUE | 0 | rtwdev->napi.thread->dl.rq->sched_count | 0-4294967295 |
| PARAM_VALUE | 0 | rtwdev->napi.thread->dl.rq->sched_goidle | 0-4294967295 |
| PARAM_VALUE | 0 | rtwdev->napi.thread->dl.rq->ticks_without_resched | s32min-s32max |
| PARAM_VALUE | 0 | rtwdev->napi.thread->dl.rq->ttwu_count | 0-4294967295 |
| PARAM_VALUE | 0 | rtwdev->napi.thread->dl.rq->ttwu_local | 0-4294967295 |
| PARAM_VALUE | 0 | rtwdev->napi.thread->dl.rq->ttwu_pending | 0-4294967295 |
| PARAM_VALUE | 0 | rtwdev->napi.thread->dl.rq->uclamp_flags | 0-4294967295 |
| PARAM_VALUE | 0 | rtwdev->napi.thread->dl.rq->yld_count | 0-4294967295 |
| PARAM_VALUE | 0 | rtwdev->napi.thread->is_blocked | 0 |
| PARAM_VALUE | 0 | rtwdev->napi.thread->kcov->mode | 0-4294967295 |
| PARAM_VALUE | 0 | rtwdev->napi.thread->kcov->remote | 0-1 |
| PARAM_VALUE | 0 | rtwdev->napi.thread->kcov->remote_size | 0-4294967295 |
| PARAM_VALUE | 0 | rtwdev->napi.thread->kcov_remote->mode | 0-4294967295 |
| PARAM_VALUE | 0 | rtwdev->napi.thread->kcov_remote->remote | 0-1 |
| PARAM_VALUE | 0 | rtwdev->napi.thread->kcov_remote->remote_size | 0-4294967295 |
| PARAM_VALUE | 0 | rtwdev->napi.thread->mm->mm_cid.irq_work.node.a_flags.counter | 0-s32max |
| PARAM_VALUE | 0 | rtwdev->napi.thread->mm->mm_cid.max_cids | 0-s32max |
| PARAM_VALUE | 0 | rtwdev->napi.thread->mm->mm_cid.pcpu_thrs | 1-1073741823 |
| PARAM_VALUE | 0 | rtwdev->napi.thread->mm->mm_cid.update_deferred | 1 |
| PARAM_VALUE | 0 | rtwdev->napi.thread->on_rq | 0-1,3-255 |
| PARAM_VALUE | 0 | rtwdev->napi.thread->pushable_dl_tasks.__rb_parent_color | 1 |
| PARAM_VALUE | 0 | rtwdev->napi.thread->pushable_dl_tasks.rb_left | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->napi.thread->pushable_tasks.node_list.next->prev | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->napi.thread->pushable_tasks.node_list.prev->next | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->napi.thread->pushable_tasks.prio_list.prev->next | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->napi.thread->rseq.event.ids_changed | 1 |
| PARAM_VALUE | 0 | rtwdev->napi.thread->saved_state | 0 |
| PARAM_VALUE | 0 | rtwdev->napi.thread->sched_migrated | 1 |
| PARAM_VALUE | 0 | rtwdev->napi.thread->sched_task_group->idle | s32min-s32max |
| PARAM_VALUE | 0 | rtwdev->napi.thread->se.cfs_rq->propagate | 1 |
| PARAM_VALUE | 0 | rtwdev->napi.thread->se.cfs_rq->removed.lock.owner | (-1) |
| PARAM_VALUE | 0 | rtwdev->napi.thread->se.cfs_rq->removed.lock.owner_cpu | 4294967295 |
| PARAM_VALUE | 0 | rtwdev->napi.thread->se.cfs_rq->rq->curr->mm->sc_stat.cpu | (-1) |
| PARAM_VALUE | 0 | rtwdev->napi.thread->se.cfs_rq->rq->curr->pref_llc_queued | 0-1 |
| PARAM_VALUE | 0 | rtwdev->napi.thread->se.cfs_rq->rq->donor->__state | 0,512 |
| PARAM_VALUE | 0 | rtwdev->napi.thread->se.cfs_rq->rq->donor->core_node.__rb_parent_color | 1 |
| PARAM_VALUE | 0 | rtwdev->napi.thread->se.cfs_rq->rq->donor->dl.dl_timer.base->clockid | 0-1,7,11 |
| PARAM_VALUE | 0 | rtwdev->napi.thread->se.cfs_rq->rq->donor->dl.dl_timer.base->cpu_base->expires_next | 0-s64max |
| PARAM_VALUE | 0 | rtwdev->napi.thread->se.cfs_rq->rq->donor->dl.dl_timer.base->index | 0-7 |
| PARAM_VALUE | 0 | rtwdev->napi.thread->se.cfs_rq->rq->donor->dl.inactive_timer.base->clockid | 0-1,7,11 |
| PARAM_VALUE | 0 | rtwdev->napi.thread->se.cfs_rq->rq->donor->dl.inactive_timer.base->index | 0-7 |
| PARAM_VALUE | 0 | rtwdev->napi.thread->se.cfs_rq->rq->donor->dl.rb_node.__rb_parent_color | 1 |
| PARAM_VALUE | 0 | rtwdev->napi.thread->se.cfs_rq->rq->donor->mm->mm_cid.irq_work.node.a_flags.counter | 0-s32max |
| PARAM_VALUE | 0 | rtwdev->napi.thread->se.cfs_rq->rq->donor->pushable_dl_tasks.__rb_parent_color | 1 |
| PARAM_VALUE | 0 | rtwdev->napi.thread->se.cfs_rq->rq->donor->rseq.event.ids_changed | 1 |
| PARAM_VALUE | 0 | rtwdev->napi.thread->se.cfs_rq->rq->donor->sched_migrated | 1 |
| PARAM_VALUE | 0 | rtwdev->napi.thread->se.cfs_rq->rq->donor->se.run_node.rb_left->__rb_parent_color | 4096-s64max |
| PARAM_VALUE | 0 | rtwdev->napi.thread->se.cfs_rq->rq->donor->se.run_node.rb_right->__rb_parent_color | 4096-s64max |
| PARAM_VALUE | 0 | rtwdev->napi.thread->se.group_node.next->next | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->napi.thread->se.group_node.next->prev | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->napi.thread->se.group_node.prev->next | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->napi.thread->se.group_node.prev->prev | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->napi.thread->thread_pid->attr->exit_code | s32min-s32max |
| PARAM_VALUE | 0 | rtwdev->napi.thread->throttle_node.next->next | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->napi.thread->throttle_node.next->prev | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->napi.thread->throttle_node.prev->next | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->napi.thread->throttle_node.prev->prev | 4096-ptr_max |
| PARAM_VALUE | 0 | rtwdev->napi.thread->wake_cpu | 0-s32max |
| PARAM_VALUE | 0 | rtwdev->pci_info->gen_def | 1514654105865453568,7955639482977693696 |
| PARAM_VALUE | 0 | rtwdev->pci_info->rxbd_rwptr_clr_reg | 4120,4608,45080 |
| PARAM_VALUE | 0 | rtwdev->pci_info->txbd_rwptr_clr2_reg | 0,4548,4884,45076 |
| PARAM_VALUE | 0 | rtwdev->priv->continual_io_error.counter | s32min-s32max |
| PARAM_VALUE | 0 | rtwdev->priv->halt_c2h_intrs | 2097152,6291456 |
| PARAM_VALUE | 0 | rtwdev->priv->ind_intrs | 1,3,33,16777216,50331648,587202560 |
| PARAM_VALUE | 0 | rtwdev->priv->irq_lock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | rtwdev->priv->low_power | 0-1 |
| PARAM_VALUE | 0 | rtwdev->priv->running | 0-1 |
| PARAM_VALUE | 0 | rtwdev->priv->under_recovery | 0-1 |
| PARAM_VALUE | 0 | rtwdev->wow.ptk_alg | 1-255 |
| PARAM_VALUE | 1 | skb | 4096-ptr_max |
| PARAM_VALUE | 1 | skb->data_len | 0 |
| PARAM_VALUE | 2 | wait | 4096-ptr_max |
| PARAM_VALUE | 3 | cond | 13 |
| BUF_SIZE | 1 | skb | (-1)-s32max |
| BUF_SIZE | 1 | skb | (-1)-s32max |
| BUF_SIZE | 2 | wait | 56 |
| CAPPED_DATA | 1 | skb->head | 1 |
| DATA_SOURCE | 0 | rtwdev | $0 |
| DATA_SOURCE | 1 | skb | r rtw89_fw_h2c_alloc_skb_with_hdr |
| PARAM_COMPARE | 0 | &rtwdev->wow.wait | == $2 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| LOCK2 | global &rtnl_mutex | ||
| HALF_LOCKED2 | &local->hw.wiphy->mtx | ||
| HALF_LOCKED2 | &rdev->wiphy.mtx | ||
| TYPE_LOCK | (struct wiphy)->mtx |