| PARAM_VALUE |
0 |
rtwdev |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->mac_def |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->mac_def->agg_limit.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE |
0 |
rtwdev->chip->mac_def->agg_limit.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032,4095-4096,5461,16383,28672,31744,s16max-32768,65280,u16max,131072,258048,261632,262144,462592,524032,1046528,1048576,2097152,4128768,16515072,16711680-u32max |
| PARAM_VALUE |
0 |
rtwdev->chip->mac_def->bfee_ctrl.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE |
0 |
rtwdev->chip->mac_def->bfee_ctrl.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032,4095-4096,5461,16383,28672,31744,s16max-32768,65280,u16max,131072,258048,261632,262144,462592,524032,1046528,1048576,2097152,4128768,16515072,16711680-u32max |
| PARAM_VALUE |
0 |
rtwdev->chip->mac_def->muedca_ctrl.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE |
0 |
rtwdev->chip->mac_def->muedca_ctrl.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032,4095-4096,5461,16383,28672,31744,s16max-32768,65280,u16max,131072,258048,261632,262144,462592,524032,1046528,1048576,2097152,4128768,16515072,16711680-u32max |
| PARAM_VALUE |
0 |
rtwdev->chip->mac_def->narrow_bw_ru_dis.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE |
0 |
rtwdev->chip->mac_def->narrow_bw_ru_dis.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032,4095-4096,5461,16383,28672,31744,s16max-32768,65280,u16max,131072,258048,261632,262144,462592,524032,1046528,1048576,2097152,4128768,16515072,16711680-u32max |
| PARAM_VALUE |
0 |
rtwdev->chip->mac_def->ra_agg_limit.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE |
0 |
rtwdev->chip->mac_def->ra_agg_limit.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032,4095-4096,5461,16383,28672,31744,s16max-32768,65280,u16max,131072,258048,261632,262144,462592,524032,1046528,1048576,2097152,4128768,16515072,16711680-u32max |
| PARAM_VALUE |
0 |
rtwdev->chip->mac_def->txcnt_limit.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE |
0 |
rtwdev->chip->mac_def->txcnt_limit.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032,4095-4096,5461,16383,28672,31744,s16max-32768,65280,u16max,131072,258048,261632,262144,462592,524032,1046528,1048576,2097152,4128768,16515072,16711680-u32max |
| PARAM_VALUE |
0 |
rtwdev->chip->mac_def->wow_ctrl.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092,3396,3584,3588,3592,3596,3600,3616,3620,3708,4096,4112,4124,4544,4880,5888,5892,5904,6656,6660,6664,6668,6672,6688,6692,6780,6792,6796,6800,6804,6808-u32max |
| PARAM_VALUE |
0 |
rtwdev->chip->mac_def->wow_ctrl.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032,4095-4096,5461,16383,28672,31744,s16max-32768,65280,u16max,131072,258048,261632,262144,462592,524032,1046528,1048576,2097152,4128768,16515072,16711680-u32max |
| PARAM_VALUE |
0 |
rtwdev->chip->page_regs->ch_page_ctrl |
5892,35332,46852 |
| PARAM_VALUE |
0 |
rtwdev->chip->page_regs->hci_fc_ctrl |
5888,35328,46848 |
| PARAM_VALUE |
0 |
rtwdev->chip->page_regs->pub_page_ctrl1 |
6032,35472,46992 |
| PARAM_VALUE |
0 |
rtwdev->chip->page_regs->pub_page_ctrl2 |
6036,35476,46996 |
| PARAM_VALUE |
0 |
rtwdev->chip->page_regs->pub_page_info1 |
6040,35480,47004 |
| PARAM_VALUE |
0 |
rtwdev->chip->page_regs->pub_page_info2 |
6044,35484,47008 |
| PARAM_VALUE |
0 |
rtwdev->chip->page_regs->pub_page_info3 |
6028,35468,46988 |
| PARAM_VALUE |
0 |
rtwdev->chip->page_regs->wp_page_ctrl1 |
6048,35488,47012 |
| PARAM_VALUE |
0 |
rtwdev->chip->page_regs->wp_page_ctrl2 |
6052,35492,47016 |
| PARAM_VALUE |
0 |
rtwdev->chip->page_regs->wp_page_info1 |
6056,35496,47020 |
| PARAM_VALUE |
0 |
rtwdev->phystat.bcn_stat.bcn_dist.bins |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->phystat.bcn_stat.bcn_dist.lower_bound |
0-6553 |
| PARAM_VALUE |
0 |
rtwdev->phystat.bcn_stat.bcn_dist.upper_bound |
0-13107 |
| PARAM_VALUE |
0 |
rtwdev->phystat.bcn_stat.drift |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->phystat.bcn_stat.tbtt_tu |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->phystat.bcn_stat.tbtt_us |
4096-ptr_max |
| PARAM_VALUE |
0 |
*rtwdev->phystat.bcn_stat->drift |
0-u16max |
| PARAM_VALUE |
0 |
*rtwdev->phystat.bcn_stat.drift |
0-u16max |
| PARAM_VALUE |
1 |
rtwvif_link |
4096-ptr_max |
| PARAM_VALUE |
1 |
rtwvif_link->wifi_role |
1,9 |
| DATA_SOURCE |
0 |
rtwdev |
$0 |
| DATA_SOURCE |
1 |
rtwvif_link |
$1 |
| FUZZY_MAX |
1 |
rtwvif_link->wifi_role |
9 |
| BIT_INFO |
1 |
rtwvif_link->wifi_role |
0x1,0xffffffffffffffff |
| MEM_ZERO |
0 |
&rtwdev->phystat.bcn_stat.bcn_dist |
|
| NOCHECK_CALL |
|
|
|