| PARAM_VALUE |
0 |
rtwdev |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->bb_table |
0,4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->bss_clr_vld.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->bss_clr_vld.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->c2h_counter_reg.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->c2h_counter_reg.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->c2h_regs |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->dcfo_comp |
0,4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->dcfo_comp->addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->dcfo_comp->mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->dflt_parms |
0,4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->dig_regs |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->dig_regs->p0_lna_init.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->dig_regs->p0_lna_init.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->dig_regs->p0_p20_pagcugc_en.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->dig_regs->p0_p20_pagcugc_en.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->dig_regs->p0_rxb_init.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->dig_regs->p0_rxb_init.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->dig_regs->p0_s20_pagcugc_en.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->dig_regs->p0_s20_pagcugc_en.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->dig_regs->p0_tia_init.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->dig_regs->p0_tia_init.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->dig_regs->p1_lna_init.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->dig_regs->p1_lna_init.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->dig_regs->p1_p20_pagcugc_en.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->dig_regs->p1_p20_pagcugc_en.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->dig_regs->p1_rxb_init.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->dig_regs->p1_rxb_init.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->dig_regs->p1_s20_pagcugc_en.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->dig_regs->p1_s20_pagcugc_en.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->dig_regs->p1_tia_init.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->dig_regs->p1_tia_init.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->dig_table |
0,4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->edcca_regs |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->h2c_counter_reg.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->h2c_counter_reg.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->h2c_regs |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->imr_info |
0,4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->mac_def |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->mac_def->agg_limit.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->mac_def->agg_limit.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->mac_def->bfee_ctrl.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->mac_def->bfee_ctrl.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->mac_def->cfg_ppdu_status |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->mac_def->muedca_ctrl.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->mac_def->muedca_ctrl.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->mac_def->narrow_bw_ru_dis.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->mac_def->narrow_bw_ru_dis.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->mac_def->ra_agg_limit.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->mac_def->ra_agg_limit.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->mac_def->txcnt_limit.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->mac_def->txcnt_limit.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->mac_def->wow_ctrl.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->mac_def->wow_ctrl.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->mon_reg |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->nctl_table |
0,4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->nhm_report |
0,4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->nhm_th |
0,4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->ops |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->ops->stop_sch_tx |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->page_regs |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->phy_def |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->ampdu_miss.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->ampdu_miss.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->brk.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->brk.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->brk_option.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->brk_option.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->cca_spoofing.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->cca_spoofing.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->cck_brk.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->cck_brk.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->cck_cca.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->cck_cca.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->cck_sfd_gg.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->cck_sfd_gg.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->cck_sig_gg.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->cck_sig_gg.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->cck_spoofing.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->cck_spoofing.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->cck_txen.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->cck_txen.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->cck_txon.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->cck_txon.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->enable_all_cnt.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->enable_all_cnt.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->lsig_brk_l_th.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->lsig_brk_l_th.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->lsig_brk_s_th.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->lsig_brk_s_th.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->ofdm_cca.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->ofdm_cca.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->r1b_rr_sel.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->r1b_rr_sel.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->r1b_rx_rpt_rst.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->r1b_rx_rpt_rst.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->rst_all_cnt.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->rst_all_cnt.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->rxl_err_parity.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->rxl_err_parity.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->rxl_err_rate.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->rxl_err_rate.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->search_fail.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->pmac_regs->search_fail.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->pwr_off_seq->addr |
2,5-7,16,36,113,128,130-131,136,145-146,198,420,672,674,752-753 |
| PARAM_VALUE |
0 |
rtwdev->chip->pwr_on_seq |
0,4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->pwr_on_seq->addr |
2,5-7,16,36,113,128,130-131,136,145-146,198,420,672,674,752-753 |
| PARAM_VALUE |
0 |
rtwdev->chip->rfkill_get.addr |
0,96,501,512,1344,1436,1440,1448,1452,1840,3080,3084,3088,3092 |
| PARAM_VALUE |
0 |
rtwdev->chip->rfkill_get.mask |
0-4,7,15,17,32,63,128,240,255,511-512,992,1023,2044,3072,4032 |
| PARAM_VALUE |
0 |
rtwdev->chip->rfkill_init->mode.addr |
98,724,728,780,812,1792,3100,3132,3168,3180,3184,4768,4792,8200 |
| PARAM_VALUE |
0 |
rtwdev->chip->rfkill_init->mode.mask |
1-4,7-8,15-16,31-32,51,56,63-64,128,192,240,255-256,448,511-512 |
| PARAM_VALUE |
0 |
rtwdev->chip->rfkill_init->pinmux.addr |
98,724,728,780,812,1792,3100,3132,3168,3180,3184,4768,4792,8200 |
| PARAM_VALUE |
0 |
rtwdev->chip->rfkill_init->pinmux.mask |
1-4,7-8,15-16,31-32,51,56,63-64,128,192,240,255-256,448,511-512 |
| PARAM_VALUE |
0 |
rtwdev->chip->rrsr_cfgs |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->chip->rrsr_cfgs->ref_rate.addr |
98,724,728,780,812,1792,3100,3132,3168,3180,3184,4768,4792,8200 |
| PARAM_VALUE |
0 |
rtwdev->chip->rrsr_cfgs->ref_rate.mask |
1-4,7-8,15-16,31-32,51,56,63-64,128,192,240,255-256,448,511-512 |
| PARAM_VALUE |
0 |
rtwdev->chip->rrsr_cfgs->rsc.addr |
98,724,728,780,812,1792,3100,3132,3168,3180,3184,4768,4792,8200 |
| PARAM_VALUE |
0 |
rtwdev->chip->rrsr_cfgs->rsc.mask |
1-4,7-8,15-16,31-32,51,56,63-64,128,192,240,255-256,448,511-512 |
| PARAM_VALUE |
0 |
rtwdev->chip->xtal_info |
0,4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->hci.ops->deinit |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->hci.ops->pause |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->hci.ops->read16 |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->hci.ops->read32 |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->hci.ops->read8 |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->hci.ops->start |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->hci.ops->stop |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->hci.ops->write16 |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->hci.ops->write32 |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->hci.ops->write8 |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->io->do_mdelay |
0,4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->io->do_udelay |
0,4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->io->pack |
0,4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->io->phy_write32 |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->io->unpack |
0,4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->io->write16 |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->io->write32 |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->io->write8 |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->io->write_rf |
4096-ptr_max |
| PARAM_VALUE |
0 |
rtwdev->priv->continual_io_error.counter |
s32min-s32max |
| PARAM_VALUE |
0 |
rtwdev->rfk_mcc.data->table_idx |
0-2 |
| PARAM_VALUE |
1 |
rx_path |
0-1,4 |
| PARAM_VALUE |
2 |
phy_idx |
0-1 |
| DATA_SOURCE |
0 |
rtwdev |
$0 |
| DATA_SOURCE |
1 |
rx_path |
$3 |
| FUZZY_MAX |
1 |
rx_path |
4 |
| FUZZY_MAX |
2 |
phy_idx |
1 |
| BIT_INFO |
1 |
rx_path |
0x0,0x5 |
| HARD_MAX |
1 |
rx_path |
4 |
| NOCHECK_CALL |
|
|
|