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Defined in 2 files as a prototype:

Defined in 2 files as a function:

Referenced in 2 files:

Smatch caller information:

drivers/net/wireless/intel/iwlwifi/dvm/rs.c rs_tx_status() -> rs_rate_scale_perform()

Type Parameter Key Value
PARAM_VALUE 0 mvm 4096-ptr_max
PARAM_VALUE 1 sta 4096-ptr_max
PARAM_VALUE 1 sta->cb->flags 64-u32max
PARAM_VALUE 1 sta->cb->status.antenna 0-7
PARAM_VALUE 1 sta->cb->status.rates 4096-ptr_max
PARAM_VALUE 1 sta->data 4096-ptr_max
PARAM_VALUE 2 lq_sta 4096-ptr_max
PARAM_VALUE 2 lq_sta->deflink.supp_rates 4096-ptr_max
PARAM_VALUE 2 lq_sta->drv_priv 4096-ptr_max
PARAM_VALUE 3 tid 4096-ptr_max
PARAM_VALUE 3 tid->drv 1-u64max
PARAM_VALUE 3 tid->lq.rs_table 4096-ptr_max
PARAM_VALUE 3 tid->lq_info 4096-ptr_max
PARAM_VALUE 3 tid->missed_rate_counter 0
BUF_SIZE 1 sta (-1)-s32max
BUF_SIZE 1 sta (-1)-s32max
BUF_SIZE 2 lq_sta (-1)-0,600
BUF_SIZE 2 lq_sta (-1)-0,600
DATA_SOURCE 1 sta $4
DATA_SOURCE 2 lq_sta $2
DATA_SOURCE 3 tid $3
TASK_NOT_RUNNING
NOCHECK_CALL
LOCK2 &sta->rate_ctrl_lock
LOCK2 bh
HALF_LOCKED2 &dev->mac_lock
HALF_LOCKED2 &dev->mt76.rx_lock
HALF_LOCKED2 &dev->rx_lock
HALF_LOCKED2 &pool->lock
HALF_LOCKED2 rcu_read
TYPE_LOCK (struct sta_info)->rate_ctrl_lock

drivers/net/wireless/intel/iwlwifi/mvm/rs.c __iwl_mvm_rs_tx_status() -> rs_rate_scale_perform()

Type Parameter Key Value
PARAM_VALUE 0 mvm 4096-ptr_max
PARAM_VALUE 0 mvm->fwrt.dev->cma_area->nranges s32min-s32max
PARAM_VALUE 0 mvm->fwrt.trans->dev->cma_area->nranges s32min-s32max
PARAM_VALUE 0 mvm->fwrt.trans->dev->dma_io_tlb_mem->can_grow 0-1
PARAM_VALUE 0 mvm->fwrt.trans->mac_cfg->base->mon_dbgi_regs.cur_frag.addr 0,1364689,10501156,10501160,10504044,10504052,10674504,13646876,13646892
PARAM_VALUE 0 mvm->fwrt.trans->mac_cfg->base->mon_dbgi_regs.cycle_cnt.addr 0,1364689,10501156,10501160,10504044,10504052,10674504,13646876,13646892
PARAM_VALUE 0 mvm->fwrt.trans->mac_cfg->base->mon_dbgi_regs.write_ptr.addr 0,1364689,10501156,10501160,10504044,10504052,10674504,13646876,13646892
PARAM_VALUE 0 mvm->fwrt.trans->mac_cfg->base->mon_dram_regs.cur_frag.addr 0,1364689,10501156,10501160,10504044,10504052,10674504,13646876,13646892
PARAM_VALUE 0 mvm->fwrt.trans->mac_cfg->base->mon_dram_regs.cycle_cnt.addr 0,1364689,10501156,10501160,10504044,10504052,10674504,13646876,13646892
PARAM_VALUE 0 mvm->fwrt.trans->mac_cfg->base->mon_dram_regs.write_ptr.addr 0,1364689,10501156,10501160,10504044,10504052,10674504,13646876,13646892
PARAM_VALUE 0 mvm->fwrt.trans->mac_cfg->base->mon_smem_regs.cur_frag.addr 0,1364689,10501156,10501160,10504044,10504052,10674504,13646876,13646892
PARAM_VALUE 0 mvm->fwrt.trans->mac_cfg->base->mon_smem_regs.cycle_cnt.addr 0,1364689,10501156,10501160,10504044,10504052,10674504,13646876,13646892
PARAM_VALUE 0 mvm->fwrt.trans->mac_cfg->base->mon_smem_regs.write_ptr.addr 0,1364689,10501156,10501160,10504044,10504052,10674504,13646876,13646892
PARAM_VALUE 0 mvm->fwrt.trans->mac_cfg->base->num_of_queues 20,31,512
PARAM_VALUE 0 mvm->fwrt.trans->mac_cfg->base->ucode_api_min 0,30,77,89,1102
PARAM_VALUE 0 mvm->trans->dev->cma_area->available_count 0-s64max
PARAM_VALUE 0 mvm->trans->dev->cma_area->nranges s32min-s32max
PARAM_VALUE 0 mvm->trans->dev->dma_io_tlb_mem->can_grow 0-1
PARAM_VALUE 0 mvm->trans->mac_cfg->base->mon_dbgi_regs.cur_frag.addr 0,10501156,10501160,10504044,10504052,10674504,13646876,13646892
PARAM_VALUE 0 mvm->trans->mac_cfg->base->mon_dbgi_regs.cycle_cnt.addr 0,10501156,10501160,10504044,10504052,10674504,13646876,13646892
PARAM_VALUE 0 mvm->trans->mac_cfg->base->mon_dbgi_regs.write_ptr.addr 0,10501156,10501160,10504044,10504052,10674504,13646876,13646892
PARAM_VALUE 0 mvm->trans->mac_cfg->base->mon_dram_regs.cur_frag.addr 0,10501156,10501160,10504044,10504052,10674504,13646876,13646892
PARAM_VALUE 0 mvm->trans->mac_cfg->base->mon_dram_regs.cycle_cnt.addr 0,10501156,10501160,10504044,10504052,10674504,13646876,13646892
PARAM_VALUE 0 mvm->trans->mac_cfg->base->mon_dram_regs.write_ptr.addr 0,10501156,10501160,10504044,10504052,10674504,13646876,13646892
PARAM_VALUE 0 mvm->trans->mac_cfg->base->mon_smem_regs.cur_frag.addr 0,10501156,10501160,10504044,10504052,10674504,13646876,13646892
PARAM_VALUE 0 mvm->trans->mac_cfg->base->mon_smem_regs.cycle_cnt.addr 0,10501156,10501160,10504044,10504052,10674504,13646876,13646892
PARAM_VALUE 0 mvm->trans->mac_cfg->base->mon_smem_regs.write_ptr.addr 0,10501156,10501160,10504044,10504052,10674504,13646876,13646892
PARAM_VALUE 0 mvm->trans->mac_cfg->base->wd_timeout 0,2500,10000
PARAM_VALUE 1 sta 4096-ptr_max
PARAM_VALUE 1 sta->deflink.supp_rates 4096-ptr_max
PARAM_VALUE 2 lq_sta 4096-ptr_max
PARAM_VALUE 2 lq_sta->last_rate_n_flags 1-u32max
PARAM_VALUE 2 lq_sta->lq.rs_table 4096-ptr_max
PARAM_VALUE 2 lq_sta->lq_info 4096-ptr_max
PARAM_VALUE 2 lq_sta->missed_rate_counter 0
PARAM_VALUE 2 lq_sta->pers.dbg_fixed_rate 0
PARAM_VALUE 2 lq_sta->pers.drv 1-u64max
PARAM_VALUE 3 tid 0-8
BUF_SIZE 1 sta (-1)-0,600
BUF_SIZE 1 sta (-1)-0,600
BUF_SIZE 2 lq_sta 4168
DATA_SOURCE 0 mvm $0
DATA_SOURCE 1 sta $1
DATA_SOURCE 3 tid $2
DATA_SOURCE 4 ndp $4
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
USER_DATA 3 tid 0-8[c]
LOCK2 &mvmsta->deflink.lq_sta.rs_drv.pers.lock
LOCK2 bh
HALF_LOCKED2 &sta->rate_ctrl_lock
HALF_LOCKED2 rcu_read
HALF_LOCKED2 0 &mvm->mutex
TYPE_LOCK (struct lq_sta_pers)->lock