| PARAM_VALUE |
0 |
dd |
4096-ptr_max |
| PARAM_VALUE |
0 |
dd->asic_data->asic_resource_mutex.dep_map->name |
0-255 |
| PARAM_VALUE |
0 |
dd->asic_data->asic_resource_mutex.first_waiter->list.prev->next |
5159360019465732096 |
| PARAM_VALUE |
0 |
dd->asic_data->asic_resource_mutex.osq.tail.counter |
0-s32max |
| PARAM_VALUE |
0 |
dd->asic_data->asic_resource_mutex.wait_lock.dep_map->name |
0-255 |
| PARAM_VALUE |
0 |
dd->asic_data->asic_resource_mutex.wait_lock.owner |
(-1) |
| PARAM_VALUE |
0 |
dd->asic_data->asic_resource_mutex.wait_lock.owner_cpu |
u32max |
| PARAM_VALUE |
0 |
dd->pcidev->bus->self->link_bwctrl->cdev |
0-s64max |
| PARAM_VALUE |
0 |
dd->pcidev->dev.cma_area->nranges |
s32min-s32max |
| PARAM_VALUE |
0 |
dd->pcidev->link_bwctrl->cdev |
(-4095)-s64max |
| PARAM_VALUE |
0 |
dd->pcidev->subordinate->self->link_bwctrl->cdev |
0-s64max |
| CAPPED_DATA |
0 |
&dd->asic_data->asic_resource_mutex |
1 |
| DATA_SOURCE |
0 |
dd |
$0 |
| RX_PATH |
|
|
|
| TASK_NOT_RUNNING |
|
|
|
| NOCHECK_CALL |
|
|
|
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->aspm_disabled_cnt.counter |
s32min-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->aspm_enabled |
0-1 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->aspm_supported |
0-1 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->base_guid |
0-u64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->cntrnameslen |
0-u64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->comp_vect_possible_cpus |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->ctx0_seq_drop |
0-u64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->dc8051_lock.osq.tail.counter |
0 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->dc8051_lock.owner.counter |
0 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->dc8051_timed_out |
s32min-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->dc8051_ver |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->dc_shutdown |
0-255 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->default_desc1 |
0-u64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->diag_cdev.count |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->diag_cdev.dev |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->diag_cdev.kobj.release.cpu |
s32min-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->diag_cdev.kobj.release.timer.expires |
0-u64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->diag_cdev.kobj.release.timer.flags |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->diag_cdev.kobj.state_add_uevent_sent |
0-1 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->diag_cdev.kobj.state_in_sysfs |
0-1 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->diag_cdev.kobj.state_initialized |
0-1 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->diag_cdev.kobj.state_remove_uevent_sent |
0-1 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->diag_cdev.kobj.uevent_suppress |
0-1 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->do_drop |
0-1 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->drop_packet.counter |
s32min-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->eprom_available |
0-1 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->err_info_fmconfig |
0-255 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->err_info_rcv_constraint.pkey |
0-u16max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->err_info_rcv_constraint.slid |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->err_info_rcv_constraint.status |
0-255 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->err_info_rcvport.packet_flit1 |
0-u64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->err_info_rcvport.packet_flit2 |
0-u64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->err_info_rcvport.status_and_code |
0-255 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->err_info_uncorrectable |
0-255 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->err_info_xmit_constraint.pkey |
0-u16max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->err_info_xmit_constraint.slid |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->err_info_xmit_constraint.status |
0-255 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->first_dyn_alloc_ctxt |
0-255 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->flags |
0-u16max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->freectxts |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->hfi1_id |
0-1 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->icode |
0-1,3-255 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->ipoib_rsm_usr_num.counter |
0 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->irev |
0-u16max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->last_rx |
0-u64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->last_tx |
0-u64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->lbus_speed |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->lbus_width |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->lcb_access_count |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->lcb_err_en |
0-u64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->link_credits |
0-u16max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->link_gen3_capable |
0-255 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->msix_info.max_requested |
0-u16max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->n_krcv_queues |
0-255 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->ndevcntrs |
0-u64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->node |
s32min-(-2),0-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->nportcntrs |
0-u64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->num_netdev_contexts |
0-u16max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->num_pports |
1 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->num_rcv_contexts |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->num_sdma |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->num_send_contexts |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->num_user_contexts |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->oui1 |
0-255 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->oui2 |
0-255 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->oui3 |
0-255 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->pcfg_cache.cache_valid |
0-255 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->pci_command |
0 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->pci_msix0 |
0 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->pci_rom |
0 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->pci_tph2 |
0 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->pcibar0 |
0 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->pcibar1 |
0 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->pcie_devctl |
0 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->pcie_devctl2 |
0 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->pcie_lnkctl |
0 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->platform_config.size |
0-u64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->portcntrnameslen |
0-u64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->psxmitwait_check_rate |
0-u16max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->qos_shift |
0-255 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->rcv_entries.group_size |
0-255 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->rcv_entries.nctxt_extra |
0-u16max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->rcv_entries.ngroups |
0-u16max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->rcv_ovfl_cnt |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->rcverr_timer.expires |
0-u64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->rcverr_timer.flags |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->rcvhdrtail_dummy_dma |
0-u64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->sc2vl_lock.seqcount.seqcount.sequence |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->sdma_heads_phys |
0-u64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->sdma_heads_size |
0-u64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->sdma_pad_phys |
0-u64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->sdma_unfreeze_count.counter |
s32min-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->sw_cce_err_status_aggregate |
0-u64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->sw_rcv_bypass_packet_errors |
0-u64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->synth_stats_timer.expires |
0-u64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->synth_stats_timer.flags |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->ui_cdev.count |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->ui_cdev.dev |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->ui_cdev.kobj.kref.refcount.refs.counter |
s32min-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->ui_cdev.kobj.release.cpu |
s32min-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->ui_cdev.kobj.release.timer.expires |
0-u64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->ui_cdev.kobj.release.timer.flags |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->ui_cdev.kobj.release.work.data.counter |
s64min-s64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->ui_cdev.kobj.state_add_uevent_sent |
0-1 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->ui_cdev.kobj.state_in_sysfs |
0-1 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->ui_cdev.kobj.state_initialized |
0-1 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->ui_cdev.kobj.state_remove_uevent_sent |
0-1 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->ui_cdev.kobj.uevent_suppress |
0-1 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->unit |
s32min-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->update_cntr_work.data.counter |
s64min-s64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->user_cdev.count |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->user_cdev.dev |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->user_cdev.kobj.release.cpu |
s32min-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->user_cdev.kobj.release.timer.expires |
0-u64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->user_cdev.kobj.release.timer.flags |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->user_cdev.kobj.state_add_uevent_sent |
0-1 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->user_cdev.kobj.state_in_sysfs |
0-1 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->user_cdev.kobj.state_initialized |
0-1 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->user_cdev.kobj.state_remove_uevent_sent |
0-1 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->user_cdev.kobj.uevent_suppress |
0-1 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->user_comp.done |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->user_comp.wait.lock.magic |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->user_comp.wait.lock.owner_cpu |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->user_comp.wait.lock.raw_lock.locked |
0-255 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->user_comp.wait.lock.raw_lock.pending |
0-255 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->user_comp.wait.lock.raw_lock.tail |
0-u16max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->user_refcount.refs.counter |
s32min-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->vau |
0-255 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->vcu |
0-255 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.mem_timer.expires |
0-u64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.mem_timer.flags |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.n_kmem_wait |
0-u64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.n_piodrain |
0-u64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.n_piowait |
0-u64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.n_tidwait |
0-u64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.n_txwait |
0-u64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.busy_jiffies |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.dparms.core_cap_flags |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.dparms.extra_rdma_atomic |
0-255 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.dparms.lkey_table_size |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.dparms.max_mad_size |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.dparms.max_rdma_atomic |
0-255 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.dparms.node |
s32min-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.dparms.npkeys |
s32min-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.dparms.nports |
s32min-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.dparms.props.atomic_cap |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.dparms.props.fw_ver |
0-u64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.dparms.props.hw_ver |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.dparms.props.max_ah |
0-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.dparms.props.max_cq |
0-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.dparms.props.max_cqe |
0-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.dparms.props.max_dm_size |
0-u64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.dparms.props.max_ee |
0-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.dparms.props.max_mr |
0-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.dparms.props.max_mr_size |
0-u64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.dparms.props.max_mw |
0-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.dparms.props.max_pd |
0-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.dparms.props.max_pkeys |
0-u16max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.dparms.props.max_qp |
0-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.dparms.props.max_qp_wr |
0-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.dparms.props.max_rdd |
0-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.dparms.props.max_recv_sge |
0-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.dparms.props.max_send_sge |
0-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.dparms.props.max_sge_rd |
0-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.dparms.props.max_sgl_rd |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.dparms.props.max_srq |
0-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.dparms.props.max_srq_sge |
0-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.dparms.props.max_srq_wr |
0-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.dparms.props.sig_prot_cap |
s32min-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.dparms.props.vendor_id |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.dparms.psn_mask |
s32min-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.dparms.psn_modify_mask |
s32min-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.dparms.psn_shift |
s32min-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.dparms.qos_shift |
0-255 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.dparms.qp_table_size |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.dparms.qpn_inc |
s32min-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.dparms.qpn_res_end |
s32min-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.dparms.qpn_res_start |
s32min-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.dparms.qpn_start |
s32min-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.dparms.sge_copy_mode |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.dparms.wss_clean_period |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.dparms.wss_threshold |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.flags |
s32min-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.ibdev.attrs.atomic_cap |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.ibdev.attrs.fw_ver |
0-u64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.ibdev.attrs.hw_ver |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.ibdev.attrs.max_ah |
0-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.ibdev.attrs.max_cq |
0-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.ibdev.attrs.max_cqe |
0-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.ibdev.attrs.max_dm_size |
0-u64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.ibdev.attrs.max_ee |
0-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.ibdev.attrs.max_mcast_grp |
0-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.ibdev.attrs.max_mr |
0-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.ibdev.attrs.max_mr_size |
0-u64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.ibdev.attrs.max_mw |
0-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.ibdev.attrs.max_pd |
0-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.ibdev.attrs.max_pkeys |
0-u16max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.ibdev.attrs.max_qp |
0-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.ibdev.attrs.max_qp_wr |
0-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.ibdev.attrs.max_rdd |
0-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.ibdev.attrs.max_recv_sge |
0-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.ibdev.attrs.max_send_sge |
0-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.ibdev.attrs.max_sge_rd |
0-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.ibdev.attrs.max_sgl_rd |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.ibdev.attrs.max_srq |
0-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.ibdev.attrs.max_srq_sge |
0-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.ibdev.attrs.max_srq_wr |
0-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.ibdev.attrs.page_size_cap |
0-u64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.ibdev.attrs.sig_guard_cap |
s32min-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.ibdev.attrs.sig_prot_cap |
s32min-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.ibdev.attrs.tm_caps.flags |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.ibdev.attrs.vendor_id |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.ibdev.cache_lock.magic |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.ibdev.cc_dma_bounce |
0-1 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.ibdev.coredev.dev.devt |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.ibdev.coredev.dev.id |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.ibdev.dev.bus_dma_limit |
0-u64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.ibdev.dev.devt |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.ibdev.dev.dma_uses_io_tlb |
0-1 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.ibdev.dev.id |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.ibdev.dev.links.status |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.ibdev.dev.numa_node |
s32min-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.ibdev.dev.power.irq_safe |
0-1 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.ibdev.dev.power.last_busy |
0-u64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.ibdev.dev.power.no_pm |
0-1 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.ibdev.dev.power.request |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.ibdev.dev.power.syscore |
0-1 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.ibdev.dev.removable |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.ibdev.hw_stats_attr_index |
0-255 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.ibdev.index |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.ibdev.is_switch |
0-1 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.ibdev.iw_driver_flags |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.ibdev.kverbs_provider |
0-1 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.ibdev.lag_flags |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.ibdev.local_dma_lkey |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.ibdev.name_assign_type |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.ibdev.node_guid |
0-u64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.ibdev.node_type |
0-255 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.ibdev.num_comp_vectors |
s32min-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.ibdev.ops.driver_id |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.ibdev.ops.size_ib_ah |
0-u64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.ibdev.ops.size_ib_cq |
0-u64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.ibdev.ops.size_ib_dmah |
0-u64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.ibdev.ops.size_ib_mw |
0-u64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.ibdev.ops.size_ib_pd |
0-u64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.ibdev.ops.size_ib_qp |
0-u64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.ibdev.ops.size_ib_srq |
0-u64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.ibdev.ops.size_ib_xrcd |
0-u64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.ibdev.ops.uverbs_abi_ver |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.ibdev.phys_port_cnt |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.ibdev.type |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.ibdev.use_cq_dim |
0-1 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.ibdev.uverbs_cmd_mask |
0-u64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.lkey_table.gen |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.lkey_table.max |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.lkey_table.next |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.lkey_table.shift |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.mmap_offset |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.n_ahs_allocated |
s32min-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.n_cqs_allocated |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.n_mcast_grps_allocated |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.n_pds_allocated |
s32min-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.n_qps_allocated |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.n_rc_qps |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->verbs_dev.rdi.n_srqs_allocated |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->vl15_init |
0-u16max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->vl15buf_cached |
0-u16max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->z_int_counter |
0-u64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->z_rcv_limit |
0-u64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus0->controlling_dd->z_send_schedule |
0-u64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->aspm_disabled_cnt.counter |
s32min-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->aspm_enabled |
0-1 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->aspm_supported |
0-1 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->base_guid |
0-u64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->cntrnameslen |
0-u64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->comp_vect_possible_cpus |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->ctx0_seq_drop |
0-u64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->dc8051_lock.osq.tail.counter |
0 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->dc8051_lock.owner.counter |
0 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->dc8051_timed_out |
s32min-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->dc8051_ver |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->dc_shutdown |
0-255 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->default_desc1 |
0-u64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->diag_cdev.count |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->diag_cdev.dev |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->diag_cdev.kobj.release.cpu |
s32min-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->diag_cdev.kobj.release.timer.expires |
0-u64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->diag_cdev.kobj.release.timer.flags |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->diag_cdev.kobj.state_add_uevent_sent |
0-1 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->diag_cdev.kobj.state_in_sysfs |
0-1 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->diag_cdev.kobj.state_initialized |
0-1 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->diag_cdev.kobj.state_remove_uevent_sent |
0-1 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->diag_cdev.kobj.uevent_suppress |
0-1 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->do_drop |
0-1 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->drop_packet.counter |
s32min-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->eprom_available |
0-1 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->err_info_fmconfig |
0-255 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->err_info_rcv_constraint.pkey |
0-u16max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->err_info_rcv_constraint.slid |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->err_info_rcv_constraint.status |
0-255 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->err_info_rcvport.packet_flit1 |
0-u64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->err_info_rcvport.packet_flit2 |
0-u64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->err_info_rcvport.status_and_code |
0-255 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->err_info_uncorrectable |
0-255 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->err_info_xmit_constraint.pkey |
0-u16max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->err_info_xmit_constraint.slid |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->err_info_xmit_constraint.status |
0-255 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->first_dyn_alloc_ctxt |
0-255 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->flags |
0-u16max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->freectxts |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->hfi1_id |
0-1 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->icode |
0-1,3-255 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->ipoib_rsm_usr_num.counter |
0 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->irev |
0-u16max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->last_rx |
0-u64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->last_tx |
0-u64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->lbus_speed |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->lbus_width |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->lcb_access_count |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->lcb_err_en |
0-u64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->link_credits |
0-u16max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->link_gen3_capable |
0-255 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->msix_info.max_requested |
0-u16max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->n_krcv_queues |
0-255 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->ndevcntrs |
0-u64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->node |
s32min-(-2),0-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->nportcntrs |
0-u64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->num_netdev_contexts |
0-u16max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->num_pports |
1 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->num_rcv_contexts |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->num_sdma |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->num_send_contexts |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->num_user_contexts |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->oui1 |
0-255 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->oui2 |
0-255 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->oui3 |
0-255 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->pcfg_cache.cache_valid |
0-255 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->pci_command |
0 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->pci_msix0 |
0 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->pci_rom |
0 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->pci_tph2 |
0 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->pcibar0 |
0 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->pcibar1 |
0 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->pcie_devctl |
0 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->pcie_devctl2 |
0 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->pcie_lnkctl |
0 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->platform_config.size |
0-u64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->portcntrnameslen |
0-u64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->psxmitwait_check_rate |
0-u16max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->qos_shift |
0-255 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->rcv_entries.group_size |
0-255 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->rcv_entries.nctxt_extra |
0-u16max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->rcv_entries.ngroups |
0-u16max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->rcv_ovfl_cnt |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->rcverr_timer.expires |
0-u64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->rcverr_timer.flags |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->rcvhdrtail_dummy_dma |
0-u64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->sc2vl_lock.seqcount.seqcount.sequence |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->sdma_heads_phys |
0-u64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->sdma_heads_size |
0-u64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->sdma_pad_phys |
0-u64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->sdma_unfreeze_count.counter |
s32min-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->sw_cce_err_status_aggregate |
0-u64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->sw_rcv_bypass_packet_errors |
0-u64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->synth_stats_timer.expires |
0-u64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->synth_stats_timer.flags |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->ui_cdev.count |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->ui_cdev.dev |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->ui_cdev.kobj.kref.refcount.refs.counter |
s32min-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->ui_cdev.kobj.release.cpu |
s32min-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->ui_cdev.kobj.release.timer.expires |
0-u64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->ui_cdev.kobj.release.timer.flags |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->ui_cdev.kobj.release.work.data.counter |
s64min-s64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->ui_cdev.kobj.state_add_uevent_sent |
0-1 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->ui_cdev.kobj.state_in_sysfs |
0-1 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->ui_cdev.kobj.state_initialized |
0-1 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->ui_cdev.kobj.state_remove_uevent_sent |
0-1 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->ui_cdev.kobj.uevent_suppress |
0-1 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->unit |
s32min-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->update_cntr_work.data.counter |
s64min-s64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->user_cdev.count |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->user_cdev.dev |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->user_cdev.kobj.release.cpu |
s32min-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->user_cdev.kobj.release.timer.expires |
0-u64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->user_cdev.kobj.release.timer.flags |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->user_cdev.kobj.state_add_uevent_sent |
0-1 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->user_cdev.kobj.state_in_sysfs |
0-1 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->user_cdev.kobj.state_initialized |
0-1 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->user_cdev.kobj.state_remove_uevent_sent |
0-1 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->user_cdev.kobj.uevent_suppress |
0-1 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->user_comp.done |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->user_comp.wait.lock.magic |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->user_comp.wait.lock.owner_cpu |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->user_comp.wait.lock.raw_lock.locked |
0-255 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->user_comp.wait.lock.raw_lock.pending |
0-255 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->user_comp.wait.lock.raw_lock.tail |
0-u16max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->user_refcount.refs.counter |
s32min-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->vau |
0-255 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->vcu |
0-255 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.mem_timer.expires |
0-u64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.mem_timer.flags |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.n_kmem_wait |
0-u64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.n_piodrain |
0-u64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.n_piowait |
0-u64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.n_tidwait |
0-u64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.n_txwait |
0-u64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.busy_jiffies |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.dparms.core_cap_flags |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.dparms.extra_rdma_atomic |
0-255 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.dparms.lkey_table_size |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.dparms.max_mad_size |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.dparms.max_rdma_atomic |
0-255 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.dparms.node |
s32min-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.dparms.npkeys |
s32min-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.dparms.nports |
s32min-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.dparms.props.atomic_cap |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.dparms.props.fw_ver |
0-u64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.dparms.props.hw_ver |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.dparms.props.max_ah |
0-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.dparms.props.max_cq |
0-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.dparms.props.max_cqe |
0-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.dparms.props.max_dm_size |
0-u64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.dparms.props.max_ee |
0-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.dparms.props.max_mr |
0-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.dparms.props.max_mr_size |
0-u64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.dparms.props.max_mw |
0-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.dparms.props.max_pd |
0-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.dparms.props.max_pkeys |
0-u16max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.dparms.props.max_qp |
0-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.dparms.props.max_qp_wr |
0-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.dparms.props.max_rdd |
0-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.dparms.props.max_recv_sge |
0-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.dparms.props.max_send_sge |
0-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.dparms.props.max_sge_rd |
0-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.dparms.props.max_sgl_rd |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.dparms.props.max_srq |
0-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.dparms.props.max_srq_sge |
0-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.dparms.props.max_srq_wr |
0-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.dparms.props.sig_prot_cap |
s32min-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.dparms.props.vendor_id |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.dparms.psn_mask |
s32min-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.dparms.psn_modify_mask |
s32min-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.dparms.psn_shift |
s32min-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.dparms.qos_shift |
0-255 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.dparms.qp_table_size |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.dparms.qpn_inc |
s32min-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.dparms.qpn_res_end |
s32min-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.dparms.qpn_res_start |
s32min-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.dparms.qpn_start |
s32min-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.dparms.sge_copy_mode |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.dparms.wss_clean_period |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.dparms.wss_threshold |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.flags |
s32min-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.ibdev.attrs.atomic_cap |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.ibdev.attrs.fw_ver |
0-u64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.ibdev.attrs.hw_ver |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.ibdev.attrs.max_ah |
0-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.ibdev.attrs.max_cq |
0-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.ibdev.attrs.max_cqe |
0-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.ibdev.attrs.max_dm_size |
0-u64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.ibdev.attrs.max_ee |
0-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.ibdev.attrs.max_mcast_grp |
0-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.ibdev.attrs.max_mr |
0-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.ibdev.attrs.max_mr_size |
0-u64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.ibdev.attrs.max_mw |
0-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.ibdev.attrs.max_pd |
0-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.ibdev.attrs.max_pkeys |
0-u16max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.ibdev.attrs.max_qp |
0-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.ibdev.attrs.max_qp_wr |
0-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.ibdev.attrs.max_rdd |
0-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.ibdev.attrs.max_recv_sge |
0-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.ibdev.attrs.max_send_sge |
0-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.ibdev.attrs.max_sge_rd |
0-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.ibdev.attrs.max_sgl_rd |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.ibdev.attrs.max_srq |
0-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.ibdev.attrs.max_srq_sge |
0-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.ibdev.attrs.max_srq_wr |
0-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.ibdev.attrs.page_size_cap |
0-u64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.ibdev.attrs.sig_guard_cap |
s32min-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.ibdev.attrs.sig_prot_cap |
s32min-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.ibdev.attrs.tm_caps.flags |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.ibdev.attrs.vendor_id |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.ibdev.cache_lock.magic |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.ibdev.cc_dma_bounce |
0-1 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.ibdev.coredev.dev.devt |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.ibdev.coredev.dev.id |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.ibdev.dev.bus_dma_limit |
0-u64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.ibdev.dev.devt |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.ibdev.dev.dma_uses_io_tlb |
0-1 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.ibdev.dev.id |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.ibdev.dev.links.status |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.ibdev.dev.numa_node |
s32min-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.ibdev.dev.power.irq_safe |
0-1 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.ibdev.dev.power.last_busy |
0-u64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.ibdev.dev.power.no_pm |
0-1 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.ibdev.dev.power.request |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.ibdev.dev.power.syscore |
0-1 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.ibdev.dev.removable |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.ibdev.hw_stats_attr_index |
0-255 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.ibdev.index |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.ibdev.is_switch |
0-1 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.ibdev.iw_driver_flags |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.ibdev.kverbs_provider |
0-1 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.ibdev.lag_flags |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.ibdev.local_dma_lkey |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.ibdev.name_assign_type |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.ibdev.node_guid |
0-u64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.ibdev.node_type |
0-255 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.ibdev.num_comp_vectors |
s32min-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.ibdev.ops.driver_id |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.ibdev.ops.size_ib_ah |
0-u64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.ibdev.ops.size_ib_cq |
0-u64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.ibdev.ops.size_ib_dmah |
0-u64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.ibdev.ops.size_ib_mw |
0-u64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.ibdev.ops.size_ib_pd |
0-u64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.ibdev.ops.size_ib_qp |
0-u64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.ibdev.ops.size_ib_srq |
0-u64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.ibdev.ops.size_ib_xrcd |
0-u64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.ibdev.ops.uverbs_abi_ver |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.ibdev.phys_port_cnt |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.ibdev.type |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.ibdev.use_cq_dim |
0-1 |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.ibdev.uverbs_cmd_mask |
0-u64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.lkey_table.gen |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.lkey_table.max |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.lkey_table.next |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.lkey_table.shift |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.mmap_offset |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.n_ahs_allocated |
s32min-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.n_cqs_allocated |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.n_mcast_grps_allocated |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.n_pds_allocated |
s32min-s32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.n_qps_allocated |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.n_rc_qps |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->verbs_dev.rdi.n_srqs_allocated |
0-u32max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->vl15_init |
0-u16max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->vl15buf_cached |
0-u16max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->z_int_counter |
0-u64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->z_rcv_limit |
0-u64max |
| HOST_DATA |
0 |
dd->asic_data->i2c_bus1->controlling_dd->z_send_schedule |
0-u64max |
| HOST_DATA |
0 |
dd->aspm_disabled_cnt.counter |
s32min-s32max |
| HOST_DATA |
0 |
dd->aspm_enabled |
0-1 |
| HOST_DATA |
0 |
dd->aspm_supported |
0-1 |
| HOST_DATA |
0 |
dd->base_guid |
0-u64max |
| HOST_DATA |
0 |
dd->cntrnameslen |
0-u64max |
| HOST_DATA |
0 |
dd->comp_vect_possible_cpus |
0-u32max |
| HOST_DATA |
0 |
dd->ctx0_seq_drop |
0-u64max |
| HOST_DATA |
0 |
dd->dc8051_lock.osq.tail.counter |
0 |
| HOST_DATA |
0 |
dd->dc8051_lock.owner.counter |
0 |
| HOST_DATA |
0 |
dd->dc8051_timed_out |
s32min-s32max |
| HOST_DATA |
0 |
dd->dc8051_ver |
0-u32max |
| HOST_DATA |
0 |
dd->dc_shutdown |
0-255 |
| HOST_DATA |
0 |
dd->default_desc1 |
0-u64max |
| HOST_DATA |
0 |
dd->diag_cdev.count |
0-u32max |
| HOST_DATA |
0 |
dd->diag_cdev.dev |
0-u32max |
| HOST_DATA |
0 |
dd->diag_cdev.kobj.kref.refcount.refs.counter |
s32min-s32max |
| HOST_DATA |
0 |
dd->diag_cdev.kobj.release.cpu |
s32min-s32max |
| HOST_DATA |
0 |
dd->diag_cdev.kobj.release.timer.expires |
0-u64max |
| HOST_DATA |
0 |
dd->diag_cdev.kobj.release.timer.flags |
0-u32max |
| HOST_DATA |
0 |
dd->diag_cdev.kobj.release.work.data.counter |
s64min-s64max |
| HOST_DATA |
0 |
dd->diag_cdev.kobj.state_add_uevent_sent |
0-1 |
| HOST_DATA |
0 |
dd->diag_cdev.kobj.state_in_sysfs |
0-1 |
| HOST_DATA |
0 |
dd->diag_cdev.kobj.state_initialized |
0-1 |
| HOST_DATA |
0 |
dd->diag_cdev.kobj.state_remove_uevent_sent |
0-1 |
| HOST_DATA |
0 |
dd->diag_cdev.kobj.uevent_suppress |
0-1 |
| HOST_DATA |
0 |
dd->do_drop |
0-1 |
| HOST_DATA |
0 |
dd->drop_packet.counter |
s32min-s32max |
| HOST_DATA |
0 |
dd->eprom_available |
1 |
| HOST_DATA |
0 |
dd->err_info_fmconfig |
0-255 |
| HOST_DATA |
0 |
dd->err_info_rcv_constraint.pkey |
0-u16max |
| HOST_DATA |
0 |
dd->err_info_rcv_constraint.slid |
0-u32max |
| HOST_DATA |
0 |
dd->err_info_rcv_constraint.status |
0-255 |
| HOST_DATA |
0 |
dd->err_info_rcvport.packet_flit1 |
0-u64max |
| HOST_DATA |
0 |
dd->err_info_rcvport.packet_flit2 |
0-u64max |
| HOST_DATA |
0 |
dd->err_info_rcvport.status_and_code |
0-255 |
| HOST_DATA |
0 |
dd->err_info_uncorrectable |
0-255 |
| HOST_DATA |
0 |
dd->err_info_xmit_constraint.pkey |
0-u16max |
| HOST_DATA |
0 |
dd->err_info_xmit_constraint.slid |
0-u32max |
| HOST_DATA |
0 |
dd->err_info_xmit_constraint.status |
0-255 |
| HOST_DATA |
0 |
dd->first_dyn_alloc_ctxt |
0-255 |
| HOST_DATA |
0 |
dd->flags |
0-u16max |
| HOST_DATA |
0 |
dd->freectxts |
0-u32max |
| HOST_DATA |
0 |
dd->hfi1_id |
0-1 |
| HOST_DATA |
0 |
dd->icode |
0-1,3-255 |
| HOST_DATA |
0 |
dd->ipoib_rsm_usr_num.counter |
0 |
| HOST_DATA |
0 |
dd->irev |
0-u16max |
| HOST_DATA |
0 |
dd->last_rx |
0-u64max |
| HOST_DATA |
0 |
dd->last_tx |
0-u64max |
| HOST_DATA |
0 |
dd->lbus_speed |
2500,5000,8000 |
| HOST_DATA |
0 |
dd->lbus_width |
0-s32max |
| HOST_DATA |
0 |
dd->lcb_access_count |
0-u32max |
| HOST_DATA |
0 |
dd->lcb_err_en |
0-u64max |
| HOST_DATA |
0 |
dd->link_credits |
0-u16max |
| HOST_DATA |
0 |
dd->msix_info.max_requested |
0-u16max |
| HOST_DATA |
0 |
dd->n_krcv_queues |
0-255 |
| HOST_DATA |
0 |
dd->ndevcntrs |
0-u64max |
| HOST_DATA |
0 |
dd->node |
s32min-(-2),0-s32max |
| HOST_DATA |
0 |
dd->nportcntrs |
0-u64max |
| HOST_DATA |
0 |
dd->num_netdev_contexts |
0-u16max |
| HOST_DATA |
0 |
dd->num_pports |
1 |
| HOST_DATA |
0 |
dd->num_rcv_contexts |
0-u32max |
| HOST_DATA |
0 |
dd->num_sdma |
0-u32max |
| HOST_DATA |
0 |
dd->num_send_contexts |
0-u32max |
| HOST_DATA |
0 |
dd->num_user_contexts |
0-u32max |
| HOST_DATA |
0 |
dd->oui1 |
0-255 |
| HOST_DATA |
0 |
dd->oui2 |
0-255 |
| HOST_DATA |
0 |
dd->oui3 |
0-255 |
| HOST_DATA |
0 |
dd->pcfg_cache.cache_valid |
0-255 |
| HOST_DATA |
0 |
dd->pci_command |
0 |
| HOST_DATA |
0 |
dd->pci_msix0 |
0 |
| HOST_DATA |
0 |
dd->pci_rom |
0 |
| HOST_DATA |
0 |
dd->pci_tph2 |
0 |
| HOST_DATA |
0 |
dd->pcibar0 |
0 |
| HOST_DATA |
0 |
dd->pcibar1 |
0 |
| HOST_DATA |
0 |
dd->pcie_devctl |
0 |
| HOST_DATA |
0 |
dd->pcie_devctl2 |
0 |
| HOST_DATA |
0 |
dd->pcie_lnkctl |
0 |
| HOST_DATA |
0 |
dd->platform_config.size |
0-u64max |
| HOST_DATA |
0 |
dd->portcntrnameslen |
0-u64max |
| HOST_DATA |
0 |
dd->psxmitwait_check_rate |
0-u16max |
| HOST_DATA |
0 |
dd->qos_shift |
0-255 |
| HOST_DATA |
0 |
dd->rcv_entries.group_size |
0-255 |
| HOST_DATA |
0 |
dd->rcv_entries.nctxt_extra |
0-u16max |
| HOST_DATA |
0 |
dd->rcv_entries.ngroups |
0-u16max |
| HOST_DATA |
0 |
dd->rcv_ovfl_cnt |
0-u32max |
| HOST_DATA |
0 |
dd->rcverr_timer.expires |
0-u64max |
| HOST_DATA |
0 |
dd->rcverr_timer.flags |
0-u32max |
| HOST_DATA |
0 |
dd->rcvhdrtail_dummy_dma |
0-u64max |
| HOST_DATA |
0 |
dd->sc2vl_lock.seqcount.seqcount.sequence |
0-u32max |
| HOST_DATA |
0 |
dd->sdma_heads_phys |
0-u64max |
| HOST_DATA |
0 |
dd->sdma_heads_size |
0-u64max |
| HOST_DATA |
0 |
dd->sdma_pad_phys |
0-u64max |
| HOST_DATA |
0 |
dd->sdma_unfreeze_count.counter |
s32min-s32max |
| HOST_DATA |
0 |
dd->sw_cce_err_status_aggregate |
0-u64max |
| HOST_DATA |
0 |
dd->sw_rcv_bypass_packet_errors |
0-u64max |
| HOST_DATA |
0 |
dd->synth_stats_timer.expires |
0-u64max |
| HOST_DATA |
0 |
dd->synth_stats_timer.flags |
0-u32max |
| HOST_DATA |
0 |
dd->ui_cdev.count |
0-u32max |
| HOST_DATA |
0 |
dd->ui_cdev.dev |
0-u32max |
| HOST_DATA |
0 |
dd->ui_cdev.kobj.kref.refcount.refs.counter |
s32min-s32max |
| HOST_DATA |
0 |
dd->ui_cdev.kobj.release.cpu |
s32min-s32max |
| HOST_DATA |
0 |
dd->ui_cdev.kobj.release.timer.expires |
0-u64max |
| HOST_DATA |
0 |
dd->ui_cdev.kobj.release.timer.flags |
0-u32max |
| HOST_DATA |
0 |
dd->ui_cdev.kobj.release.work.data.counter |
s64min-s64max |
| HOST_DATA |
0 |
dd->ui_cdev.kobj.state_add_uevent_sent |
0-1 |
| HOST_DATA |
0 |
dd->ui_cdev.kobj.state_in_sysfs |
0-1 |
| HOST_DATA |
0 |
dd->ui_cdev.kobj.state_initialized |
0-1 |
| HOST_DATA |
0 |
dd->ui_cdev.kobj.state_remove_uevent_sent |
0-1 |
| HOST_DATA |
0 |
dd->ui_cdev.kobj.uevent_suppress |
0-1 |
| HOST_DATA |
0 |
dd->unit |
s32min-s32max |
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s64min-s64max |
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0-u32max |
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s32min-s32max |
| HOST_DATA |
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s32min-s32max |
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| HOST_DATA |
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| HOST_DATA |
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s64min-s64max |
| HOST_DATA |
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0-1 |
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0-u16max |
| HOST_DATA |
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s32min-s32max |
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s32min-s32max |
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0-255 |
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s32min-s32max |
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s32min-s32max |
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s32min-s32max |
| HOST_DATA |
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s32min-s32max |
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0-u64max |
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0-u32max |
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0-u32max |
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0-u32max |
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0-u32max |
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0-u32max |
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0-u32max |
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0-u32max |
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s32min-s32max |
| HOST_DATA |
0 |
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s32min-s32max |
| HOST_DATA |
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s32min-s32max |
| HOST_DATA |
0 |
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0-255 |
| HOST_DATA |
0 |
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0-u32max |
| HOST_DATA |
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s32min-s32max |
| HOST_DATA |
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s32min-s32max |
| HOST_DATA |
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s32min-s32max |
| HOST_DATA |
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s32min-s32max |
| HOST_DATA |
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0-255 |
| HOST_DATA |
0 |
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0-u32max |
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0 |
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0-u32max |
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0-u32max |
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s32min-s32max |
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0-u32max |
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0-u16max |
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0-u16max |
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0-u64max |
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0-u64max |
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0-u64max |
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0-u32max |
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0-u64max |
| HOST_DATA |
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0-255 |
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0-u32max |
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0-u32max |
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0-u32max |
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0-u32max |
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0-u64max |
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0-u32max |
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0 |
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0-u32max |
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0-u32max |
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0 |
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0-u32max |
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0 |
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0-u32max |
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0 |
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0-u32max |
| HOST_DATA |
0 |
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0-u32max |
| HOST_DATA |
0 |
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0-u64max |
| HOST_DATA |
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0-u32max |
| HOST_DATA |
0 |
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0-u32max |
| HOST_DATA |
0 |
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0-u32max |
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0 |
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0-u16max |
| HOST_DATA |
0 |
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0-u32max |
| HOST_DATA |
0 |
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0-u32max |
| HOST_DATA |
0 |
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0-u32max |
| HOST_DATA |
0 |
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0-u32max |
| HOST_DATA |
0 |
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0-u32max |
| HOST_DATA |
0 |
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0-u32max |
| HOST_DATA |
0 |
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0-u32max |
| HOST_DATA |
0 |
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0-u32max |
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0 |
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0-u32max |
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0 |
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0-u32max |
| HOST_DATA |
0 |
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0-u32max |
| HOST_DATA |
0 |
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0-u32max |
| HOST_DATA |
0 |
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0-u32max |
| HOST_DATA |
0 |
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0-u32max |
| HOST_DATA |
0 |
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0-u32max |
| HOST_DATA |
0 |
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0-u32max |
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0 |
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0-u32max |
| HOST_DATA |
0 |
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0-u64max |
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0 |
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0-u32max |
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0 |
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0-u32max |
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0-u32max |
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0 |
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0-u32max |
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0 |
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0-u64max |
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0-u32max |
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0 |
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0-u32max |
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0 |
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0-u32max |
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0 |
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0-u32max |
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0 |
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s32min-s32max |
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0 |
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s32min-s32max |
| HOST_DATA |
0 |
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0-u64max |
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0 |
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0-u64max |
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0-u32max |
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0-u32max |
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0-u32max |
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0 |
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0-u32max |
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0-u32max |
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0-u32max |
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0 |
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0-u32max |
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s32min-s32max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.cache_lock.raw_lock.wlocked |
0-255 |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.cc_dma_bounce |
0-1 |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.client_data.xa_flags |
0-u32max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.client_data_rwsem.count.counter |
s64min-s64max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.client_data_rwsem.osq.tail.counter |
s32min-s32max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.client_data_rwsem.owner.counter |
s64min-s64max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.compat_devs.xa_flags |
0-u32max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.compat_devs_mutex.osq.tail.counter |
s32min-s32max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.compat_devs_mutex.owner.counter |
s64min-s64max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.coredev.dev.bus_dma_limit |
0-u64max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.coredev.dev.coherent_dma_mask |
0-u64max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.coredev.dev.devt |
0-u32max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.coredev.dev.dma_uses_io_tlb |
0-1 |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.coredev.dev.id |
0-u32max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.coredev.dev.kobj.kref.refcount.refs.counter |
s32min-s32max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.coredev.dev.kobj.release.cpu |
s32min-s32max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.coredev.dev.kobj.release.timer.expires |
0-u64max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.coredev.dev.kobj.release.timer.flags |
0-u32max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.coredev.dev.kobj.release.work.data.counter |
s64min-s64max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.coredev.dev.kobj.state_add_uevent_sent |
0-1 |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.coredev.dev.kobj.state_in_sysfs |
0-1 |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.coredev.dev.kobj.state_initialized |
0-1 |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.coredev.dev.kobj.state_remove_uevent_sent |
0-1 |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.coredev.dev.kobj.uevent_suppress |
0-1 |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.coredev.dev.links.status |
0-u32max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.coredev.dev.mutex.osq.tail.counter |
s32min-s32max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.coredev.dev.mutex.owner.counter |
s64min-s64max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.coredev.dev.numa_node |
s32min-s32max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.coredev.dev.power.accounting_timestamp |
0-u64max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.coredev.dev.power.active_time |
0-u64max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.coredev.dev.power.async_suspend |
0-1 |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.coredev.dev.power.autosuspend_delay |
s32min-s32max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.coredev.dev.power.can_wakeup |
0-1 |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.coredev.dev.power.child_count.counter |
s32min-s32max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.coredev.dev.power.completion.done |
0-u32max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.coredev.dev.power.deferred_resume |
0-1 |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.coredev.dev.power.detach_power_off |
0-1 |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.coredev.dev.power.direct_complete |
0-1 |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.coredev.dev.power.disable_depth |
0-7 |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.coredev.dev.power.driver_flags |
0-u32max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.coredev.dev.power.early_init |
0-1 |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.coredev.dev.power.idle_notification |
0-1 |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.coredev.dev.power.ignore_children |
0-1 |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.coredev.dev.power.in_dpm_list |
0-1 |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.coredev.dev.power.irq_safe |
0-1 |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.coredev.dev.power.is_late_suspended |
0-1 |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.coredev.dev.power.is_noirq_suspended |
0-1 |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.coredev.dev.power.is_prepared |
0-1 |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.coredev.dev.power.is_suspended |
0-1 |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.coredev.dev.power.last_busy |
0-u64max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.coredev.dev.power.last_status |
s32min-s32max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.coredev.dev.power.links_count |
0-u32max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.coredev.dev.power.may_skip_resume |
0-1 |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.coredev.dev.power.memalloc_noio |
0-1 |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.coredev.dev.power.must_resume |
0-1 |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.coredev.dev.power.needs_force_resume |
0-1 |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.coredev.dev.power.no_callbacks |
0-1 |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.coredev.dev.power.no_pm |
0-1 |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.coredev.dev.power.no_pm_callbacks |
0-1 |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.coredev.dev.power.out_band_wakeup |
0-1 |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.coredev.dev.power.power_state.event |
s32min-s32max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.coredev.dev.power.request |
0-u32max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.coredev.dev.power.request_pending |
0-1 |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.coredev.dev.power.runtime_auto |
0-1 |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.coredev.dev.power.runtime_error |
s32min-s32max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.coredev.dev.power.runtime_status |
s32min-s32max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.coredev.dev.power.smart_suspend |
0-1 |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.coredev.dev.power.strict_midlayer |
0-1 |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.coredev.dev.power.suspended_time |
0-u64max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.coredev.dev.power.syscore |
0-1 |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.coredev.dev.power.timer_autosuspends |
0-1 |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.coredev.dev.power.timer_expires |
0-u64max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.coredev.dev.power.usage_count.counter |
s32min-s32max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.coredev.dev.power.use_autosuspend |
0-1 |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.coredev.dev.power.work_in_progress |
0-1 |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.coredev.dev.removable |
0-u32max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.dev.bus_dma_limit |
0-u64max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.dev.coherent_dma_mask |
0-u64max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.dev.devt |
0-u32max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.dev.dma_uses_io_tlb |
0-1 |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.dev.id |
0-u32max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.dev.kobj.kref.refcount.refs.counter |
s32min-s32max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.dev.kobj.release.cpu |
s32min-s32max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.dev.kobj.release.timer.expires |
0-u64max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.dev.kobj.release.timer.flags |
0-u32max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.dev.kobj.release.work.data.counter |
s64min-s64max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.dev.kobj.state_add_uevent_sent |
0-1 |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.dev.kobj.state_in_sysfs |
0-1 |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.dev.kobj.state_initialized |
0-1 |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.dev.kobj.state_remove_uevent_sent |
0-1 |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.dev.kobj.uevent_suppress |
0-1 |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.dev.links.status |
0-u32max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.dev.mutex.osq.tail.counter |
s32min-s32max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.dev.mutex.owner.counter |
s64min-s64max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.dev.numa_node |
s32min-s32max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.dev.power.accounting_timestamp |
0-u64max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.dev.power.active_time |
0-u64max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.dev.power.async_suspend |
0-1 |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.dev.power.autosuspend_delay |
s32min-s32max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.dev.power.can_wakeup |
0-1 |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.dev.power.child_count.counter |
s32min-s32max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.dev.power.completion.done |
0-u32max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.dev.power.deferred_resume |
0-1 |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.dev.power.detach_power_off |
0-1 |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.dev.power.direct_complete |
0-1 |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.dev.power.disable_depth |
0-7 |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.dev.power.driver_flags |
0-u32max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.dev.power.early_init |
0-1 |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.dev.power.idle_notification |
0-1 |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.dev.power.ignore_children |
0-1 |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.dev.power.in_dpm_list |
0-1 |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.dev.power.irq_safe |
0-1 |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.dev.power.is_late_suspended |
0-1 |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.dev.power.is_noirq_suspended |
0-1 |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.dev.power.is_prepared |
0-1 |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.dev.power.is_suspended |
0-1 |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.dev.power.last_busy |
0-u64max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.dev.power.last_status |
s32min-s32max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.dev.power.links_count |
0-u32max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.dev.power.may_skip_resume |
0-1 |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.dev.power.memalloc_noio |
0-1 |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.dev.power.must_resume |
0-1 |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.dev.power.needs_force_resume |
0-1 |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.dev.power.no_callbacks |
0-1 |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.dev.power.no_pm |
0-1 |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.dev.power.no_pm_callbacks |
0-1 |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.dev.power.out_band_wakeup |
0-1 |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.dev.power.power_state.event |
s32min-s32max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.dev.power.request |
0-u32max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.dev.power.request_pending |
0-1 |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.dev.power.runtime_auto |
0-1 |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.dev.power.runtime_error |
s32min-s32max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.dev.power.runtime_status |
s32min-s32max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.dev.power.smart_suspend |
0-1 |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.dev.power.strict_midlayer |
0-1 |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.dev.power.suspended_time |
0-u64max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.dev.power.syscore |
0-1 |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.dev.power.timer_autosuspends |
0-1 |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.dev.power.timer_expires |
0-u64max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.dev.power.usage_count.counter |
s32min-s32max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.dev.power.use_autosuspend |
0-1 |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.dev.power.work_in_progress |
0-1 |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.dev.removable |
0-u32max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.event_handler_rwsem.count.counter |
s64min-s64max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.event_handler_rwsem.osq.tail.counter |
s32min-s32max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.event_handler_rwsem.owner.counter |
s64min-s64max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.hw_stats_attr_index |
0-255 |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.index |
0-u32max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.is_switch |
0-1 |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.iw_driver_flags |
0-u32max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.kverbs_provider |
0-1 |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.lag_flags |
0-u32max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.local_dma_lkey |
0-u32max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.name_assign_type |
0-u32max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.node_guid |
0-u64max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.node_type |
0-255 |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.num_comp_vectors |
s32min-s32max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.ops.driver_id |
0-u32max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.ops.size_ib_ah |
0-u64max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.ops.size_ib_counters |
0-u64max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.ops.size_ib_cq |
0-u64max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.ops.size_ib_dmah |
0-u64max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.ops.size_ib_mw |
0-u64max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.ops.size_ib_pd |
0-u64max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.ops.size_ib_qp |
0-u64max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.ops.size_ib_rwq_ind_table |
0-u64max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.ops.size_ib_srq |
0-u64max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.ops.size_ib_ucontext |
0-u64max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.ops.size_ib_xrcd |
0-u64max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.ops.size_rdma_counter |
0-u64max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.ops.uverbs_abi_ver |
0-u32max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.ops.uverbs_no_driver_id_binding |
0-1 |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.ops.uverbs_robust_udata |
0-1 |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.phys_port_cnt |
0-u32max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.refcount.refs.counter |
s32min-s32max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.subdev_lock.osq.tail.counter |
s32min-s32max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.subdev_lock.owner.counter |
s64min-s64max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.type |
0-u32max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.unreg_completion.done |
0-u32max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.unreg_completion.wait.lock.magic |
0-u32max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.unreg_completion.wait.lock.owner_cpu |
0-u32max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.unreg_completion.wait.lock.raw_lock.locked |
0-255 |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.unreg_completion.wait.lock.raw_lock.locked_pending |
0-u16max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.unreg_completion.wait.lock.raw_lock.pending |
0-255 |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.unreg_completion.wait.lock.raw_lock.tail |
0-u16max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.unreg_completion.wait.lock.raw_lock.val.counter |
s32min-s32max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.unregistration_lock.osq.tail.counter |
s32min-s32max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.unregistration_lock.owner.counter |
s64min-s64max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.unregistration_work.data.counter |
s64min-s64max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.use_cq_dim |
0-1 |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.ibdev.uverbs_cmd_mask |
0-u64max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.lkey_table.gen |
0-u32max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.lkey_table.max |
0-u32max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.lkey_table.next |
0-u32max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.lkey_table.shift |
0-u32max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.mmap_offset |
0-u32max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.n_ahs_allocated |
s32min-s32max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.n_cqs_allocated |
0-u32max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.n_mcast_grps_allocated |
0-u32max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.n_pds_allocated |
s32min-s32max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.n_qps_allocated |
0-u32max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.n_rc_qps |
0-u32max |
| HOST_DATA |
0 |
dd->verbs_dev.rdi.n_srqs_allocated |
0-u32max |
| HOST_DATA |
0 |
dd->verbs_dev.txwait_lock.seqcount.seqcount.sequence |
0-u32max |
| HOST_DATA |
0 |
dd->vl15_init |
0-u16max |
| HOST_DATA |
0 |
dd->vl15buf_cached |
0-u16max |
| HOST_DATA |
0 |
dd->z_int_counter |
0-u64max |
| HOST_DATA |
0 |
dd->z_rcv_limit |
0-u64max |
| HOST_DATA |
0 |
dd->z_send_schedule |
0-u64max |
| NO_OVERFLOW_SIMPLE |
0 |
dd->asic_data->i2c_bus0->controlling_dd->num_pports |
|
| NO_OVERFLOW_SIMPLE |
0 |
dd->asic_data->i2c_bus1->controlling_dd->num_pports |
|
| NO_OVERFLOW_SIMPLE |
0 |
dd->num_pports |
|
| LOCK2 |
0 |
&dd->asic_data->asic_resource_mutex |
|
| HALF_LOCKED2 |
|
&ppd->hls_lock |
|
| TYPE_LOCK |
|
(struct hfi1_asic_data)->asic_resource_mutex |
|