Defined in 5 files as a macro:
- drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_4_0_0_offset.h, line 1334 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_4_0_3_offset.h, line 1243 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_4_0_5_offset.h, line 1289 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_5_0_0_offset.h, line 1120 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_5_3_0_offset.h, line 249 (as a macro)