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Defined in 1 files as a function:

Referenced in 1 files:

Smatch caller information:

drivers/video/fbdev/aty/radeon_pm.c radeonfb_pci_resume() -> radeon_pm_enable_dynamic_mode()

Type Parameter Key Value
PARAM_VALUE 0 rinfo 4096-ptr_max
PARAM_VALUE 0 rinfo->dp_gui_master_cntl 268435456,268435968-268436480,268436992
PARAM_VALUE 0 rinfo->dynclk 1
PARAM_VALUE 0 rinfo->lock_blank 0
PARAM_VALUE 0 rinfo->lvds_timer.entry.pprev 0
PARAM_VALUE 0 rinfo->lvds_timer.flags 0-4194302
PARAM_VALUE 0 rinfo->lvds_timer.function 0
PARAM_VALUE 0 rinfo->mon1_type 1-3
PARAM_VALUE 0 rinfo->reinit_func 74877280292859904
PARAM_VALUE 0 rinfo->video_ram 0,8388608,16777216-520093696
BUF_SIZE 0 rinfo 2,4,16,24,32,128,216,248,256,1288,1984,2560,2864
BUF_SIZE 0 rinfo 2,4,16,24,32,128,216,248,256,1288,1984,2560,2864
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA 0 rinfo->fb_local_base 0,65536-4294901760
HOST_DATA 0 rinfo->init_state.lvds_gen_cntl 0-u32max[c]
HOST_DATA 0 rinfo->pending_lvds_gen_cntl 0-u32max
UNITS 0 rinfo unit_byte
LOCK2 global &console_sem

drivers/video/fbdev/aty/radeon_pm.c radeonfb_pm_init() -> radeon_pm_enable_dynamic_mode()

Type Parameter Key Value
PARAM_VALUE 0 rinfo 4096-ptr_max
PARAM_VALUE 0 rinfo->chipset 208,16962,18788-18791,20036-20039,20804-20807,20812,20814-20815
PARAM_VALUE 0 rinfo->dynclk 1
PARAM_VALUE 0 rinfo->errata 0-2,4,6
PARAM_VALUE 0 rinfo->family 0-17,19-255
PARAM_VALUE 0 rinfo->fb_local_base 0,65536-4294901760
PARAM_VALUE 0 rinfo->fp_bios_start 0-u16max
PARAM_VALUE 0 rinfo->has_CRTC2 0-1
PARAM_VALUE 0 rinfo->info 4096-ptr_max
PARAM_VALUE 0 rinfo->info->bl_curve_mutex.magic 4096-ptr_max
PARAM_VALUE 0 rinfo->info->blank 0
PARAM_VALUE 0 rinfo->info->cmap->blue 0-u16max
PARAM_VALUE 0 rinfo->info->cmap->green 0-u16max
PARAM_VALUE 0 rinfo->info->cmap->red 0-u16max
PARAM_VALUE 0 rinfo->info->cmap->transp 0-u16max
PARAM_VALUE 0 rinfo->info->cmap.blue 0
PARAM_VALUE 0 rinfo->info->cmap.green 0
PARAM_VALUE 0 rinfo->info->cmap.len 0
PARAM_VALUE 0 rinfo->info->cmap.red 0
PARAM_VALUE 0 rinfo->info->cmap.start 0
PARAM_VALUE 0 rinfo->info->cmap.transp 0
PARAM_VALUE 0 rinfo->info->device 4096-ptr_max
PARAM_VALUE 0 rinfo->info->fbcon_rotate_hint (-1)
PARAM_VALUE 0 rinfo->info->fbops 4499570666907467776
PARAM_VALUE 0 rinfo->info->fbops->fb_blank 1116351275076231168
PARAM_VALUE 0 rinfo->info->fbops->fb_check_var 599688086231920640
PARAM_VALUE 0 rinfo->info->fbops->fb_copyarea 5183543739540987904
PARAM_VALUE 0 rinfo->info->fbops->fb_fillrect 2426474588771491840
PARAM_VALUE 0 rinfo->info->fbops->fb_imageblit 2291130141584961536
PARAM_VALUE 0 rinfo->info->fbops->fb_ioctl 5733021085740810240
PARAM_VALUE 0 rinfo->info->fbops->fb_mmap 4284069163380785152
PARAM_VALUE 0 rinfo->info->fbops->fb_pan_display 8998976979775287296
PARAM_VALUE 0 rinfo->info->fbops->fb_read 5235798533754040320
PARAM_VALUE 0 rinfo->info->fbops->fb_set_par 5960554663885017088
PARAM_VALUE 0 rinfo->info->fbops->fb_setcmap 5254889478702952448
PARAM_VALUE 0 rinfo->info->fbops->fb_setcolreg 3768074978041384960
PARAM_VALUE 0 rinfo->info->fbops->fb_sync 3025045792235847680
PARAM_VALUE 0 rinfo->info->fbops->fb_write 2547212261812817920
PARAM_VALUE 0 rinfo->info->fix.accel 38
PARAM_VALUE 0 rinfo->info->fix.mmio_len 16384
PARAM_VALUE 0 rinfo->info->fix.smem_len 0,8388608,16777216-520093696
PARAM_VALUE 0 rinfo->info->fix.type 0
PARAM_VALUE 0 rinfo->info->fix.type_aux 0
PARAM_VALUE 0 rinfo->info->fix.visual 3
PARAM_VALUE 0 rinfo->info->fix.xpanstep 8
PARAM_VALUE 0 rinfo->info->fix.ypanstep 1
PARAM_VALUE 0 rinfo->info->fix.ywrapstep 0
PARAM_VALUE 0 rinfo->info->flags 13056,13058
PARAM_VALUE 0 rinfo->info->modelist.next->next 4096-ptr_max
PARAM_VALUE 0 rinfo->info->modelist.prev 4096-ptr_max
PARAM_VALUE 0 rinfo->info->modelist.prev->next 4096-ptr_max
PARAM_VALUE 0 rinfo->info->modelist.prev->prev 4096-ptr_max
PARAM_VALUE 0 rinfo->info->monspecs->ascii 0-255
PARAM_VALUE 0 rinfo->info->monspecs->monitor 0-255
PARAM_VALUE 0 rinfo->info->monspecs->serial_no 0-255
PARAM_VALUE 0 rinfo->info->monspecs.chroma.bluex 0-999
PARAM_VALUE 0 rinfo->info->monspecs.chroma.bluey 0-999
PARAM_VALUE 0 rinfo->info->monspecs.chroma.greenx 0-999
PARAM_VALUE 0 rinfo->info->monspecs.chroma.greeny 0-999
PARAM_VALUE 0 rinfo->info->monspecs.chroma.redx 0-999
PARAM_VALUE 0 rinfo->info->monspecs.chroma.redy 0-999
PARAM_VALUE 0 rinfo->info->monspecs.chroma.whitex 0-999
PARAM_VALUE 0 rinfo->info->monspecs.chroma.whitey 0-999
PARAM_VALUE 0 rinfo->info->monspecs.dpms 0-7
PARAM_VALUE 0 rinfo->info->monspecs.gamma 100-355
PARAM_VALUE 0 rinfo->info->monspecs.input 33-34,36,40,48,65-66,68,72,80,129-130,132,136,144,257-258,260,264,272
PARAM_VALUE 0 rinfo->info->monspecs.misc 0-3
PARAM_VALUE 0 rinfo->info->monspecs.modedb 0,4096-ptr_max
PARAM_VALUE 0 rinfo->info->monspecs.signal 0,2-31
PARAM_VALUE 0 rinfo->info->monspecs.week 0-255
PARAM_VALUE 0 rinfo->info->par 4096-ptr_max
PARAM_VALUE 0 rinfo->info->screen_base 4096-ptr_max
PARAM_VALUE 0 rinfo->info->screen_buffer 4096-ptr_max
PARAM_VALUE 0 rinfo->info->screen_size 0,4194304,8388608,16777216
PARAM_VALUE 0 rinfo->init_state.clk_cntl_index 0,64-u32max
PARAM_VALUE 0 rinfo->is_IGP 0-1
PARAM_VALUE 0 rinfo->is_mobility 0-1
PARAM_VALUE 0 rinfo->lvds_timer.entry.pprev 0
PARAM_VALUE 0 rinfo->lvds_timer.flags 0-4194302
PARAM_VALUE 0 rinfo->lvds_timer.lockdep_map->name 0-255
PARAM_VALUE 0 rinfo->mapped_vram 0,4194304,8388608,16777216
PARAM_VALUE 0 rinfo->mon1_EDID 0,4096-ptr_max
PARAM_VALUE 0 rinfo->panel_info.fbk_divider 0-u16max
PARAM_VALUE 0 rinfo->panel_info.hAct_high 0-1
PARAM_VALUE 0 rinfo->panel_info.post_divider 0-255
PARAM_VALUE 0 rinfo->panel_info.pwr_delay 1-2000
PARAM_VALUE 0 rinfo->panel_info.ref_divider 0-u16max
PARAM_VALUE 0 rinfo->panel_info.use_bios_dividers 1
PARAM_VALUE 0 rinfo->panel_info.vAct_high 0-1
PARAM_VALUE 0 rinfo->panel_info.valid 1
PARAM_VALUE 0 rinfo->pdev 4096-ptr_max
PARAM_VALUE 0 rinfo->pdev->driver 4096-ptr_max
PARAM_VALUE 0 rinfo->pll.mclk 1-1504755
PARAM_VALUE 0 rinfo->pll.ref_clk 0-u16max
PARAM_VALUE 0 rinfo->pll.ref_div 0-u16max
PARAM_VALUE 0 rinfo->pll.sclk 1-1504755
PARAM_VALUE 0 rinfo->reg_lock.rlock.dep_map->name 0-255
PARAM_VALUE 0 rinfo->reversed_DAC 0-s32max
PARAM_VALUE 0 rinfo->reversed_TMDS 1
PARAM_VALUE 0 rinfo->state.clk_cntl_index 0,64-u32max
PARAM_VALUE 0 rinfo->video_ram 0,8388608,16777216-520093696
PARAM_VALUE 0 rinfo->vram_ddr 0-1
PARAM_VALUE 0 rinfo->vram_width 32,64,128,256
BUF_SIZE 0 rinfo 2,4,16,24,32,128,216,248,256,1288,1984,2560
BUF_SIZE 0 rinfo 2,4,16,24,32,128,216,248,256,1288,1984,2560
BUF_SIZE 0 rinfo->pdev (-1),16,24,40,56,108-1096,1384,1600,1616,1752,2072,2576,7472,8064
DATA_SOURCE 0 rinfo $0
FUZZY_MAX 0 rinfo->errata 0
FUZZY_MAX 0 rinfo->has_CRTC2 1
FUZZY_MAX 0 rinfo->is_IGP 1
FUZZY_MAX 0 rinfo->is_mobility 1
STR_LEN 0 rinfo->name 49
BIT_INFO 0 rinfo->chipset 0x0,0xffff
BIT_INFO 0 rinfo->fb_local_base 0x0,0xffff0000
HARD_MAX 0 rinfo->has_CRTC2 1
HARD_MAX 0 rinfo->is_IGP 1
HARD_MAX 0 rinfo->is_mobility 1
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA 0 rinfo->fb_local_base 0,65536-4294901760
HOST_DATA 0 rinfo->fp_bios_start 0-u16max
HOST_DATA 0 rinfo->init_state.amcgpio_en_reg 0-u32max
HOST_DATA 0 rinfo->init_state.amcgpio_mask 0-u32max
HOST_DATA 0 rinfo->init_state.bios_5_scratch 0-u32max
HOST_DATA 0 rinfo->init_state.bus_cntl 0-u32max
HOST_DATA 0 rinfo->init_state.cap0_trig_cntl 0-u32max
HOST_DATA 0 rinfo->init_state.cap1_trig_cntl 0-u32max
HOST_DATA 0 rinfo->init_state.clk_cntl_index 0,64-u32max
HOST_DATA 0 rinfo->init_state.clock_cntl_index 0-u32max
HOST_DATA 0 rinfo->init_state.crtc2_gen_cntl 0-u32max
HOST_DATA 0 rinfo->init_state.crtc2_h_sync_strt_wid 0-u32max
HOST_DATA 0 rinfo->init_state.crtc2_h_total_disp 0-u32max
HOST_DATA 0 rinfo->init_state.crtc2_offset 0-u32max
HOST_DATA 0 rinfo->init_state.crtc2_offset_cntl 0-u32max
HOST_DATA 0 rinfo->init_state.crtc2_pitch 0-u32max
HOST_DATA 0 rinfo->init_state.crtc2_v_sync_strt_wid 0-u32max
HOST_DATA 0 rinfo->init_state.crtc2_v_total_disp 0-u32max
HOST_DATA 0 rinfo->init_state.crtc_ext_cntl 0-u32max
HOST_DATA 0 rinfo->init_state.crtc_gen_cntl 0-u32max
HOST_DATA 0 rinfo->init_state.crtc_h_sync_strt_wid 0-u32max
HOST_DATA 0 rinfo->init_state.crtc_h_total_disp 0-u32max
HOST_DATA 0 rinfo->init_state.crtc_more_cntl 0-u32max
HOST_DATA 0 rinfo->init_state.crtc_offset 0-u32max
HOST_DATA 0 rinfo->init_state.crtc_offset_cntl 0-u32max
HOST_DATA 0 rinfo->init_state.crtc_pitch 0-u32max
HOST_DATA 0 rinfo->init_state.crtc_v_sync_strt_wid 0-u32max
HOST_DATA 0 rinfo->init_state.crtc_v_total_disp 0-u32max
HOST_DATA 0 rinfo->init_state.dac2_cntl 0-u32max
HOST_DATA 0 rinfo->init_state.dac_cntl 0-u32max
HOST_DATA 0 rinfo->init_state.disp2_merge_cntl 0-u32max
HOST_DATA 0 rinfo->init_state.disp_hw_debug 0-u32max
HOST_DATA 0 rinfo->init_state.disp_merge_cntl 0-u32max
HOST_DATA 0 rinfo->init_state.disp_output_cntl 0-u32max
HOST_DATA 0 rinfo->init_state.dot_clock_freq 0-u32max
HOST_DATA 0 rinfo->init_state.dot_clock_freq_2 0-u32max
HOST_DATA 0 rinfo->init_state.dp_datatype 0-u32max
HOST_DATA 0 rinfo->init_state.feedback_div s32min-s32max
HOST_DATA 0 rinfo->init_state.feedback_div_2 s32min-s32max
HOST_DATA 0 rinfo->init_state.fp2_gen_cntl 0-u32max
HOST_DATA 0 rinfo->init_state.fp2_h_sync_strt_wid 0-u32max
HOST_DATA 0 rinfo->init_state.fp2_v_sync_strt_wid 0-u32max
HOST_DATA 0 rinfo->init_state.fp_crtc_h_total_disp 0-u32max
HOST_DATA 0 rinfo->init_state.fp_crtc_v_total_disp 0-u32max
HOST_DATA 0 rinfo->init_state.fp_gen_cntl 0-u32max
HOST_DATA 0 rinfo->init_state.fp_h_sync_strt_wid 0-u32max
HOST_DATA 0 rinfo->init_state.fp_horz_stretch 0-u32max
HOST_DATA 0 rinfo->init_state.fp_panel_cntl 0-u32max
HOST_DATA 0 rinfo->init_state.fp_v_sync_strt_wid 0-u32max
HOST_DATA 0 rinfo->init_state.fp_vert_stretch 0-u32max
HOST_DATA 0 rinfo->init_state.gen_int_cntl 0-u32max
HOST_DATA 0 rinfo->init_state.grph2_buffer_cntl 0-u32max
HOST_DATA 0 rinfo->init_state.grph_buffer_cntl 0-u32max
HOST_DATA 0 rinfo->init_state.htotal_cntl2 0-u32max
HOST_DATA 0 rinfo->init_state.i2c_cntl_1 0-u32max
HOST_DATA 0 rinfo->init_state.lvds_gen_cntl 0-u32max
HOST_DATA 0 rinfo->init_state.lvds_pll_cntl 0-u32max
HOST_DATA 0 rinfo->init_state.mpp_gp_config 0-u32max
HOST_DATA 0 rinfo->init_state.mpp_tb_config 0-u32max
HOST_DATA 0 rinfo->init_state.ov0_scale_cntl 0-u32max
HOST_DATA 0 rinfo->init_state.ovr_clr 0-u32max
HOST_DATA 0 rinfo->init_state.ovr_wid_left_right 0-u32max
HOST_DATA 0 rinfo->init_state.ovr_wid_top_bottom 0-u32max
HOST_DATA 0 rinfo->init_state.p2pll_div_0 0-u32max
HOST_DATA 0 rinfo->init_state.p2pll_ref_div 0-u32max
HOST_DATA 0 rinfo->init_state.palette_valid s32min-s32max
HOST_DATA 0 rinfo->init_state.post_div s32min-s32max
HOST_DATA 0 rinfo->init_state.post_div_2 s32min-s32max
HOST_DATA 0 rinfo->init_state.ppll_div_3 0-u32max
HOST_DATA 0 rinfo->init_state.ppll_ref_div 0-u32max
HOST_DATA 0 rinfo->init_state.rbbm_soft_reset 0-u32max
HOST_DATA 0 rinfo->init_state.subpic_cntl 0-u32max
HOST_DATA 0 rinfo->init_state.surface_cntl 0-u32max
HOST_DATA 0 rinfo->init_state.tmds_crc 0-u32max
HOST_DATA 0 rinfo->init_state.tmds_transmitter_cntl 0-u32max
HOST_DATA 0 rinfo->init_state.vclk_ecp_cntl 0-u32max
HOST_DATA 0 rinfo->init_state.viph_control 0-u32max
HOST_DATA 0 rinfo->panel_info->clock s32min-s32max
HOST_DATA 0 rinfo->panel_info->fbk_divider s32min-s32max
HOST_DATA 0 rinfo->panel_info->hAct_high s32min-s32max
HOST_DATA 0 rinfo->panel_info->hOver_plus s32min-s32max
HOST_DATA 0 rinfo->panel_info->hSync_width s32min-s32max
HOST_DATA 0 rinfo->panel_info->hblank s32min-s32max
HOST_DATA 0 rinfo->panel_info->interlaced s32min-s32max
HOST_DATA 0 rinfo->panel_info->post_divider s32min-s32max
HOST_DATA 0 rinfo->panel_info->pwr_delay s32min-s32max
HOST_DATA 0 rinfo->panel_info->ref_divider s32min-s32max
HOST_DATA 0 rinfo->panel_info->use_bios_dividers s32min-s32max
HOST_DATA 0 rinfo->panel_info->vAct_high s32min-s32max
HOST_DATA 0 rinfo->panel_info->vOver_plus s32min-s32max
HOST_DATA 0 rinfo->panel_info->vSync_width s32min-s32max
HOST_DATA 0 rinfo->panel_info->valid s32min-s32max
HOST_DATA 0 rinfo->panel_info->vblank s32min-s32max
HOST_DATA 0 rinfo->panel_info->xres s32min-s32max
HOST_DATA 0 rinfo->panel_info->yres s32min-s32max
HOST_DATA 0 rinfo->panel_info.clock 0-u16max
HOST_DATA 0 rinfo->panel_info.fbk_divider 0-u16max
HOST_DATA 0 rinfo->panel_info.hOver_plus 0-s16max[c]
HOST_DATA 0 rinfo->panel_info.hSync_width 0-2040
HOST_DATA 0 rinfo->panel_info.hblank (-524280)-(-8),0-524280[c]
HOST_DATA 0 rinfo->panel_info.post_divider 0-255
HOST_DATA 0 rinfo->panel_info.vOver_plus (-65535)-255
HOST_DATA 0 rinfo->panel_info.vSync_width 0[c]
HOST_DATA 0 rinfo->panel_info.vblank (-65535)-u16max
HOST_DATA 0 rinfo->panel_info.xres 9-4096[c]
HOST_DATA 0 rinfo->panel_info.yres 0-u16max[c]
HOST_DATA 0 rinfo->pdev->current_state 0-3[c]
HOST_DATA 0 rinfo->pll.ppll_max s32min-s32max
HOST_DATA 0 rinfo->pll.ppll_min s32min-s32max
HOST_DATA 0 rinfo->pll.ref_clk 0-u16max
HOST_DATA 0 rinfo->pll.ref_div 0-u16max
HOST_DATA 0 rinfo->state.amcgpio_en_reg 0-u32max
HOST_DATA 0 rinfo->state.amcgpio_mask 0-u32max
HOST_DATA 0 rinfo->state.bios_5_scratch 0-u32max
HOST_DATA 0 rinfo->state.bus_cntl 0-u32max
HOST_DATA 0 rinfo->state.cap0_trig_cntl 0-u32max
HOST_DATA 0 rinfo->state.cap1_trig_cntl 0-u32max
HOST_DATA 0 rinfo->state.clk_cntl_index 0,64-u32max
HOST_DATA 0 rinfo->state.clock_cntl_index 0-u32max
HOST_DATA 0 rinfo->state.crtc2_gen_cntl 0-u32max
HOST_DATA 0 rinfo->state.crtc2_h_sync_strt_wid 0-u32max
HOST_DATA 0 rinfo->state.crtc2_h_total_disp 0-u32max
HOST_DATA 0 rinfo->state.crtc2_offset 0-u32max
HOST_DATA 0 rinfo->state.crtc2_offset_cntl 0-u32max
HOST_DATA 0 rinfo->state.crtc2_pitch 0-u32max
HOST_DATA 0 rinfo->state.crtc2_v_sync_strt_wid 0-u32max
HOST_DATA 0 rinfo->state.crtc2_v_total_disp 0-u32max
HOST_DATA 0 rinfo->state.crtc_ext_cntl 0-u32max
HOST_DATA 0 rinfo->state.crtc_gen_cntl 0-u32max
HOST_DATA 0 rinfo->state.crtc_h_sync_strt_wid 0-u32max
HOST_DATA 0 rinfo->state.crtc_h_total_disp 0-u32max
HOST_DATA 0 rinfo->state.crtc_more_cntl 0-u32max
HOST_DATA 0 rinfo->state.crtc_offset 0-u32max
HOST_DATA 0 rinfo->state.crtc_offset_cntl 0-u32max
HOST_DATA 0 rinfo->state.crtc_pitch 0-u32max
HOST_DATA 0 rinfo->state.crtc_v_sync_strt_wid 0-u32max
HOST_DATA 0 rinfo->state.crtc_v_total_disp 0-u32max
HOST_DATA 0 rinfo->state.dac2_cntl 0-u32max
HOST_DATA 0 rinfo->state.dac_cntl 0-u32max
HOST_DATA 0 rinfo->state.disp2_merge_cntl 0-u32max
HOST_DATA 0 rinfo->state.disp_hw_debug 0-u32max
HOST_DATA 0 rinfo->state.disp_merge_cntl 0-u32max
HOST_DATA 0 rinfo->state.disp_output_cntl 0-u32max
HOST_DATA 0 rinfo->state.dot_clock_freq 0-u32max
HOST_DATA 0 rinfo->state.dot_clock_freq_2 0-u32max
HOST_DATA 0 rinfo->state.dp_datatype 0-u32max
HOST_DATA 0 rinfo->state.feedback_div s32min-s32max
HOST_DATA 0 rinfo->state.feedback_div_2 s32min-s32max
HOST_DATA 0 rinfo->state.fp2_gen_cntl 0-u32max
HOST_DATA 0 rinfo->state.fp2_h_sync_strt_wid 0-u32max
HOST_DATA 0 rinfo->state.fp2_v_sync_strt_wid 0-u32max
HOST_DATA 0 rinfo->state.fp_crtc_h_total_disp 0-u32max
HOST_DATA 0 rinfo->state.fp_crtc_v_total_disp 0-u32max
HOST_DATA 0 rinfo->state.fp_gen_cntl 0-u32max
HOST_DATA 0 rinfo->state.fp_h_sync_strt_wid 0-u32max
HOST_DATA 0 rinfo->state.fp_horz_stretch 0-u32max
HOST_DATA 0 rinfo->state.fp_panel_cntl 0-u32max
HOST_DATA 0 rinfo->state.fp_v_sync_strt_wid 0-u32max
HOST_DATA 0 rinfo->state.fp_vert_stretch 0-u32max
HOST_DATA 0 rinfo->state.gen_int_cntl 0-u32max
HOST_DATA 0 rinfo->state.grph2_buffer_cntl 0-u32max
HOST_DATA 0 rinfo->state.grph_buffer_cntl 0-u32max
HOST_DATA 0 rinfo->state.htotal_cntl2 0-u32max
HOST_DATA 0 rinfo->state.i2c_cntl_1 0-u32max
HOST_DATA 0 rinfo->state.lvds_gen_cntl 0-u32max
HOST_DATA 0 rinfo->state.lvds_pll_cntl 0-u32max
HOST_DATA 0 rinfo->state.mpp_gp_config 0-u32max
HOST_DATA 0 rinfo->state.mpp_tb_config 0-u32max
HOST_DATA 0 rinfo->state.ov0_scale_cntl 0-u32max
HOST_DATA 0 rinfo->state.ovr_clr 0-u32max
HOST_DATA 0 rinfo->state.ovr_wid_left_right 0-u32max
HOST_DATA 0 rinfo->state.ovr_wid_top_bottom 0-u32max
HOST_DATA 0 rinfo->state.p2pll_div_0 0-u32max
HOST_DATA 0 rinfo->state.p2pll_ref_div 0-u32max
HOST_DATA 0 rinfo->state.palette_valid s32min-s32max
HOST_DATA 0 rinfo->state.post_div s32min-s32max
HOST_DATA 0 rinfo->state.post_div_2 s32min-s32max
HOST_DATA 0 rinfo->state.ppll_div_3 0-u32max
HOST_DATA 0 rinfo->state.ppll_ref_div 0-u32max
HOST_DATA 0 rinfo->state.rbbm_soft_reset 0-u32max
HOST_DATA 0 rinfo->state.subpic_cntl 0-u32max
HOST_DATA 0 rinfo->state.surface_cntl 0-u32max
HOST_DATA 0 rinfo->state.tmds_crc 0-u32max
HOST_DATA 0 rinfo->state.tmds_transmitter_cntl 0-u32max
HOST_DATA 0 rinfo->state.vclk_ecp_cntl 0-u32max
HOST_DATA 0 rinfo->state.viph_control 0-u32max
UNITS 0 rinfo unit_byte