Defined in 1 files as a function:
Referenced in 1 files:
Smatch caller information:
drivers/gpu/drm/i915/display/intel_psr.c hsw_activate_psr1() -> psr_compute_idle_frames()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | intel_dp | 4096-ptr_max |
| PARAM_VALUE | 0 | intel_dp->psr.enabled | 1 |
| PARAM_VALUE | 0 | intel_dp->psr.lock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | intel_dp->psr.lock.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | intel_dp->psr.lock.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | intel_dp->psr.lock.first_waiter->list.prev->prev | 5159360019465732096 |
| PARAM_VALUE | 0 | intel_dp->psr.lock.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | intel_dp->psr.lock.wait_lock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | intel_dp->psr.panel_replay_enabled | 0 |
| PARAM_VALUE | 0 | intel_dp->psr.pause_counter | 0 |
| PARAM_VALUE | 0 | intel_dp->psr.sel_update_enabled | 0 |
| DATA_SOURCE | 0 | intel_dp | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HALF_LOCKED2 | &psr->lock | ||
| HALF_LOCKED2 | 0 | &intel_dp->psr.lock | |
| TYPE_LOCK | (struct intel_psr)->lock |
drivers/gpu/drm/i915/display/intel_psr.c hsw_activate_psr2() -> psr_compute_idle_frames()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | intel_dp | 4096-ptr_max |
| PARAM_VALUE | 0 | intel_dp->psr.dc3co_allowed | 0 |
| PARAM_VALUE | 0 | intel_dp->psr.enabled | 1 |
| PARAM_VALUE | 0 | intel_dp->psr.lock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | intel_dp->psr.lock.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | intel_dp->psr.lock.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | intel_dp->psr.lock.first_waiter->list.prev->prev | 5159360019465732096 |
| PARAM_VALUE | 0 | intel_dp->psr.lock.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | intel_dp->psr.lock.wait_lock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | intel_dp->psr.panel_replay_enabled | 0 |
| PARAM_VALUE | 0 | intel_dp->psr.pause_counter | 0 |
| PARAM_VALUE | 0 | intel_dp->psr.sel_update_enabled | 1 |
| DATA_SOURCE | 0 | intel_dp | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HALF_LOCKED2 | &psr->lock | ||
| HALF_LOCKED2 | 0 | &intel_dp->psr.lock | |
| TYPE_LOCK | (struct intel_psr)->lock |
drivers/gpu/drm/i915/display/intel_psr.c intel_psr_apply_underrun_on_idle_wa_locked() -> psr_compute_idle_frames()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | intel_dp | 4096-ptr_max |
| PARAM_VALUE | 0 | intel_dp->psr.active | 1 |
| PARAM_VALUE | 0 | intel_dp->psr.active_non_psr_pipes | 0 |
| PARAM_VALUE | 0 | intel_dp->psr.enabled | 1 |
| PARAM_VALUE | 0 | intel_dp->psr.lock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | intel_dp->psr.lock.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | intel_dp->psr.lock.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | intel_dp->psr.lock.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | intel_dp->psr.lock.wait_lock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | intel_dp->psr.lock.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | intel_dp->psr.lock.wait_lock.owner_cpu | u32max |
| PARAM_VALUE | 0 | intel_dp->psr.panel_replay_enabled | 0 |
| PARAM_VALUE | 0 | intel_dp->psr.pkg_c_latency_used | 1 |
| PARAM_VALUE | 0 | intel_dp->psr.sel_update_enabled | 1 |
| BUF_SIZE | 0 | intel_dp | 6896 |
| DATA_SOURCE | 0 | intel_dp | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| LOCK2 | 0 | &intel_dp->psr.lock | |
| HALF_LOCKED2 | &pool->lock | ||
| TYPE_LOCK | (struct intel_psr)->lock |
drivers/gpu/drm/i915/display/intel_psr.c psr2_dc3co_disable_locked() -> psr_compute_idle_frames()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | intel_dp | 4096-ptr_max |
| PARAM_VALUE | 0 | intel_dp->psr.dc3co_allowed | 0 |
| PARAM_VALUE | 0 | intel_dp->psr.lock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | intel_dp->psr.lock.first_waiter | 0,4096-ptr_max |
| PARAM_VALUE | 0 | intel_dp->psr.lock.first_waiter->list.prev->next | 5159360019465732096 |
| PARAM_VALUE | 0 | intel_dp->psr.lock.osq.tail.counter | 0-s32max |
| PARAM_VALUE | 0 | intel_dp->psr.lock.wait_lock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | intel_dp->psr.lock.wait_lock.owner | (-1) |
| PARAM_VALUE | 0 | intel_dp->psr.lock.wait_lock.owner_cpu | u32max |
| DATA_SOURCE | 0 | intel_dp | $0 |
| LOCK2 | 0 | &intel_dp->psr.lock | |
| HALF_LOCKED2 | &pool->lock | ||
| TYPE_LOCK | (struct intel_psr)->lock |