| PARAM_VALUE |
0 |
pm8001_ha |
4096-ptr_max |
| PARAM_VALUE |
0 |
pm8001_ha->pdev |
4096-ptr_max |
| BUF_SIZE |
0 |
pm8001_ha |
64,19840,57064,65584 |
| BUF_SIZE |
0 |
pm8001_ha |
64,19840,57064,65584 |
| RX_PATH |
|
|
|
| TASK_NOT_RUNNING |
|
|
|
| NOCHECK_CALL |
|
|
|
| HOST_DATA |
0 |
pm8001_ha->gs_tbl.pm8001_tbl.gpio_input_val |
0-u32max |
| HOST_DATA |
0 |
pm8001_ha->gs_tbl.pm8001_tbl.gst_len_mpistate |
0-u32max |
| HOST_DATA |
0 |
pm8001_ha->gs_tbl.pm8001_tbl.iop_tcnt |
0-u32max |
| HOST_DATA |
0 |
pm8001_ha->gs_tbl.pm8001_tbl.iq_freeze_state0 |
0-u32max |
| HOST_DATA |
0 |
pm8001_ha->gs_tbl.pm8001_tbl.iq_freeze_state1 |
0-u32max |
| HOST_DATA |
0 |
pm8001_ha->gs_tbl.pm8001_tbl.msgu_tcnt |
0-u32max |
| HOST_DATA |
0 |
pm8001_ha->gs_tbl.pm8001_tbl.rsvd |
0-u32max |
| HOST_DATA |
0 |
pm8001_ha->gs_tbl.pm80xx_tbl.gpio_input_val |
0-u32max |
| HOST_DATA |
0 |
pm8001_ha->gs_tbl.pm80xx_tbl.gst_len_mpistate |
0-u32max |
| HOST_DATA |
0 |
pm8001_ha->gs_tbl.pm80xx_tbl.iop_tcnt |
0-u32max |
| HOST_DATA |
0 |
pm8001_ha->gs_tbl.pm80xx_tbl.iq_freeze_state0 |
0-u32max |
| HOST_DATA |
0 |
pm8001_ha->gs_tbl.pm80xx_tbl.iq_freeze_state1 |
0-u32max |
| HOST_DATA |
0 |
pm8001_ha->gs_tbl.pm80xx_tbl.msgu_tcnt |
0-u32max |
| HOST_DATA |
0 |
pm8001_ha->main_cfg_tbl.pm8001_tbl.anolog_setup_table_offset |
0-u32max |
| HOST_DATA |
0 |
pm8001_ha->main_cfg_tbl.pm8001_tbl.ctrl_cap_flag |
0-u32max |
| HOST_DATA |
0 |
pm8001_ha->main_cfg_tbl.pm8001_tbl.fatal_err_dump_length0 |
0-u32max |
| HOST_DATA |
0 |
pm8001_ha->main_cfg_tbl.pm8001_tbl.fatal_err_dump_length1 |
0-u32max |
| HOST_DATA |
0 |
pm8001_ha->main_cfg_tbl.pm8001_tbl.fatal_err_dump_offset0 |
0-u32max |
| HOST_DATA |
0 |
pm8001_ha->main_cfg_tbl.pm8001_tbl.fatal_err_dump_offset1 |
0-u32max |
| HOST_DATA |
0 |
pm8001_ha->main_cfg_tbl.pm8001_tbl.firmware_rev |
0-u32max |
| HOST_DATA |
0 |
pm8001_ha->main_cfg_tbl.pm8001_tbl.gst_offset |
0-u32max |
| HOST_DATA |
0 |
pm8001_ha->main_cfg_tbl.pm8001_tbl.hda_mode_flag |
0-u32max |
| HOST_DATA |
0 |
pm8001_ha->main_cfg_tbl.pm8001_tbl.inbound_queue_offset |
0-u32max |
| HOST_DATA |
0 |
pm8001_ha->main_cfg_tbl.pm8001_tbl.interface_rev |
0-u32max |
| HOST_DATA |
0 |
pm8001_ha->main_cfg_tbl.pm8001_tbl.max_out_io |
0-u32max |
| HOST_DATA |
0 |
pm8001_ha->main_cfg_tbl.pm8001_tbl.max_sgl |
0-u32max |
| HOST_DATA |
0 |
pm8001_ha->main_cfg_tbl.pm8001_tbl.outbound_queue_offset |
0-u32max |
| HOST_DATA |
0 |
pm8001_ha->main_cfg_tbl.pm8001_tbl.signature |
0-u32max |
| HOST_DATA |
0 |
pm8001_ha->main_cfg_tbl.pm80xx_tbl.analog_setup_table_offset |
0-u32max |
| HOST_DATA |
0 |
pm8001_ha->main_cfg_tbl.pm80xx_tbl.ctrl_cap_flag |
0-u32max |
| HOST_DATA |
0 |
pm8001_ha->main_cfg_tbl.pm80xx_tbl.fatal_err_dump_length0 |
0-u32max |
| HOST_DATA |
0 |
pm8001_ha->main_cfg_tbl.pm80xx_tbl.fatal_err_dump_length1 |
0-u32max |
| HOST_DATA |
0 |
pm8001_ha->main_cfg_tbl.pm80xx_tbl.fatal_err_dump_offset0 |
0-u32max |
| HOST_DATA |
0 |
pm8001_ha->main_cfg_tbl.pm80xx_tbl.fatal_err_dump_offset1 |
0-u32max |
| HOST_DATA |
0 |
pm8001_ha->main_cfg_tbl.pm80xx_tbl.firmware_rev |
0-u32max |
| HOST_DATA |
0 |
pm8001_ha->main_cfg_tbl.pm80xx_tbl.gst_offset |
0-u32max |
| HOST_DATA |
0 |
pm8001_ha->main_cfg_tbl.pm80xx_tbl.ila_version |
0-u32max |
| HOST_DATA |
0 |
pm8001_ha->main_cfg_tbl.pm80xx_tbl.inbound_queue_offset |
0-u32max |
| HOST_DATA |
0 |
pm8001_ha->main_cfg_tbl.pm80xx_tbl.inc_fw_version |
0-u32max |
| HOST_DATA |
0 |
pm8001_ha->main_cfg_tbl.pm80xx_tbl.int_vec_table_offset |
0-u32max |
| HOST_DATA |
0 |
pm8001_ha->main_cfg_tbl.pm80xx_tbl.interface_rev |
0-u32max |
| HOST_DATA |
0 |
pm8001_ha->main_cfg_tbl.pm80xx_tbl.max_out_io |
0-u32max |
| HOST_DATA |
0 |
pm8001_ha->main_cfg_tbl.pm80xx_tbl.max_sgl |
0-u32max |
| HOST_DATA |
0 |
pm8001_ha->main_cfg_tbl.pm80xx_tbl.outbound_queue_offset |
0-u32max |
| HOST_DATA |
0 |
pm8001_ha->main_cfg_tbl.pm80xx_tbl.phy_attr_table_offset |
0-u32max |
| HOST_DATA |
0 |
pm8001_ha->main_cfg_tbl.pm80xx_tbl.signature |
0-u32max |
| HOST_DATA |
0 |
pm8001_ha->pdev->current_state |
0-3[c] |