pcie_write identifier - Linux source code next-20260811

Projects

linux

Versions

FIXME
- FIXME
  - next-20260811

Defined in 4 files as a function:

Referenced in 4 files:

Smatch caller information:

drivers/pci/controller/pcie-mt7621.c mt7621_pcie_enable_port() -> pcie_write()

Type	Parameter	Key	Value
PARAM_VALUE	0	port	4096-ptr_max
PARAM_VALUE	2	reg	12
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA	1	val	0-u32max

drivers/pci/controller/pcie-mt7621.c mt7621_pcie_enable_ports() -> pcie_write()

Type	Parameter	Key	Value
PARAM_VALUE	0	port	4096-ptr_max
PARAM_VALUE	1	val	u32max
PARAM_VALUE	2	reg	40
BUF_SIZE	0	port	0-1080
BUF_SIZE	0	port	0-1080
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/pci/controller/pcie-mt7621.c mt7621_pcie_enable_ports() -> pcie_write()

Type	Parameter	Key	Value
PARAM_VALUE	0	port	4096-ptr_max
PARAM_VALUE	2	reg	44
BUF_SIZE	0	port	0-1080
BUF_SIZE	0	port	0-1080
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
UNITS	1	val	unit_byte

drivers/pci/controller/pcie-mt7621.c read_config() -> pcie_write()

Type	Parameter	Key	Value
PARAM_VALUE	0	port	4096-ptr_max
PARAM_VALUE	1	val	2264924172,2264926220-2264987660
PARAM_VALUE	2	reg	32
DATA_SOURCE	0	port	$0
BIT_INFO	1	val	0x8700000c,0x8700f80c
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/pci/controller/pcie-mt7621.c write_config() -> pcie_write()

Type	Parameter	Key	Value
PARAM_VALUE	0	port	4096-ptr_max
PARAM_VALUE	1	val	2264924172,2264926220-2264987660
PARAM_VALUE	2	reg	32
DATA_SOURCE	0	port	$0
BIT_INFO	1	val	0x8700000c,0x8700f80c
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/pci/controller/pcie-mt7621.c write_config() -> pcie_write()

Type	Parameter	Key	Value
PARAM_VALUE	0	port	4096-ptr_max
PARAM_VALUE	1	val	20480-4294922495
PARAM_VALUE	2	reg	36
DATA_SOURCE	0	port	$0
DATA_SOURCE	1	val	$3
BIT_INFO	1	val	0x5000,0xffff50ff
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA	1	val	20480-4294922495[c]

drivers/pci/controller/pcie-xilinx-dma-pl.c xilinx_mask_intx_irq() -> pcie_write()

Type	Parameter	Key	Value
PARAM_VALUE	0	port	4096-ptr_max
PARAM_VALUE	0	port->variant	4096-ptr_max
PARAM_VALUE	2	reg	356
BUF_SIZE	0	port	s32min-(-2),1-s32max
BUF_SIZE	0	port	s32min-(-2),1-s32max
CAPPED_DATA	1	val	1
PREEMPT_ADD			<- disables preempt
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA	1	val	0-u32max
UNITS	0	port	unit_byte
LOCK2		flags
LOCK2	0	&port->lock
HALF_LOCKED2		&desc->lock
HALF_LOCKED2		_T->flags
TYPE_LOCK		(struct pl_dma_pcie)->lock

drivers/pci/controller/pcie-xilinx-dma-pl.c xilinx_pl_dma_pcie_clear_err_interrupts() -> pcie_write()

Type	Parameter	Key	Value
PARAM_VALUE	0	port	4096-ptr_max
PARAM_VALUE	0	port->variant	4096-ptr_max
PARAM_VALUE	1	val	u32max
PARAM_VALUE	2	reg	340
DATA_SOURCE	0	port	$0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2		&desc->request_mutex
HALF_LOCKED2		_T->lock
HALF_LOCKED2		flags
HALF_LOCKED2		irq

drivers/pci/controller/pcie-xilinx-dma-pl.c xilinx_pl_dma_pcie_enable_msi() -> pcie_write()

Type	Parameter	Key	Value
PARAM_VALUE	0	port	4096-ptr_max
PARAM_VALUE	0	port->reg_base	0,4096-ptr_max
PARAM_VALUE	0	port->variant	4096-ptr_max
PARAM_VALUE	2	reg	332
BUF_SIZE	0	port	0-1080
BUF_SIZE	0	port	0-1080
BUF_SIZE	0	port->dev	1616
BUF_SIZE	0	port->intx_domain	376-s32max
BUF_SIZE	0	port->pldma_domain	376-s32max
CAPPED_DATA	0	port->cfg	1
CAPPED_DATA	0	port->cfg->win	1
CAPPED_DATA	0	port->intx_domain->bus_token	1
CAPPED_DATA	0	port->intx_domain->hwirq_max	1
CAPPED_DATA	0	port->pldma_domain->bus_token	1
CAPPED_DATA	0	port->pldma_domain->hwirq_max	1
DATA_SOURCE	0	port	$0
TERMINATED	0	port->cfg->res.name	1
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
NO_OVERFLOW_SIMPLE	0	port->cfg->res.start
NO_OVERFLOW_SIMPLE	0	port->msi.irq_msi0
NO_OVERFLOW_SIMPLE	0	port->msi.irq_msi1

drivers/pci/controller/pcie-xilinx-dma-pl.c xilinx_pl_dma_pcie_enable_msi() -> pcie_write()

Type	Parameter	Key	Value
PARAM_VALUE	0	port	4096-ptr_max
PARAM_VALUE	0	port->reg_base	0,4096-ptr_max
PARAM_VALUE	0	port->variant	4096-ptr_max
PARAM_VALUE	2	reg	336
BUF_SIZE	0	port	0-1080
BUF_SIZE	0	port	0-1080
BUF_SIZE	0	port->dev	1616
BUF_SIZE	0	port->intx_domain	376-s32max
BUF_SIZE	0	port->pldma_domain	376-s32max
CAPPED_DATA	0	port->cfg	1
CAPPED_DATA	0	port->cfg->win	1
CAPPED_DATA	0	port->intx_domain->bus_token	1
CAPPED_DATA	0	port->intx_domain->hwirq_max	1
CAPPED_DATA	0	port->pldma_domain->bus_token	1
CAPPED_DATA	0	port->pldma_domain->hwirq_max	1
DATA_SOURCE	0	port	$0
TERMINATED	0	port->cfg->res.name	1
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
NO_OVERFLOW_SIMPLE	0	port->cfg->res.start
NO_OVERFLOW_SIMPLE	0	port->msi.irq_msi0
NO_OVERFLOW_SIMPLE	0	port->msi.irq_msi1

drivers/pci/controller/pcie-xilinx-dma-pl.c xilinx_pl_dma_pcie_event_flow() -> pcie_write()

Type	Parameter	Key	Value
PARAM_VALUE	0	port	4096-ptr_max
PARAM_VALUE	0	port->variant	4096-ptr_max
PARAM_VALUE	2	reg	312
DATA_SOURCE	0	port	$1
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA	1	val	0-u32max[c]
HALF_LOCKED2		&desc->request_mutex
HALF_LOCKED2		flags

drivers/pci/controller/pcie-xilinx-dma-pl.c xilinx_pl_dma_pcie_init_port() -> pcie_write()

Type	Parameter	Key	Value
PARAM_VALUE	0	port	4096-ptr_max
PARAM_VALUE	0	port->reg_base	0,4096-ptr_max
PARAM_VALUE	0	port->variant	4096-ptr_max
PARAM_VALUE	1	val	0
PARAM_VALUE	2	reg	316
BUF_SIZE	0	port	0-1080
BUF_SIZE	0	port	0-1080
BUF_SIZE	0	port->dev	1616
CAPPED_DATA	0	port->cfg	1
DATA_SOURCE	0	port	$0
TERMINATED	0	port->cfg->res.name	1
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
NO_OVERFLOW_SIMPLE	0	port->msi.irq_msi0
NO_OVERFLOW_SIMPLE	0	port->msi.irq_msi1

drivers/pci/controller/pcie-xilinx-dma-pl.c xilinx_pl_dma_pcie_init_port() -> pcie_write()

Type	Parameter	Key	Value
PARAM_VALUE	0	port	4096-ptr_max
PARAM_VALUE	0	port->reg_base	0,4096-ptr_max
PARAM_VALUE	0	port->variant	4096-ptr_max
PARAM_VALUE	1	val	0-267587561
PARAM_VALUE	2	reg	312
BUF_SIZE	0	port	0-1080
BUF_SIZE	0	port	0-1080
BUF_SIZE	0	port->dev	1616
CAPPED_DATA	0	port->cfg	1
DATA_SOURCE	0	port	$0
BIT_INFO	1	val	0x0,0xff30fe9
TERMINATED	0	port->cfg->res.name	1
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA	1	val	0-267587561
NO_OVERFLOW_SIMPLE	0	port->msi.irq_msi0
NO_OVERFLOW_SIMPLE	0	port->msi.irq_msi1

drivers/pci/controller/pcie-xilinx-dma-pl.c xilinx_pl_dma_pcie_init_port() -> pcie_write()

Type	Parameter	Key	Value
PARAM_VALUE	0	port	4096-ptr_max
PARAM_VALUE	0	port->reg_base	0,4096-ptr_max
PARAM_VALUE	0	port->variant	4096-ptr_max
PARAM_VALUE	1	val	u32max
PARAM_VALUE	2	reg	376
BUF_SIZE	0	port	0-1080
BUF_SIZE	0	port	0-1080
BUF_SIZE	0	port->dev	1616
CAPPED_DATA	0	port->cfg	1
DATA_SOURCE	0	port	$0
TERMINATED	0	port->cfg->res.name	1
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
NO_OVERFLOW_SIMPLE	0	port->msi.irq_msi0
NO_OVERFLOW_SIMPLE	0	port->msi.irq_msi1

drivers/pci/controller/pcie-xilinx-dma-pl.c xilinx_pl_dma_pcie_init_port() -> pcie_write()

Type	Parameter	Key	Value
PARAM_VALUE	0	port	4096-ptr_max
PARAM_VALUE	0	port->reg_base	0,4096-ptr_max
PARAM_VALUE	0	port->variant	4096-ptr_max
PARAM_VALUE	1	val	u32max
PARAM_VALUE	2	reg	380
BUF_SIZE	0	port	0-1080
BUF_SIZE	0	port	0-1080
BUF_SIZE	0	port->dev	1616
CAPPED_DATA	0	port->cfg	1
DATA_SOURCE	0	port	$0
TERMINATED	0	port->cfg->res.name	1
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
NO_OVERFLOW_SIMPLE	0	port->msi.irq_msi0
NO_OVERFLOW_SIMPLE	0	port->msi.irq_msi1

drivers/pci/controller/pcie-xilinx-dma-pl.c xilinx_pl_dma_pcie_init_port() -> pcie_write()

Type	Parameter	Key	Value
PARAM_VALUE	0	port	4096-ptr_max
PARAM_VALUE	0	port->reg_base	0,4096-ptr_max
PARAM_VALUE	0	port->variant	4096-ptr_max
PARAM_VALUE	2	reg	328
BUF_SIZE	0	port	0-1080
BUF_SIZE	0	port	0-1080
BUF_SIZE	0	port->dev	1616
CAPPED_DATA	0	port->cfg	1
DATA_SOURCE	0	port	$0
BIT_INFO	1	val	0x1,0xffffffff
TERMINATED	0	port->cfg->res.name	1
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA	1	val	0-u32max
NO_OVERFLOW_SIMPLE	0	port->msi.irq_msi0
NO_OVERFLOW_SIMPLE	0	port->msi.irq_msi1

drivers/pci/controller/pcie-xilinx-dma-pl.c xilinx_pl_dma_pcie_mask_event_irq() -> pcie_write()

Type	Parameter	Key	Value
PARAM_VALUE	0	port	4096-ptr_max
PARAM_VALUE	0	port->variant	4096-ptr_max
PARAM_VALUE	2	reg	316
BUF_SIZE	0	port	s32min-(-2),1-s32max
BUF_SIZE	0	port	s32min-(-2),1-s32max
PREEMPT_ADD			<- disables preempt
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA	1	val	0-u32max[c]
UNITS	0	port	unit_byte
LOCK2	0	&port->lock
HALF_LOCKED2		&desc->lock
HALF_LOCKED2		_T->flags
TYPE_LOCK		(struct pl_dma_pcie)->lock

drivers/pci/controller/pcie-xilinx-dma-pl.c xilinx_pl_dma_pcie_msi_handler_high() -> pcie_write()

Type	Parameter	Key	Value
PARAM_VALUE	0	port	4096-ptr_max
PARAM_VALUE	0	port->variant	4096-ptr_max
PARAM_VALUE	2	reg	372
CAPPED_DATA	1	val	1
DATA_SOURCE	0	port	$1
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2		&desc->request_mutex
HALF_LOCKED2		flags

drivers/pci/controller/pcie-xilinx-dma-pl.c xilinx_pl_dma_pcie_msi_handler_low() -> pcie_write()

Type	Parameter	Key	Value
PARAM_VALUE	0	port	4096-ptr_max
PARAM_VALUE	0	port->variant	4096-ptr_max
PARAM_VALUE	2	reg	368
CAPPED_DATA	1	val	1
DATA_SOURCE	0	port	$1
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2		&desc->request_mutex
HALF_LOCKED2		flags

drivers/pci/controller/pcie-xilinx-dma-pl.c xilinx_pl_dma_pcie_unmask_event_irq() -> pcie_write()

Type	Parameter	Key	Value
PARAM_VALUE	0	port	4096-ptr_max
PARAM_VALUE	0	port->variant	4096-ptr_max
PARAM_VALUE	2	reg	316
BUF_SIZE	0	port	s32min-(-2),1-s32max
BUF_SIZE	0	port	s32min-(-2),1-s32max
PREEMPT_ADD			<- disables preempt
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA	1	val	0-u32max
UNITS	0	port	unit_byte
LOCK2	0	&port->lock
HALF_LOCKED2		&desc->lock
HALF_LOCKED2		_T->flags
TYPE_LOCK		(struct pl_dma_pcie)->lock

drivers/pci/controller/pcie-xilinx-dma-pl.c xilinx_unmask_intx_irq() -> pcie_write()

Type	Parameter	Key	Value
PARAM_VALUE	0	port	4096-ptr_max
PARAM_VALUE	0	port->variant	4096-ptr_max
PARAM_VALUE	2	reg	356
BUF_SIZE	0	port	s32min-(-2),1-s32max
BUF_SIZE	0	port	s32min-(-2),1-s32max
PREEMPT_ADD			<- disables preempt
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA	1	val	0-u32max
UNITS	0	port	unit_byte
LOCK2		flags
LOCK2	0	&port->lock
HALF_LOCKED2		&desc->lock
HALF_LOCKED2		_T->flags
TYPE_LOCK		(struct pl_dma_pcie)->lock

drivers/pci/controller/pcie-xilinx-cpm.c cpm_pcie_clear_err_interrupts() -> pcie_write()

Type	Parameter	Key	Value
PARAM_VALUE	0	port	4096-ptr_max
PARAM_VALUE	1	val	u32max
PARAM_VALUE	2	reg	3628
DATA_SOURCE	0	port	$0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2		&desc->request_mutex
HALF_LOCKED2		_T->lock
HALF_LOCKED2		flags
HALF_LOCKED2		irq

drivers/pci/controller/pcie-xilinx-cpm.c xilinx_cpm_mask_event_irq() -> pcie_write()

Type	Parameter	Key	Value
PARAM_VALUE	0	port	4096-ptr_max
PARAM_VALUE	2	reg	3604
BUF_SIZE	0	port	s32min-(-2),1-s32max
BUF_SIZE	0	port	s32min-(-2),1-s32max
PREEMPT_ADD			<- disables preempt
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA	1	val	0-u32max[c]
UNITS	0	port	unit_byte
LOCK2	0	&port->lock
HALF_LOCKED2		&desc->lock
HALF_LOCKED2		_T->flags
TYPE_LOCK		(struct xilinx_cpm_pcie)->lock

drivers/pci/controller/pcie-xilinx-cpm.c xilinx_cpm_mask_leg_irq() -> pcie_write()

Type	Parameter	Key	Value
PARAM_VALUE	0	port	4096-ptr_max
PARAM_VALUE	2	reg	3644
BUF_SIZE	0	port	s32min-(-2),1-s32max
BUF_SIZE	0	port	s32min-(-2),1-s32max
CAPPED_DATA	1	val	1
PREEMPT_ADD			<- disables preempt
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA	1	val	0-u32max
UNITS	0	port	unit_byte
LOCK2		flags
LOCK2	0	&port->lock
HALF_LOCKED2		&desc->lock
HALF_LOCKED2		_T->flags
TYPE_LOCK		(struct xilinx_cpm_pcie)->lock

drivers/pci/controller/pcie-xilinx-cpm.c xilinx_cpm_pcie_event_flow() -> pcie_write()

Type	Parameter	Key	Value
PARAM_VALUE	0	port	4096-ptr_max
PARAM_VALUE	2	reg	3600
BUF_SIZE	0	port	s32min-(-2),1-s32max
BUF_SIZE	0	port	s32min-(-2),1-s32max
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA	1	val	0-u32max[c]
UNITS	0	port	unit_byte

drivers/pci/controller/pcie-xilinx-cpm.c xilinx_cpm_pcie_init_port() -> pcie_write()

Type	Parameter	Key	Value
PARAM_VALUE	0	port	4096-ptr_max
PARAM_VALUE	0	port->reg_base	0,4096-ptr_max
PARAM_VALUE	1	val	0
PARAM_VALUE	2	reg	3604
BUF_SIZE	0	port	0-1080
BUF_SIZE	0	port	0-1080
BUF_SIZE	0	port->dev	1616
DATA_SOURCE	0	port	$0
TERMINATED	0	port->cfg->res.name	1
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/pci/controller/pcie-xilinx-cpm.c xilinx_cpm_pcie_init_port() -> pcie_write()

Type	Parameter	Key	Value
PARAM_VALUE	0	port	4096-ptr_max
PARAM_VALUE	0	port->reg_base	0,4096-ptr_max
PARAM_VALUE	1	val	0-536059673
PARAM_VALUE	2	reg	3600
BUF_SIZE	0	port	0-1080
BUF_SIZE	0	port	0-1080
BUF_SIZE	0	port->dev	1616
DATA_SOURCE	0	port	$0
BIT_INFO	1	val	0x0,0x1ff39f19
TERMINATED	0	port->cfg->res.name	1
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA	1	val	0-536059673

drivers/pci/controller/pcie-xilinx-cpm.c xilinx_cpm_pcie_init_port() -> pcie_write()

Type	Parameter	Key	Value
PARAM_VALUE	0	port	4096-ptr_max
PARAM_VALUE	0	port->reg_base	0,4096-ptr_max
PARAM_VALUE	2	reg	3616
BUF_SIZE	0	port	0-1080
BUF_SIZE	0	port	0-1080
BUF_SIZE	0	port->dev	1616
DATA_SOURCE	0	port	$0
BIT_INFO	1	val	0x1,0xffffffff
TERMINATED	0	port->cfg->res.name	1
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA	1	val	0-u32max

drivers/pci/controller/pcie-xilinx-cpm.c xilinx_cpm_unmask_event_irq() -> pcie_write()

Type	Parameter	Key	Value
PARAM_VALUE	0	port	4096-ptr_max
PARAM_VALUE	2	reg	3604
BUF_SIZE	0	port	s32min-(-2),1-s32max
BUF_SIZE	0	port	s32min-(-2),1-s32max
PREEMPT_ADD			<- disables preempt
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA	1	val	0-u32max
UNITS	0	port	unit_byte
LOCK2	0	&port->lock
HALF_LOCKED2		&desc->lock
HALF_LOCKED2		_T->flags
TYPE_LOCK		(struct xilinx_cpm_pcie)->lock

drivers/pci/controller/pcie-xilinx-cpm.c xilinx_cpm_unmask_leg_irq() -> pcie_write()

Type	Parameter	Key	Value
PARAM_VALUE	0	port	4096-ptr_max
PARAM_VALUE	2	reg	3644
BUF_SIZE	0	port	s32min-(-2),1-s32max
BUF_SIZE	0	port	s32min-(-2),1-s32max
PREEMPT_ADD			<- disables preempt
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA	1	val	0-u32max
UNITS	0	port	unit_byte
LOCK2		flags
LOCK2	0	&port->lock
HALF_LOCKED2		&desc->lock
HALF_LOCKED2		_T->flags
TYPE_LOCK		(struct xilinx_cpm_pcie)->lock

drivers/pci/controller/pcie-xilinx.c xilinx_pcie_clear_err_interrupts() -> pcie_write()

Type	Parameter	Key	Value
PARAM_VALUE	0	port	4096-ptr_max
PARAM_VALUE	1	val	u32max
PARAM_VALUE	2	reg	340
DATA_SOURCE	0	port	$0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2		&desc->request_mutex
HALF_LOCKED2		_T->lock
HALF_LOCKED2		flags
HALF_LOCKED2		irq

drivers/pci/controller/pcie-xilinx.c xilinx_pcie_init_irq_domain() -> pcie_write()

Type	Parameter	Key	Value
PARAM_VALUE	0	port	4096-ptr_max
PARAM_VALUE	0	port->reg_base	4096-ptr_max
PARAM_VALUE	2	reg	332
BUF_SIZE	0	port	0-1080
BUF_SIZE	0	port	0-1080
BUF_SIZE	0	port->dev	1616
BUF_SIZE	0	port->leg_domain	376-s32max
CAPPED_DATA	0	port	1
CAPPED_DATA	0	port->leg_domain->hwirq_max	1
DATA_SOURCE	0	port	$0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/pci/controller/pcie-xilinx.c xilinx_pcie_init_irq_domain() -> pcie_write()

Type	Parameter	Key	Value
PARAM_VALUE	0	port	4096-ptr_max
PARAM_VALUE	0	port->reg_base	4096-ptr_max
PARAM_VALUE	1	val	0,4096-4294963200
PARAM_VALUE	2	reg	336
BUF_SIZE	0	port	0-1080
BUF_SIZE	0	port	0-1080
BUF_SIZE	0	port->dev	1616
BUF_SIZE	0	port->leg_domain	376-s32max
CAPPED_DATA	0	port	1
CAPPED_DATA	0	port->leg_domain->hwirq_max	1
DATA_SOURCE	0	port	$0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/pci/controller/pcie-xilinx.c xilinx_pcie_init_port() -> pcie_write()

Type	Parameter	Key	Value
PARAM_VALUE	0	port	4096-ptr_max
PARAM_VALUE	0	port->reg_base	4096-ptr_max
PARAM_VALUE	1	val	0
PARAM_VALUE	2	reg	316
BUF_SIZE	0	port	0-1080
BUF_SIZE	0	port	0-1080
BUF_SIZE	0	port->dev	1616
DATA_SOURCE	0	port	$0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/pci/controller/pcie-xilinx.c xilinx_pcie_init_port() -> pcie_write()

Type	Parameter	Key	Value
PARAM_VALUE	0	port	4096-ptr_max
PARAM_VALUE	0	port->reg_base	4096-ptr_max
PARAM_VALUE	1	val	0-536023021
PARAM_VALUE	2	reg	312
BUF_SIZE	0	port	0-1080
BUF_SIZE	0	port	0-1080
BUF_SIZE	0	port->dev	1616
DATA_SOURCE	0	port	$0
BIT_INFO	1	val	0x0,0x1ff30fed
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA	1	val	0-536023021

drivers/pci/controller/pcie-xilinx.c xilinx_pcie_init_port() -> pcie_write()

Type	Parameter	Key	Value
PARAM_VALUE	0	port	4096-ptr_max
PARAM_VALUE	0	port->reg_base	4096-ptr_max
PARAM_VALUE	1	val	536022797
PARAM_VALUE	2	reg	316
BUF_SIZE	0	port	0-1080
BUF_SIZE	0	port	0-1080
BUF_SIZE	0	port->dev	1616
DATA_SOURCE	0	port	$0
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/pci/controller/pcie-xilinx.c xilinx_pcie_init_port() -> pcie_write()

Type	Parameter	Key	Value
PARAM_VALUE	0	port	4096-ptr_max
PARAM_VALUE	0	port->reg_base	4096-ptr_max
PARAM_VALUE	2	reg	328
BUF_SIZE	0	port	0-1080
BUF_SIZE	0	port	0-1080
BUF_SIZE	0	port->dev	1616
DATA_SOURCE	0	port	$0
BIT_INFO	1	val	0x1,0xffffffff
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA	1	val	0-u32max

drivers/pci/controller/pcie-xilinx.c xilinx_pcie_intr_handler() -> pcie_write()

Type	Parameter	Key	Value
PARAM_VALUE	0	port	4096-ptr_max
PARAM_VALUE	1	val	u32max
PARAM_VALUE	2	reg	344
DATA_SOURCE	0	port	$1
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HALF_LOCKED2		&desc->request_mutex
HALF_LOCKED2		flags

drivers/pci/controller/pcie-xilinx.c xilinx_pcie_intr_handler() -> pcie_write()

Type	Parameter	Key	Value
PARAM_VALUE	0	port	4096-ptr_max
PARAM_VALUE	1	val	1-u32max
PARAM_VALUE	2	reg	312
CAPPED_DATA	1	val	1
DATA_SOURCE	0	port	$1
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA	1	val	1-u32max[c]
HALF_LOCKED2		&desc->request_mutex
HALF_LOCKED2		flags