Defined in 1 files as a prototype:
Defined in 2 files as a function:
Referenced in 4 files:
- drivers/cxl/port.c, line 90
- drivers/pci/pcie/aer.c
- drivers/pci/pcie/aer_cxl_rch.c, line 91
- drivers/pci/pcie/dpc.c, line 480
Smatch caller information:
drivers/pci/pcie/aer.c pci_aer_clear_fatal_status() -> pcie_aer_is_native()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | dev | 4096-ptr_max |
| PARAM_VALUE | 0 | dev->bus | 4096-ptr_max |
| BUF_SIZE | 0 | dev | (-1),16,24,40,56,108-1096,1384,1600,1616,1752,2072,2480,2576,7472,8064 |
| BUF_SIZE | 0 | dev | (-1),16,24,40,56,108-1096,1384,1600,1616,1752,2072,2480,2576,7472,8064 |
| DATA_SOURCE | 0 | dev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HALF_LOCKED2 | &pool->lock |
drivers/pci/pcie/aer.c pci_aer_clear_nonfatal_status() -> pcie_aer_is_native()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | dev | 4096-ptr_max |
| BUF_SIZE | 0 | dev | (-1),16,24,40,56,108-1096,1384,1600,1616,1752,2072,2480,2576,7472,8064 |
| BUF_SIZE | 0 | dev | (-1),16,24,40,56,108-1096,1384,1600,1616,1752,2072,2480,2576,7472,8064 |
| DATA_SOURCE | 0 | dev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HOST_DATA | 0 | dev->current_state | 0-3[c] |
| HALF_LOCKED2 | &of->mutex | ||
| HALF_LOCKED2 | 0 | &dev->dev.mutex |
drivers/pci/pcie/aer.c pci_aer_clear_status() -> pcie_aer_is_native()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | dev | 4096-ptr_max |
| BUF_SIZE | 0 | dev | (-1),1-s32max |
| BUF_SIZE | 0 | dev | (-1),1-s32max |
| BUF_SIZE | 0 | dev->aer_info | (-1),896 |
| BUF_SIZE | 0 | dev->dev.dma_mask | (-1),8 |
| BUF_SIZE | 0 | dev->dev.dma_parms | (-1),16 |
| CAPPED_DATA | 0 | dev | 1 |
| DATA_SOURCE | 0 | dev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HOST_DATA | 0 | dev->acs_capabilities | 0-u16max |
| HOST_DATA | 0 | dev->bus->bridge_ctl | 0-u16max |
| HOST_DATA | 0 | dev->bus->parent->bridge_ctl | 0-u16max |
| HOST_DATA | 0 | dev->class | 0-16777215 |
| HOST_DATA | 0 | dev->current_state | 0-3[c] |
| HOST_DATA | 0 | dev->dev.flags | 0-u32max |
| HOST_DATA | 0 | dev->devcap | 0-u32max |
| HOST_DATA | 0 | dev->devfn | 0-503[c] |
| HOST_DATA | 0 | dev->device | 0-u16max |
| HOST_DATA | 0 | dev->eetlp_prefix_max | 0-7[c] |
| HOST_DATA | 0 | dev->fm_enabled | 0-1[c] |
| HOST_DATA | 0 | dev->hdr_type | 0-255[c] |
| HOST_DATA | 0 | dev->ide_cfg | 0-1[c] |
| HOST_DATA | 0 | dev->ide_tee_limit | 0-1[c] |
| HOST_DATA | 0 | dev->irq | 0-255 |
| HOST_DATA | 0 | dev->is_cxl | 0-1 |
| HOST_DATA | 0 | dev->multifunction | 0-1[c] |
| HOST_DATA | 0 | dev->nr_ide_mem | 0-255[c] |
| HOST_DATA | 0 | dev->pcie_flags_reg | 0-u16max |
| HOST_DATA | 0 | dev->pcie_mpss | 0-7[c] |
| HOST_DATA | 0 | dev->physfn->acs_capabilities | 0-u16max |
| HOST_DATA | 0 | dev->physfn->bus->bridge_ctl | 0-u16max |
| HOST_DATA | 0 | dev->physfn->bus->parent->bridge_ctl | 0-u16max |
| HOST_DATA | 0 | dev->physfn->class | 0-16777215 |
| HOST_DATA | 0 | dev->physfn->current_state | 0-3[c] |
| HOST_DATA | 0 | dev->physfn->devcap | 0-u32max |
| HOST_DATA | 0 | dev->physfn->devfn | 1-503[c] |
| HOST_DATA | 0 | dev->physfn->device | 0-u16max |
| HOST_DATA | 0 | dev->physfn->eetlp_prefix_max | 0-7[c] |
| HOST_DATA | 0 | dev->physfn->fm_enabled | 0-1[c] |
| HOST_DATA | 0 | dev->physfn->hdr_type | 0-255[c] |
| HOST_DATA | 0 | dev->physfn->ide_cfg | 0-1[c] |
| HOST_DATA | 0 | dev->physfn->ide_tee_limit | 0-1[c] |
| HOST_DATA | 0 | dev->physfn->irq | 0-255 |
| HOST_DATA | 0 | dev->physfn->is_cxl | 0-1 |
| HOST_DATA | 0 | dev->physfn->multifunction | 0-1[c] |
| HOST_DATA | 0 | dev->physfn->nr_ide_mem | 0-255[c] |
| HOST_DATA | 0 | dev->physfn->pcie_flags_reg | 0-u16max |
| HOST_DATA | 0 | dev->physfn->pcie_mpss | 0-7[c] |
| HOST_DATA | 0 | dev->physfn->pin | 0 |
| HOST_DATA | 0 | dev->physfn->pme_support | 0-31[c] |
| HOST_DATA | 0 | dev->physfn->ptm_granularity | 0-255[c] |
| HOST_DATA | 0 | dev->physfn->revision | 0-255 |
| HOST_DATA | 0 | dev->physfn->sriov->class | 0-u32max |
| HOST_DATA | 0 | dev->physfn->sriov->hdr_type | 0-255 |
| HOST_DATA | 0 | dev->physfn->sriov->max_VF_buses | 0-255[c] |
| HOST_DATA | 0 | dev->physfn->sriov->offset | 0-u16max |
| HOST_DATA | 0 | dev->physfn->sriov->stride | 0-u16max |
| HOST_DATA | 0 | dev->physfn->sriov->subsystem_device | 0-u16max |
| HOST_DATA | 0 | dev->physfn->sriov->subsystem_vendor | 0-u16max |
| HOST_DATA | 0 | dev->physfn->subsystem_device | 0-u16max |
| HOST_DATA | 0 | dev->physfn->subsystem_vendor | 0-u16max |
| HOST_DATA | 0 | dev->physfn->supported_speeds | 0,2-254[c] |
| HOST_DATA | 0 | dev->physfn->transparent | 0[c] |
| HOST_DATA | 0 | dev->physfn->vendor | 0-u16max |
| HOST_DATA | 0 | dev->pin | 0 |
| HOST_DATA | 0 | dev->pme_support | 0-31[c] |
| HOST_DATA | 0 | dev->ptm_granularity | 0-255[c] |
| HOST_DATA | 0 | dev->revision | 0-255 |
| HOST_DATA | 0 | dev->sriov->cap | 0 |
| HOST_DATA | 0 | dev->sriov->link | 0,8-240[c] |
| HOST_DATA | 0 | dev->sriov->max_VF_buses | 0-255[c] |
| HOST_DATA | 0 | dev->sriov->offset | 0-u16max |
| HOST_DATA | 0 | dev->sriov->stride | 0-u16max |
| HOST_DATA | 0 | dev->sriov->vf_device | 0 |
| HOST_DATA | 0 | dev->subsystem_device | 0-u16max |
| HOST_DATA | 0 | dev->subsystem_vendor | 0-u16max |
| HOST_DATA | 0 | dev->supported_speeds | 0,2-254[c] |
| HOST_DATA | 0 | dev->transparent | 0[c] |
| HOST_DATA | 0 | dev->vendor | 0-u16max |
| HOST_DATA | 0 | *dev->dev.driver_data | s64min-s64max |
| HOST_DATA | 0 | *dev->physfn->dev.driver_data | s64min-s64max |
| UNITS | 0 | dev | unit_byte |
| HALF_LOCKED2 | 0 | &dev->dev.mutex |
drivers/pci/pcie/aer.c pci_aer_handle_error() -> pcie_aer_is_native()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | dev | 4096-ptr_max |
| DATA_SOURCE | 0 | dev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HALF_LOCKED2 | _T->lock |
drivers/pci/pcie/aer.c pci_aer_init() -> pcie_aer_is_native()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | dev | 4096-ptr_max |
| PARAM_VALUE | 0 | dev->aer_cap | 256-4092 |
| PARAM_VALUE | 0 | dev->bus | 4096-ptr_max |
| BUF_SIZE | 0 | dev->aer_info | 896 |
| BUF_SIZE | 0 | dev->dev.dma_mask | 8 |
| BUF_SIZE | 0 | dev->dev.dma_parms | 16 |
| CAPPED_DATA | 0 | dev | 1 |
| CAPPED_DATA | 0 | dev->aer_cap | 1 |
| DATA_SOURCE | 0 | dev | $0 |
| MEM_ZERO | 0 | &dev->aer_info->correctable_ratelimit | |
| MEM_ZERO | 0 | &dev->aer_info->nonfatal_ratelimit | |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HOST_DATA | 0 | dev->acs_capabilities | 0-u16max |
| HOST_DATA | 0 | dev->bus->bridge_ctl | 0-u16max |
| HOST_DATA | 0 | dev->bus->parent->bridge_ctl | 0-u16max |
| HOST_DATA | 0 | dev->class | 0-16777215 |
| HOST_DATA | 0 | dev->current_state | 0-3[c] |
| HOST_DATA | 0 | dev->devcap | 0-u32max |
| HOST_DATA | 0 | dev->devfn | 0-503[c] |
| HOST_DATA | 0 | dev->device | 0-u16max |
| HOST_DATA | 0 | dev->eetlp_prefix_max | 0-7[c] |
| HOST_DATA | 0 | dev->fm_enabled | 0-1[c] |
| HOST_DATA | 0 | dev->hdr_type | 0-255[c] |
| HOST_DATA | 0 | dev->ide_cfg | 0-1[c] |
| HOST_DATA | 0 | dev->ide_tee_limit | 0-1[c] |
| HOST_DATA | 0 | dev->irq | 0-255 |
| HOST_DATA | 0 | dev->is_cxl | 0-1 |
| HOST_DATA | 0 | dev->multifunction | 0-1[c] |
| HOST_DATA | 0 | dev->nr_ide_mem | 0-255[c] |
| HOST_DATA | 0 | dev->pcie_flags_reg | 0-u16max |
| HOST_DATA | 0 | dev->pcie_mpss | 0-7[c] |
| HOST_DATA | 0 | dev->physfn->acs_capabilities | 0-u16max |
| HOST_DATA | 0 | dev->physfn->bus->bridge_ctl | 0-u16max |
| HOST_DATA | 0 | dev->physfn->bus->parent->bridge_ctl | 0-u16max |
| HOST_DATA | 0 | dev->physfn->class | 0-16777215 |
| HOST_DATA | 0 | dev->physfn->current_state | 0-3[c] |
| HOST_DATA | 0 | dev->physfn->devcap | 0-u32max |
| HOST_DATA | 0 | dev->physfn->devfn | 1-503[c] |
| HOST_DATA | 0 | dev->physfn->device | 0-u16max |
| HOST_DATA | 0 | dev->physfn->eetlp_prefix_max | 0-7[c] |
| HOST_DATA | 0 | dev->physfn->fm_enabled | 0-1[c] |
| HOST_DATA | 0 | dev->physfn->hdr_type | 0-255[c] |
| HOST_DATA | 0 | dev->physfn->ide_cfg | 0-1[c] |
| HOST_DATA | 0 | dev->physfn->ide_tee_limit | 0-1[c] |
| HOST_DATA | 0 | dev->physfn->irq | 0-255 |
| HOST_DATA | 0 | dev->physfn->is_cxl | 0-1 |
| HOST_DATA | 0 | dev->physfn->multifunction | 0-1[c] |
| HOST_DATA | 0 | dev->physfn->nr_ide_mem | 0-255[c] |
| HOST_DATA | 0 | dev->physfn->pcie_flags_reg | 0-u16max |
| HOST_DATA | 0 | dev->physfn->pcie_mpss | 0-7[c] |
| HOST_DATA | 0 | dev->physfn->pin | 0 |
| HOST_DATA | 0 | dev->physfn->pme_support | 0-31[c] |
| HOST_DATA | 0 | dev->physfn->ptm_granularity | 0-255[c] |
| HOST_DATA | 0 | dev->physfn->revision | 0-255 |
| HOST_DATA | 0 | dev->physfn->sriov->class | 0-u32max |
| HOST_DATA | 0 | dev->physfn->sriov->hdr_type | 0-255 |
| HOST_DATA | 0 | dev->physfn->sriov->max_VF_buses | 0-255[c] |
| HOST_DATA | 0 | dev->physfn->sriov->offset | 0-u16max |
| HOST_DATA | 0 | dev->physfn->sriov->stride | 0-u16max |
| HOST_DATA | 0 | dev->physfn->sriov->subsystem_device | 0-u16max |
| HOST_DATA | 0 | dev->physfn->sriov->subsystem_vendor | 0-u16max |
| HOST_DATA | 0 | dev->physfn->subsystem_device | 0-u16max |
| HOST_DATA | 0 | dev->physfn->subsystem_vendor | 0-u16max |
| HOST_DATA | 0 | dev->physfn->supported_speeds | 0,2-254[c] |
| HOST_DATA | 0 | dev->physfn->transparent | 0[c] |
| HOST_DATA | 0 | dev->physfn->vendor | 0-u16max |
| HOST_DATA | 0 | dev->pin | 0 |
| HOST_DATA | 0 | dev->ptm_granularity | 0-255[c] |
| HOST_DATA | 0 | dev->revision | 0-255 |
| HOST_DATA | 0 | dev->sriov->cap | 0 |
| HOST_DATA | 0 | dev->sriov->initial_VFs | 0 |
| HOST_DATA | 0 | dev->sriov->link | 0,8-240[c] |
| HOST_DATA | 0 | dev->sriov->max_VF_buses | 0-255[c] |
| HOST_DATA | 0 | dev->sriov->offset | 0-u16max |
| HOST_DATA | 0 | dev->sriov->stride | 0-u16max |
| HOST_DATA | 0 | dev->sriov->vf_device | 0 |
| HOST_DATA | 0 | dev->subsystem_device | 0-u16max |
| HOST_DATA | 0 | dev->subsystem_vendor | 0-u16max |
| HOST_DATA | 0 | dev->supported_speeds | 0,2-254[c] |
| HOST_DATA | 0 | dev->transparent | 0[c] |
| HOST_DATA | 0 | dev->vendor | 0-u16max |
| HOST_DATA | 0 | *dev->dev.driver_data | s64min-s64max |
| HOST_DATA | 0 | *dev->physfn->dev.driver_data | s64min-s64max |
| HALF_LOCKED2 | global &pci_rescan_remove_lock |
drivers/pci/pcie/aer.c pci_enable_pcie_error_reporting() -> pcie_aer_is_native()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | dev | 4096-ptr_max |
| PARAM_VALUE | 0 | dev->aer_cap | 256-4092 |
| PARAM_VALUE | 0 | dev->bus | 4096-ptr_max |
| BUF_SIZE | 0 | dev->aer_info | 896 |
| BUF_SIZE | 0 | dev->dev.dma_mask | 8 |
| BUF_SIZE | 0 | dev->dev.dma_parms | 16 |
| CAPPED_DATA | 0 | dev | 1 |
| CAPPED_DATA | 0 | dev->aer_cap | 1 |
| DATA_SOURCE | 0 | dev | $0 |
| MEM_ZERO | 0 | &dev->aer_info->correctable_ratelimit | |
| MEM_ZERO | 0 | &dev->aer_info->nonfatal_ratelimit | |
| MEM_ZERO | 0 | &dev->dev.power.suspend_timer | |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HOST_DATA | 0 | dev->acs_capabilities | 0-u16max |
| HOST_DATA | 0 | dev->bus->bridge_ctl | 0-u16max |
| HOST_DATA | 0 | dev->bus->parent->bridge_ctl | 0-u16max |
| HOST_DATA | 0 | dev->class | 0-16777215 |
| HOST_DATA | 0 | dev->current_state | 0-3[c] |
| HOST_DATA | 0 | dev->devcap | 0-u32max |
| HOST_DATA | 0 | dev->devfn | 0-503[c] |
| HOST_DATA | 0 | dev->device | 0-u16max |
| HOST_DATA | 0 | dev->eetlp_prefix_max | 0-7[c] |
| HOST_DATA | 0 | dev->fm_enabled | 0-1[c] |
| HOST_DATA | 0 | dev->hdr_type | 0-255[c] |
| HOST_DATA | 0 | dev->ide_cfg | 0-1[c] |
| HOST_DATA | 0 | dev->ide_tee_limit | 0-1[c] |
| HOST_DATA | 0 | dev->irq | 0-255 |
| HOST_DATA | 0 | dev->is_cxl | 0-1 |
| HOST_DATA | 0 | dev->multifunction | 0-1[c] |
| HOST_DATA | 0 | dev->nr_ide_mem | 0-255[c] |
| HOST_DATA | 0 | dev->pcie_flags_reg | 0-u16max |
| HOST_DATA | 0 | dev->pcie_mpss | 0-7[c] |
| HOST_DATA | 0 | dev->physfn->acs_capabilities | 0-u16max |
| HOST_DATA | 0 | dev->physfn->bus->bridge_ctl | 0-u16max |
| HOST_DATA | 0 | dev->physfn->bus->parent->bridge_ctl | 0-u16max |
| HOST_DATA | 0 | dev->physfn->class | 0-16777215 |
| HOST_DATA | 0 | dev->physfn->current_state | 0-3[c] |
| HOST_DATA | 0 | dev->physfn->devcap | 0-u32max |
| HOST_DATA | 0 | dev->physfn->devfn | 1-503[c] |
| HOST_DATA | 0 | dev->physfn->device | 0-u16max |
| HOST_DATA | 0 | dev->physfn->eetlp_prefix_max | 0-7[c] |
| HOST_DATA | 0 | dev->physfn->fm_enabled | 0-1[c] |
| HOST_DATA | 0 | dev->physfn->hdr_type | 0-255[c] |
| HOST_DATA | 0 | dev->physfn->ide_cfg | 0-1[c] |
| HOST_DATA | 0 | dev->physfn->ide_tee_limit | 0-1[c] |
| HOST_DATA | 0 | dev->physfn->irq | 0-255 |
| HOST_DATA | 0 | dev->physfn->is_cxl | 0-1 |
| HOST_DATA | 0 | dev->physfn->multifunction | 0-1[c] |
| HOST_DATA | 0 | dev->physfn->nr_ide_mem | 0-255[c] |
| HOST_DATA | 0 | dev->physfn->pcie_flags_reg | 0-u16max |
| HOST_DATA | 0 | dev->physfn->pcie_mpss | 0-7[c] |
| HOST_DATA | 0 | dev->physfn->pin | 0 |
| HOST_DATA | 0 | dev->physfn->pme_support | 0-31[c] |
| HOST_DATA | 0 | dev->physfn->ptm_granularity | 0-255[c] |
| HOST_DATA | 0 | dev->physfn->revision | 0-255 |
| HOST_DATA | 0 | dev->physfn->sriov->class | 0-u32max |
| HOST_DATA | 0 | dev->physfn->sriov->hdr_type | 0-255 |
| HOST_DATA | 0 | dev->physfn->sriov->max_VF_buses | 0-255[c] |
| HOST_DATA | 0 | dev->physfn->sriov->offset | 0-u16max |
| HOST_DATA | 0 | dev->physfn->sriov->stride | 0-u16max |
| HOST_DATA | 0 | dev->physfn->sriov->subsystem_device | 0-u16max |
| HOST_DATA | 0 | dev->physfn->sriov->subsystem_vendor | 0-u16max |
| HOST_DATA | 0 | dev->physfn->subsystem_device | 0-u16max |
| HOST_DATA | 0 | dev->physfn->subsystem_vendor | 0-u16max |
| HOST_DATA | 0 | dev->physfn->supported_speeds | 0,2-254[c] |
| HOST_DATA | 0 | dev->physfn->transparent | 0[c] |
| HOST_DATA | 0 | dev->physfn->vendor | 0-u16max |
| HOST_DATA | 0 | dev->pin | 0 |
| HOST_DATA | 0 | dev->ptm_granularity | 0-255[c] |
| HOST_DATA | 0 | dev->revision | 0-255 |
| HOST_DATA | 0 | dev->sriov->cap | 0 |
| HOST_DATA | 0 | dev->sriov->link | 0,8-240[c] |
| HOST_DATA | 0 | dev->sriov->max_VF_buses | 0-255[c] |
| HOST_DATA | 0 | dev->sriov->offset | 0-u16max |
| HOST_DATA | 0 | dev->sriov->stride | 0-u16max |
| HOST_DATA | 0 | dev->sriov->vf_device | 0 |
| HOST_DATA | 0 | dev->subsystem_device | 0-u16max |
| HOST_DATA | 0 | dev->subsystem_vendor | 0-u16max |
| HOST_DATA | 0 | dev->supported_speeds | 0,2-254[c] |
| HOST_DATA | 0 | dev->transparent | 0[c] |
| HOST_DATA | 0 | dev->vendor | 0-u16max |
| HOST_DATA | 0 | *dev->dev.driver_data | s64min-s64max |
| HOST_DATA | 0 | *dev->physfn->dev.driver_data | s64min-s64max |
| HALF_LOCKED2 | global &pci_rescan_remove_lock |
drivers/pci/pcie/aer.c pcie_set_ecrc_checking() -> pcie_aer_is_native()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | dev | 4096-ptr_max |
| PARAM_VALUE | 0 | dev->aer_cap | 256-4092 |
| PARAM_VALUE | 0 | dev->bus | 4096-ptr_max |
| BUF_SIZE | 0 | dev->aer_info | 896 |
| BUF_SIZE | 0 | dev->dev.dma_mask | 8 |
| BUF_SIZE | 0 | dev->dev.dma_parms | 16 |
| CAPPED_DATA | 0 | dev | 1 |
| CAPPED_DATA | 0 | dev->aer_cap | 1 |
| DATA_SOURCE | 0 | dev | $0 |
| MEM_ZERO | 0 | &dev->aer_info->correctable_ratelimit | |
| MEM_ZERO | 0 | &dev->aer_info->nonfatal_ratelimit | |
| MEM_ZERO | 0 | &dev->dev.power.suspend_timer | |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HOST_DATA | 0 | dev->acs_capabilities | 0-u16max |
| HOST_DATA | 0 | dev->bus->bridge_ctl | 0-u16max |
| HOST_DATA | 0 | dev->bus->parent->bridge_ctl | 0-u16max |
| HOST_DATA | 0 | dev->class | 0-16777215 |
| HOST_DATA | 0 | dev->current_state | 0-3[c] |
| HOST_DATA | 0 | dev->devcap | 0-u32max |
| HOST_DATA | 0 | dev->devfn | 0-503[c] |
| HOST_DATA | 0 | dev->device | 0-u16max |
| HOST_DATA | 0 | dev->eetlp_prefix_max | 0-7[c] |
| HOST_DATA | 0 | dev->fm_enabled | 0-1[c] |
| HOST_DATA | 0 | dev->hdr_type | 0-255[c] |
| HOST_DATA | 0 | dev->ide_cfg | 0-1[c] |
| HOST_DATA | 0 | dev->ide_tee_limit | 0-1[c] |
| HOST_DATA | 0 | dev->irq | 0-255 |
| HOST_DATA | 0 | dev->is_cxl | 0-1 |
| HOST_DATA | 0 | dev->multifunction | 0-1[c] |
| HOST_DATA | 0 | dev->nr_ide_mem | 0-255[c] |
| HOST_DATA | 0 | dev->pcie_flags_reg | 0-u16max |
| HOST_DATA | 0 | dev->pcie_mpss | 0-7[c] |
| HOST_DATA | 0 | dev->physfn->acs_capabilities | 0-u16max |
| HOST_DATA | 0 | dev->physfn->bus->bridge_ctl | 0-u16max |
| HOST_DATA | 0 | dev->physfn->bus->parent->bridge_ctl | 0-u16max |
| HOST_DATA | 0 | dev->physfn->class | 0-16777215 |
| HOST_DATA | 0 | dev->physfn->current_state | 0-3[c] |
| HOST_DATA | 0 | dev->physfn->devcap | 0-u32max |
| HOST_DATA | 0 | dev->physfn->devfn | 1-503[c] |
| HOST_DATA | 0 | dev->physfn->device | 0-u16max |
| HOST_DATA | 0 | dev->physfn->eetlp_prefix_max | 0-7[c] |
| HOST_DATA | 0 | dev->physfn->fm_enabled | 0-1[c] |
| HOST_DATA | 0 | dev->physfn->hdr_type | 0-255[c] |
| HOST_DATA | 0 | dev->physfn->ide_cfg | 0-1[c] |
| HOST_DATA | 0 | dev->physfn->ide_tee_limit | 0-1[c] |
| HOST_DATA | 0 | dev->physfn->irq | 0-255 |
| HOST_DATA | 0 | dev->physfn->is_cxl | 0-1 |
| HOST_DATA | 0 | dev->physfn->multifunction | 0-1[c] |
| HOST_DATA | 0 | dev->physfn->nr_ide_mem | 0-255[c] |
| HOST_DATA | 0 | dev->physfn->pcie_flags_reg | 0-u16max |
| HOST_DATA | 0 | dev->physfn->pcie_mpss | 0-7[c] |
| HOST_DATA | 0 | dev->physfn->pin | 0 |
| HOST_DATA | 0 | dev->physfn->pme_support | 0-31[c] |
| HOST_DATA | 0 | dev->physfn->ptm_granularity | 0-255[c] |
| HOST_DATA | 0 | dev->physfn->revision | 0-255 |
| HOST_DATA | 0 | dev->physfn->sriov->class | 0-u32max |
| HOST_DATA | 0 | dev->physfn->sriov->hdr_type | 0-255 |
| HOST_DATA | 0 | dev->physfn->sriov->max_VF_buses | 0-255[c] |
| HOST_DATA | 0 | dev->physfn->sriov->offset | 0-u16max |
| HOST_DATA | 0 | dev->physfn->sriov->stride | 0-u16max |
| HOST_DATA | 0 | dev->physfn->sriov->subsystem_device | 0-u16max |
| HOST_DATA | 0 | dev->physfn->sriov->subsystem_vendor | 0-u16max |
| HOST_DATA | 0 | dev->physfn->subsystem_device | 0-u16max |
| HOST_DATA | 0 | dev->physfn->subsystem_vendor | 0-u16max |
| HOST_DATA | 0 | dev->physfn->supported_speeds | 0,2-254[c] |
| HOST_DATA | 0 | dev->physfn->transparent | 0[c] |
| HOST_DATA | 0 | dev->physfn->vendor | 0-u16max |
| HOST_DATA | 0 | dev->pin | 0 |
| HOST_DATA | 0 | dev->ptm_granularity | 0-255[c] |
| HOST_DATA | 0 | dev->revision | 0-255 |
| HOST_DATA | 0 | dev->sriov->cap | 0 |
| HOST_DATA | 0 | dev->sriov->link | 0,8-240[c] |
| HOST_DATA | 0 | dev->sriov->max_VF_buses | 0-255[c] |
| HOST_DATA | 0 | dev->sriov->offset | 0-u16max |
| HOST_DATA | 0 | dev->sriov->stride | 0-u16max |
| HOST_DATA | 0 | dev->sriov->vf_device | 0 |
| HOST_DATA | 0 | dev->subsystem_device | 0-u16max |
| HOST_DATA | 0 | dev->subsystem_vendor | 0-u16max |
| HOST_DATA | 0 | dev->supported_speeds | 0,2-254[c] |
| HOST_DATA | 0 | dev->transparent | 0[c] |
| HOST_DATA | 0 | dev->vendor | 0-u16max |
| HOST_DATA | 0 | *dev->dev.driver_data | s64min-s64max |
| HOST_DATA | 0 | *dev->physfn->dev.driver_data | s64min-s64max |
| HALF_LOCKED2 | global &pci_rescan_remove_lock |
drivers/pci/pcie/aer_cxl_rch.c handles_cxl_errors() -> pcie_aer_is_native()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | dev | 4096-ptr_max |
| DATA_SOURCE | 0 | dev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING |
drivers/cxl/port.c cxl_ras_unmask() -> pcie_aer_is_native()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | dev | 4096-ptr_max |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| UNITS | 0 | dev | unit_byte |
| HALF_LOCKED2 | &dev->mutex |
drivers/pci/pcie/dpc.c dpc_probe() -> pcie_aer_is_native()
| Type | Parameter | Key | Value |
|---|---|---|---|
| RX_PATH | |||
| TASK_NOT_RUNNING |