Documented in 1 files:
Defined in 1 files as a prototype:
Defined in 1 files as a function:
Referenced in 7 files:
- drivers/gpu/drm/amd/amdgpu/amdgpu_device.c, line 3953
- drivers/infiniband/hw/bnxt_re/qplib_res.c
- drivers/infiniband/hw/mlx5/data_direct.c
- drivers/infiniband/hw/qedr/main.c, line 416
- drivers/net/ethernet/mellanox/mlx5/core/main.c
- drivers/pci/pci.c, line 3773
- drivers/vfio/pci/vfio_pci_core.c
Smatch caller information:
drivers/vfio/pci/vfio_pci_core.c vfio_pci_info_atomic_cap() -> pci_enable_atomic_ops_to_root()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | dev | 4096-ptr_max |
| PARAM_VALUE | 0 | dev->pcie_cap | 0-1 |
| PARAM_VALUE | 1 | cap_mask | 128 |
| DATA_SOURCE | 0 | dev | r pci_physfn |
drivers/vfio/pci/vfio_pci_core.c vfio_pci_info_atomic_cap() -> pci_enable_atomic_ops_to_root()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | dev | 4096-ptr_max |
| PARAM_VALUE | 0 | dev->pcie_cap | 0-1 |
| PARAM_VALUE | 1 | cap_mask | 256 |
| DATA_SOURCE | 0 | dev | r pci_physfn |
drivers/vfio/pci/vfio_pci_core.c vfio_pci_info_atomic_cap() -> pci_enable_atomic_ops_to_root()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | dev | 4096-ptr_max |
| PARAM_VALUE | 0 | dev->pcie_cap | 0-1 |
| PARAM_VALUE | 1 | cap_mask | 512 |
| DATA_SOURCE | 0 | dev | r pci_physfn |
drivers/infiniband/hw/mlx5/data_direct.c mlx5_data_direct_probe() -> pci_enable_atomic_ops_to_root()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | dev | 4096-ptr_max |
| PARAM_VALUE | 0 | dev->bus->self->link_bwctrl->cdev | (-22),(-19),(-12),0-s64max |
| PARAM_VALUE | 0 | dev->dev.dma_mask | 4096-ptr_max |
| PARAM_VALUE | 0 | dev->dev.dma_parms | 0,4096-ptr_max |
| PARAM_VALUE | 0 | dev->dev.dma_parms->max_segment_size | 2147483648 |
| PARAM_VALUE | 0 | dev->dev.power.wakeirq->status | 0-4294967295 |
| PARAM_VALUE | 0 | dev->driver | 4096-ptr_max |
| PARAM_VALUE | 0 | dev->driver->err_handler | 0,4096-ptr_max |
| PARAM_VALUE | 0 | dev->error_state | 0-2,4-u32max |
| PARAM_VALUE | 0 | dev->is_busmaster | 1 |
| PARAM_VALUE | 0 | dev->link_bwctrl->cdev | 0-s64max |
| PARAM_VALUE | 0 | dev->pcie_cap | 0-1 |
| PARAM_VALUE | 0 | *dev->saved_config_space | 0-4294967295 |
| PARAM_VALUE | 1 | cap_mask | 128 |
| BUF_SIZE | 0 | dev | (-1),16,24,40,56,108-1096,1384,1600,1616,1752,2072,2576,8064 |
| BUF_SIZE | 0 | dev | (-1),16,24,40,56,108-1096,1384,1600,1616,1752,2072,2576,8064 |
| CAPPED_DATA | 0 | dev | 1 |
| DATA_SOURCE | 0 | dev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HOST_DATA | 0 | dev->current_state | 0-3[c] |
| HALF_LOCKED2 | 0 | &dev->dev.mutex |
drivers/infiniband/hw/mlx5/data_direct.c mlx5_data_direct_probe() -> pci_enable_atomic_ops_to_root()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | dev | 4096-ptr_max |
| PARAM_VALUE | 0 | dev->bus->self->link_bwctrl->cdev | (-22),(-19),(-12),0-s64max |
| PARAM_VALUE | 0 | dev->dev.dma_mask | 4096-ptr_max |
| PARAM_VALUE | 0 | dev->dev.dma_parms | 0,4096-ptr_max |
| PARAM_VALUE | 0 | dev->dev.dma_parms->max_segment_size | 2147483648 |
| PARAM_VALUE | 0 | dev->dev.power.wakeirq->status | 0-4294967295 |
| PARAM_VALUE | 0 | dev->driver | 4096-ptr_max |
| PARAM_VALUE | 0 | dev->driver->err_handler | 0,4096-ptr_max |
| PARAM_VALUE | 0 | dev->error_state | 0-2,4-u32max |
| PARAM_VALUE | 0 | dev->is_busmaster | 1 |
| PARAM_VALUE | 0 | dev->link_bwctrl->cdev | 0-s64max |
| PARAM_VALUE | 0 | dev->pcie_cap | 0-1 |
| PARAM_VALUE | 0 | *dev->saved_config_space | 0-4294967295 |
| PARAM_VALUE | 1 | cap_mask | 256 |
| BUF_SIZE | 0 | dev | (-1),16,24,40,56,108-1096,1384,1600,1616,1752,2072,2576,8064 |
| BUF_SIZE | 0 | dev | (-1),16,24,40,56,108-1096,1384,1600,1616,1752,2072,2576,8064 |
| CAPPED_DATA | 0 | dev | 1 |
| DATA_SOURCE | 0 | dev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HOST_DATA | 0 | dev->acs_capabilities | 0-u16max |
| HOST_DATA | 0 | dev->bus->bridge_ctl | 0-u16max |
| HOST_DATA | 0 | dev->bus->parent->bridge_ctl | 0-u16max |
| HOST_DATA | 0 | dev->class | 0-16777215 |
| HOST_DATA | 0 | dev->current_state | 0-3[c] |
| HOST_DATA | 0 | dev->devcap | 0-u32max |
| HOST_DATA | 0 | dev->devfn | 0-503[c] |
| HOST_DATA | 0 | dev->device | 0-u16max |
| HOST_DATA | 0 | dev->eetlp_prefix_max | 0-7[c] |
| HOST_DATA | 0 | dev->fm_enabled | 0-1[c] |
| HOST_DATA | 0 | dev->hdr_type | 0-255[c] |
| HOST_DATA | 0 | dev->ide_cfg | 0-1[c] |
| HOST_DATA | 0 | dev->ide_tee_limit | 0-1[c] |
| HOST_DATA | 0 | dev->irq | 0-255 |
| HOST_DATA | 0 | dev->is_cxl | 0-1 |
| HOST_DATA | 0 | dev->multifunction | 0-1[c] |
| HOST_DATA | 0 | dev->nr_ide_mem | 0-255[c] |
| HOST_DATA | 0 | dev->pcie_flags_reg | 0-u16max |
| HOST_DATA | 0 | dev->pcie_mpss | 0-7[c] |
| HOST_DATA | 0 | dev->physfn->acs_capabilities | 0-u16max |
| HOST_DATA | 0 | dev->physfn->bus->bridge_ctl | 0-u16max |
| HOST_DATA | 0 | dev->physfn->bus->parent->bridge_ctl | 0-u16max |
| HOST_DATA | 0 | dev->physfn->class | 0-16777215 |
| HOST_DATA | 0 | dev->physfn->current_state | 0-3[c] |
| HOST_DATA | 0 | dev->physfn->devcap | 0-u32max |
| HOST_DATA | 0 | dev->physfn->devfn | 1-503[c] |
| HOST_DATA | 0 | dev->physfn->device | 0-u16max |
| HOST_DATA | 0 | dev->physfn->eetlp_prefix_max | 0-7[c] |
| HOST_DATA | 0 | dev->physfn->fm_enabled | 0-1[c] |
| HOST_DATA | 0 | dev->physfn->hdr_type | 0-255[c] |
| HOST_DATA | 0 | dev->physfn->ide_cfg | 0-1[c] |
| HOST_DATA | 0 | dev->physfn->ide_tee_limit | 0-1[c] |
| HOST_DATA | 0 | dev->physfn->irq | 0-255 |
| HOST_DATA | 0 | dev->physfn->is_cxl | 0-1 |
| HOST_DATA | 0 | dev->physfn->multifunction | 0-1[c] |
| HOST_DATA | 0 | dev->physfn->nr_ide_mem | 0-255[c] |
| HOST_DATA | 0 | dev->physfn->pcie_flags_reg | 0-u16max |
| HOST_DATA | 0 | dev->physfn->pcie_mpss | 0-7[c] |
| HOST_DATA | 0 | dev->physfn->pin | 0 |
| HOST_DATA | 0 | dev->physfn->pme_support | 0-31[c] |
| HOST_DATA | 0 | dev->physfn->ptm_granularity | 0-255[c] |
| HOST_DATA | 0 | dev->physfn->revision | 0-255 |
| HOST_DATA | 0 | dev->physfn->sriov->class | 0-4294967295 |
| HOST_DATA | 0 | dev->physfn->sriov->hdr_type | 0-255 |
| HOST_DATA | 0 | dev->physfn->sriov->max_VF_buses | 0-255[c] |
| HOST_DATA | 0 | dev->physfn->sriov->offset | 0-u16max |
| HOST_DATA | 0 | dev->physfn->sriov->stride | 0-u16max |
| HOST_DATA | 0 | dev->physfn->sriov->subsystem_device | 0-u16max |
| HOST_DATA | 0 | dev->physfn->sriov->subsystem_vendor | 0-u16max |
| HOST_DATA | 0 | dev->physfn->subsystem_device | 0-u16max |
| HOST_DATA | 0 | dev->physfn->subsystem_vendor | 0-u16max |
| HOST_DATA | 0 | dev->physfn->supported_speeds | 0,2-254[c] |
| HOST_DATA | 0 | dev->physfn->transparent | 0[c] |
| HOST_DATA | 0 | dev->physfn->vendor | 0-u16max |
| HOST_DATA | 0 | dev->pin | 0 |
| HOST_DATA | 0 | dev->pme_support | 0-31[c] |
| HOST_DATA | 0 | dev->ptm_granularity | 0-255[c] |
| HOST_DATA | 0 | dev->rcec_ea->bitmap | 0 |
| HOST_DATA | 0 | dev->rcec_ea->lastbusn | 0[c] |
| HOST_DATA | 0 | dev->revision | 0-255 |
| HOST_DATA | 0 | dev->sriov->initial_VFs | 0 |
| HOST_DATA | 0 | dev->sriov->max_VF_buses | 0-255[c] |
| HOST_DATA | 0 | dev->sriov->offset | 0-u16max |
| HOST_DATA | 0 | dev->sriov->stride | 0-u16max |
| HOST_DATA | 0 | dev->subsystem_device | 0-u16max |
| HOST_DATA | 0 | dev->subsystem_vendor | 0-u16max |
| HOST_DATA | 0 | dev->supported_speeds | 0,2-254[c] |
| HOST_DATA | 0 | dev->transparent | 0[c] |
| HOST_DATA | 0 | dev->vendor | 0-u16max |
| HOST_DATA | 0 | *dev->dev.driver_data | s64min-s64max |
| HOST_DATA | 0 | *dev->physfn->dev.driver_data | s64min-s64max |
| HALF_LOCKED2 | 0 | &dev->dev.mutex |
drivers/infiniband/hw/mlx5/data_direct.c mlx5_data_direct_probe() -> pci_enable_atomic_ops_to_root()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | dev | 4096-ptr_max |
| PARAM_VALUE | 0 | dev->bus->self->link_bwctrl->cdev | (-22),(-19),(-12),0-s64max |
| PARAM_VALUE | 0 | dev->dev.dma_mask | 4096-ptr_max |
| PARAM_VALUE | 0 | dev->dev.dma_parms | 0,4096-ptr_max |
| PARAM_VALUE | 0 | dev->dev.dma_parms->max_segment_size | 2147483648 |
| PARAM_VALUE | 0 | dev->dev.power.wakeirq->status | 0-4294967295 |
| PARAM_VALUE | 0 | dev->driver | 4096-ptr_max |
| PARAM_VALUE | 0 | dev->driver->err_handler | 0,4096-ptr_max |
| PARAM_VALUE | 0 | dev->error_state | 0-2,4-u32max |
| PARAM_VALUE | 0 | dev->is_busmaster | 1 |
| PARAM_VALUE | 0 | dev->link_bwctrl->cdev | 0-s64max |
| PARAM_VALUE | 0 | dev->pcie_cap | 0-1 |
| PARAM_VALUE | 0 | *dev->saved_config_space | 0-4294967295 |
| PARAM_VALUE | 1 | cap_mask | 512 |
| BUF_SIZE | 0 | dev | (-1),16,24,40,56,108-1096,1384,1600,1616,1752,2072,2576,8064 |
| BUF_SIZE | 0 | dev | (-1),16,24,40,56,108-1096,1384,1600,1616,1752,2072,2576,8064 |
| CAPPED_DATA | 0 | dev | 1 |
| DATA_SOURCE | 0 | dev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HOST_DATA | 0 | dev->acs_capabilities | 0-u16max |
| HOST_DATA | 0 | dev->bus->bridge_ctl | 0-u16max |
| HOST_DATA | 0 | dev->bus->parent->bridge_ctl | 0-u16max |
| HOST_DATA | 0 | dev->class | 0-16777215 |
| HOST_DATA | 0 | dev->current_state | 0-3[c] |
| HOST_DATA | 0 | dev->devcap | 0-u32max |
| HOST_DATA | 0 | dev->devfn | 0-503[c] |
| HOST_DATA | 0 | dev->device | 0-u16max |
| HOST_DATA | 0 | dev->eetlp_prefix_max | 0-7[c] |
| HOST_DATA | 0 | dev->fm_enabled | 0-1[c] |
| HOST_DATA | 0 | dev->hdr_type | 0-255[c] |
| HOST_DATA | 0 | dev->ide_cfg | 0-1[c] |
| HOST_DATA | 0 | dev->ide_tee_limit | 0-1[c] |
| HOST_DATA | 0 | dev->irq | 0-255 |
| HOST_DATA | 0 | dev->is_cxl | 0-1 |
| HOST_DATA | 0 | dev->multifunction | 0-1[c] |
| HOST_DATA | 0 | dev->nr_ide_mem | 0-255[c] |
| HOST_DATA | 0 | dev->pcie_flags_reg | 0-u16max |
| HOST_DATA | 0 | dev->pcie_mpss | 0-7[c] |
| HOST_DATA | 0 | dev->physfn->acs_capabilities | 0-u16max |
| HOST_DATA | 0 | dev->physfn->bus->bridge_ctl | 0-u16max |
| HOST_DATA | 0 | dev->physfn->bus->parent->bridge_ctl | 0-u16max |
| HOST_DATA | 0 | dev->physfn->class | 0-16777215 |
| HOST_DATA | 0 | dev->physfn->current_state | 0-3[c] |
| HOST_DATA | 0 | dev->physfn->devcap | 0-u32max |
| HOST_DATA | 0 | dev->physfn->devfn | 1-503[c] |
| HOST_DATA | 0 | dev->physfn->device | 0-u16max |
| HOST_DATA | 0 | dev->physfn->eetlp_prefix_max | 0-7[c] |
| HOST_DATA | 0 | dev->physfn->fm_enabled | 0-1[c] |
| HOST_DATA | 0 | dev->physfn->hdr_type | 0-255[c] |
| HOST_DATA | 0 | dev->physfn->ide_cfg | 0-1[c] |
| HOST_DATA | 0 | dev->physfn->ide_tee_limit | 0-1[c] |
| HOST_DATA | 0 | dev->physfn->irq | 0-255 |
| HOST_DATA | 0 | dev->physfn->is_cxl | 0-1 |
| HOST_DATA | 0 | dev->physfn->multifunction | 0-1[c] |
| HOST_DATA | 0 | dev->physfn->nr_ide_mem | 0-255[c] |
| HOST_DATA | 0 | dev->physfn->pcie_flags_reg | 0-u16max |
| HOST_DATA | 0 | dev->physfn->pcie_mpss | 0-7[c] |
| HOST_DATA | 0 | dev->physfn->pin | 0 |
| HOST_DATA | 0 | dev->physfn->pme_support | 0-31[c] |
| HOST_DATA | 0 | dev->physfn->ptm_granularity | 0-255[c] |
| HOST_DATA | 0 | dev->physfn->revision | 0-255 |
| HOST_DATA | 0 | dev->physfn->sriov->class | 0-4294967295 |
| HOST_DATA | 0 | dev->physfn->sriov->hdr_type | 0-255 |
| HOST_DATA | 0 | dev->physfn->sriov->max_VF_buses | 0-255[c] |
| HOST_DATA | 0 | dev->physfn->sriov->offset | 0-u16max |
| HOST_DATA | 0 | dev->physfn->sriov->stride | 0-u16max |
| HOST_DATA | 0 | dev->physfn->sriov->subsystem_device | 0-u16max |
| HOST_DATA | 0 | dev->physfn->sriov->subsystem_vendor | 0-u16max |
| HOST_DATA | 0 | dev->physfn->subsystem_device | 0-u16max |
| HOST_DATA | 0 | dev->physfn->subsystem_vendor | 0-u16max |
| HOST_DATA | 0 | dev->physfn->supported_speeds | 0,2-254[c] |
| HOST_DATA | 0 | dev->physfn->transparent | 0[c] |
| HOST_DATA | 0 | dev->physfn->vendor | 0-u16max |
| HOST_DATA | 0 | dev->pin | 0 |
| HOST_DATA | 0 | dev->pme_support | 0-31[c] |
| HOST_DATA | 0 | dev->ptm_granularity | 0-255[c] |
| HOST_DATA | 0 | dev->rcec_ea->bitmap | 0 |
| HOST_DATA | 0 | dev->rcec_ea->lastbusn | 0[c] |
| HOST_DATA | 0 | dev->revision | 0-255 |
| HOST_DATA | 0 | dev->sriov->initial_VFs | 0 |
| HOST_DATA | 0 | dev->sriov->max_VF_buses | 0-255[c] |
| HOST_DATA | 0 | dev->sriov->offset | 0-u16max |
| HOST_DATA | 0 | dev->sriov->stride | 0-u16max |
| HOST_DATA | 0 | dev->subsystem_device | 0-u16max |
| HOST_DATA | 0 | dev->subsystem_vendor | 0-u16max |
| HOST_DATA | 0 | dev->supported_speeds | 0,2-254[c] |
| HOST_DATA | 0 | dev->transparent | 0[c] |
| HOST_DATA | 0 | dev->vendor | 0-u16max |
| HOST_DATA | 0 | *dev->dev.driver_data | s64min-s64max |
| HOST_DATA | 0 | *dev->physfn->dev.driver_data | s64min-s64max |
| HALF_LOCKED2 | 0 | &dev->dev.mutex |
drivers/net/ethernet/mellanox/mlx5/core/main.c mlx5_pci_init() -> pci_enable_atomic_ops_to_root()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | dev | 4096-ptr_max |
| PARAM_VALUE | 0 | dev->dev.dma_mask | 4096-ptr_max |
| PARAM_VALUE | 0 | dev->dev.dma_parms | 0,4096-ptr_max |
| PARAM_VALUE | 0 | dev->dev.dma_parms->max_segment_size | 2147483648 |
| PARAM_VALUE | 0 | dev->dev.power.wakeirq->status | 0-4294967295 |
| PARAM_VALUE | 0 | dev->driver | 4096-ptr_max |
| PARAM_VALUE | 0 | dev->driver->err_handler | 0,4096-ptr_max |
| PARAM_VALUE | 0 | dev->error_state | 0-2,4-u32max |
| PARAM_VALUE | 0 | dev->is_busmaster | 1 |
| PARAM_VALUE | 0 | dev->link_bwctrl->cdev | (-22),(-19),(-12),0-s64max |
| PARAM_VALUE | 0 | dev->pcie_cap | 0-1 |
| PARAM_VALUE | 0 | dev->resource | 4096-ptr_max |
| PARAM_VALUE | 0 | dev->subordinate->self->link_bwctrl->cdev | (-4095)-s64max |
| PARAM_VALUE | 0 | *dev->saved_config_space | 0-4294967295 |
| PARAM_VALUE | 1 | cap_mask | 128 |
| BUF_SIZE | 0 | dev | (-1),16,24,40,56,108-1096,1384,1600,1616,1752,2072,2576,7472,8064 |
| BUF_SIZE | 0 | dev | (-1),16,24,40,56,108-1096,1384,1600,1616,1752,2072,2576,7472,8064 |
| CAPPED_DATA | 0 | dev | 1 |
| DATA_SOURCE | 0 | dev | $1 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HOST_DATA | 0 | dev->current_state | 0-3[c] |
| HALF_LOCKED2 | 0 | &dev->dev.mutex |
drivers/net/ethernet/mellanox/mlx5/core/main.c mlx5_pci_init() -> pci_enable_atomic_ops_to_root()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | dev | 4096-ptr_max |
| PARAM_VALUE | 0 | dev->dev.dma_mask | 4096-ptr_max |
| PARAM_VALUE | 0 | dev->dev.dma_parms | 0,4096-ptr_max |
| PARAM_VALUE | 0 | dev->dev.dma_parms->max_segment_size | 2147483648 |
| PARAM_VALUE | 0 | dev->dev.power.wakeirq->status | 0-4294967295 |
| PARAM_VALUE | 0 | dev->driver | 4096-ptr_max |
| PARAM_VALUE | 0 | dev->driver->err_handler | 0,4096-ptr_max |
| PARAM_VALUE | 0 | dev->error_state | 0-2,4-u32max |
| PARAM_VALUE | 0 | dev->is_busmaster | 1 |
| PARAM_VALUE | 0 | dev->link_bwctrl->cdev | (-22),(-19),(-12),0-s64max |
| PARAM_VALUE | 0 | dev->pcie_cap | 0-1 |
| PARAM_VALUE | 0 | dev->resource | 4096-ptr_max |
| PARAM_VALUE | 0 | dev->subordinate->self->link_bwctrl->cdev | (-4095)-s64max |
| PARAM_VALUE | 0 | *dev->saved_config_space | 0-4294967295 |
| PARAM_VALUE | 1 | cap_mask | 256 |
| BUF_SIZE | 0 | dev | (-1),16,24,40,56,108-1096,1384,1600,1616,1752,2072,2576,7472,8064 |
| BUF_SIZE | 0 | dev | (-1),16,24,40,56,108-1096,1384,1600,1616,1752,2072,2576,7472,8064 |
| CAPPED_DATA | 0 | dev | 1 |
| DATA_SOURCE | 0 | dev | $1 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HOST_DATA | 0 | dev->acs_capabilities | 0-u16max |
| HOST_DATA | 0 | dev->bus->bridge_ctl | 0-u16max |
| HOST_DATA | 0 | dev->bus->parent->bridge_ctl | 0-u16max |
| HOST_DATA | 0 | dev->class | 0-16777215 |
| HOST_DATA | 0 | dev->current_state | 0-3[c] |
| HOST_DATA | 0 | dev->devcap | 0-u32max |
| HOST_DATA | 0 | dev->devfn | 0-503[c] |
| HOST_DATA | 0 | dev->device | 0-u16max |
| HOST_DATA | 0 | dev->eetlp_prefix_max | 0-7[c] |
| HOST_DATA | 0 | dev->fm_enabled | 0-1[c] |
| HOST_DATA | 0 | dev->hdr_type | 0-255[c] |
| HOST_DATA | 0 | dev->ide_cfg | 0-1[c] |
| HOST_DATA | 0 | dev->ide_tee_limit | 0-1[c] |
| HOST_DATA | 0 | dev->irq | 0-255 |
| HOST_DATA | 0 | dev->is_cxl | 0-1 |
| HOST_DATA | 0 | dev->multifunction | 0-1[c] |
| HOST_DATA | 0 | dev->nr_ide_mem | 0-255[c] |
| HOST_DATA | 0 | dev->pcie_flags_reg | 0-u16max |
| HOST_DATA | 0 | dev->pcie_mpss | 0-7[c] |
| HOST_DATA | 0 | dev->physfn->acs_capabilities | 0-u16max |
| HOST_DATA | 0 | dev->physfn->bus->bridge_ctl | 0-u16max |
| HOST_DATA | 0 | dev->physfn->bus->parent->bridge_ctl | 0-u16max |
| HOST_DATA | 0 | dev->physfn->class | 0-16777215 |
| HOST_DATA | 0 | dev->physfn->current_state | 0-3[c] |
| HOST_DATA | 0 | dev->physfn->devcap | 0-u32max |
| HOST_DATA | 0 | dev->physfn->devfn | 1-503[c] |
| HOST_DATA | 0 | dev->physfn->device | 0-u16max |
| HOST_DATA | 0 | dev->physfn->eetlp_prefix_max | 0-7[c] |
| HOST_DATA | 0 | dev->physfn->fm_enabled | 0-1[c] |
| HOST_DATA | 0 | dev->physfn->hdr_type | 0-255[c] |
| HOST_DATA | 0 | dev->physfn->ide_cfg | 0-1[c] |
| HOST_DATA | 0 | dev->physfn->ide_tee_limit | 0-1[c] |
| HOST_DATA | 0 | dev->physfn->irq | 0-255 |
| HOST_DATA | 0 | dev->physfn->is_cxl | 0-1 |
| HOST_DATA | 0 | dev->physfn->multifunction | 0-1[c] |
| HOST_DATA | 0 | dev->physfn->nr_ide_mem | 0-255[c] |
| HOST_DATA | 0 | dev->physfn->pcie_flags_reg | 0-u16max |
| HOST_DATA | 0 | dev->physfn->pcie_mpss | 0-7[c] |
| HOST_DATA | 0 | dev->physfn->pin | 0 |
| HOST_DATA | 0 | dev->physfn->pme_support | 0-31[c] |
| HOST_DATA | 0 | dev->physfn->ptm_granularity | 0-255[c] |
| HOST_DATA | 0 | dev->physfn->revision | 0-255 |
| HOST_DATA | 0 | dev->physfn->sriov->class | 0-4294967295 |
| HOST_DATA | 0 | dev->physfn->sriov->hdr_type | 0-255 |
| HOST_DATA | 0 | dev->physfn->sriov->max_VF_buses | 0-255[c] |
| HOST_DATA | 0 | dev->physfn->sriov->offset | 0-u16max |
| HOST_DATA | 0 | dev->physfn->sriov->stride | 0-u16max |
| HOST_DATA | 0 | dev->physfn->sriov->subsystem_device | 0-u16max |
| HOST_DATA | 0 | dev->physfn->sriov->subsystem_vendor | 0-u16max |
| HOST_DATA | 0 | dev->physfn->subsystem_device | 0-u16max |
| HOST_DATA | 0 | dev->physfn->subsystem_vendor | 0-u16max |
| HOST_DATA | 0 | dev->physfn->supported_speeds | 0,2-254[c] |
| HOST_DATA | 0 | dev->physfn->transparent | 0[c] |
| HOST_DATA | 0 | dev->physfn->vendor | 0-u16max |
| HOST_DATA | 0 | dev->pin | 0 |
| HOST_DATA | 0 | dev->pme_support | 0-31[c] |
| HOST_DATA | 0 | dev->ptm_granularity | 0-255[c] |
| HOST_DATA | 0 | dev->rcec_ea->bitmap | 0 |
| HOST_DATA | 0 | dev->rcec_ea->lastbusn | 0[c] |
| HOST_DATA | 0 | dev->revision | 0-255 |
| HOST_DATA | 0 | dev->sriov->initial_VFs | 0 |
| HOST_DATA | 0 | dev->sriov->max_VF_buses | 0-255[c] |
| HOST_DATA | 0 | dev->sriov->offset | 0-u16max |
| HOST_DATA | 0 | dev->sriov->stride | 0-u16max |
| HOST_DATA | 0 | dev->subsystem_device | 0-u16max |
| HOST_DATA | 0 | dev->subsystem_vendor | 0-u16max |
| HOST_DATA | 0 | dev->supported_speeds | 0,2-254[c] |
| HOST_DATA | 0 | dev->transparent | 0[c] |
| HOST_DATA | 0 | dev->vendor | 0-u16max |
| HOST_DATA | 0 | *dev->dev.driver_data | s64min-s64max |
| HOST_DATA | 0 | *dev->physfn->dev.driver_data | s64min-s64max |
| HALF_LOCKED2 | 0 | &dev->dev.mutex |
drivers/net/ethernet/mellanox/mlx5/core/main.c mlx5_pci_init() -> pci_enable_atomic_ops_to_root()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | dev | 4096-ptr_max |
| PARAM_VALUE | 0 | dev->dev.dma_mask | 4096-ptr_max |
| PARAM_VALUE | 0 | dev->dev.dma_parms | 0,4096-ptr_max |
| PARAM_VALUE | 0 | dev->dev.dma_parms->max_segment_size | 2147483648 |
| PARAM_VALUE | 0 | dev->dev.power.wakeirq->status | 0-4294967295 |
| PARAM_VALUE | 0 | dev->driver | 4096-ptr_max |
| PARAM_VALUE | 0 | dev->driver->err_handler | 0,4096-ptr_max |
| PARAM_VALUE | 0 | dev->error_state | 0-2,4-u32max |
| PARAM_VALUE | 0 | dev->is_busmaster | 1 |
| PARAM_VALUE | 0 | dev->link_bwctrl->cdev | (-22),(-19),(-12),0-s64max |
| PARAM_VALUE | 0 | dev->pcie_cap | 0-1 |
| PARAM_VALUE | 0 | dev->resource | 4096-ptr_max |
| PARAM_VALUE | 0 | dev->subordinate->self->link_bwctrl->cdev | (-4095)-s64max |
| PARAM_VALUE | 0 | *dev->saved_config_space | 0-4294967295 |
| PARAM_VALUE | 1 | cap_mask | 512 |
| BUF_SIZE | 0 | dev | (-1),16,24,40,56,108-1096,1384,1600,1616,1752,2072,2576,7472,8064 |
| BUF_SIZE | 0 | dev | (-1),16,24,40,56,108-1096,1384,1600,1616,1752,2072,2576,7472,8064 |
| CAPPED_DATA | 0 | dev | 1 |
| DATA_SOURCE | 0 | dev | $1 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HOST_DATA | 0 | dev->acs_capabilities | 0-u16max |
| HOST_DATA | 0 | dev->bus->bridge_ctl | 0-u16max |
| HOST_DATA | 0 | dev->bus->parent->bridge_ctl | 0-u16max |
| HOST_DATA | 0 | dev->class | 0-16777215 |
| HOST_DATA | 0 | dev->current_state | 0-3[c] |
| HOST_DATA | 0 | dev->devcap | 0-u32max |
| HOST_DATA | 0 | dev->devfn | 0-503[c] |
| HOST_DATA | 0 | dev->device | 0-u16max |
| HOST_DATA | 0 | dev->eetlp_prefix_max | 0-7[c] |
| HOST_DATA | 0 | dev->fm_enabled | 0-1[c] |
| HOST_DATA | 0 | dev->hdr_type | 0-255[c] |
| HOST_DATA | 0 | dev->ide_cfg | 0-1[c] |
| HOST_DATA | 0 | dev->ide_tee_limit | 0-1[c] |
| HOST_DATA | 0 | dev->irq | 0-255 |
| HOST_DATA | 0 | dev->is_cxl | 0-1 |
| HOST_DATA | 0 | dev->multifunction | 0-1[c] |
| HOST_DATA | 0 | dev->nr_ide_mem | 0-255[c] |
| HOST_DATA | 0 | dev->pcie_flags_reg | 0-u16max |
| HOST_DATA | 0 | dev->pcie_mpss | 0-7[c] |
| HOST_DATA | 0 | dev->physfn->acs_capabilities | 0-u16max |
| HOST_DATA | 0 | dev->physfn->bus->bridge_ctl | 0-u16max |
| HOST_DATA | 0 | dev->physfn->bus->parent->bridge_ctl | 0-u16max |
| HOST_DATA | 0 | dev->physfn->class | 0-16777215 |
| HOST_DATA | 0 | dev->physfn->current_state | 0-3[c] |
| HOST_DATA | 0 | dev->physfn->devcap | 0-u32max |
| HOST_DATA | 0 | dev->physfn->devfn | 1-503[c] |
| HOST_DATA | 0 | dev->physfn->device | 0-u16max |
| HOST_DATA | 0 | dev->physfn->eetlp_prefix_max | 0-7[c] |
| HOST_DATA | 0 | dev->physfn->fm_enabled | 0-1[c] |
| HOST_DATA | 0 | dev->physfn->hdr_type | 0-255[c] |
| HOST_DATA | 0 | dev->physfn->ide_cfg | 0-1[c] |
| HOST_DATA | 0 | dev->physfn->ide_tee_limit | 0-1[c] |
| HOST_DATA | 0 | dev->physfn->irq | 0-255 |
| HOST_DATA | 0 | dev->physfn->is_cxl | 0-1 |
| HOST_DATA | 0 | dev->physfn->multifunction | 0-1[c] |
| HOST_DATA | 0 | dev->physfn->nr_ide_mem | 0-255[c] |
| HOST_DATA | 0 | dev->physfn->pcie_flags_reg | 0-u16max |
| HOST_DATA | 0 | dev->physfn->pcie_mpss | 0-7[c] |
| HOST_DATA | 0 | dev->physfn->pin | 0 |
| HOST_DATA | 0 | dev->physfn->pme_support | 0-31[c] |
| HOST_DATA | 0 | dev->physfn->ptm_granularity | 0-255[c] |
| HOST_DATA | 0 | dev->physfn->revision | 0-255 |
| HOST_DATA | 0 | dev->physfn->sriov->class | 0-4294967295 |
| HOST_DATA | 0 | dev->physfn->sriov->hdr_type | 0-255 |
| HOST_DATA | 0 | dev->physfn->sriov->max_VF_buses | 0-255[c] |
| HOST_DATA | 0 | dev->physfn->sriov->offset | 0-u16max |
| HOST_DATA | 0 | dev->physfn->sriov->stride | 0-u16max |
| HOST_DATA | 0 | dev->physfn->sriov->subsystem_device | 0-u16max |
| HOST_DATA | 0 | dev->physfn->sriov->subsystem_vendor | 0-u16max |
| HOST_DATA | 0 | dev->physfn->subsystem_device | 0-u16max |
| HOST_DATA | 0 | dev->physfn->subsystem_vendor | 0-u16max |
| HOST_DATA | 0 | dev->physfn->supported_speeds | 0,2-254[c] |
| HOST_DATA | 0 | dev->physfn->transparent | 0[c] |
| HOST_DATA | 0 | dev->physfn->vendor | 0-u16max |
| HOST_DATA | 0 | dev->pin | 0 |
| HOST_DATA | 0 | dev->pme_support | 0-31[c] |
| HOST_DATA | 0 | dev->ptm_granularity | 0-255[c] |
| HOST_DATA | 0 | dev->rcec_ea->bitmap | 0 |
| HOST_DATA | 0 | dev->rcec_ea->lastbusn | 0[c] |
| HOST_DATA | 0 | dev->revision | 0-255 |
| HOST_DATA | 0 | dev->sriov->initial_VFs | 0 |
| HOST_DATA | 0 | dev->sriov->max_VF_buses | 0-255[c] |
| HOST_DATA | 0 | dev->sriov->offset | 0-u16max |
| HOST_DATA | 0 | dev->sriov->stride | 0-u16max |
| HOST_DATA | 0 | dev->subsystem_device | 0-u16max |
| HOST_DATA | 0 | dev->subsystem_vendor | 0-u16max |
| HOST_DATA | 0 | dev->supported_speeds | 0,2-254[c] |
| HOST_DATA | 0 | dev->transparent | 0[c] |
| HOST_DATA | 0 | dev->vendor | 0-u16max |
| HOST_DATA | 0 | *dev->dev.driver_data | s64min-s64max |
| HOST_DATA | 0 | *dev->physfn->dev.driver_data | s64min-s64max |
| HALF_LOCKED2 | 0 | &dev->dev.mutex |
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c amdgpu_device_init() -> pci_enable_atomic_ops_to_root()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | *dev->saved_config_space | 0-4294967295 |
| PARAM_VALUE | 1 | cap_mask | 384 |
| BUF_SIZE | 0 | dev | (-1),16,24,40,56,108-1096,1384,1600,1616,1752,2072,2576,7472,8064 |
| BUF_SIZE | 0 | dev | (-1),16,24,40,56,108-1096,1384,1600,1616,1752,2072,2576,7472,8064 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HOST_DATA | 0 | dev->bus->bridge_ctl | 0-u16max |
| HOST_DATA | 0 | dev->bus->parent->bridge_ctl | 0-u16max |
| HOST_DATA | 0 | dev->current_state | 0-3[c] |
| HOST_DATA | 0 | dev->physfn->acs_capabilities | 0-u16max |
| HOST_DATA | 0 | dev->physfn->bus->bridge_ctl | 0-u16max |
| HOST_DATA | 0 | dev->physfn->bus->parent->bridge_ctl | 0-u16max |
| HOST_DATA | 0 | dev->physfn->class | 0-16777215 |
| HOST_DATA | 0 | dev->physfn->current_state | 0-3[c] |
| HOST_DATA | 0 | dev->physfn->devcap | 0-u32max |
| HOST_DATA | 0 | dev->physfn->devfn | 1-503[c] |
| HOST_DATA | 0 | dev->physfn->device | 0-u16max |
| HOST_DATA | 0 | dev->physfn->eetlp_prefix_max | 0-7[c] |
| HOST_DATA | 0 | dev->physfn->fm_enabled | 0-1[c] |
| HOST_DATA | 0 | dev->physfn->hdr_type | 0-255[c] |
| HOST_DATA | 0 | dev->physfn->ide_cfg | 0-1[c] |
| HOST_DATA | 0 | dev->physfn->ide_tee_limit | 0-1[c] |
| HOST_DATA | 0 | dev->physfn->irq | 0-255 |
| HOST_DATA | 0 | dev->physfn->is_cxl | 0-1 |
| HOST_DATA | 0 | dev->physfn->multifunction | 0-1[c] |
| HOST_DATA | 0 | dev->physfn->nr_ide_mem | 0-255[c] |
| HOST_DATA | 0 | dev->physfn->pcie_flags_reg | 0-u16max |
| HOST_DATA | 0 | dev->physfn->pcie_mpss | 0-7[c] |
| HOST_DATA | 0 | dev->physfn->pin | 0 |
| HOST_DATA | 0 | dev->physfn->pme_support | 0-31[c] |
| HOST_DATA | 0 | dev->physfn->ptm_granularity | 0-255[c] |
| HOST_DATA | 0 | dev->physfn->revision | 0-255 |
| HOST_DATA | 0 | dev->physfn->sriov->class | 0-4294967295 |
| HOST_DATA | 0 | dev->physfn->sriov->hdr_type | 0-255 |
| HOST_DATA | 0 | dev->physfn->sriov->max_VF_buses | 0-255[c] |
| HOST_DATA | 0 | dev->physfn->sriov->offset | 0-u16max |
| HOST_DATA | 0 | dev->physfn->sriov->stride | 0-u16max |
| HOST_DATA | 0 | dev->physfn->sriov->subsystem_device | 0-u16max |
| HOST_DATA | 0 | dev->physfn->sriov->subsystem_vendor | 0-u16max |
| HOST_DATA | 0 | dev->physfn->subsystem_device | 0-u16max |
| HOST_DATA | 0 | dev->physfn->subsystem_vendor | 0-u16max |
| HOST_DATA | 0 | dev->physfn->supported_speeds | 0,2-254[c] |
| HOST_DATA | 0 | dev->physfn->transparent | 0[c] |
| HOST_DATA | 0 | dev->physfn->vendor | 0-u16max |
| HOST_DATA | 0 | dev->sriov->max_VF_buses | 0-255[c] |
| HOST_DATA | 0 | dev->sriov->offset | 0-u16max |
| HOST_DATA | 0 | dev->sriov->stride | 0-u16max |
| HOST_DATA | 0 | *dev->dev.driver_data | s64min-s64max |
| HOST_DATA | 0 | *dev->physfn->dev.driver_data | s64min-s64max |
| HALF_LOCKED2 | &pool->lock |
drivers/infiniband/hw/bnxt_re/qplib_res.c bnxt_qplib_determine_atomics() -> pci_enable_atomic_ops_to_root()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | dev | 4096-ptr_max |
| PARAM_VALUE | 0 | dev->dev.bus | 0,4096-ptr_max |
| PARAM_VALUE | 0 | dev->dev.class | 0,4096-ptr_max |
| PARAM_VALUE | 0 | dev->dev.driver | 0,4096-ptr_max |
| PARAM_VALUE | 1 | cap_mask | 128 |
| DATA_SOURCE | 0 | dev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| LOCK2 | global &bnxt_re_mutex |
drivers/infiniband/hw/bnxt_re/qplib_res.c bnxt_qplib_determine_atomics() -> pci_enable_atomic_ops_to_root()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | dev | 4096-ptr_max |
| PARAM_VALUE | 0 | dev->dev.bus | 0,4096-ptr_max |
| PARAM_VALUE | 0 | dev->dev.class | 0,4096-ptr_max |
| PARAM_VALUE | 0 | dev->dev.driver | 0,4096-ptr_max |
| PARAM_VALUE | 1 | cap_mask | 256 |
| DATA_SOURCE | 0 | dev | $0 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| LOCK2 | global &bnxt_re_mutex |
drivers/infiniband/hw/qedr/main.c qedr_pci_set_atomic() -> pci_enable_atomic_ops_to_root()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 1 | cap_mask | 256 |
| BUF_SIZE | 0 | dev | (-1),1-s32max |
| BUF_SIZE | 0 | dev | (-1),1-s32max |
| DATA_SOURCE | 0 | dev | $1 |
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| HOST_DATA | 0 | dev->current_state | 0-3[c] |
| LOCK2 | global &qedr_dev_list_lock |