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Documented in 1 files:

Defined in 1 files as a prototype:

Defined in 1 files as a function:

Referenced in 2 files:

Smatch caller information:

drivers/mtd/nand/raw/nand_base.c panic_nand_write() -> panic_nand_wait()

Type Parameter Key Value
PARAM_VALUE 0 chip 4096-ptr_max
PARAM_VALUE 1 timeo 400
DATA_SOURCE 0 chip r mtd_to_nand
NOCHECK_CALL

drivers/mtd/nand/raw/nand_legacy.c nand_wait() -> panic_nand_wait()

Type Parameter Key Value
PARAM_VALUE 0 chip 4096-ptr_max
PARAM_VALUE 0 chip->base.ops->erase 0,4096-ptr_max
PARAM_VALUE 0 chip->base.ops->isbad 0,4096-ptr_max
PARAM_VALUE 0 chip->base.ops->markbad 0,4096-ptr_max
PARAM_VALUE 0 chip->controller 0,4096-ptr_max
PARAM_VALUE 0 chip->controller->ops 0,4096-ptr_max
PARAM_VALUE 0 chip->controller->ops->exec_op 0
PARAM_VALUE 0 chip->manufacturer.desc->id 1,4,7,32,44,69,137,143,146,152,155,173,194,200,236,239
PARAM_VALUE 0 chip->manufacturer.desc->ops->init 212359982685974528,823161443146813440,1372821563079450624,1811550138150207488,4454650112844922880,5087819817528287232,7923024313958473728,8655295264377085952
PARAM_VALUE 0 *chip->bbt_md->pages s32min-s32max
PARAM_VALUE 0 *chip->bbt_md->version 0-255
PARAM_VALUE 0 *chip->bbt_td->pages s32min-s32max
PARAM_VALUE 0 *chip->bbt_td->version 0-255
PARAM_VALUE 1 timeo 400
BUF_SIZE 0 chip (-1),3704
BUF_SIZE 0 chip (-1),3704
BUF_SIZE 0 chip->badblock_pattern (-1),72
BUF_SIZE 0 chip->bbt_md (-1)-0,72
BUF_SIZE 0 chip->bbt_md->pattern (-1),9
BUF_SIZE 0 chip->bbt_td (-1)-0,72
BUF_SIZE 0 chip->bbt_td->pattern (-1),9
BUF_SIZE 0 chip->controller (-1),168
BUF_SIZE 0 chip->current_interface_config (-1),1152
BUF_SIZE 0 chip->data_buf (-1)-s32max
CAPPED_DATA 0 chip 1
DATA_SOURCE 0 chip $0
STR_LEN 0 chip->bbt_md->pattern (-1),8
STR_LEN 0 chip->bbt_td->pattern (-1),8
NOSPEC 0 chip->cur_cs
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA 0 chip->cont_read.first_page 1-s32max[c]
HOST_DATA 0 chip->cont_read.pause_page 2-4147480570[c]
HOST_DATA 0 chip->cur_cs 1-s32max[c]
HOST_DATA 0 chip->pagecache.page s32min-s32max[c]
HOST_DATA 0 chip->priv->curr_column s32min-s32max[c]
HOST_DATA 0 chip->priv->curr_page_addr 1-s32max[c]
HOST_DATA 0 chip->priv->offset 0-s32max[c]
HOST_DATA 0 *chip->data_buf 0-255
HOST_DATA 0 *chip->oob_poi 0-255
USER_DATA 0 chip->cont_read.first_page 1-s32max[c]
USER_DATA 0 chip->cur_cs 1-s32max[c]
USER_DATA 0 chip->pagecache.page s32min-s32max
USER_DATA 0 chip->priv->curr_column s32min-s32max[c]
USER_DATA 0 chip->priv->curr_page_addr 0-s32max[c]
USER_DATA 0 chip->priv->offset 0-s32max[c]
USER_DATA 0 *chip->oob_poi 0-255
NO_OVERFLOW_SIMPLE 0 chip->ecc.postpad
NO_OVERFLOW_SIMPLE 0 chip->ecc.prepad
NO_OVERFLOW_SIMPLE 0 chip->nr_secure_regions
USER_PTR 0 chip->data_buf
HALF_LOCKED2 0 &chip->controller->lock
HALF_LOCKED2 0 &chip->lock