optc401_set_vtotal_min_max identifier - Linux source code next-20260811 - Bootlin Elixir Cross Referencer

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Defined in 1 files as a prototype:

drivers/gpu/drm/amd/display/dc/optc/dcn401/dcn401_optc.h, line 174 (as a prototype)

Defined in 1 files as a function:

drivers/gpu/drm/amd/display/dc/optc/dcn401/dcn401_optc.c, line 381 (as a function)

Referenced in 2 files:

Smatch caller information:

drivers/gpu/drm/amd/amdgpu/../display/dc/optc/dcn32/dcn32_optc.c optc32_set_drr() -> (struct timing_generator_funcs)->set_vtotal_min_max()

Type	Parameter	Key	Value
PARAM_VALUE	0	optc	4096-ptr_max
PARAM_VALUE	0	optc->funcs	4096-ptr_max
PARAM_VALUE	0	optc->funcs->set_drr	4096-ptr_max
PARAM_VALUE	0	optc->funcs->set_h_timing_div_manual_mode	0,3943045918683873280,4412274745866633216,7210936702807244800
PARAM_VALUE	0	optc->funcs->set_odm_bypass	0,1134321944835944448,1603183173331275776,6116399471158304768,7645597569047158784,8219396703655817216
PARAM_VALUE	0	optc->funcs->set_static_screen_control	0,5071642371786563584,5913575906034724864,8835630547784204288
DATA_SOURCE	0	optc	$0
CONTAINER	0	-304-0+0	$(-1)
NOCHECK_CALL

drivers/gpu/drm/amd/amdgpu/../display/dc/optc/dcn31/dcn31_optc.c optc31_set_drr() -> (struct timing_generator_funcs)->set_vtotal_min_max()

Type	Parameter	Key	Value
PARAM_VALUE	0	optc	4096-ptr_max
PARAM_VALUE	0	optc->funcs	4096-ptr_max
PARAM_VALUE	0	optc->funcs->set_drr	4096-ptr_max
PARAM_VALUE	0	optc->funcs->set_h_timing_div_manual_mode	0,3943045918683873280,4412274745866633216,7210936702807244800
PARAM_VALUE	0	optc->funcs->set_odm_bypass	0,1134321944835944448,1603183173331275776,6116399471158304768,7645597569047158784,8219396703655817216
PARAM_VALUE	0	optc->funcs->set_static_screen_control	0,5071642371786563584,5913575906034724864,8835630547784204288
DATA_SOURCE	0	optc	$0
CONTAINER	0	-304-0+0	$(-1)
NOCHECK_CALL

drivers/gpu/drm/amd/amdgpu/../display/dc/optc/dcn31/dcn31_optc.c optc31_set_drr() -> (struct timing_generator_funcs)->set_vtotal_min_max()

Type	Parameter	Key	Value
PARAM_VALUE	0	optc	4096-ptr_max
PARAM_VALUE	0	optc->funcs	4096-ptr_max
PARAM_VALUE	0	optc->funcs->set_drr	4096-ptr_max
PARAM_VALUE	0	optc->funcs->set_h_timing_div_manual_mode	0,3943045918683873280,4412274745866633216,7210936702807244800
PARAM_VALUE	0	optc->funcs->set_odm_bypass	0,1134321944835944448,1603183173331275776,6116399471158304768,7645597569047158784,8219396703655817216
PARAM_VALUE	0	optc->funcs->set_static_screen_control	0,5071642371786563584,5913575906034724864,8835630547784204288
PARAM_VALUE	1	vtotal_min	0
PARAM_VALUE	2	vtotal_max	0
DATA_SOURCE	0	optc	$0
CONTAINER	0	-304-0+0	$(-1)
NOCHECK_CALL

drivers/gpu/drm/amd/amdgpu/../display/dc/optc/dcn10/dcn10_optc.c optc1_program_timing() -> (struct timing_generator_funcs)->set_vtotal_min_max()

Type	Parameter	Key	Value
PARAM_VALUE	0	optc	4096-ptr_max
PARAM_VALUE	0	optc->funcs	4096-ptr_max
PARAM_VALUE	0	optc->funcs->set_static_screen_control	0,5071642371786563584,5913575906034724864,8835630547784204288
DATA_SOURCE	0	optc	$0
CONTAINER	0	-304-0+0	$(-1)
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL

drivers/gpu/drm/amd/amdgpu/../display/dc/optc/dcn10/dcn10_optc.c optc1_set_drr() -> (struct timing_generator_funcs)->set_vtotal_min_max()

Type	Parameter	Key	Value
PARAM_VALUE	0	optc	4096-ptr_max
PARAM_VALUE	0	optc->funcs	4096-ptr_max
PARAM_VALUE	0	optc->funcs->set_drr	4096-ptr_max
PARAM_VALUE	0	optc->funcs->set_h_timing_div_manual_mode	0,3943045918683873280,4412274745866633216,7210936702807244800
PARAM_VALUE	0	optc->funcs->set_odm_bypass	0,1134321944835944448,1603183173331275776,6116399471158304768,7645597569047158784,8219396703655817216
PARAM_VALUE	0	optc->funcs->set_static_screen_control	0,5071642371786563584,5913575906034724864,8835630547784204288
DATA_SOURCE	0	optc	$0
CONTAINER	0	-304-0+0	$(-1)
NOCHECK_CALL

drivers/gpu/drm/amd/amdgpu/../display/dc/optc/dcn35/dcn35_optc.c optc35_set_drr() -> (struct timing_generator_funcs)->set_vtotal_min_max()

Type	Parameter	Key	Value
PARAM_VALUE	0	optc	4096-ptr_max
PARAM_VALUE	0	optc->funcs	4096-ptr_max
PARAM_VALUE	0	optc->funcs->set_drr	4096-ptr_max
PARAM_VALUE	0	optc->funcs->set_h_timing_div_manual_mode	0,3943045918683873280,4412274745866633216,7210936702807244800
PARAM_VALUE	0	optc->funcs->set_odm_bypass	0,1134321944835944448,1603183173331275776,6116399471158304768,7645597569047158784,8219396703655817216
PARAM_VALUE	0	optc->funcs->set_static_screen_control	0,5071642371786563584,5913575906034724864,8835630547784204288
PARAM_VALUE	0	optc->funcs->set_vtotal_min_max	4369333335703687168,4999668553870188544,8692243165407899648
DATA_SOURCE	0	optc	$0
CONTAINER	0	-304-0+0	$(-1)
NOCHECK_CALL

drivers/gpu/drm/amd/amdgpu/../display/dc/optc/dcn35/dcn35_optc.c optc35_set_drr() -> (struct timing_generator_funcs)->set_vtotal_min_max()

Type	Parameter	Key	Value
PARAM_VALUE	0	optc	4096-ptr_max
PARAM_VALUE	0	optc->funcs	4096-ptr_max
PARAM_VALUE	0	optc->funcs->set_drr	4096-ptr_max
PARAM_VALUE	0	optc->funcs->set_h_timing_div_manual_mode	0,3943045918683873280,4412274745866633216,7210936702807244800
PARAM_VALUE	0	optc->funcs->set_odm_bypass	0,1134321944835944448,1603183173331275776,6116399471158304768,7645597569047158784,8219396703655817216
PARAM_VALUE	0	optc->funcs->set_static_screen_control	0,5071642371786563584,5913575906034724864,8835630547784204288
PARAM_VALUE	0	optc->funcs->set_vtotal_min_max	4369333335703687168,4999668553870188544,8692243165407899648
PARAM_VALUE	1	vtotal_min	0
PARAM_VALUE	2	vtotal_max	0
DATA_SOURCE	0	optc	$0
CONTAINER	0	-304-0+0	$(-1)
NOCHECK_CALL

drivers/gpu/drm/amd/amdgpu/../display/dc/optc/dcn35/dcn35_optc.c optc35_set_long_vtotal() -> (struct timing_generator_funcs)->set_vtotal_min_max()

Type	Parameter	Key	Value
PARAM_VALUE	0	optc	4096-ptr_max
PARAM_VALUE	0	optc->funcs	4096-ptr_max
PARAM_VALUE	0	optc->funcs->set_vtotal_min_max	4369333335703687168,4999668553870188544,8692243165407899648
PARAM_VALUE	1	vtotal_min	0
PARAM_VALUE	2	vtotal_max	0
DATA_SOURCE	0	optc	$0
CONTAINER	0	-304-0+0	$(-1)
NOCHECK_CALL
HALF_LOCKED2		&adev->dm.dc_lock
HALF_LOCKED2		&pool->lock
HALF_LOCKED2		flags

drivers/gpu/drm/amd/amdgpu/../display/dc/optc/dcn35/dcn35_optc.c optc35_set_long_vtotal() -> (struct timing_generator_funcs)->set_vtotal_min_max()

Type	Parameter	Key	Value
PARAM_VALUE	0	optc	4096-ptr_max
PARAM_VALUE	0	optc->funcs	4096-ptr_max
PARAM_VALUE	0	optc->funcs->set_vtotal_min_max	4369333335703687168,4999668553870188544,8692243165407899648
PARAM_VALUE	1	vtotal_min	s32min-(-2),0-s32max
PARAM_VALUE	2	vtotal_max	s32min-(-2),0-s32max
CAPPED_DATA	1	vtotal_min	1
CAPPED_DATA	2	vtotal_max	1
DATA_SOURCE	0	optc	$0
CONTAINER	0	-304-0+0	$(-1)
NOCHECK_CALL
HALF_LOCKED2		&adev->dm.dc_lock
HALF_LOCKED2		&pool->lock
HALF_LOCKED2		flags

drivers/gpu/drm/amd/amdgpu/../display/dc/optc/dcn35/dcn35_optc.c optc35_set_long_vtotal() -> (struct timing_generator_funcs)->set_vtotal_min_max()

Type	Parameter	Key	Value
PARAM_VALUE	0	optc	4096-ptr_max
PARAM_VALUE	0	optc->funcs	4096-ptr_max
PARAM_VALUE	0	optc->funcs->set_vtotal_min_max	4369333335703687168,4999668553870188544,8692243165407899648
PARAM_VALUE	1	vtotal_min	0
PARAM_VALUE	2	vtotal_max	0
DATA_SOURCE	0	optc	$0
CONTAINER	0	-304-0+0	$(-1)
NOCHECK_CALL
HALF_LOCKED2		&adev->dm.dc_lock
HALF_LOCKED2		&pool->lock
HALF_LOCKED2		flags

drivers/gpu/drm/amd/amdgpu/../display/dc/optc/dcn35/dcn35_optc.c optc35_set_long_vtotal() -> (struct timing_generator_funcs)->set_vtotal_min_max()

Type	Parameter	Key	Value
PARAM_VALUE	0	optc	4096-ptr_max
PARAM_VALUE	0	optc->funcs	4096-ptr_max
PARAM_VALUE	0	optc->funcs->set_vtotal_min_max	4369333335703687168,4999668553870188544,8692243165407899648
PARAM_VALUE	1	vtotal_min	s32min-(-3),0-s32max
PARAM_VALUE	2	vtotal_max	s32min-(-2),1-s32max
CAPPED_DATA	1	vtotal_min	1
CAPPED_DATA	2	vtotal_max	1
DATA_SOURCE	0	optc	$0
CONTAINER	0	-304-0+0	$(-1)
NOCHECK_CALL
HALF_LOCKED2		&adev->dm.dc_lock
HALF_LOCKED2		&pool->lock
HALF_LOCKED2		flags

drivers/gpu/drm/amd/amdgpu/../display/dc/optc/dcn301/dcn301_optc.c optc301_set_drr() -> (struct timing_generator_funcs)->set_vtotal_min_max()

Type	Parameter	Key	Value
PARAM_VALUE	0	optc	4096-ptr_max
PARAM_VALUE	0	optc->funcs	4096-ptr_max
PARAM_VALUE	0	optc->funcs->set_drr	4096-ptr_max
PARAM_VALUE	0	optc->funcs->set_h_timing_div_manual_mode	0,3943045918683873280,4412274745866633216,7210936702807244800
PARAM_VALUE	0	optc->funcs->set_odm_bypass	0,1134321944835944448,1603183173331275776,6116399471158304768,7645597569047158784,8219396703655817216
PARAM_VALUE	0	optc->funcs->set_static_screen_control	0,5071642371786563584,5913575906034724864,8835630547784204288
DATA_SOURCE	0	optc	$0
CONTAINER	0	-304-0+0	$(-1)
NOCHECK_CALL

drivers/gpu/drm/amd/amdgpu/../display/dc/optc/dcn301/dcn301_optc.c optc301_set_drr() -> (struct timing_generator_funcs)->set_vtotal_min_max()

Type	Parameter	Key	Value
PARAM_VALUE	0	optc	4096-ptr_max
PARAM_VALUE	0	optc->funcs	4096-ptr_max
PARAM_VALUE	0	optc->funcs->set_drr	4096-ptr_max
PARAM_VALUE	0	optc->funcs->set_h_timing_div_manual_mode	0,3943045918683873280,4412274745866633216,7210936702807244800
PARAM_VALUE	0	optc->funcs->set_odm_bypass	0,1134321944835944448,1603183173331275776,6116399471158304768,7645597569047158784,8219396703655817216
PARAM_VALUE	0	optc->funcs->set_static_screen_control	0,5071642371786563584,5913575906034724864,8835630547784204288
PARAM_VALUE	1	vtotal_min	0
PARAM_VALUE	2	vtotal_max	0
DATA_SOURCE	0	optc	$0
CONTAINER	0	-304-0+0	$(-1)
NOCHECK_CALL

drivers/gpu/drm/amd/amdgpu/../display/dc/optc/dcn401/dcn401_optc.c optc401_set_drr() -> (struct timing_generator_funcs)->set_vtotal_min_max()

Type	Parameter	Key	Value
PARAM_VALUE	0	optc	4096-ptr_max
PARAM_VALUE	0	optc->ctx	4096-ptr_max
PARAM_VALUE	0	optc->ctx->dc	4096-ptr_max
PARAM_VALUE	0	optc->funcs	4096-ptr_max
PARAM_VALUE	0	optc->funcs->set_drr	4096-ptr_max
PARAM_VALUE	0	optc->funcs->set_h_timing_div_manual_mode	0,3943045918683873280,4412274745866633216,7210936702807244800
PARAM_VALUE	0	optc->funcs->set_odm_bypass	0,1134321944835944448,1603183173331275776,6116399471158304768,7645597569047158784,8219396703655817216
PARAM_VALUE	0	optc->funcs->set_static_screen_control	0,5071642371786563584,5913575906034724864,8835630547784204288
DATA_SOURCE	0	optc	$0
CONTAINER	0	-304-0+0	$(-1)
NOCHECK_CALL

drivers/gpu/drm/amd/amdgpu/../display/dc/optc/dcn401/dcn401_optc.c optc401_set_drr() -> (struct timing_generator_funcs)->set_vtotal_min_max()

Type	Parameter	Key	Value
PARAM_VALUE	0	optc	4096-ptr_max
PARAM_VALUE	0	optc->ctx	4096-ptr_max
PARAM_VALUE	0	optc->ctx->dc	4096-ptr_max
PARAM_VALUE	0	optc->funcs	4096-ptr_max
PARAM_VALUE	0	optc->funcs->set_drr	4096-ptr_max
PARAM_VALUE	0	optc->funcs->set_h_timing_div_manual_mode	0,3943045918683873280,4412274745866633216,7210936702807244800
PARAM_VALUE	0	optc->funcs->set_odm_bypass	0,1134321944835944448,1603183173331275776,6116399471158304768,7645597569047158784,8219396703655817216
PARAM_VALUE	0	optc->funcs->set_static_screen_control	0,5071642371786563584,5913575906034724864,8835630547784204288
PARAM_VALUE	1	vtotal_min	0
PARAM_VALUE	2	vtotal_max	0
DATA_SOURCE	0	optc	$0
CONTAINER	0	-304-0+0	$(-1)
NOCHECK_CALL