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Documented in 1 files:

Defined in 1 files as a prototype:

Defined in 1 files as a function:

Referenced in 4 files:

Smatch caller information:

drivers/mtd/nand/raw/nand_sandisk.c sdtnqgama_choose_interface_config() -> onfi_fill_interface_config()

Type Parameter Key Value
PARAM_VALUE 0 chip 4096-ptr_max
PARAM_VALUE 1 iface 4096-ptr_max
PARAM_VALUE 2 type 0
PARAM_VALUE 3 timing_mode 0
BUF_SIZE 0 chip (-1),4088
BUF_SIZE 0 chip (-1),4088
BUF_SIZE 0 chip->badblock_pattern (-1),72
BUF_SIZE 0 chip->bbt_md (-1),72
BUF_SIZE 0 chip->bbt_td (-1),72,144
BUF_SIZE 0 chip->data_buf 0-s32max
BUF_SIZE 0 chip->legacy.dummy_controller.ops (-1),32
BUF_SIZE 0 chip->priv (-1),4008
BUF_SIZE 1 iface 192
DATA_SOURCE 0 chip $0
DATA_SOURCE 1 iface $1
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA 0 chip->controller->controller_wp 0
HOST_DATA 0 chip->controller->supported_op.cont_read 0-1
HOST_DATA 0 chip->controller->supported_op.data_only_read 0-1
HALF_LOCKED2 &pool->lock

drivers/mtd/nand/raw/nand_base.c nand_choose_best_nvddr_timings() -> onfi_fill_interface_config()

Type Parameter Key Value
PARAM_VALUE 0 chip 4096-ptr_max
PARAM_VALUE 0 chip->parameters.onfi 0,4096-ptr_max
PARAM_VALUE 1 iface 4096-ptr_max
PARAM_VALUE 2 type 1
PARAM_VALUE 3 timing_mode 0-31
BUF_SIZE 1 iface 192
DATA_SOURCE 0 chip $0
DATA_SOURCE 1 iface $1
NOCHECK_CALL

drivers/mtd/nand/raw/nand_base.c nand_choose_best_sdr_timings() -> onfi_fill_interface_config()

Type Parameter Key Value
PARAM_VALUE 0 chip 4096-ptr_max
PARAM_VALUE 0 chip->parameters.onfi 0,4096-ptr_max
PARAM_VALUE 1 iface 4096-ptr_max
PARAM_VALUE 2 type 0
PARAM_VALUE 3 timing_mode 0-31
BUF_SIZE 1 iface 192
DATA_SOURCE 0 chip $0
DATA_SOURCE 1 iface $1
NOCHECK_CALL

drivers/mtd/nand/raw/nand_toshiba.c tc58nvg0s3e_choose_interface_config() -> onfi_fill_interface_config()

Type Parameter Key Value
PARAM_VALUE 0 chip 4096-ptr_max
PARAM_VALUE 1 iface 4096-ptr_max
PARAM_VALUE 2 type 0
PARAM_VALUE 3 timing_mode 2
BUF_SIZE 0 chip (-1),4088
BUF_SIZE 0 chip (-1),4088
BUF_SIZE 0 chip->badblock_pattern (-1),72
BUF_SIZE 0 chip->bbt_md (-1),72
BUF_SIZE 0 chip->bbt_td (-1),72,144
BUF_SIZE 0 chip->data_buf 0-s32max
BUF_SIZE 0 chip->legacy.dummy_controller.ops (-1),32
BUF_SIZE 0 chip->priv (-1),4008
BUF_SIZE 1 iface 192
DATA_SOURCE 0 chip $0
DATA_SOURCE 1 iface $1
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA 0 chip->controller->controller_wp 0
HOST_DATA 0 chip->controller->supported_op.cont_read 0-1
HOST_DATA 0 chip->controller->supported_op.data_only_read 0-1
HALF_LOCKED2 &pool->lock

drivers/mtd/nand/raw/nand_toshiba.c tc58teg5dclta00_choose_interface_config() -> onfi_fill_interface_config()

Type Parameter Key Value
PARAM_VALUE 0 chip 4096-ptr_max
PARAM_VALUE 1 iface 4096-ptr_max
PARAM_VALUE 2 type 0
PARAM_VALUE 3 timing_mode 5
BUF_SIZE 0 chip (-1),4088
BUF_SIZE 0 chip (-1),4088
BUF_SIZE 0 chip->badblock_pattern (-1),72
BUF_SIZE 0 chip->bbt_md (-1),72
BUF_SIZE 0 chip->bbt_td (-1),72,144
BUF_SIZE 0 chip->data_buf 0-s32max
BUF_SIZE 0 chip->legacy.dummy_controller.ops (-1),32
BUF_SIZE 0 chip->priv (-1),4008
BUF_SIZE 1 iface 192
DATA_SOURCE 0 chip $0
DATA_SOURCE 1 iface $1
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA 0 chip->controller->controller_wp 0
HOST_DATA 0 chip->controller->supported_op.cont_read 0-1
HOST_DATA 0 chip->controller->supported_op.data_only_read 0-1
HALF_LOCKED2 &pool->lock

drivers/mtd/nand/raw/nand_toshiba.c th58nvg2s3hbai4_choose_interface_config() -> onfi_fill_interface_config()

Type Parameter Key Value
PARAM_VALUE 0 chip 4096-ptr_max
PARAM_VALUE 1 iface 4096-ptr_max
PARAM_VALUE 2 type 0
PARAM_VALUE 3 timing_mode 4
BUF_SIZE 0 chip (-1),4088
BUF_SIZE 0 chip (-1),4088
BUF_SIZE 0 chip->badblock_pattern (-1),72
BUF_SIZE 0 chip->bbt_md (-1),72
BUF_SIZE 0 chip->bbt_td (-1),72,144
BUF_SIZE 0 chip->data_buf 0-s32max
BUF_SIZE 0 chip->legacy.dummy_controller.ops (-1),32
BUF_SIZE 0 chip->priv (-1),4008
BUF_SIZE 1 iface 192
DATA_SOURCE 0 chip $0
DATA_SOURCE 1 iface $1
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA 0 chip->controller->controller_wp 0
HOST_DATA 0 chip->controller->supported_op.cont_read 0-1
HOST_DATA 0 chip->controller->supported_op.data_only_read 0-1
HALF_LOCKED2 &pool->lock

drivers/mtd/nand/raw/nand_hynix.c h27ucg8t2atrbc_choose_interface_config() -> onfi_fill_interface_config()

Type Parameter Key Value
PARAM_VALUE 0 chip 4096-ptr_max
PARAM_VALUE 1 iface 4096-ptr_max
PARAM_VALUE 2 type 0
PARAM_VALUE 3 timing_mode 4
BUF_SIZE 0 chip (-1),4088
BUF_SIZE 0 chip (-1),4088
BUF_SIZE 0 chip->badblock_pattern (-1),72
BUF_SIZE 0 chip->bbt_md (-1),72
BUF_SIZE 0 chip->bbt_td (-1),72,144
BUF_SIZE 0 chip->data_buf 0-s32max
BUF_SIZE 0 chip->legacy.dummy_controller.ops (-1),32
BUF_SIZE 0 chip->priv (-1),4008
BUF_SIZE 1 iface 192
DATA_SOURCE 0 chip $0
DATA_SOURCE 1 iface $1
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA 0 chip->controller->controller_wp 0
HOST_DATA 0 chip->controller->supported_op.cont_read 0-1
HOST_DATA 0 chip->controller->supported_op.data_only_read 0-1
HALF_LOCKED2 &pool->lock