| PARAM_VALUE |
0 |
nn |
4096-ptr_max |
| PARAM_VALUE |
0 |
nn->dev_info |
4096-ptr_max |
| PARAM_VALUE |
0 |
nn->dp.dev |
4096-ptr_max |
| PARAM_VALUE |
0 |
nn->dp.dev->dma_mask |
4096-ptr_max |
| PARAM_VALUE |
0 |
nn->dp.dev->driver_data |
4096-ptr_max |
| PARAM_VALUE |
0 |
nn->dp.ops |
391473416707108864,9078669766065852416 |
| PARAM_VALUE |
0 |
nn->dp.rxd_cnt |
4096 |
| PARAM_VALUE |
0 |
nn->dp.txd_cnt |
4096 |
| PARAM_VALUE |
0 |
nn->dp.xsk_pools |
16,4096-ptr_max |
| PARAM_VALUE |
0 |
nn->fw_ver.major |
5-255 |
| PARAM_VALUE |
0 |
nn->pdev |
4096-ptr_max |
| PARAM_VALUE |
0 |
nn->pdev->dev.dma_mask |
4096-ptr_max |
| PARAM_VALUE |
0 |
nn->pdev->dev.driver_data |
4096-ptr_max |
| PARAM_VALUE |
0 |
nn->pdev->driver |
4096-ptr_max |
| PARAM_VALUE |
0 |
nn->pdev->error_state |
0-2,4-u32max |
| PARAM_VALUE |
0 |
nn->pdev->is_busmaster |
1 |
| PARAM_VALUE |
0 |
nn->pdev->pcie_cap |
0-1 |
| PARAM_VALUE |
0 |
nn->reconfig_timer.entry.pprev |
0 |
| PARAM_VALUE |
0 |
nn->reconfig_timer.flags |
0-4194302 |
| PARAM_VALUE |
0 |
nn->reconfig_timer.lockdep_map->name |
0-255 |
| PARAM_VALUE |
0 |
nn->tlv_caps.mbox_len |
0,504 |
| PARAM_VALUE |
0 |
nn->tlv_caps.mbox_off |
0,6144 |
| BUF_SIZE |
0 |
nn |
145664,u64max |
| BUF_SIZE |
0 |
nn |
145664,u64max |
| BUF_SIZE |
0 |
nn->dp.dev |
1616 |
| BUF_SIZE |
0 |
nn->dp.ops |
120 |
| BUF_SIZE |
0 |
nn->dp.xsk_pools |
0-34359738360 |
| BUF_SIZE |
0 |
nn->pdev |
(-1),1-s32max |
| CAPPED_DATA |
0 |
nn->dp.num_r_vecs |
1 |
| CAPPED_DATA |
0 |
nn->dp.num_rx_rings |
1 |
| CAPPED_DATA |
0 |
nn->dp.num_tx_rings |
1 |
| CAPPED_DATA |
0 |
nn->max_r_vecs |
1 |
| BIT_INFO |
0 |
nn->dp.ops |
0x56cca0d05451000,0x7dffeaffb7fff000 |
| RX_PATH |
|
|
|
| TASK_NOT_RUNNING |
|
|
|
| HOST_DATA |
0 |
nn->dp.num_r_vecs |
0-s32max[c] |
| HOST_DATA |
0 |
nn->dp.num_rx_rings |
0-s32max[c] |
| HOST_DATA |
0 |
nn->dp.num_tx_rings |
0-s32max[c] |
| HOST_DATA |
0 |
nn->max_r_vecs |
0-s32max[c] |
| HOST_DATA |
0 |
nn->max_rx_rings |
0-u32max |
| HOST_DATA |
0 |
nn->max_tx_rings |
0-u32max |
| HOST_DATA |
0 |
nn->pdev->current_state |
0-3[c] |
| HOST_DATA |
0 |
nn->tlv_caps |
s64min-s64max |
| HOST_DATA |
0 |
nn->tlv_caps.crypto_enable_off |
0 |
| HOST_DATA |
0 |
nn->tlv_caps.crypto_ops |
0-u32max |
| HOST_DATA |
0 |
nn->tlv_caps.mbox_cmsg_types |
0-u32max |
| HOST_DATA |
0 |
nn->tlv_caps.mbox_len |
504 |
| HOST_DATA |
0 |
nn->tlv_caps.mbox_off |
6144 |
| HOST_DATA |
0 |
nn->tlv_caps.me_freq_mhz |
0-u32max |
| HOST_DATA |
0 |
nn->tlv_caps.repr_cap |
0-u32max |
| HOST_DATA |
0 |
nn->tlv_caps.tls_resync_ss |
0 |
| HOST_DATA |
0 |
nn->tlv_caps.vnic_stats_cnt |
0 |
| HOST_DATA |
0 |
nn->tlv_caps.vnic_stats_off |
0 |
| NO_OVERFLOW_SIMPLE |
0 |
nn->max_r_vecs |
|