Defined in 1 files as a function:

Referenced in 1 files:

Smatch caller information:

drivers/gpu/drm/amd/amdgpu/amdgpu_reg_access.c amdgpu_device_pcie_port_rreg() -> (struct amdgpu_nbio_funcs)->get_pcie_port_data_offset()

Type Parameter Key Value
PARAM_VALUE 0 adev 4096-ptr_max
PARAM_VALUE 0 adev->gfx.rlc.cs_data->section->reg_count 0-6,8,11,34,55-56,66,98-99,155,157-158,203,212,215,233,272,274,282,290,488
PARAM_VALUE 0 adev->gfx.rlc.cs_data->section->reg_index 0,4,40960,41022,41164,41174,41176,41179,41461,41471-41472,41530,41630,41632-41633,41635,41637-41638,41694,41701,41717,41920,62460,65472
PARAM_VALUE 0 adev->gfx.rlc.reg_funcs->rreg32 4096-ptr_max
PARAM_VALUE 0 adev->gfx.rlc.reg_funcs->wreg32 0,4096-ptr_max
PARAM_VALUE 0 adev->mes.adev->gfx.rlc.cs_data->section->reg_index 0,4,40960,41022,41164,41174,41176,41179,41461,41471-41472,41530,41630,41632-41633,41635,41637-41638,41694,41701,41717,41920,62460,65472
PARAM_VALUE 0 adev->mes.adev->reset_domain->sem.first_waiter->handoff_set 0-1
PARAM_VALUE 0 adev->mes.adev->reset_domain->sem.first_waiter->type 0-1
PARAM_VALUE 0 adev->mes.funcs->reset_hw_queue 4096-ptr_max
PARAM_VALUE 0 adev->mman.bdev.dev_mapping->i_mmap_rwsem.first_waiter->handoff_set 0-1
PARAM_VALUE 0 adev->mman.bdev.dev_mapping->i_mmap_rwsem.first_waiter->type 0-1
PARAM_VALUE 0 adev->nbio.funcs 4096-ptr_max
PARAM_VALUE 0 adev->nbio.funcs->apply_l1_link_width_reconfig_wa 0,3369621559988916224
PARAM_VALUE 0 adev->nbio.funcs->apply_lc_spc_mode_wa 0,7341966144840404992
PARAM_VALUE 0 adev->nbio.funcs->get_clockgating_state 0,4096-ptr_max
PARAM_VALUE 0 adev->nbio.funcs->get_rev_id 4096-ptr_max
PARAM_VALUE 0 adev->nbio.funcs->remap_hdp_registers 0,4096-ptr_max
PARAM_VALUE 0 adev->nbio.funcs->sdma_doorbell_range 4096-ptr_max
PARAM_VALUE 0 adev->psp.adev->reset_domain->sem.first_waiter->handoff_set 0-1
PARAM_VALUE 0 adev->psp.adev->reset_domain->sem.first_waiter->type 0-1
PARAM_VALUE 0 adev->reg.pcie.port_rreg 1-u64max
PARAM_VALUE 0 adev->reset_domain->sem.first_waiter->handoff_set 0-1
PARAM_VALUE 0 adev->reset_domain->sem.first_waiter->type 0-1
PARAM_VALUE 0 adev->xcp_mgr->adev->gfx.rlc.cs_data->section->reg_index 0,4,40960,41022,41164,41174,41176,41179,41461,41471-41472,41530,41630,41632-41633,41635,41637-41638,41694,41701,41717,41920,62460,65472
BUF_SIZE 0 adev (-1),1256,3968
BUF_SIZE 0 adev (-1),1256,3968
BUF_SIZE 0 adev->asic_funcs (-1),192
BUF_SIZE 0 adev->pm.dpm.priv (-1),7936
BUF_SIZE 0 adev->reg.pcie.port_rreg (-1),8
BUF_SIZE 0 adev->reg.pcie.port_wreg (-1),8
BUF_SIZE 0 adev->reg.pcie.rreg (-1),8
BUF_SIZE 0 adev->reg.pcie.rreg64 (-1),8
BUF_SIZE 0 adev->reg.pcie.rreg64_ext (-1),8
BUF_SIZE 0 adev->reg.pcie.rreg_ext (-1),8
BUF_SIZE 0 adev->reg.pcie.wreg (-1),8
BUF_SIZE 0 adev->reg.pcie.wreg64 (-1),8
BUF_SIZE 0 adev->reg.pcie.wreg64_ext (-1),8
BUF_SIZE 0 adev->reg.pcie.wreg_ext (-1),8
DATA_SOURCE 0 adev $0
CONTAINER 0 -56-64-111496+0 $(-1)
RX_PATH
TASK_NOT_RUNNING
HOST_DATA 0 adev->external_rev_id 80-95[c]
HOST_DATA 0 adev->rev_id 0-15[c]
NO_OVERFLOW_SIMPLE 0 adev->pm.dpm.thermal.irq.num_types
HALF_LOCKED2 &adev->pm.mutex
HALF_LOCKED2 &m->lock
HALF_LOCKED2 0 &adev->jpeg.jpeg_pg_lock

drivers/gpu/drm/amd/amdgpu/amdgpu_reg_access.c amdgpu_device_pcie_port_wreg() -> (struct amdgpu_nbio_funcs)->get_pcie_port_data_offset()

Type Parameter Key Value
PARAM_VALUE 0 adev 4096-ptr_max
PARAM_VALUE 0 adev->gfx.rlc.cs_data->section->reg_count 0-6,8,11,34,55-56,66,98-99,155,157-158,203,212,215,233,272,274,282,290,488
PARAM_VALUE 0 adev->gfx.rlc.cs_data->section->reg_index 0,4,40960,41022,41164,41174,41176,41179,41461,41471-41472,41530,41630,41632-41633,41635,41637-41638,41694,41701,41717,41920,62460,65472
PARAM_VALUE 0 adev->gfx.rlc.reg_funcs->rreg32 4096-ptr_max
PARAM_VALUE 0 adev->gfx.rlc.reg_funcs->wreg32 0,4096-ptr_max
PARAM_VALUE 0 adev->mes.adev->gfx.rlc.cs_data->section->reg_index 0,4,40960,41022,41164,41174,41176,41179,41461,41471-41472,41530,41630,41632-41633,41635,41637-41638,41694,41701,41717,41920,62460,65472
PARAM_VALUE 0 adev->mes.adev->reset_domain->sem.first_waiter->handoff_set 0-1
PARAM_VALUE 0 adev->mes.adev->reset_domain->sem.first_waiter->type 0-1
PARAM_VALUE 0 adev->mes.funcs->reset_hw_queue 4096-ptr_max
PARAM_VALUE 0 adev->mman.bdev.dev_mapping->i_mmap_rwsem.first_waiter->handoff_set 0-1
PARAM_VALUE 0 adev->mman.bdev.dev_mapping->i_mmap_rwsem.first_waiter->type 0-1
PARAM_VALUE 0 adev->nbio.funcs 4096-ptr_max
PARAM_VALUE 0 adev->nbio.funcs->apply_l1_link_width_reconfig_wa 0,3369621559988916224
PARAM_VALUE 0 adev->nbio.funcs->apply_lc_spc_mode_wa 0,7341966144840404992
PARAM_VALUE 0 adev->nbio.funcs->get_rev_id 4096-ptr_max
PARAM_VALUE 0 adev->nbio.funcs->remap_hdp_registers 0,4096-ptr_max
PARAM_VALUE 0 adev->nbio.funcs->sdma_doorbell_range 4096-ptr_max
PARAM_VALUE 0 adev->psp.adev->reset_domain->sem.first_waiter->handoff_set 0-1
PARAM_VALUE 0 adev->psp.adev->reset_domain->sem.first_waiter->type 0-1
PARAM_VALUE 0 adev->reg.pcie.port_wreg 1-u64max
PARAM_VALUE 0 adev->reset_domain->sem.first_waiter->handoff_set 0-1
PARAM_VALUE 0 adev->reset_domain->sem.first_waiter->type 0-1
PARAM_VALUE 0 adev->xcp_mgr->adev->gfx.rlc.cs_data->section->reg_index 0,4,40960,41022,41164,41174,41176,41179,41461,41471-41472,41530,41630,41632-41633,41635,41637-41638,41694,41701,41717,41920,62460,65472
BUF_SIZE 0 adev (-1),1256,3968
BUF_SIZE 0 adev (-1),1256,3968
BUF_SIZE 0 adev->asic_funcs (-1),192
BUF_SIZE 0 adev->reg.pcie.port_rreg (-1),8
BUF_SIZE 0 adev->reg.pcie.port_wreg (-1),8
BUF_SIZE 0 adev->reg.pcie.rreg (-1),8
BUF_SIZE 0 adev->reg.pcie.rreg64 (-1),8
BUF_SIZE 0 adev->reg.pcie.rreg64_ext (-1),8
BUF_SIZE 0 adev->reg.pcie.rreg_ext (-1),8
BUF_SIZE 0 adev->reg.pcie.wreg (-1),8
BUF_SIZE 0 adev->reg.pcie.wreg64 (-1),8
BUF_SIZE 0 adev->reg.pcie.wreg64_ext (-1),8
BUF_SIZE 0 adev->reg.pcie.wreg_ext (-1),8
DATA_SOURCE 0 adev $0
CONTAINER 0 -56-64-111496+0 $(-1)
RX_PATH
TASK_NOT_RUNNING
HOST_DATA 0 adev->external_rev_id 80-95[c]
HOST_DATA 0 adev->rev_id 0-15[c]
HALF_LOCKED2 &adev->pm.mutex
HALF_LOCKED2 0 &adev->jpeg.jpeg_pg_lock