Documented in 1 files:

Defined in 1 files as a function:

Referenced in 7 files:

Smatch caller information:

drivers/mtd/nand/raw/stm32_fmc2_nand.c stm32_fmc2_nfc_waitrdy() -> nand_get_interface_config()

Type Parameter Key Value
PARAM_VALUE 0 chip 4096-ptr_max
BUF_SIZE 0 chip->badblock_pattern (-1),72
BUF_SIZE 0 chip->bbt_md (-1)-0,72
BUF_SIZE 0 chip->bbt_md->pattern (-1),9
BUF_SIZE 0 chip->bbt_td (-1)-0,72
BUF_SIZE 0 chip->bbt_td->pattern (-1),9
BUF_SIZE 0 chip->controller (-1),168
BUF_SIZE 0 chip->current_interface_config (-1),1152
BUF_SIZE 0 chip->data_buf (-1)-s32max
DATA_SOURCE 0 chip $0
STR_LEN 0 chip->bbt_md->pattern (-1),8
STR_LEN 0 chip->bbt_td->pattern (-1),8
NOSPEC 0 chip->cur_cs
RX_PATH
TASK_NOT_RUNNING
HOST_DATA 0 chip->cont_read.first_page 1-s32max[c]
HOST_DATA 0 chip->cont_read.pause_page 2-4147480570[c]
HOST_DATA 0 chip->cur_cs 1-s32max[c]
HOST_DATA 0 chip->pagecache.page s32min-s32max[c]
HOST_DATA 0 *chip->data_buf 0-255
HOST_DATA 0 *chip->oob_poi 0-255
USER_DATA 0 chip->cont_read.first_page 1-s32max[c]
USER_DATA 0 chip->cur_cs 1-s32max[c]
USER_DATA 0 chip->pagecache.page s32min-s32max
USER_DATA 0 *chip->oob_poi 0-255
NO_OVERFLOW_SIMPLE 0 chip->ecc.postpad
NO_OVERFLOW_SIMPLE 0 chip->ecc.prepad
NO_OVERFLOW_SIMPLE 0 chip->nr_secure_regions
USER_PTR 0 chip->data_buf
HALF_LOCKED2 0 &chip->controller->lock
HALF_LOCKED2 0 &chip->lock

drivers/mtd/nand/raw/nand_base.c nand_change_read_column_op() -> nand_get_interface_config()

Type Parameter Key Value
PARAM_VALUE 0 chip 4096-ptr_max
BUF_SIZE 0 chip (-1),4088
BUF_SIZE 0 chip (-1),4088
BUF_SIZE 0 chip->badblock_pattern (-1),72
BUF_SIZE 0 chip->bbt_md (-1)-0,72
BUF_SIZE 0 chip->bbt_md->pattern (-1),9
BUF_SIZE 0 chip->bbt_td (-1)-0,72,144
BUF_SIZE 0 chip->bbt_td->pattern (-1),9
BUF_SIZE 0 chip->controller (-1),168
BUF_SIZE 0 chip->current_interface_config (-1),1152
BUF_SIZE 0 chip->data_buf (-1)-s32max
BUF_SIZE 0 chip->legacy.dummy_controller.ops (-1),32
BUF_SIZE 0 chip->priv (-1),4008
CAPPED_DATA 0 chip 1
DATA_SOURCE 0 chip $0
STR_LEN 0 chip->bbt_md->pattern (-1),8
STR_LEN 0 chip->bbt_td->pattern (-1),8
NOSPEC 0 chip->cur_cs
RX_PATH
TASK_NOT_RUNNING
HOST_DATA 0 chip->cont_read.first_page 1-s32max[c]
HOST_DATA 0 chip->cont_read.pause_page 2-4147480570[c]
HOST_DATA 0 chip->controller->controller_wp 0
HOST_DATA 0 chip->controller->lock.osq.tail.counter 0
HOST_DATA 0 chip->controller->lock.owner.counter 0
HOST_DATA 0 chip->controller->supported_op.cont_read 0
HOST_DATA 0 chip->controller->supported_op.data_only_read 0
HOST_DATA 0 chip->cur_cs 1-s32max[c]
HOST_DATA 0 chip->pagecache.page s32min-s32max[c]
HOST_DATA 0 *chip->data_buf 0-255
HOST_DATA 0 *chip->oob_poi 0-255
USER_DATA 0 chip->cont_read.first_page 1-s32max[c]
USER_DATA 0 chip->cur_cs 1-s32max[c]
USER_DATA 0 chip->pagecache.page s32min-s32max
USER_DATA 0 *chip->oob_poi 0-255
NO_OVERFLOW_SIMPLE 0 chip->ecc.postpad
NO_OVERFLOW_SIMPLE 0 chip->ecc.prepad
NO_OVERFLOW_SIMPLE 0 chip->nr_secure_regions
USER_PTR 0 chip->data_buf
HALF_LOCKED2 0 &chip->controller->lock
HALF_LOCKED2 0 &chip->lock

drivers/mtd/nand/raw/nand_base.c nand_change_write_column_op() -> nand_get_interface_config()

Type Parameter Key Value
PARAM_VALUE 0 chip 4096-ptr_max
BUF_SIZE 0 chip (-1),3704
BUF_SIZE 0 chip (-1),3704
BUF_SIZE 0 chip->badblock_pattern (-1),72
BUF_SIZE 0 chip->bbt_md (-1)-0,72
BUF_SIZE 0 chip->bbt_md->pattern (-1),9
BUF_SIZE 0 chip->bbt_td (-1)-0,72
BUF_SIZE 0 chip->bbt_td->pattern (-1),9
BUF_SIZE 0 chip->controller (-1),168
BUF_SIZE 0 chip->data_buf (-1)-s32max
CAPPED_DATA 0 chip 1
DATA_SOURCE 0 chip $0
STR_LEN 0 chip->bbt_md->pattern (-1),8
STR_LEN 0 chip->bbt_td->pattern (-1),8
NOSPEC 0 chip->cur_cs
RX_PATH
TASK_NOT_RUNNING
HOST_DATA 0 chip->cont_read.first_page 1-s32max[c]
HOST_DATA 0 chip->cont_read.pause_page 2-4147480570[c]
HOST_DATA 0 chip->cur_cs 1-s32max[c]
HOST_DATA 0 chip->pagecache.page s32min-s32max[c]
HOST_DATA 0 *chip->data_buf 0-255
HOST_DATA 0 *chip->oob_poi 0-255
USER_DATA 0 chip->cont_read.first_page 1-s32max[c]
USER_DATA 0 chip->cur_cs 1-s32max[c]
USER_DATA 0 chip->pagecache.page s32min-s32max
USER_DATA 0 *chip->oob_poi 0-255
NO_OVERFLOW_SIMPLE 0 chip->ecc.postpad
NO_OVERFLOW_SIMPLE 0 chip->ecc.prepad
NO_OVERFLOW_SIMPLE 0 chip->nr_secure_regions
HALF_LOCKED2 0 &chip->controller->lock
HALF_LOCKED2 0 &chip->lock

drivers/mtd/nand/raw/nand_base.c nand_erase_op() -> nand_get_interface_config()

Type Parameter Key Value
PARAM_VALUE 0 chip 4096-ptr_max
BUF_SIZE 0 chip (-1),3704
BUF_SIZE 0 chip (-1),3704
BUF_SIZE 0 chip->bbt_md (-1)-0,72
BUF_SIZE 0 chip->bbt_md->pattern (-1),9
BUF_SIZE 0 chip->bbt_td (-1)-0,72
BUF_SIZE 0 chip->bbt_td->pattern (-1),9
BUF_SIZE 0 chip->data_buf (-1)-s32max
CAPPED_DATA 0 chip 1
DATA_SOURCE 0 chip $0
STR_LEN 0 chip->bbt_md->pattern (-1),8
STR_LEN 0 chip->bbt_td->pattern (-1),8
NOSPEC 0 chip->cur_cs
RX_PATH
TASK_NOT_RUNNING
HOST_DATA 0 chip->cur_cs 1-s32max[c]
HOST_DATA 0 *chip->oob_poi 0-255
USER_DATA 0 chip->cur_cs 1-s32max[c]
NO_OVERFLOW_SIMPLE 0 chip->nr_secure_regions
HALF_LOCKED2 &spinand->lock
HALF_LOCKED2 0 &chip->controller->lock
HALF_LOCKED2 0 &chip->lock

drivers/mtd/nand/raw/nand_base.c nand_exec_prog_page_op() -> nand_get_interface_config()

Type Parameter Key Value
PARAM_VALUE 0 chip 4096-ptr_max
BUF_SIZE 0 chip->badblock_pattern (-1),72
BUF_SIZE 0 chip->bbt_md (-1)-0,72
BUF_SIZE 0 chip->bbt_md->pattern (-1),9
BUF_SIZE 0 chip->bbt_td (-1)-0,72
BUF_SIZE 0 chip->bbt_td->pattern (-1),9
BUF_SIZE 0 chip->controller (-1),168
BUF_SIZE 0 chip->data_buf (-1)-s32max
CAPPED_DATA 0 chip 1
DATA_SOURCE 0 chip $0
STR_LEN 0 chip->bbt_md->pattern (-1),8
STR_LEN 0 chip->bbt_td->pattern (-1),8
NOSPEC 0 chip->cur_cs
RX_PATH
TASK_NOT_RUNNING
HOST_DATA 0 chip->cont_read.pause_page 2-4147480570[c]
HOST_DATA 0 chip->cur_cs 1-s32max[c]
HOST_DATA 0 *chip->oob_poi 0-255
USER_DATA 0 chip->cur_cs 1-s32max[c]
USER_DATA 0 *chip->oob_poi 0-255
NO_OVERFLOW_SIMPLE 0 chip->nr_secure_regions
USER_PTR 0 chip->data_buf
HALF_LOCKED2 0 &chip->controller->lock
HALF_LOCKED2 0 &chip->lock

drivers/mtd/nand/raw/nand_base.c nand_get_features_op() -> nand_get_interface_config()

Type Parameter Key Value
PARAM_VALUE 0 chip 4096-ptr_max
BUF_SIZE 0 chip->bbt_md (-1)-0,72
BUF_SIZE 0 chip->bbt_md->pattern (-1),9
BUF_SIZE 0 chip->bbt_td (-1)-0,72
BUF_SIZE 0 chip->bbt_td->pattern (-1),9
BUF_SIZE 0 chip->current_interface_config (-1),1152
BUF_SIZE 0 chip->data_buf (-1)-s32max
DATA_SOURCE 0 chip $0
STR_LEN 0 chip->bbt_md->pattern (-1),8
STR_LEN 0 chip->bbt_td->pattern (-1),8
NOSPEC 0 chip->cur_cs
RX_PATH
TASK_NOT_RUNNING
HOST_DATA 0 chip->cur_cs 1-s32max[c]
HOST_DATA 0 *chip->oob_poi 0-255
USER_DATA 0 chip->cur_cs 1-s32max[c]
HALF_LOCKED2 0 &chip->controller->lock
HALF_LOCKED2 0 &chip->lock

drivers/mtd/nand/raw/nand_base.c nand_lp_exec_cont_read_page_op() -> nand_get_interface_config()

Type Parameter Key Value
PARAM_VALUE 0 chip 4096-ptr_max
BUF_SIZE 0 chip (-1),3704
BUF_SIZE 0 chip (-1),3704
BUF_SIZE 0 chip->badblock_pattern (-1),72
BUF_SIZE 0 chip->bbt_md (-1)-0,72
BUF_SIZE 0 chip->bbt_md->pattern (-1),9
BUF_SIZE 0 chip->bbt_td (-1)-0,72
BUF_SIZE 0 chip->bbt_td->pattern (-1),9
BUF_SIZE 0 chip->controller (-1),168
BUF_SIZE 0 chip->data_buf (-1)-s32max
DATA_SOURCE 0 chip $0
STR_LEN 0 chip->bbt_md->pattern (-1),8
STR_LEN 0 chip->bbt_td->pattern (-1),8
NOSPEC 0 chip->cur_cs
RX_PATH
TASK_NOT_RUNNING
HOST_DATA 0 chip->cont_read.first_page 1-s32max[c]
HOST_DATA 0 chip->cont_read.pause_page 2-4147480570[c]
HOST_DATA 0 chip->cur_cs 1-s32max[c]
HOST_DATA 0 chip->pagecache.page s32min-s32max[c]
HOST_DATA 0 *chip->data_buf 0-255
HOST_DATA 0 *chip->oob_poi 0-255
USER_DATA 0 chip->cont_read.first_page 1-s32max[c]
USER_DATA 0 chip->cur_cs 1-s32max[c]
USER_DATA 0 chip->pagecache.page s32min-s32max
USER_DATA 0 *chip->oob_poi 0-255
NO_OVERFLOW_SIMPLE 0 chip->ecc.postpad
NO_OVERFLOW_SIMPLE 0 chip->ecc.prepad
NO_OVERFLOW_SIMPLE 0 chip->nr_secure_regions
NO_OVERFLOW_SIMPLE 0 chip->pagecache.bitflips
HALF_LOCKED2 0 &chip->controller->lock
HALF_LOCKED2 0 &chip->lock

drivers/mtd/nand/raw/nand_base.c nand_lp_exec_read_page_op() -> nand_get_interface_config()

Type Parameter Key Value
PARAM_VALUE 0 chip 4096-ptr_max
BUF_SIZE 0 chip (-1),3704
BUF_SIZE 0 chip (-1),3704
BUF_SIZE 0 chip->badblock_pattern (-1),72
BUF_SIZE 0 chip->bbt_md (-1)-0,72
BUF_SIZE 0 chip->bbt_md->pattern (-1),9
BUF_SIZE 0 chip->bbt_td (-1)-0,72
BUF_SIZE 0 chip->bbt_td->pattern (-1),9
BUF_SIZE 0 chip->controller (-1),168
BUF_SIZE 0 chip->data_buf (-1)-s32max
DATA_SOURCE 0 chip $0
STR_LEN 0 chip->bbt_md->pattern (-1),8
STR_LEN 0 chip->bbt_td->pattern (-1),8
NOSPEC 0 chip->cur_cs
RX_PATH
TASK_NOT_RUNNING
HOST_DATA 0 chip->cont_read.first_page 1-s32max[c]
HOST_DATA 0 chip->cont_read.pause_page 2-4147480570[c]
HOST_DATA 0 chip->cur_cs 1-s32max[c]
HOST_DATA 0 chip->pagecache.page s32min-s32max[c]
HOST_DATA 0 *chip->data_buf 0-255
HOST_DATA 0 *chip->oob_poi 0-255
USER_DATA 0 chip->cont_read.first_page 1-s32max[c]
USER_DATA 0 chip->cur_cs 1-s32max[c]
USER_DATA 0 chip->pagecache.page s32min-s32max
USER_DATA 0 *chip->oob_poi 0-255
NO_OVERFLOW_SIMPLE 0 chip->ecc.postpad
NO_OVERFLOW_SIMPLE 0 chip->ecc.prepad
NO_OVERFLOW_SIMPLE 0 chip->nr_secure_regions
NO_OVERFLOW_SIMPLE 0 chip->pagecache.bitflips
HALF_LOCKED2 0 &chip->controller->lock
HALF_LOCKED2 0 &chip->lock

drivers/mtd/nand/raw/nand_base.c nand_prog_page_end_op() -> nand_get_interface_config()

Type Parameter Key Value
PARAM_VALUE 0 chip 4096-ptr_max
BUF_SIZE 0 chip (-1),3704
BUF_SIZE 0 chip (-1),3704
BUF_SIZE 0 chip->badblock_pattern (-1),72
BUF_SIZE 0 chip->bbt_md (-1)-0,72
BUF_SIZE 0 chip->bbt_md->pattern (-1),9
BUF_SIZE 0 chip->bbt_td (-1)-0,72
BUF_SIZE 0 chip->bbt_td->pattern (-1),9
BUF_SIZE 0 chip->controller (-1),168
BUF_SIZE 0 chip->data_buf (-1)-s32max
CAPPED_DATA 0 chip 1
DATA_SOURCE 0 chip $0
STR_LEN 0 chip->bbt_md->pattern (-1),8
STR_LEN 0 chip->bbt_td->pattern (-1),8
NOSPEC 0 chip->cur_cs
RX_PATH
TASK_NOT_RUNNING
HOST_DATA 0 chip->cont_read.pause_page 2-4147480570[c]
HOST_DATA 0 chip->cur_cs 1-s32max[c]
HOST_DATA 0 *chip->oob_poi 0-255
USER_DATA 0 chip->cur_cs 1-s32max[c]
NO_OVERFLOW_SIMPLE 0 chip->nr_secure_regions
HALF_LOCKED2 0 &chip->controller->lock
HALF_LOCKED2 0 &chip->lock

drivers/mtd/nand/raw/nand_base.c nand_read_data_op() -> nand_get_interface_config()

Type Parameter Key Value
PARAM_VALUE 0 chip 4096-ptr_max
BUF_SIZE 0 chip (-1),4088
BUF_SIZE 0 chip (-1),4088
BUF_SIZE 0 chip->badblock_pattern (-1),72
BUF_SIZE 0 chip->bbt_md (-1)-0,72
BUF_SIZE 0 chip->bbt_md->pattern (-1),9
BUF_SIZE 0 chip->bbt_td (-1)-0,72,144
BUF_SIZE 0 chip->bbt_td->pattern (-1),9
BUF_SIZE 0 chip->controller (-1),168
BUF_SIZE 0 chip->current_interface_config (-1),1152
BUF_SIZE 0 chip->data_buf (-1)-s32max
BUF_SIZE 0 chip->legacy.dummy_controller.ops (-1),32
BUF_SIZE 0 chip->priv (-1),4008
CAPPED_DATA 0 chip 1
DATA_SOURCE 0 chip $0
STR_LEN 0 chip->bbt_md->pattern (-1),8
STR_LEN 0 chip->bbt_td->pattern (-1),8
NOSPEC 0 chip->cur_cs
RX_PATH
TASK_NOT_RUNNING
HOST_DATA 0 chip->cont_read.first_page 1-s32max[c]
HOST_DATA 0 chip->cont_read.pause_page 2-4147480570[c]
HOST_DATA 0 chip->controller->controller_wp 0
HOST_DATA 0 chip->controller->lock.osq.tail.counter 0
HOST_DATA 0 chip->controller->lock.owner.counter 0
HOST_DATA 0 chip->controller->supported_op.cont_read 0
HOST_DATA 0 chip->controller->supported_op.data_only_read 0
HOST_DATA 0 chip->cur_cs 1-s32max[c]
HOST_DATA 0 chip->pagecache.page s32min-s32max[c]
HOST_DATA 0 *chip->data_buf 0-255
HOST_DATA 0 *chip->oob_poi 0-255
USER_DATA 0 chip->cont_read.first_page 1-s32max[c]
USER_DATA 0 chip->cur_cs 1-s32max[c]
USER_DATA 0 chip->pagecache.page s32min-s32max
USER_DATA 0 *chip->oob_poi 0-255
NO_OVERFLOW_SIMPLE 0 chip->ecc.postpad
NO_OVERFLOW_SIMPLE 0 chip->ecc.prepad
NO_OVERFLOW_SIMPLE 0 chip->nr_secure_regions
NO_OVERFLOW_SIMPLE 0 chip->pagecache.bitflips
USER_PTR 0 chip->data_buf
HALF_LOCKED2 0 &chip->controller->lock
HALF_LOCKED2 0 &chip->lock

drivers/mtd/nand/raw/nand_base.c nand_read_param_page_op() -> nand_get_interface_config()

Type Parameter Key Value
PARAM_VALUE 0 chip 4096-ptr_max
BUF_SIZE 0 chip (-1),4088
BUF_SIZE 0 chip (-1),4088
BUF_SIZE 0 chip->badblock_pattern (-1),72
BUF_SIZE 0 chip->bbt_md (-1),72
BUF_SIZE 0 chip->bbt_td (-1),72,144
BUF_SIZE 0 chip->legacy.dummy_controller.ops (-1),32
BUF_SIZE 0 chip->priv (-1),4008
DATA_SOURCE 0 chip $0
RX_PATH
TASK_NOT_RUNNING
HOST_DATA 0 chip->controller->controller_wp 0
HOST_DATA 0 chip->controller->lock.osq.tail.counter 0
HOST_DATA 0 chip->controller->lock.owner.counter 0
HOST_DATA 0 chip->controller->supported_op.cont_read 0
HOST_DATA 0 chip->controller->supported_op.data_only_read 0
HOST_DATA 0 chip->cur_cs 1-s32max[c]
HALF_LOCKED2 &pool->lock

drivers/mtd/nand/raw/nand_base.c nand_readid_op() -> nand_get_interface_config()

Type Parameter Key Value
PARAM_VALUE 0 chip 4096-ptr_max
BUF_SIZE 0 chip (-1),4088
BUF_SIZE 0 chip (-1),4088
BUF_SIZE 0 chip->badblock_pattern (-1),72
BUF_SIZE 0 chip->bbt_md (-1),72
BUF_SIZE 0 chip->bbt_td (-1),72,144
BUF_SIZE 0 chip->legacy.dummy_controller.ops (-1),32
BUF_SIZE 0 chip->priv (-1),4008
DATA_SOURCE 0 chip $0
RX_PATH
TASK_NOT_RUNNING
HOST_DATA 0 chip->controller->controller_wp 0
HOST_DATA 0 chip->controller->lock.osq.tail.counter 0
HOST_DATA 0 chip->controller->lock.owner.counter 0
HOST_DATA 0 chip->controller->supported_op.cont_read 0-1
HOST_DATA 0 chip->controller->supported_op.data_only_read 0-1
HOST_DATA 0 chip->cur_cs 1-s32max[c]
NO_OVERFLOW_SIMPLE 0 chip->cur_cs

drivers/mtd/nand/raw/nand_base.c nand_reset_op() -> nand_get_interface_config()

Type Parameter Key Value
PARAM_VALUE 0 chip 4096-ptr_max
BUF_SIZE 0 chip (-1),3704,4088
BUF_SIZE 0 chip (-1),3704,4088
BUF_SIZE 0 chip->badblock_pattern (-1),72
BUF_SIZE 0 chip->bbt_md (-1)-0,72
BUF_SIZE 0 chip->bbt_md->pattern (-1),9
BUF_SIZE 0 chip->bbt_td (-1)-0,72,144
BUF_SIZE 0 chip->bbt_td->pattern (-1),9
BUF_SIZE 0 chip->controller (-1),168
BUF_SIZE 0 chip->current_interface_config (-1),1152
BUF_SIZE 0 chip->data_buf (-1)-s32max
BUF_SIZE 0 chip->legacy.dummy_controller.ops (-1),32
BUF_SIZE 0 chip->priv (-1),4008
DATA_SOURCE 0 chip $0
STR_LEN 0 chip->bbt_md->pattern (-1),8
STR_LEN 0 chip->bbt_td->pattern (-1),8
RX_PATH
TASK_NOT_RUNNING
HOST_DATA 0 chip->controller->controller_wp 0
HOST_DATA 0 chip->controller->lock.osq.tail.counter 0
HOST_DATA 0 chip->controller->lock.owner.counter 0
HOST_DATA 0 chip->controller->supported_op.cont_read 0-1
HOST_DATA 0 chip->controller->supported_op.data_only_read 0-1
HOST_DATA 0 chip->cur_cs 1-s32max[c]
HOST_DATA 0 *chip->oob_poi 0-255
NO_OVERFLOW_SIMPLE 0 chip->cur_cs
NO_OVERFLOW_SIMPLE 0 chip->nr_secure_regions
HALF_LOCKED2 0 &chip->controller->lock
HALF_LOCKED2 0 &chip->lock

drivers/mtd/nand/raw/nand_base.c nand_set_features_op() -> nand_get_interface_config()

Type Parameter Key Value
PARAM_VALUE 0 chip 4096-ptr_max
BUF_SIZE 0 chip->badblock_pattern (-1),72
BUF_SIZE 0 chip->bbt_md (-1)-0,72
BUF_SIZE 0 chip->bbt_md->pattern (-1),9
BUF_SIZE 0 chip->bbt_td (-1)-0,72
BUF_SIZE 0 chip->bbt_td->pattern (-1),9
BUF_SIZE 0 chip->controller (-1),168
BUF_SIZE 0 chip->current_interface_config (-1),1152
BUF_SIZE 0 chip->data_buf (-1)-s32max
DATA_SOURCE 0 chip $0
STR_LEN 0 chip->bbt_md->pattern (-1),8
STR_LEN 0 chip->bbt_td->pattern (-1),8
NOSPEC 0 chip->cur_cs
RX_PATH
TASK_NOT_RUNNING
HOST_DATA 0 chip->cont_read.first_page 1-s32max[c]
HOST_DATA 0 chip->cont_read.pause_page 2-4147480570[c]
HOST_DATA 0 chip->cur_cs 1-s32max[c]
HOST_DATA 0 chip->pagecache.page s32min-s32max[c]
HOST_DATA 0 *chip->data_buf 0-255
HOST_DATA 0 *chip->oob_poi 0-255
USER_DATA 0 chip->cont_read.first_page 1-s32max[c]
USER_DATA 0 chip->cur_cs 1-s32max[c]
USER_DATA 0 chip->pagecache.page s32min-s32max
USER_DATA 0 *chip->oob_poi 0-255
NO_OVERFLOW_SIMPLE 0 chip->ecc.postpad
NO_OVERFLOW_SIMPLE 0 chip->ecc.prepad
NO_OVERFLOW_SIMPLE 0 chip->nr_secure_regions
HALF_LOCKED2 0 &chip->controller->lock
HALF_LOCKED2 0 &chip->lock

drivers/mtd/nand/raw/nand_base.c nand_soft_waitrdy() -> nand_get_interface_config()

Type Parameter Key Value
PARAM_VALUE 0 chip 4096-ptr_max
BUF_SIZE 0 chip->badblock_pattern (-1),72
BUF_SIZE 0 chip->bbt_md (-1)-0,72
BUF_SIZE 0 chip->bbt_md->pattern (-1),9
BUF_SIZE 0 chip->bbt_td (-1)-0,72
BUF_SIZE 0 chip->bbt_td->pattern (-1),9
BUF_SIZE 0 chip->controller (-1),168
BUF_SIZE 0 chip->current_interface_config (-1),1152
BUF_SIZE 0 chip->data_buf (-1)-s32max
DATA_SOURCE 0 chip $0
STR_LEN 0 chip->bbt_md->pattern (-1),8
STR_LEN 0 chip->bbt_td->pattern (-1),8
NOSPEC 0 chip->cur_cs
RX_PATH
TASK_NOT_RUNNING
HOST_DATA 0 chip->cont_read.first_page 1-s32max[c]
HOST_DATA 0 chip->cont_read.pause_page 2-4147480570[c]
HOST_DATA 0 chip->cur_cs 1-s32max[c]
HOST_DATA 0 chip->pagecache.page s32min-s32max[c]
HOST_DATA 0 *chip->data_buf 0-255
HOST_DATA 0 *chip->oob_poi 0-255
USER_DATA 0 chip->cont_read.first_page 1-s32max[c]
USER_DATA 0 chip->cur_cs 1-s32max[c]
USER_DATA 0 chip->pagecache.page s32min-s32max
USER_DATA 0 *chip->oob_poi 0-255
NO_OVERFLOW_SIMPLE 0 chip->ecc.postpad
NO_OVERFLOW_SIMPLE 0 chip->ecc.prepad
NO_OVERFLOW_SIMPLE 0 chip->nr_secure_regions
USER_PTR 0 chip->data_buf
HALF_LOCKED2 0 &chip->controller->lock
HALF_LOCKED2 0 &chip->lock

drivers/mtd/nand/raw/nand_base.c nand_sp_exec_read_page_op() -> nand_get_interface_config()

Type Parameter Key Value
PARAM_VALUE 0 chip 4096-ptr_max
BUF_SIZE 0 chip (-1),3704
BUF_SIZE 0 chip (-1),3704
BUF_SIZE 0 chip->badblock_pattern (-1),72
BUF_SIZE 0 chip->bbt_md (-1)-0,72
BUF_SIZE 0 chip->bbt_md->pattern (-1),9
BUF_SIZE 0 chip->bbt_td (-1)-0,72
BUF_SIZE 0 chip->bbt_td->pattern (-1),9
BUF_SIZE 0 chip->controller (-1),168
BUF_SIZE 0 chip->data_buf (-1)-s32max
DATA_SOURCE 0 chip $0
STR_LEN 0 chip->bbt_md->pattern (-1),8
STR_LEN 0 chip->bbt_td->pattern (-1),8
NOSPEC 0 chip->cur_cs
RX_PATH
TASK_NOT_RUNNING
HOST_DATA 0 chip->cont_read.first_page 1-s32max[c]
HOST_DATA 0 chip->cont_read.pause_page 2-4147480570[c]
HOST_DATA 0 chip->cur_cs 1-s32max[c]
HOST_DATA 0 chip->pagecache.page s32min-s32max[c]
HOST_DATA 0 *chip->data_buf 0-255
HOST_DATA 0 *chip->oob_poi 0-255
USER_DATA 0 chip->cont_read.first_page 1-s32max[c]
USER_DATA 0 chip->cur_cs 1-s32max[c]
USER_DATA 0 chip->pagecache.page s32min-s32max
USER_DATA 0 *chip->oob_poi 0-255
NO_OVERFLOW_SIMPLE 0 chip->ecc.postpad
NO_OVERFLOW_SIMPLE 0 chip->ecc.prepad
NO_OVERFLOW_SIMPLE 0 chip->nr_secure_regions
NO_OVERFLOW_SIMPLE 0 chip->pagecache.bitflips
HALF_LOCKED2 0 &chip->controller->lock
HALF_LOCKED2 0 &chip->lock

drivers/mtd/nand/raw/nand_base.c nand_status_op() -> nand_get_interface_config()

Type Parameter Key Value
PARAM_VALUE 0 chip 4096-ptr_max
BUF_SIZE 0 chip (-1),3704
BUF_SIZE 0 chip (-1),3704
BUF_SIZE 0 chip->badblock_pattern (-1),72
BUF_SIZE 0 chip->bbt_md (-1)-0,72
BUF_SIZE 0 chip->bbt_md->pattern (-1),9
BUF_SIZE 0 chip->bbt_td (-1)-0,72
BUF_SIZE 0 chip->bbt_td->pattern (-1),9
BUF_SIZE 0 chip->controller (-1),168
BUF_SIZE 0 chip->current_interface_config (-1),1152
BUF_SIZE 0 chip->data_buf (-1)-s32max
CAPPED_DATA 0 chip 1
DATA_SOURCE 0 chip $0
STR_LEN 0 chip->bbt_md->pattern (-1),8
STR_LEN 0 chip->bbt_td->pattern (-1),8
NOSPEC 0 chip->cur_cs
RX_PATH
TASK_NOT_RUNNING
HOST_DATA 0 chip->cont_read.first_page 1-s32max[c]
HOST_DATA 0 chip->cont_read.pause_page 2-4147480570[c]
HOST_DATA 0 chip->cur_cs 1-s32max[c]
HOST_DATA 0 chip->pagecache.page s32min-s32max[c]
HOST_DATA 0 *chip->data_buf 0-255
HOST_DATA 0 *chip->oob_poi 0-255
USER_DATA 0 chip->cont_read.first_page 1-s32max[c]
USER_DATA 0 chip->cur_cs 1-s32max[c]
USER_DATA 0 chip->pagecache.page s32min-s32max
USER_DATA 0 *chip->oob_poi 0-255
NO_OVERFLOW_SIMPLE 0 chip->ecc.postpad
NO_OVERFLOW_SIMPLE 0 chip->ecc.prepad
NO_OVERFLOW_SIMPLE 0 chip->nr_secure_regions
USER_PTR 0 chip->data_buf
HALF_LOCKED2 0 &chip->controller->lock
HALF_LOCKED2 0 &chip->lock

drivers/mtd/nand/raw/nand_base.c nand_wait_readrdy() -> nand_get_interface_config()

Type Parameter Key Value
PARAM_VALUE 0 chip 4096-ptr_max
CAPPED_DATA 0 chip->nr_secure_regions 1
DATA_SOURCE 0 chip $0
BIT_INFO 0 chip->options 0x100,0xffffffff
LOCK2 0 &chip->controller->lock
LOCK2 0 &chip->lock
TYPE_LOCK (struct nand_chip)->lock
TYPE_LOCK (struct nand_controller)->lock

drivers/mtd/nand/raw/nand_legacy.c nand_ccs_delay() -> nand_get_interface_config()

Type Parameter Key Value
PARAM_VALUE 0 chip 4096-ptr_max
BUF_SIZE 0 chip (-1),4088
BUF_SIZE 0 chip (-1),4088
BUF_SIZE 0 chip->badblock_pattern (-1),72
BUF_SIZE 0 chip->bbt_md (-1)-0,72
BUF_SIZE 0 chip->bbt_md->pattern (-1),9
BUF_SIZE 0 chip->bbt_td (-1)-0,72
BUF_SIZE 0 chip->bbt_td->pattern (-1),9
BUF_SIZE 0 chip->controller (-1),168
BUF_SIZE 0 chip->current_interface_config (-1),1152
BUF_SIZE 0 chip->data_buf (-1)-s32max
DATA_SOURCE 0 chip $0
STR_LEN 0 chip->bbt_md->pattern (-1),8
STR_LEN 0 chip->bbt_td->pattern (-1),8
NOSPEC 0 chip->cur_cs
RX_PATH
TASK_NOT_RUNNING
HOST_DATA 0 chip->cont_read.first_page 1-s32max[c]
HOST_DATA 0 chip->cont_read.pause_page 2-4147480570[c]
HOST_DATA 0 chip->controller->controller_wp 0
HOST_DATA 0 chip->controller->lock.osq.tail.counter 0
HOST_DATA 0 chip->controller->lock.owner.counter 0
HOST_DATA 0 chip->controller->supported_op.cont_read 0
HOST_DATA 0 chip->controller->supported_op.data_only_read 0
HOST_DATA 0 chip->cur_cs 1-s32max[c]
HOST_DATA 0 chip->pagecache.page s32min-s32max[c]
HOST_DATA 0 *chip->data_buf 0-255
HOST_DATA 0 *chip->oob_poi 0-255
USER_DATA 0 chip->cont_read.first_page 1-s32max[c]
USER_DATA 0 chip->cur_cs 1-s32max[c]
USER_DATA 0 chip->pagecache.page s32min-s32max
USER_DATA 0 *chip->oob_poi 0-255
NO_OVERFLOW_SIMPLE 0 chip->ecc.postpad
NO_OVERFLOW_SIMPLE 0 chip->ecc.prepad
NO_OVERFLOW_SIMPLE 0 chip->nr_secure_regions
USER_PTR 0 chip->data_buf
HALF_LOCKED2 0 &chip->controller->lock
HALF_LOCKED2 0 &chip->lock

drivers/mtd/nand/raw/meson_nand.c meson_nfc_rw_cmd_prepare_and_execute() -> nand_get_interface_config()

Type Parameter Key Value
PARAM_VALUE 0 chip 4096-ptr_max
BUF_SIZE 0 chip->badblock_pattern (-1),72
BUF_SIZE 0 chip->bbt_md (-1)-0,72
BUF_SIZE 0 chip->bbt_md->pattern (-1),9
BUF_SIZE 0 chip->bbt_td (-1)-0,72
BUF_SIZE 0 chip->bbt_td->pattern (-1),9
BUF_SIZE 0 chip->controller (-1),168
BUF_SIZE 0 chip->data_buf (-1)-s32max
CAPPED_DATA 0 chip->cur_cs 1
DATA_SOURCE 0 chip $0
STR_LEN 0 chip->bbt_md->pattern (-1),8
STR_LEN 0 chip->bbt_td->pattern (-1),8
NOSPEC 0 chip->cur_cs
RX_PATH
TASK_NOT_RUNNING
HOST_DATA 0 chip->cont_read.first_page 1-s32max[c]
HOST_DATA 0 chip->cont_read.pause_page 2-4147480570[c]
HOST_DATA 0 chip->cur_cs 1-s32max[c]
HOST_DATA 0 chip->pagecache.page s32min-s32max[c]
HOST_DATA 0 *chip->data_buf 0-255
HOST_DATA 0 *chip->oob_poi 0-255
USER_DATA 0 chip->cont_read.first_page 1-s32max[c]
USER_DATA 0 chip->cur_cs 1-s32max[c]
USER_DATA 0 chip->pagecache.page s32min-s32max
USER_DATA 0 *chip->oob_poi 0-255
NO_OVERFLOW_SIMPLE 0 chip->ecc.postpad
NO_OVERFLOW_SIMPLE 0 chip->ecc.prepad
NO_OVERFLOW_SIMPLE 0 chip->nr_secure_regions
NO_OVERFLOW_SIMPLE 0 chip->pagecache.bitflips
HALF_LOCKED2 0 &chip->controller->lock
HALF_LOCKED2 0 &chip->lock

drivers/mtd/nand/raw/meson_nand.c meson_nfc_write_page_sub() -> nand_get_interface_config()

Type Parameter Key Value
PARAM_VALUE 0 chip 4096-ptr_max
BUF_SIZE 0 chip (-1),3704
BUF_SIZE 0 chip (-1),3704
BUF_SIZE 0 chip->bbt_md (-1)-0,72
BUF_SIZE 0 chip->bbt_md->pattern (-1),9
BUF_SIZE 0 chip->bbt_td (-1)-0,72
BUF_SIZE 0 chip->bbt_td->pattern (-1),9
CAPPED_DATA 0 chip->ecc.steps 1
DATA_SOURCE 0 chip $0
STR_LEN 0 chip->bbt_md->pattern (-1),8
STR_LEN 0 chip->bbt_td->pattern (-1),8
NOSPEC 0 chip->cur_cs
RX_PATH
TASK_NOT_RUNNING
HOST_DATA 0 chip->cur_cs 1-s32max[c]
USER_DATA 0 chip->cur_cs 1-s32max[c]
HALF_LOCKED2 0 &chip->controller->lock
HALF_LOCKED2 0 &chip->lock

drivers/mtd/nand/raw/nand_toshiba.c toshiba_nand_benand_read_eccstatus_op() -> nand_get_interface_config()

Type Parameter Key Value
PARAM_VALUE 0 chip 4096-ptr_max
BUF_SIZE 0 chip->badblock_pattern (-1),72
BUF_SIZE 0 chip->bbt_md (-1)-0,72
BUF_SIZE 0 chip->bbt_md->pattern (-1),9
BUF_SIZE 0 chip->bbt_td (-1)-0,72
BUF_SIZE 0 chip->bbt_td->pattern (-1),9
BUF_SIZE 0 chip->controller (-1),168
BUF_SIZE 0 chip->data_buf (-1)-s32max
DATA_SOURCE 0 chip $0
STR_LEN 0 chip->bbt_md->pattern (-1),8
STR_LEN 0 chip->bbt_td->pattern (-1),8
NOSPEC 0 chip->cur_cs
RX_PATH
TASK_NOT_RUNNING
HOST_DATA 0 chip->cont_read.first_page 1-s32max[c]
HOST_DATA 0 chip->cont_read.pause_page 2-4147480570[c]
HOST_DATA 0 chip->cur_cs 1-s32max[c]
HOST_DATA 0 *chip->data_buf 0-255
HOST_DATA 0 *chip->oob_poi 0-255
USER_DATA 0 chip->cont_read.first_page 1-s32max[c]
USER_DATA 0 chip->cur_cs 1-s32max[c]
NO_OVERFLOW_SIMPLE 0 chip->ecc.postpad
NO_OVERFLOW_SIMPLE 0 chip->ecc.prepad
NO_OVERFLOW_SIMPLE 0 chip->nr_secure_regions
HALF_LOCKED2 0 &chip->controller->lock
HALF_LOCKED2 0 &chip->lock

drivers/mtd/nand/raw/marvell_nand.c marvell_nfc_hw_ecc_bch_write_page() -> nand_get_interface_config()

Type Parameter Key Value
PARAM_VALUE 0 chip 4096-ptr_max
BUF_SIZE 0 chip->badblock_pattern (-1),72
BUF_SIZE 0 chip->bbt_md (-1)-0,72
BUF_SIZE 0 chip->bbt_md->pattern (-1),9
BUF_SIZE 0 chip->bbt_td (-1)-0,72
BUF_SIZE 0 chip->bbt_td->pattern (-1),9
BUF_SIZE 0 chip->controller (-1),168
BUF_SIZE 0 chip->data_buf (-1)-s32max
CAPPED_DATA 0 chip 1
CAPPED_DATA 0 chip->nr_secure_regions 1
DATA_SOURCE 0 chip $0
STR_LEN 0 chip->bbt_md->pattern (-1),8
STR_LEN 0 chip->bbt_td->pattern (-1),8
RX_PATH
TASK_NOT_RUNNING
HOST_DATA 0 chip->cur_cs 1-s32max[c]
NO_OVERFLOW_SIMPLE 0 chip->nr_secure_regions
HALF_LOCKED2 0 &chip->controller->lock
HALF_LOCKED2 0 &chip->lock

drivers/mtd/nand/raw/marvell_nand.c marvell_nfc_hw_ecc_hmg_do_write_page() -> nand_get_interface_config()

Type Parameter Key Value
PARAM_VALUE 0 chip 4096-ptr_max
BUF_SIZE 0 chip (-1),3704
BUF_SIZE 0 chip (-1),3704
BUF_SIZE 0 chip->badblock_pattern (-1),72
BUF_SIZE 0 chip->bbt_md (-1)-0,72
BUF_SIZE 0 chip->bbt_md->pattern (-1),9
BUF_SIZE 0 chip->bbt_td (-1)-0,72
BUF_SIZE 0 chip->bbt_td->pattern (-1),9
BUF_SIZE 0 chip->controller (-1),168
BUF_SIZE 0 chip->data_buf (-1)-s32max
CAPPED_DATA 0 chip 1
DATA_SOURCE 0 chip $0
STR_LEN 0 chip->bbt_md->pattern (-1),8
STR_LEN 0 chip->bbt_td->pattern (-1),8
NOSPEC 0 chip->cur_cs
RX_PATH
TASK_NOT_RUNNING
HOST_DATA 0 chip->cur_cs 1-s32max[c]
USER_DATA 0 chip->cur_cs 1-s32max[c]
NO_OVERFLOW_SIMPLE 0 chip->nr_secure_regions
HALF_LOCKED2 0 &chip->controller->lock
HALF_LOCKED2 0 &chip->lock