Defined in 1 files as a function:

Referenced in 2 files:

Smatch caller information:

drivers/mtd/nand/raw/nand_base.c nand_choose_interface_config() -> nand_controller_can_setup_interface()

Type Parameter Key Value
DATA_SOURCE 0 chip $0

drivers/mtd/nand/raw/nand_base.c nand_reset_interface() -> nand_controller_can_setup_interface()

Type Parameter Key Value
PARAM_VALUE 0 chip 4096-ptr_max
PARAM_VALUE 0 chip->controller 4096-ptr_max
BUF_SIZE 0 chip (-1),3704,4088
BUF_SIZE 0 chip (-1),3704,4088
BUF_SIZE 0 chip->badblock_pattern (-1),72
BUF_SIZE 0 chip->bbt_md (-1)-0,72
BUF_SIZE 0 chip->bbt_md->pattern (-1),9
BUF_SIZE 0 chip->bbt_td (-1)-0,72,144
BUF_SIZE 0 chip->bbt_td->pattern (-1),9
BUF_SIZE 0 chip->controller (-1),168
BUF_SIZE 0 chip->current_interface_config (-1),1152
BUF_SIZE 0 chip->data_buf (-1)-s32max
BUF_SIZE 0 chip->legacy.dummy_controller.ops (-1),32
BUF_SIZE 0 chip->priv (-1),4008
DATA_SOURCE 0 chip $0
STR_LEN 0 chip->bbt_md->pattern (-1),8
STR_LEN 0 chip->bbt_td->pattern (-1),8
RX_PATH
TASK_NOT_RUNNING
HOST_DATA 0 chip->controller->controller_wp 0
HOST_DATA 0 chip->controller->lock.osq.tail.counter 0
HOST_DATA 0 chip->controller->lock.owner.counter 0
HOST_DATA 0 chip->controller->supported_op.cont_read 0-1
HOST_DATA 0 chip->controller->supported_op.data_only_read 0-1
HOST_DATA 0 chip->cur_cs 1-s32max[c]
HOST_DATA 0 *chip->oob_poi 0-255
NO_OVERFLOW_SIMPLE 0 chip->cur_cs
NO_OVERFLOW_SIMPLE 0 chip->nr_secure_regions
HALF_LOCKED2 0 &chip->controller->lock
HALF_LOCKED2 0 &chip->lock

drivers/mtd/nand/raw/nand_base.c nand_setup_interface() -> nand_controller_can_setup_interface()

Type Parameter Key Value
PARAM_VALUE 0 chip 4096-ptr_max
PARAM_VALUE 0 chip->controller 4096-ptr_max
PARAM_VALUE 0 chip->controller->ops 0,4096-ptr_max
BUF_SIZE 0 chip (-1),3704,4088
BUF_SIZE 0 chip (-1),3704,4088
BUF_SIZE 0 chip->badblock_pattern (-1),72
BUF_SIZE 0 chip->bbt_md (-1)-0,72
BUF_SIZE 0 chip->bbt_md->pattern (-1),9
BUF_SIZE 0 chip->bbt_td (-1)-0,72,144
BUF_SIZE 0 chip->bbt_td->pattern (-1),9
BUF_SIZE 0 chip->controller (-1),168
BUF_SIZE 0 chip->current_interface_config (-1),1152
BUF_SIZE 0 chip->data_buf (-1)-s32max
BUF_SIZE 0 chip->legacy.dummy_controller.ops (-1),32
BUF_SIZE 0 chip->priv (-1),4008
DATA_SOURCE 0 chip $0
STR_LEN 0 chip->bbt_md->pattern (-1),8
STR_LEN 0 chip->bbt_td->pattern (-1),8
RX_PATH
TASK_NOT_RUNNING
HOST_DATA 0 chip->controller->controller_wp 0
HOST_DATA 0 chip->controller->lock.osq.tail.counter 0
HOST_DATA 0 chip->controller->lock.owner.counter 0
HOST_DATA 0 chip->controller->supported_op.cont_read 0-1
HOST_DATA 0 chip->controller->supported_op.data_only_read 0-1
HOST_DATA 0 *chip->oob_poi 0-255
NO_OVERFLOW_SIMPLE 0 chip->cur_cs
NO_OVERFLOW_SIMPLE 0 chip->nr_secure_regions
HALF_LOCKED2 0 &chip->controller->lock
HALF_LOCKED2 0 &chip->lock

drivers/mtd/nand/raw/nand_legacy.c nand_ccs_delay() -> nand_controller_can_setup_interface()

Type Parameter Key Value
PARAM_VALUE 0 chip 4096-ptr_max
BUF_SIZE 0 chip (-1),4088
BUF_SIZE 0 chip (-1),4088
BUF_SIZE 0 chip->badblock_pattern (-1),72
BUF_SIZE 0 chip->bbt_md (-1)-0,72
BUF_SIZE 0 chip->bbt_md->pattern (-1),9
BUF_SIZE 0 chip->bbt_td (-1)-0,72
BUF_SIZE 0 chip->bbt_td->pattern (-1),9
BUF_SIZE 0 chip->controller (-1),168
BUF_SIZE 0 chip->current_interface_config (-1),1152
BUF_SIZE 0 chip->data_buf (-1)-s32max
DATA_SOURCE 0 chip $0
STR_LEN 0 chip->bbt_md->pattern (-1),8
STR_LEN 0 chip->bbt_td->pattern (-1),8
BIT_INFO 0 chip->options 0x200000,0xffffffff
NOSPEC 0 chip->cur_cs
RX_PATH
TASK_NOT_RUNNING
HOST_DATA 0 chip->cont_read.first_page 1-s32max[c]
HOST_DATA 0 chip->cont_read.pause_page 2-4147480570[c]
HOST_DATA 0 chip->controller->controller_wp 0
HOST_DATA 0 chip->controller->lock.osq.tail.counter 0
HOST_DATA 0 chip->controller->lock.owner.counter 0
HOST_DATA 0 chip->controller->supported_op.cont_read 0
HOST_DATA 0 chip->controller->supported_op.data_only_read 0
HOST_DATA 0 chip->cur_cs 1-s32max[c]
HOST_DATA 0 chip->pagecache.page s32min-s32max[c]
HOST_DATA 0 *chip->data_buf 0-255
HOST_DATA 0 *chip->oob_poi 0-255
USER_DATA 0 chip->cont_read.first_page 1-s32max[c]
USER_DATA 0 chip->cur_cs 1-s32max[c]
USER_DATA 0 chip->pagecache.page s32min-s32max
USER_DATA 0 *chip->oob_poi 0-255
NO_OVERFLOW_SIMPLE 0 chip->ecc.postpad
NO_OVERFLOW_SIMPLE 0 chip->ecc.prepad
NO_OVERFLOW_SIMPLE 0 chip->nr_secure_regions
USER_PTR 0 chip->data_buf
HALF_LOCKED2 0 &chip->controller->lock
HALF_LOCKED2 0 &chip->lock