Defined in 1 files as a function:

Referenced in 1 files:

Smatch caller information:

drivers/net/ethernet/marvell/mvneta.c mvneta_bm_pool_bufsize_set() -> mvreg_read()

Type Parameter Key Value
PARAM_VALUE 0 pp 4096-ptr_max
PARAM_VALUE 1 offset 5888,5892-6908
BUF_SIZE 0 pp->clk (-1),1-s32max
BUF_SIZE 0 pp->clk_bus (-1),1-s32max
BUF_SIZE 0 pp->phylink (-1),816
BUF_SIZE 0 pp->phylink_config.dev (-1),1616
BUF_SIZE 0 pp->phylink_pcs.ops (-1),104
BUF_SIZE 0 pp->ports (-1),576
BUF_SIZE 0 pp->stats (-1),120
DATA_SOURCE 0 pp $0
RX_PATH
TASK_NOT_RUNNING

drivers/net/ethernet/marvell/mvneta.c mvneta_defaults_set() -> mvreg_read()

Type Parameter Key Value
PARAM_VALUE 0 pp 4096-ptr_max
PARAM_VALUE 1 offset 8368
BUF_SIZE 0 pp->clk (-1),1-s32max
BUF_SIZE 0 pp->clk_bus (-1),1-s32max
BUF_SIZE 0 pp->phylink (-1),816
BUF_SIZE 0 pp->phylink_config.dev (-1),1616
BUF_SIZE 0 pp->phylink_pcs.ops (-1),104
BUF_SIZE 0 pp->ports (-1),576
BUF_SIZE 0 pp->stats (-1),120
DATA_SOURCE 0 pp $0
RX_PATH
TASK_NOT_RUNNING

drivers/net/ethernet/marvell/mvneta.c mvneta_disable_per_queue_rate_limit() -> mvreg_read()

Type Parameter Key Value
PARAM_VALUE 0 pp 4096-ptr_max
PARAM_VALUE 1 offset 15872
DATA_SOURCE 0 pp $0
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 global &rtnl_mutex

drivers/net/ethernet/marvell/mvneta.c mvneta_enable_per_queue_rate_limit() -> mvreg_read()

Type Parameter Key Value
PARAM_VALUE 0 pp 4096-ptr_max
PARAM_VALUE 1 offset 15872
CAPPED_DATA 0 pp->clk->core 1
DATA_SOURCE 0 pp $0
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 global &rtnl_mutex

drivers/net/ethernet/marvell/mvneta.c mvneta_get_mac_addr() -> mvreg_read()

Type Parameter Key Value
PARAM_VALUE 0 pp 4096-ptr_max
PARAM_VALUE 0 pp->base 4096-ptr_max
PARAM_VALUE 1 offset 9236
BUF_SIZE 0 pp->clk (-1),1-s32max
BUF_SIZE 0 pp->clk_bus (-1),1-s32max
BUF_SIZE 0 pp->phylink 816
BUF_SIZE 0 pp->phylink_config.dev 1616
BUF_SIZE 0 pp->phylink_pcs.ops 104
BUF_SIZE 0 pp->ports 576
BUF_SIZE 0 pp->stats 120
DATA_SOURCE 0 pp $0
TERMINATED 0 pp->node.name 1
RX_PATH
TASK_NOT_RUNNING

drivers/net/ethernet/marvell/mvneta.c mvneta_get_mac_addr() -> mvreg_read()

Type Parameter Key Value
PARAM_VALUE 0 pp 4096-ptr_max
PARAM_VALUE 0 pp->base 4096-ptr_max
PARAM_VALUE 1 offset 9240
BUF_SIZE 0 pp->clk (-1),1-s32max
BUF_SIZE 0 pp->clk_bus (-1),1-s32max
BUF_SIZE 0 pp->phylink 816
BUF_SIZE 0 pp->phylink_config.dev 1616
BUF_SIZE 0 pp->phylink_pcs.ops 104
BUF_SIZE 0 pp->ports 576
BUF_SIZE 0 pp->stats 120
DATA_SOURCE 0 pp $0
TERMINATED 0 pp->node.name 1
RX_PATH
TASK_NOT_RUNNING

drivers/net/ethernet/marvell/mvneta.c mvneta_link_change() -> mvreg_read()

Type Parameter Key Value
PARAM_VALUE 0 pp 4096-ptr_max
PARAM_VALUE 1 offset 11280
DATA_SOURCE 0 pp $0
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &ni->dev_lock
HALF_LOCKED2 bh
HALF_LOCKED2 rcu_read

drivers/net/ethernet/marvell/mvneta.c mvneta_mac_config() -> mvreg_read()

Type Parameter Key Value
PARAM_VALUE 1 offset 11264

drivers/net/ethernet/marvell/mvneta.c mvneta_mac_config() -> mvreg_read()

Type Parameter Key Value
PARAM_VALUE 0 pp 4096-ptr_max
PARAM_VALUE 1 offset 11272

drivers/net/ethernet/marvell/mvneta.c mvneta_mac_config() -> mvreg_read()

Type Parameter Key Value
PARAM_VALUE 0 pp 4096-ptr_max
PARAM_VALUE 1 offset 11408

drivers/net/ethernet/marvell/mvneta.c mvneta_mac_config() -> mvreg_read()

Type Parameter Key Value
PARAM_VALUE 0 pp 4096-ptr_max
PARAM_VALUE 1 offset 11272

drivers/net/ethernet/marvell/mvneta.c mvneta_mac_config() -> mvreg_read()

Type Parameter Key Value
PARAM_VALUE 0 pp 4096-ptr_max
PARAM_VALUE 1 offset 11272

drivers/net/ethernet/marvell/mvneta.c mvneta_mac_disable_tx_lpi() -> mvreg_read()

Type Parameter Key Value
PARAM_VALUE 1 offset 11460
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &pl->state_mutex

drivers/net/ethernet/marvell/mvneta.c mvneta_mac_enable_tx_lpi() -> mvreg_read()

Type Parameter Key Value
PARAM_VALUE 1 offset 11280
LOCK2 &pl->phydev_mutex
LOCK2 &pl->state_mutex
HALF_LOCKED2 &phy->lock
HALF_LOCKED2 &pool->lock
TYPE_LOCK (struct phylink)->phydev_mutex
TYPE_LOCK (struct phylink)->state_mutex

drivers/net/ethernet/marvell/mvneta.c mvneta_mac_enable_tx_lpi() -> mvreg_read()

Type Parameter Key Value
PARAM_VALUE 0 pp 4096-ptr_max
PARAM_VALUE 1 offset 11456
LOCK2 &pl->phydev_mutex
LOCK2 &pl->state_mutex
HALF_LOCKED2 &phy->lock
HALF_LOCKED2 &pool->lock
TYPE_LOCK (struct phylink)->phydev_mutex
TYPE_LOCK (struct phylink)->state_mutex

drivers/net/ethernet/marvell/mvneta.c mvneta_mac_enable_tx_lpi() -> mvreg_read()

Type Parameter Key Value
PARAM_VALUE 0 pp 4096-ptr_max
PARAM_VALUE 1 offset 11460
LOCK2 &pl->phydev_mutex
LOCK2 &pl->state_mutex
HALF_LOCKED2 &phy->lock
HALF_LOCKED2 &pool->lock
TYPE_LOCK (struct phylink)->phydev_mutex
TYPE_LOCK (struct phylink)->state_mutex

drivers/net/ethernet/marvell/mvneta.c mvneta_mac_finish() -> mvreg_read()

Type Parameter Key Value
PARAM_VALUE 1 offset 9460

drivers/net/ethernet/marvell/mvneta.c mvneta_mac_finish() -> mvreg_read()

Type Parameter Key Value
PARAM_VALUE 0 pp 4096-ptr_max
PARAM_VALUE 1 offset 11276

drivers/net/ethernet/marvell/mvneta.c mvneta_mac_link_down() -> mvreg_read()

Type Parameter Key Value
PARAM_VALUE 0 pp 4096-ptr_max
PARAM_VALUE 1 offset 11276
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &pl->state_mutex
HALF_LOCKED2 global &dsa2_mutex

drivers/net/ethernet/marvell/mvneta.c mvneta_mac_link_up() -> mvreg_read()

Type Parameter Key Value
PARAM_VALUE 1 offset 11276
LOCK2 &pl->phydev_mutex
LOCK2 &pl->state_mutex
HALF_LOCKED2 &phy->lock
HALF_LOCKED2 &pool->lock
TYPE_LOCK (struct phylink)->phydev_mutex
TYPE_LOCK (struct phylink)->state_mutex

drivers/net/ethernet/marvell/mvneta.c mvneta_mac_link_up() -> mvreg_read()

Type Parameter Key Value
PARAM_VALUE 1 offset 11276
LOCK2 &pl->phydev_mutex
LOCK2 &pl->state_mutex
HALF_LOCKED2 &phy->lock
HALF_LOCKED2 &pool->lock
TYPE_LOCK (struct phylink)->phydev_mutex
TYPE_LOCK (struct phylink)->state_mutex

drivers/net/ethernet/marvell/mvneta.c mvneta_mac_prepare() -> mvreg_read()

Type Parameter Key Value
PARAM_VALUE 0 pp 4096-ptr_max
PARAM_VALUE 1 offset 11276
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &pl->phydev_mutex
HALF_LOCKED2 &pl->state_mutex

drivers/net/ethernet/marvell/mvneta.c mvneta_map_vlan_prio_to_rxq() -> mvreg_read()

Type Parameter Key Value
PARAM_VALUE 0 pp 4096-ptr_max
PARAM_VALUE 1 offset 9280
DATA_SOURCE 0 pp $0
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 global &rtnl_mutex

drivers/net/ethernet/marvell/mvneta.c mvneta_max_rx_size_set() -> mvreg_read()

Type Parameter Key Value
PARAM_VALUE 0 pp 4096-ptr_max
PARAM_VALUE 1 offset 11264
DATA_SOURCE 0 pp $0
RX_PATH
TASK_NOT_RUNNING
USER_DATA 0 pp->pkt_size 0-s32max[c]
USER_DATA 0 pp->pool_long->hwbm_pool.frag_size 0-s32max[c]
USER_DATA 0 pp->pool_long->pkt_size 0-s32max[c]
HALF_LOCKED2 global &rtnl_mutex

drivers/net/ethernet/marvell/mvneta.c mvneta_mbus_io_win_set() -> mvreg_read()

Type Parameter Key Value
PARAM_VALUE 0 pp 4096-ptr_max
PARAM_VALUE 1 offset 8848
BUF_SIZE 0 pp->clk (-1),1-s32max
BUF_SIZE 0 pp->clk_bus (-1),1-s32max
BUF_SIZE 0 pp->phylink (-1),816
BUF_SIZE 0 pp->phylink_config.dev (-1),1616
BUF_SIZE 0 pp->phylink_pcs.ops (-1),104
BUF_SIZE 0 pp->ports (-1),576
BUF_SIZE 0 pp->stats (-1),120
DATA_SOURCE 0 pp $0
RX_PATH
TASK_NOT_RUNNING
NO_OVERFLOW_SIMPLE 0 pp->clk->core->parent->req_rate
NO_OVERFLOW_SIMPLE 0 pp->clk_bus->core->parent->req_rate

drivers/net/ethernet/marvell/mvneta.c mvneta_mbus_io_win_set() -> mvreg_read()

Type Parameter Key Value
PARAM_VALUE 0 pp 4096-ptr_max
PARAM_VALUE 1 offset 8852
BUF_SIZE 0 pp->clk (-1),1-s32max
BUF_SIZE 0 pp->clk_bus (-1),1-s32max
BUF_SIZE 0 pp->phylink (-1),816
BUF_SIZE 0 pp->phylink_config.dev (-1),1616
BUF_SIZE 0 pp->phylink_pcs.ops (-1),104
BUF_SIZE 0 pp->ports (-1),576
BUF_SIZE 0 pp->stats (-1),120
DATA_SOURCE 0 pp $0
RX_PATH
TASK_NOT_RUNNING
NO_OVERFLOW_SIMPLE 0 pp->clk->core->parent->req_rate
NO_OVERFLOW_SIMPLE 0 pp->clk_bus->core->parent->req_rate

drivers/net/ethernet/marvell/mvneta.c mvneta_mib_counters_clear() -> mvreg_read()

Type Parameter Key Value
PARAM_VALUE 0 pp 4096-ptr_max
PARAM_VALUE 1 offset 12288,12292-12411
BUF_SIZE 0 pp->clk (-1),1-s32max
BUF_SIZE 0 pp->clk_bus (-1),1-s32max
BUF_SIZE 0 pp->phylink (-1),816
BUF_SIZE 0 pp->phylink_config.dev (-1),1616
BUF_SIZE 0 pp->phylink_pcs.ops (-1),104
BUF_SIZE 0 pp->ports (-1),576
BUF_SIZE 0 pp->stats (-1),120
DATA_SOURCE 0 pp $0
MEM_ZERO 0 pp->mcast_count
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
NO_OVERFLOW_SIMPLE 0 pp->clk->core->parent->req_rate
NO_OVERFLOW_SIMPLE 0 pp->clk_bus->core->parent->req_rate

drivers/net/ethernet/marvell/mvneta.c mvneta_mib_counters_clear() -> mvreg_read()

Type Parameter Key Value
PARAM_VALUE 0 pp 4096-ptr_max
PARAM_VALUE 1 offset 9348
BUF_SIZE 0 pp->clk (-1),1-s32max
BUF_SIZE 0 pp->clk_bus (-1),1-s32max
BUF_SIZE 0 pp->phylink (-1),816
BUF_SIZE 0 pp->phylink_config.dev (-1),1616
BUF_SIZE 0 pp->phylink_pcs.ops (-1),104
BUF_SIZE 0 pp->ports (-1),576
BUF_SIZE 0 pp->stats (-1),120
DATA_SOURCE 0 pp $0
MEM_ZERO 0 pp->mcast_count
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
NO_OVERFLOW_SIMPLE 0 pp->clk->core->parent->req_rate
NO_OVERFLOW_SIMPLE 0 pp->clk_bus->core->parent->req_rate

drivers/net/ethernet/marvell/mvneta.c mvneta_mib_counters_clear() -> mvreg_read()

Type Parameter Key Value
PARAM_VALUE 0 pp 4096-ptr_max
PARAM_VALUE 1 offset 9352
BUF_SIZE 0 pp->clk (-1),1-s32max
BUF_SIZE 0 pp->clk_bus (-1),1-s32max
BUF_SIZE 0 pp->phylink (-1),816
BUF_SIZE 0 pp->phylink_config.dev (-1),1616
BUF_SIZE 0 pp->phylink_pcs.ops (-1),104
BUF_SIZE 0 pp->ports (-1),576
BUF_SIZE 0 pp->stats (-1),120
DATA_SOURCE 0 pp $0
MEM_ZERO 0 pp->mcast_count
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
NO_OVERFLOW_SIMPLE 0 pp->clk->core->parent->req_rate
NO_OVERFLOW_SIMPLE 0 pp->clk_bus->core->parent->req_rate

drivers/net/ethernet/marvell/mvneta.c mvneta_pcs_an_restart() -> mvreg_read()

Type Parameter Key Value
PARAM_VALUE 0 pp 4096-ptr_max
PARAM_VALUE 1 offset 11276
DATA_SOURCE 0 pp r mvneta_pcs_to_port
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &pl->state_mutex
HALF_LOCKED2 &priv->mac_lock

drivers/net/ethernet/marvell/mvneta.c mvneta_pcs_config() -> mvreg_read()

Type Parameter Key Value
PARAM_VALUE 0 pp 4096-ptr_max
PARAM_VALUE 1 offset 11276
DATA_SOURCE 0 pp r mvneta_pcs_to_port
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &pl->state_mutex

drivers/net/ethernet/marvell/mvneta.c mvneta_pcs_get_state() -> mvreg_read()

Type Parameter Key Value
PARAM_VALUE 0 pp 4096-ptr_max
PARAM_VALUE 1 offset 11280
DATA_SOURCE 0 pp r mvneta_pcs_to_port
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &pl->phydev_mutex
HALF_LOCKED2 &pl->state_mutex

drivers/net/ethernet/marvell/mvneta.c mvneta_percpu_elect() -> mvreg_read()

Type Parameter Key Value
PARAM_VALUE 0 pp 4096-ptr_max
PARAM_VALUE 1 offset 9536,9540-9792
CAPPED_DATA 1 offset 1
DATA_SOURCE 0 pp $0
PREEMPT_ADD
RX_PATH
TASK_NOT_RUNNING
USER_DATA 0 pp->rxq_def s32min-s32max
USER_PTR 0 pp->indir
LOCK2 0 &pp->lock
HALF_LOCKED2 &dev->ethtool->rss_lock
HALF_LOCKED2 &port->napi.dev->lock
TYPE_LOCK (struct mvneta_port)->lock

drivers/net/ethernet/marvell/mvneta.c mvneta_poll() -> mvreg_read()

Type Parameter Key Value
PARAM_VALUE 0 pp 4096-ptr_max
PARAM_VALUE 1 offset 9632
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 bh
HALF_LOCKED2 rcu_read

drivers/net/ethernet/marvell/mvneta.c mvneta_poll() -> mvreg_read()

Type Parameter Key Value
PARAM_VALUE 0 pp 4096-ptr_max
PARAM_VALUE 1 offset 9648
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 bh
HALF_LOCKED2 rcu_read

drivers/net/ethernet/marvell/mvneta.c mvneta_port_disable() -> mvreg_read()

Type Parameter Key Value
PARAM_VALUE 0 pp 4096-ptr_max
PARAM_VALUE 1 offset 11264
BUF_SIZE 0 pp->clk (-1),1-s32max
BUF_SIZE 0 pp->clk_bus (-1),1-s32max
BUF_SIZE 0 pp->phylink (-1),816
BUF_SIZE 0 pp->phylink_config.dev (-1),1616
BUF_SIZE 0 pp->phylink_pcs.ops (-1),104
BUF_SIZE 0 pp->ports (-1),576
BUF_SIZE 0 pp->stats (-1),120
DATA_SOURCE 0 pp $0
RX_PATH
TASK_NOT_RUNNING

drivers/net/ethernet/marvell/mvneta.c mvneta_port_down() -> mvreg_read()

Type Parameter Key Value
PARAM_VALUE 1 offset 9856
DATA_SOURCE 0 pp $0
RX_PATH
TASK_NOT_RUNNING

drivers/net/ethernet/marvell/mvneta.c mvneta_port_down() -> mvreg_read()

Type Parameter Key Value
PARAM_VALUE 0 pp 4096-ptr_max
PARAM_VALUE 1 offset 9856
DATA_SOURCE 0 pp $0
RX_PATH
TASK_NOT_RUNNING

drivers/net/ethernet/marvell/mvneta.c mvneta_port_down() -> mvreg_read()

Type Parameter Key Value
PARAM_VALUE 0 pp 4096-ptr_max
PARAM_VALUE 1 offset 9288
DATA_SOURCE 0 pp $0
RX_PATH
TASK_NOT_RUNNING

drivers/net/ethernet/marvell/mvneta.c mvneta_port_down() -> mvreg_read()

Type Parameter Key Value
PARAM_VALUE 0 pp 4096-ptr_max
PARAM_VALUE 1 offset 9288
DATA_SOURCE 0 pp $0
RX_PATH
TASK_NOT_RUNNING

drivers/net/ethernet/marvell/mvneta.c mvneta_port_down() -> mvreg_read()

Type Parameter Key Value
PARAM_VALUE 0 pp 4096-ptr_max
PARAM_VALUE 1 offset 9284
DATA_SOURCE 0 pp $0
RX_PATH
TASK_NOT_RUNNING

drivers/net/ethernet/marvell/mvneta.c mvneta_port_enable() -> mvreg_read()

Type Parameter Key Value
PARAM_VALUE 0 pp 4096-ptr_max
PARAM_VALUE 1 offset 11264
DATA_SOURCE 0 pp $0
RX_PATH
TASK_NOT_RUNNING
USER_DATA 0 pp->pkt_size 0-s32max[c]
USER_DATA 0 pp->pool_long->hwbm_pool.frag_size 0-s32max[c]
USER_DATA 0 pp->pool_long->pkt_size 0-s32max[c]
HALF_LOCKED2 global &rtnl_mutex

drivers/net/ethernet/marvell/mvneta.c mvneta_rx_unicast_promisc_set() -> mvreg_read()

Type Parameter Key Value
PARAM_VALUE 1 offset 9216
DATA_SOURCE 0 pp $0
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &dev->addr_list_lock
HALF_LOCKED2 &dev->ethtool->rss_lock
HALF_LOCKED2 bh
HALF_LOCKED2 global &rtnl_mutex

drivers/net/ethernet/marvell/mvneta.c mvneta_rx_unicast_promisc_set() -> mvreg_read()

Type Parameter Key Value
PARAM_VALUE 0 pp 4096-ptr_max
PARAM_VALUE 1 offset 9404
DATA_SOURCE 0 pp $0
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &dev->addr_list_lock
HALF_LOCKED2 &dev->ethtool->rss_lock
HALF_LOCKED2 bh
HALF_LOCKED2 global &rtnl_mutex

drivers/net/ethernet/marvell/mvneta.c mvneta_rxq_bm_disable() -> mvreg_read()

Type Parameter Key Value
PARAM_VALUE 0 pp 4096-ptr_max
PARAM_VALUE 1 offset 5120,5124-6140
DATA_SOURCE 0 pp $0
RX_PATH
TASK_NOT_RUNNING
USER_DATA 0 pp->pkt_size 0-s32max[c]
USER_DATA 0 pp->pool_long->hwbm_pool.frag_size 0-s32max[c]
USER_DATA 0 pp->pool_long->pkt_size 0-s32max[c]

drivers/net/ethernet/marvell/mvneta.c mvneta_rxq_bm_enable() -> mvreg_read()

Type Parameter Key Value
PARAM_VALUE 0 pp 4096-ptr_max
PARAM_VALUE 1 offset 5120,5124-6140
DATA_SOURCE 0 pp $0
RX_PATH
TASK_NOT_RUNNING
USER_DATA 0 pp->pkt_size 0-s32max[c]
USER_DATA 0 pp->pool_long->hwbm_pool.frag_size 0-s32max[c]
USER_DATA 0 pp->pool_long->pkt_size 0-s32max[c]

drivers/net/ethernet/marvell/mvneta.c mvneta_rxq_buf_size_set() -> mvreg_read()

Type Parameter Key Value
PARAM_VALUE 0 pp 4096-ptr_max
PARAM_VALUE 1 offset 5280,5284-6300
DATA_SOURCE 0 pp $0
RX_PATH
TASK_NOT_RUNNING
USER_DATA 0 pp->pkt_size 0-s32max[c]
USER_DATA 0 pp->pool_long->hwbm_pool.frag_size 0-s32max[c]
USER_DATA 0 pp->pool_long->pkt_size 0-s32max[c]

drivers/net/ethernet/marvell/mvneta.c mvneta_rxq_busy_desc_num_get() -> mvreg_read()

Type Parameter Key Value
PARAM_VALUE 0 pp 4096-ptr_max
PARAM_VALUE 1 offset 5344,5348-6364
DATA_SOURCE 0 pp $0
PREEMPT_ADD
RX_PATH
TASK_NOT_RUNNING
USER_DATA 0 pp->pkt_size 0-s32max[c]
USER_DATA 0 pp->pool_long->buf_size 64[c]
USER_DATA 0 pp->pool_long->pkt_size 0[c]
UNITS 0 pp unit_byte

drivers/net/ethernet/marvell/mvneta.c mvneta_rxq_long_pool_set() -> mvreg_read()

Type Parameter Key Value
PARAM_VALUE 0 pp 4096-ptr_max
PARAM_VALUE 1 offset 5120,5124-6140
DATA_SOURCE 0 pp $0
RX_PATH
TASK_NOT_RUNNING
USER_DATA 0 pp->pkt_size 0-s32max[c]
USER_DATA 0 pp->pool_long->hwbm_pool.frag_size 0-s32max[c]
USER_DATA 0 pp->pool_long->pkt_size 0-s32max[c]

drivers/net/ethernet/marvell/mvneta.c mvneta_rxq_offset_set() -> mvreg_read()

Type Parameter Key Value
PARAM_VALUE 0 pp 4096-ptr_max
PARAM_VALUE 1 offset 5120,5124-6140
DATA_SOURCE 0 pp $0
RX_PATH
TASK_NOT_RUNNING
USER_DATA 0 pp->pkt_size 0-s32max[c]
USER_DATA 0 pp->pool_long->hwbm_pool.frag_size 0-s32max[c]
USER_DATA 0 pp->pool_long->pkt_size 0-s32max[c]

drivers/net/ethernet/marvell/mvneta.c mvneta_rxq_short_pool_set() -> mvreg_read()

Type Parameter Key Value
PARAM_VALUE 0 pp 4096-ptr_max
PARAM_VALUE 1 offset 5120,5124-6140
DATA_SOURCE 0 pp $0
RX_PATH
TASK_NOT_RUNNING
USER_DATA 0 pp->pkt_size 0-s32max[c]
USER_DATA 0 pp->pool_long->hwbm_pool.frag_size 0-s32max[c]
USER_DATA 0 pp->pool_long->pkt_size 0-s32max[c]

drivers/net/ethernet/marvell/mvneta.c mvneta_set_other_mcast_addr() -> mvreg_read()

Type Parameter Key Value
PARAM_VALUE 0 pp 4096-ptr_max
DATA_SOURCE 0 pp $0
MEM_ZERO 0 pp->mcast_count
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &dev->addr_list_lock
HALF_LOCKED2 &dev->ethtool->rss_lock
HALF_LOCKED2 bh
HALF_LOCKED2 global &rtnl_mutex

drivers/net/ethernet/marvell/mvneta.c mvneta_set_special_mcast_addr() -> mvreg_read()

Type Parameter Key Value
PARAM_VALUE 0 pp 4096-ptr_max
DATA_SOURCE 0 pp $0
MEM_ZERO 0 pp->mcast_count
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 &dev->addr_list_lock
HALF_LOCKED2 &dev->ethtool->rss_lock
HALF_LOCKED2 bh
HALF_LOCKED2 global &rtnl_mutex

drivers/net/ethernet/marvell/mvneta.c mvneta_set_ucast_addr() -> mvreg_read()

Type Parameter Key Value
PARAM_VALUE 1 offset 13824-13836
CAPPED_DATA 1 offset 1
DATA_SOURCE 0 pp $0
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2 global &rtnl_mutex

drivers/net/ethernet/marvell/mvneta.c mvneta_tx_done_pkts_coal_set() -> mvreg_read()

Type Parameter Key Value
PARAM_VALUE 1 offset 15392,15396-16412
DATA_SOURCE 0 pp $0
NOSPEC 0 pp->pkt_size
RX_PATH
TASK_NOT_RUNNING
USER_DATA 0 pp->pkt_size 0-s32max[c]
USER_DATA 0 pp->pool_long->hwbm_pool.frag_size 0-s32max[c]
USER_DATA 0 pp->pool_long->pkt_size 0-s32max[c]

drivers/net/ethernet/marvell/mvneta.c mvneta_txq_max_tx_size_set() -> mvreg_read()

Type Parameter Key Value
PARAM_VALUE 0 pp 4096-ptr_max
PARAM_VALUE 1 offset 15884
DATA_SOURCE 0 pp $0
RX_PATH
TASK_NOT_RUNNING
USER_DATA 0 pp->pkt_size 0-s32max[c]
USER_DATA 0 pp->pool_long->hwbm_pool.frag_size 0-s32max[c]
USER_DATA 0 pp->pool_long->pkt_size 0-s32max[c]
HALF_LOCKED2 global &rtnl_mutex

drivers/net/ethernet/marvell/mvneta.c mvneta_txq_max_tx_size_set() -> mvreg_read()

Type Parameter Key Value
PARAM_VALUE 0 pp 4096-ptr_max
PARAM_VALUE 1 offset 15892
DATA_SOURCE 0 pp $0
RX_PATH
TASK_NOT_RUNNING
USER_DATA 0 pp->pkt_size 0-s32max[c]
USER_DATA 0 pp->pool_long->hwbm_pool.frag_size 0-s32max[c]
USER_DATA 0 pp->pool_long->pkt_size 0-s32max[c]
HALF_LOCKED2 global &rtnl_mutex

drivers/net/ethernet/marvell/mvneta.c mvneta_txq_max_tx_size_set() -> mvreg_read()

Type Parameter Key Value
PARAM_VALUE 0 pp 4096-ptr_max
PARAM_VALUE 1 offset 0-15932,15936,2147499584-u32max
CAPPED_DATA 1 offset 1
DATA_SOURCE 0 pp $0
RX_PATH
TASK_NOT_RUNNING
USER_DATA 0 pp->pkt_size 0-s32max[c]
USER_DATA 0 pp->pool_long->hwbm_pool.frag_size 0-s32max[c]
USER_DATA 0 pp->pool_long->pkt_size 0-s32max[c]
HALF_LOCKED2 global &rtnl_mutex

drivers/net/ethernet/marvell/mvneta.c mvneta_txq_sent_desc_num_get() -> mvreg_read()

Type Parameter Key Value
PARAM_VALUE 0 pp 4096-ptr_max
PARAM_VALUE 1 offset 15424,15428-16444
CAPPED_DATA 0 pp->dev->num_tx_queues 1
DATA_SOURCE 0 pp $0
PREEMPT_ADD
RX_PATH
TASK_NOT_RUNNING
LOCK2 &nq->_xmit_lock
HALF_LOCKED2 bh
HALF_LOCKED2 rcu_read
TYPE_LOCK (struct netdev_queue)->_xmit_lock