Defined in 1 files as a function:
Referenced in 1 files:
-
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c
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Smatch caller information:
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c __mvpp2_prs_mac_da_accept() -> mvpp2_prs_shadow_set()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | priv | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_shadow | 4096-ptr_max |
| PARAM_VALUE | 1 | index | 112-191 |
| PARAM_VALUE | 2 | lu | 1 |
| PREEMPT_ADD | |||
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| LOCK2 | bh | ||
| HALF_LOCKED2 | &port->priv->prs_spinlock | ||
| HALF_LOCKED2 | &priv->prs_spinlock | ||
| TYPE_LOCK | (struct mvpp2)->prs_spinlock |
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c __mvpp2_prs_mac_promisc_set() -> mvpp2_prs_shadow_set()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | priv | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_shadow | 4096-ptr_max |
| PARAM_VALUE | 1 | index | 253-254 |
| PARAM_VALUE | 2 | lu | 1 |
| BUF_SIZE | 0 | priv->aggr_txqs | (-1),504 |
| BUF_SIZE | 0 | priv->axi_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->gop_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->mg_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->mg_core_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->pp_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->prs_double_vlans | (-1),100 |
| BUF_SIZE | 0 | priv->prs_shadow | (-1),5120 |
| BUF_SIZE | 0 | priv->sysctrl_base | (-1)-s32max |
| DATA_SOURCE | 0 | priv | $0 |
| BIT_INFO | 1 | index | 0xfc,0xff |
| PREEMPT_ADD | |||
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| LOCK2 | bh | ||
| LOCK2 | 0 | &priv->prs_spinlock | |
| TYPE_LOCK | (struct mvpp2)->prs_spinlock |
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_add_flow() -> mvpp2_prs_shadow_set()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | priv | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_shadow | 4096-ptr_max |
| PARAM_VALUE | 1 | index | 1 |
| PARAM_VALUE | 2 | lu | 9 |
| BUF_SIZE | 0 | priv->aggr_txqs | 504 |
| BUF_SIZE | 0 | priv->axi_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->gop_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->mg_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->mg_core_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->pp_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->sysctrl_base | (-1)-s32max |
| CAPPED_DATA | 0 | priv->nthreads | 1 |
| DATA_SOURCE | 0 | priv | $0 |
| BIT_INFO | 0 | priv->max_port_rxqs | 0x0,0x28 |
| PREEMPT_ADD | <- disables preempt | ||
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| LOCK2 | bh | ||
| LOCK2 | 0 | &priv->prs_spinlock | |
| TYPE_LOCK | (struct mvpp2)->prs_spinlock |
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_def_flow() -> mvpp2_prs_shadow_set()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | priv | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_shadow | 4096-ptr_max |
| PARAM_VALUE | 1 | index | 1 |
| PARAM_VALUE | 2 | lu | 9 |
| PREEMPT_ADD | <- disables preempt | ||
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| LOCK2 | bh | ||
| LOCK2 | 0 | &priv->prs_spinlock | |
| HALF_LOCKED2 | global &rtnl_mutex | ||
| TYPE_LOCK | (struct mvpp2)->prs_spinlock |
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_def_flow_init() -> mvpp2_prs_shadow_set()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | priv | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_shadow | 1-u64max |
| PARAM_VALUE | 1 | index | 231-234 |
| PARAM_VALUE | 2 | lu | 9 |
| BUF_SIZE | 0 | priv->aggr_txqs | 504 |
| BUF_SIZE | 0 | priv->axi_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->gop_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_core_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->pp_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->prs_double_vlans | 100 |
| BUF_SIZE | 0 | priv->prs_shadow | 5120 |
| BUF_SIZE | 0 | priv->sysctrl_base | (-1)-s32max |
| CAPPED_DATA | 0 | priv->nthreads | 1 |
| DATA_SOURCE | 0 | priv | $0 |
| BIT_INFO | 0 | priv->max_port_rxqs | 0x0,0x28 |
| MEM_ZERO | 0 | priv | |
| MEM_ZERO | 0 | priv->aggr_txqs | |
| MEM_ZERO | 0 | priv->prs_double_vlans | |
| MEM_ZERO | 0 | priv->prs_shadow | |
| PREEMPT_ADD | |||
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| NO_OVERFLOW_SIMPLE | 0 | priv->axi_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->gop_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_core_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->pp_clk->core->parent->req_rate | |
| LOCK2 | bh | ||
| LOCK2 | 0 | &priv->prs_spinlock | |
| TYPE_LOCK | (struct mvpp2)->prs_spinlock |
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_double_vlan_add() -> mvpp2_prs_shadow_set()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | priv | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_shadow | 4096-ptr_max |
| PARAM_VALUE | 1 | index | 1 |
| PARAM_VALUE | 2 | lu | 3 |
| BUF_SIZE | 0 | priv->aggr_txqs | 504 |
| BUF_SIZE | 0 | priv->axi_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->gop_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->mg_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->mg_core_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->pp_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->prs_double_vlans | 100 |
| BUF_SIZE | 0 | priv->prs_shadow | 5120 |
| BUF_SIZE | 0 | priv->sysctrl_base | (-1)-s32max |
| CAPPED_DATA | 0 | priv->nthreads | 1 |
| DATA_SOURCE | 0 | priv | $0 |
| BIT_INFO | 0 | priv->max_port_rxqs | 0x0,0x28 |
| MEM_ZERO | 0 | priv->aggr_txqs | |
| MEM_ZERO | 0 | priv->prs_double_vlans | |
| MEM_ZERO | 0 | priv->prs_shadow | |
| PREEMPT_ADD | |||
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| LOCK2 | bh | ||
| LOCK2 | 0 | &priv->prs_spinlock | |
| TYPE_LOCK | (struct mvpp2)->prs_spinlock |
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_drop_fc() -> mvpp2_prs_shadow_set()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | priv | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_shadow | 4096-ptr_max |
| PARAM_VALUE | 1 | index | 252 |
| PARAM_VALUE | 2 | lu | 1 |
| BUF_SIZE | 0 | priv->aggr_txqs | 504 |
| BUF_SIZE | 0 | priv->axi_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->gop_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->mg_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->mg_core_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->pp_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->prs_double_vlans | 100 |
| BUF_SIZE | 0 | priv->prs_shadow | 5120 |
| BUF_SIZE | 0 | priv->sysctrl_base | (-1)-s32max |
| CAPPED_DATA | 0 | priv->nthreads | 1 |
| DATA_SOURCE | 0 | priv | $0 |
| BIT_INFO | 0 | priv->max_port_rxqs | 0x0,0x28 |
| MEM_ZERO | 0 | priv->aggr_txqs | |
| MEM_ZERO | 0 | priv->prs_double_vlans | |
| MEM_ZERO | 0 | priv->prs_shadow | |
| PREEMPT_ADD | |||
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| LOCK2 | bh | ||
| LOCK2 | 0 | &priv->prs_spinlock | |
| TYPE_LOCK | (struct mvpp2)->prs_spinlock |
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_dsa_init() -> mvpp2_prs_shadow_set()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | priv | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_shadow | 4096-ptr_max |
| PARAM_VALUE | 1 | index | 244 |
| PARAM_VALUE | 2 | lu | 1 |
| BUF_SIZE | 0 | priv->aggr_txqs | 504 |
| BUF_SIZE | 0 | priv->axi_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->gop_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_core_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->pp_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->prs_double_vlans | 100 |
| BUF_SIZE | 0 | priv->prs_shadow | 5120 |
| BUF_SIZE | 0 | priv->sysctrl_base | (-1)-s32max |
| CAPPED_DATA | 0 | priv->nthreads | 1 |
| DATA_SOURCE | 0 | priv | $0 |
| BIT_INFO | 0 | priv->max_port_rxqs | 0x0,0x28 |
| MEM_ZERO | 0 | priv | |
| MEM_ZERO | 0 | priv->aggr_txqs | |
| MEM_ZERO | 0 | priv->prs_double_vlans | |
| MEM_ZERO | 0 | priv->prs_shadow | |
| PREEMPT_ADD | |||
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| NO_OVERFLOW_SIMPLE | 0 | priv->axi_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->gop_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_core_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->pp_clk->core->parent->req_rate | |
| LOCK2 | bh | ||
| LOCK2 | 0 | &priv->prs_spinlock | |
| TYPE_LOCK | (struct mvpp2)->prs_spinlock |
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_dsa_tag_ethertype_set() -> mvpp2_prs_shadow_set()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | priv | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_shadow | 4096-ptr_max |
| PARAM_VALUE | 1 | index | 239-242 |
| PARAM_VALUE | 2 | lu | 2 |
| BUF_SIZE | 0 | priv->aggr_txqs | 504 |
| BUF_SIZE | 0 | priv->axi_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->gop_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->mg_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->mg_core_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->pp_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->prs_double_vlans | 100 |
| BUF_SIZE | 0 | priv->prs_shadow | 5120 |
| BUF_SIZE | 0 | priv->sysctrl_base | (-1)-s32max |
| CAPPED_DATA | 0 | priv->nthreads | 1 |
| DATA_SOURCE | 0 | priv | $0 |
| BIT_INFO | 0 | priv->max_port_rxqs | 0x0,0x28 |
| BIT_INFO | 1 | index | 0xe0,0xff |
| MEM_ZERO | 0 | priv->aggr_txqs | |
| MEM_ZERO | 0 | priv->prs_double_vlans | |
| MEM_ZERO | 0 | priv->prs_shadow | |
| PREEMPT_ADD | |||
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| LOCK2 | bh | ||
| LOCK2 | 0 | &priv->prs_spinlock | |
| TYPE_LOCK | (struct mvpp2)->prs_spinlock |
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_dsa_tag_set() -> mvpp2_prs_shadow_set()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | priv | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_shadow | 4096-ptr_max |
| PARAM_VALUE | 1 | index | 235-238 |
| PARAM_VALUE | 2 | lu | 2 |
| BUF_SIZE | 0 | priv->aggr_txqs | (-1),504 |
| BUF_SIZE | 0 | priv->axi_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->gop_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->mg_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->mg_core_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->pp_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->prs_double_vlans | (-1),100 |
| BUF_SIZE | 0 | priv->prs_shadow | (-1),5120 |
| BUF_SIZE | 0 | priv->sysctrl_base | (-1)-s32max |
| DATA_SOURCE | 0 | priv | $0 |
| BIT_INFO | 1 | index | 0xe8,0xef |
| PREEMPT_ADD | |||
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| LOCK2 | bh | ||
| LOCK2 | 0 | &priv->prs_spinlock | |
| TYPE_LOCK | (struct mvpp2)->prs_spinlock |
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_etype_init() -> mvpp2_prs_shadow_set()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | priv | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_shadow | 4096-ptr_max |
| PARAM_VALUE | 1 | index | 1 |
| PARAM_VALUE | 2 | lu | 5 |
| BUF_SIZE | 0 | priv->aggr_txqs | 504 |
| BUF_SIZE | 0 | priv->axi_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->gop_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_core_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->pp_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->prs_double_vlans | 100 |
| BUF_SIZE | 0 | priv->prs_shadow | 5120 |
| BUF_SIZE | 0 | priv->sysctrl_base | (-1)-s32max |
| CAPPED_DATA | 0 | priv->nthreads | 1 |
| DATA_SOURCE | 0 | priv | $0 |
| BIT_INFO | 0 | priv->max_port_rxqs | 0x0,0x28 |
| MEM_ZERO | 0 | priv | |
| MEM_ZERO | 0 | priv->aggr_txqs | |
| MEM_ZERO | 0 | priv->prs_double_vlans | |
| MEM_ZERO | 0 | priv->prs_shadow | |
| PREEMPT_ADD | |||
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| NO_OVERFLOW_SIMPLE | 0 | priv->axi_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->gop_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_core_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->pp_clk->core->parent->req_rate | |
| LOCK2 | bh | ||
| LOCK2 | 0 | &priv->prs_spinlock | |
| TYPE_LOCK | (struct mvpp2)->prs_spinlock |
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_etype_init() -> mvpp2_prs_shadow_set()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | priv | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_shadow | 4096-ptr_max |
| PARAM_VALUE | 1 | index | 1 |
| PARAM_VALUE | 2 | lu | 5 |
| BUF_SIZE | 0 | priv->aggr_txqs | 504 |
| BUF_SIZE | 0 | priv->axi_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->gop_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_core_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->pp_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->prs_double_vlans | 100 |
| BUF_SIZE | 0 | priv->prs_shadow | 5120 |
| BUF_SIZE | 0 | priv->sysctrl_base | (-1)-s32max |
| CAPPED_DATA | 0 | priv->nthreads | 1 |
| DATA_SOURCE | 0 | priv | $0 |
| BIT_INFO | 0 | priv->max_port_rxqs | 0x0,0x28 |
| MEM_ZERO | 0 | priv | |
| MEM_ZERO | 0 | priv->aggr_txqs | |
| MEM_ZERO | 0 | priv->prs_double_vlans | |
| MEM_ZERO | 0 | priv->prs_shadow | |
| PREEMPT_ADD | |||
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| NO_OVERFLOW_SIMPLE | 0 | priv->axi_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->gop_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_core_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->pp_clk->core->parent->req_rate | |
| LOCK2 | bh | ||
| LOCK2 | 0 | &priv->prs_spinlock | |
| TYPE_LOCK | (struct mvpp2)->prs_spinlock |
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_etype_init() -> mvpp2_prs_shadow_set()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | priv | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_shadow | 4096-ptr_max |
| PARAM_VALUE | 1 | index | 1 |
| PARAM_VALUE | 2 | lu | 5 |
| BUF_SIZE | 0 | priv->aggr_txqs | 504 |
| BUF_SIZE | 0 | priv->axi_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->gop_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_core_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->pp_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->prs_double_vlans | 100 |
| BUF_SIZE | 0 | priv->prs_shadow | 5120 |
| BUF_SIZE | 0 | priv->sysctrl_base | (-1)-s32max |
| CAPPED_DATA | 0 | priv->nthreads | 1 |
| DATA_SOURCE | 0 | priv | $0 |
| BIT_INFO | 0 | priv->max_port_rxqs | 0x0,0x28 |
| MEM_ZERO | 0 | priv | |
| MEM_ZERO | 0 | priv->aggr_txqs | |
| MEM_ZERO | 0 | priv->prs_double_vlans | |
| MEM_ZERO | 0 | priv->prs_shadow | |
| PREEMPT_ADD | |||
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| NO_OVERFLOW_SIMPLE | 0 | priv->axi_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->gop_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_core_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->pp_clk->core->parent->req_rate | |
| LOCK2 | bh | ||
| LOCK2 | 0 | &priv->prs_spinlock | |
| TYPE_LOCK | (struct mvpp2)->prs_spinlock |
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_etype_init() -> mvpp2_prs_shadow_set()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | priv | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_shadow | 4096-ptr_max |
| PARAM_VALUE | 1 | index | 1 |
| PARAM_VALUE | 2 | lu | 5 |
| BUF_SIZE | 0 | priv->aggr_txqs | 504 |
| BUF_SIZE | 0 | priv->axi_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->gop_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_core_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->pp_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->prs_double_vlans | 100 |
| BUF_SIZE | 0 | priv->prs_shadow | 5120 |
| BUF_SIZE | 0 | priv->sysctrl_base | (-1)-s32max |
| CAPPED_DATA | 0 | priv->nthreads | 1 |
| DATA_SOURCE | 0 | priv | $0 |
| BIT_INFO | 0 | priv->max_port_rxqs | 0x0,0x28 |
| MEM_ZERO | 0 | priv | |
| MEM_ZERO | 0 | priv->aggr_txqs | |
| MEM_ZERO | 0 | priv->prs_double_vlans | |
| MEM_ZERO | 0 | priv->prs_shadow | |
| PREEMPT_ADD | |||
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| NO_OVERFLOW_SIMPLE | 0 | priv->axi_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->gop_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_core_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->pp_clk->core->parent->req_rate | |
| LOCK2 | bh | ||
| LOCK2 | 0 | &priv->prs_spinlock | |
| TYPE_LOCK | (struct mvpp2)->prs_spinlock |
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_etype_init() -> mvpp2_prs_shadow_set()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | priv | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_shadow | 4096-ptr_max |
| PARAM_VALUE | 1 | index | 1 |
| PARAM_VALUE | 2 | lu | 5 |
| BUF_SIZE | 0 | priv->aggr_txqs | 504 |
| BUF_SIZE | 0 | priv->axi_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->gop_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_core_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->pp_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->prs_double_vlans | 100 |
| BUF_SIZE | 0 | priv->prs_shadow | 5120 |
| BUF_SIZE | 0 | priv->sysctrl_base | (-1)-s32max |
| CAPPED_DATA | 0 | priv->nthreads | 1 |
| DATA_SOURCE | 0 | priv | $0 |
| BIT_INFO | 0 | priv->max_port_rxqs | 0x0,0x28 |
| MEM_ZERO | 0 | priv | |
| MEM_ZERO | 0 | priv->aggr_txqs | |
| MEM_ZERO | 0 | priv->prs_double_vlans | |
| MEM_ZERO | 0 | priv->prs_shadow | |
| PREEMPT_ADD | |||
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| NO_OVERFLOW_SIMPLE | 0 | priv->axi_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->gop_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_core_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->pp_clk->core->parent->req_rate | |
| LOCK2 | bh | ||
| LOCK2 | 0 | &priv->prs_spinlock | |
| TYPE_LOCK | (struct mvpp2)->prs_spinlock |
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_etype_init() -> mvpp2_prs_shadow_set()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | priv | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_shadow | 4096-ptr_max |
| PARAM_VALUE | 1 | index | 247 |
| PARAM_VALUE | 2 | lu | 5 |
| BUF_SIZE | 0 | priv->aggr_txqs | 504 |
| BUF_SIZE | 0 | priv->axi_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->gop_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_core_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->pp_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->prs_double_vlans | 100 |
| BUF_SIZE | 0 | priv->prs_shadow | 5120 |
| BUF_SIZE | 0 | priv->sysctrl_base | (-1)-s32max |
| CAPPED_DATA | 0 | priv->nthreads | 1 |
| DATA_SOURCE | 0 | priv | $0 |
| BIT_INFO | 0 | priv->max_port_rxqs | 0x0,0x28 |
| MEM_ZERO | 0 | priv | |
| MEM_ZERO | 0 | priv->aggr_txqs | |
| MEM_ZERO | 0 | priv->prs_double_vlans | |
| MEM_ZERO | 0 | priv->prs_shadow | |
| PREEMPT_ADD | |||
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| NO_OVERFLOW_SIMPLE | 0 | priv->axi_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->gop_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_core_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->pp_clk->core->parent->req_rate | |
| LOCK2 | bh | ||
| LOCK2 | 0 | &priv->prs_spinlock | |
| TYPE_LOCK | (struct mvpp2)->prs_spinlock |
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_ip4_cast() -> mvpp2_prs_shadow_set()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | priv | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_shadow | 4096-ptr_max |
| PARAM_VALUE | 1 | index | 1 |
| PARAM_VALUE | 2 | lu | 7 |
| BUF_SIZE | 0 | priv->aggr_txqs | 504 |
| BUF_SIZE | 0 | priv->axi_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->gop_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->mg_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->mg_core_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->pp_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->prs_double_vlans | 100 |
| BUF_SIZE | 0 | priv->prs_shadow | 5120 |
| BUF_SIZE | 0 | priv->sysctrl_base | (-1)-s32max |
| CAPPED_DATA | 0 | priv->nthreads | 1 |
| DATA_SOURCE | 0 | priv | $0 |
| BIT_INFO | 0 | priv->max_port_rxqs | 0x0,0x28 |
| MEM_ZERO | 0 | priv->aggr_txqs | |
| MEM_ZERO | 0 | priv->prs_double_vlans | |
| MEM_ZERO | 0 | priv->prs_shadow | |
| PREEMPT_ADD | |||
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| LOCK2 | bh | ||
| LOCK2 | 0 | &priv->prs_spinlock | |
| TYPE_LOCK | (struct mvpp2)->prs_spinlock |
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_ip4_init() -> mvpp2_prs_shadow_set()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | priv | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_shadow | 4096-ptr_max |
| PARAM_VALUE | 1 | index | 246 |
| PARAM_VALUE | 2 | lu | 7 |
| BUF_SIZE | 0 | priv->aggr_txqs | 504 |
| BUF_SIZE | 0 | priv->axi_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->gop_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_core_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->pp_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->prs_double_vlans | 100 |
| BUF_SIZE | 0 | priv->prs_shadow | 5120 |
| BUF_SIZE | 0 | priv->sysctrl_base | (-1)-s32max |
| CAPPED_DATA | 0 | priv->nthreads | 1 |
| DATA_SOURCE | 0 | priv | $0 |
| BIT_INFO | 0 | priv->max_port_rxqs | 0x0,0x28 |
| MEM_ZERO | 0 | priv | |
| MEM_ZERO | 0 | priv->aggr_txqs | |
| MEM_ZERO | 0 | priv->prs_double_vlans | |
| MEM_ZERO | 0 | priv->prs_shadow | |
| PREEMPT_ADD | |||
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| NO_OVERFLOW_SIMPLE | 0 | priv->axi_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->gop_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_core_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->pp_clk->core->parent->req_rate | |
| LOCK2 | bh | ||
| LOCK2 | 0 | &priv->prs_spinlock | |
| TYPE_LOCK | (struct mvpp2)->prs_spinlock |
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_ip4_init() -> mvpp2_prs_shadow_set()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | priv | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_shadow | 4096-ptr_max |
| PARAM_VALUE | 1 | index | 228 |
| PARAM_VALUE | 2 | lu | 7 |
| BUF_SIZE | 0 | priv->aggr_txqs | 504 |
| BUF_SIZE | 0 | priv->axi_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->gop_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_core_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->pp_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->prs_double_vlans | 100 |
| BUF_SIZE | 0 | priv->prs_shadow | 5120 |
| BUF_SIZE | 0 | priv->sysctrl_base | (-1)-s32max |
| CAPPED_DATA | 0 | priv->nthreads | 1 |
| DATA_SOURCE | 0 | priv | $0 |
| BIT_INFO | 0 | priv->max_port_rxqs | 0x0,0x28 |
| MEM_ZERO | 0 | priv | |
| MEM_ZERO | 0 | priv->aggr_txqs | |
| MEM_ZERO | 0 | priv->prs_double_vlans | |
| MEM_ZERO | 0 | priv->prs_shadow | |
| PREEMPT_ADD | |||
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| NO_OVERFLOW_SIMPLE | 0 | priv->axi_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->gop_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_core_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->pp_clk->core->parent->req_rate | |
| LOCK2 | bh | ||
| LOCK2 | 0 | &priv->prs_spinlock | |
| TYPE_LOCK | (struct mvpp2)->prs_spinlock |
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_ip4_proto() -> mvpp2_prs_shadow_set()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | priv | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_shadow | 4096-ptr_max |
| PARAM_VALUE | 1 | index | 1 |
| PARAM_VALUE | 2 | lu | 7 |
| BUF_SIZE | 0 | priv->aggr_txqs | 504 |
| BUF_SIZE | 0 | priv->axi_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->gop_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->mg_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->mg_core_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->pp_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->prs_double_vlans | 100 |
| BUF_SIZE | 0 | priv->prs_shadow | 5120 |
| BUF_SIZE | 0 | priv->sysctrl_base | (-1)-s32max |
| CAPPED_DATA | 0 | priv->nthreads | 1 |
| DATA_SOURCE | 0 | priv | $0 |
| BIT_INFO | 0 | priv->max_port_rxqs | 0x0,0x28 |
| MEM_ZERO | 0 | priv->aggr_txqs | |
| MEM_ZERO | 0 | priv->prs_double_vlans | |
| MEM_ZERO | 0 | priv->prs_shadow | |
| PREEMPT_ADD | |||
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| LOCK2 | bh | ||
| LOCK2 | 0 | &priv->prs_spinlock | |
| TYPE_LOCK | (struct mvpp2)->prs_spinlock |
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_ip4_proto() -> mvpp2_prs_shadow_set()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | priv | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_shadow | 4096-ptr_max |
| PARAM_VALUE | 1 | index | 1 |
| PARAM_VALUE | 2 | lu | 7 |
| BUF_SIZE | 0 | priv->aggr_txqs | 504 |
| BUF_SIZE | 0 | priv->axi_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->gop_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->mg_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->mg_core_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->pp_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->prs_double_vlans | 100 |
| BUF_SIZE | 0 | priv->prs_shadow | 5120 |
| BUF_SIZE | 0 | priv->sysctrl_base | (-1)-s32max |
| CAPPED_DATA | 0 | priv->nthreads | 1 |
| DATA_SOURCE | 0 | priv | $0 |
| BIT_INFO | 0 | priv->max_port_rxqs | 0x0,0x28 |
| MEM_ZERO | 0 | priv->aggr_txqs | |
| MEM_ZERO | 0 | priv->prs_double_vlans | |
| MEM_ZERO | 0 | priv->prs_shadow | |
| PREEMPT_ADD | |||
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| LOCK2 | bh | ||
| LOCK2 | 0 | &priv->prs_spinlock | |
| TYPE_LOCK | (struct mvpp2)->prs_spinlock |
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_ip6_cast() -> mvpp2_prs_shadow_set()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | priv | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_shadow | 4096-ptr_max |
| PARAM_VALUE | 1 | index | 1 |
| PARAM_VALUE | 2 | lu | 8 |
| BUF_SIZE | 0 | priv->aggr_txqs | 504 |
| BUF_SIZE | 0 | priv->axi_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->gop_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->mg_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->mg_core_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->pp_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->prs_double_vlans | 100 |
| BUF_SIZE | 0 | priv->prs_shadow | 5120 |
| BUF_SIZE | 0 | priv->sysctrl_base | (-1)-s32max |
| CAPPED_DATA | 0 | priv->nthreads | 1 |
| DATA_SOURCE | 0 | priv | $0 |
| BIT_INFO | 0 | priv->max_port_rxqs | 0x0,0x28 |
| MEM_ZERO | 0 | priv->aggr_txqs | |
| MEM_ZERO | 0 | priv->prs_double_vlans | |
| MEM_ZERO | 0 | priv->prs_shadow | |
| PREEMPT_ADD | |||
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| LOCK2 | bh | ||
| LOCK2 | 0 | &priv->prs_spinlock | |
| TYPE_LOCK | (struct mvpp2)->prs_spinlock |
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_ip6_init() -> mvpp2_prs_shadow_set()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | priv | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_shadow | 4096-ptr_max |
| PARAM_VALUE | 1 | index | 1 |
| PARAM_VALUE | 2 | lu | 7 |
| BUF_SIZE | 0 | priv->aggr_txqs | 504 |
| BUF_SIZE | 0 | priv->axi_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->gop_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_core_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->pp_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->prs_double_vlans | 100 |
| BUF_SIZE | 0 | priv->prs_shadow | 5120 |
| BUF_SIZE | 0 | priv->sysctrl_base | (-1)-s32max |
| CAPPED_DATA | 0 | priv->nthreads | 1 |
| DATA_SOURCE | 0 | priv | $0 |
| BIT_INFO | 0 | priv->max_port_rxqs | 0x0,0x28 |
| MEM_ZERO | 0 | priv | |
| MEM_ZERO | 0 | priv->aggr_txqs | |
| MEM_ZERO | 0 | priv->prs_double_vlans | |
| MEM_ZERO | 0 | priv->prs_shadow | |
| PREEMPT_ADD | |||
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| NO_OVERFLOW_SIMPLE | 0 | priv->axi_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->gop_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_core_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->pp_clk->core->parent->req_rate | |
| LOCK2 | bh | ||
| LOCK2 | 0 | &priv->prs_spinlock | |
| TYPE_LOCK | (struct mvpp2)->prs_spinlock |
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_ip6_init() -> mvpp2_prs_shadow_set()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | priv | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_shadow | 4096-ptr_max |
| PARAM_VALUE | 1 | index | 245 |
| PARAM_VALUE | 2 | lu | 7 |
| BUF_SIZE | 0 | priv->aggr_txqs | 504 |
| BUF_SIZE | 0 | priv->axi_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->gop_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_core_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->pp_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->prs_double_vlans | 100 |
| BUF_SIZE | 0 | priv->prs_shadow | 5120 |
| BUF_SIZE | 0 | priv->sysctrl_base | (-1)-s32max |
| CAPPED_DATA | 0 | priv->nthreads | 1 |
| DATA_SOURCE | 0 | priv | $0 |
| BIT_INFO | 0 | priv->max_port_rxqs | 0x0,0x28 |
| MEM_ZERO | 0 | priv | |
| MEM_ZERO | 0 | priv->aggr_txqs | |
| MEM_ZERO | 0 | priv->prs_double_vlans | |
| MEM_ZERO | 0 | priv->prs_shadow | |
| PREEMPT_ADD | |||
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| NO_OVERFLOW_SIMPLE | 0 | priv->axi_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->gop_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_core_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->pp_clk->core->parent->req_rate | |
| LOCK2 | bh | ||
| LOCK2 | 0 | &priv->prs_spinlock | |
| TYPE_LOCK | (struct mvpp2)->prs_spinlock |
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_ip6_init() -> mvpp2_prs_shadow_set()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | priv | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_shadow | 4096-ptr_max |
| PARAM_VALUE | 1 | index | 226 |
| PARAM_VALUE | 2 | lu | 7 |
| BUF_SIZE | 0 | priv->aggr_txqs | 504 |
| BUF_SIZE | 0 | priv->axi_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->gop_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_core_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->pp_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->prs_double_vlans | 100 |
| BUF_SIZE | 0 | priv->prs_shadow | 5120 |
| BUF_SIZE | 0 | priv->sysctrl_base | (-1)-s32max |
| CAPPED_DATA | 0 | priv->nthreads | 1 |
| DATA_SOURCE | 0 | priv | $0 |
| BIT_INFO | 0 | priv->max_port_rxqs | 0x0,0x28 |
| MEM_ZERO | 0 | priv | |
| MEM_ZERO | 0 | priv->aggr_txqs | |
| MEM_ZERO | 0 | priv->prs_double_vlans | |
| MEM_ZERO | 0 | priv->prs_shadow | |
| PREEMPT_ADD | |||
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| NO_OVERFLOW_SIMPLE | 0 | priv->axi_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->gop_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_core_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->pp_clk->core->parent->req_rate | |
| LOCK2 | bh | ||
| LOCK2 | 0 | &priv->prs_spinlock | |
| TYPE_LOCK | (struct mvpp2)->prs_spinlock |
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_ip6_init() -> mvpp2_prs_shadow_set()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | priv | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_shadow | 4096-ptr_max |
| PARAM_VALUE | 1 | index | 227 |
| PARAM_VALUE | 2 | lu | 8 |
| BUF_SIZE | 0 | priv->aggr_txqs | 504 |
| BUF_SIZE | 0 | priv->axi_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->gop_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_core_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->pp_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->prs_double_vlans | 100 |
| BUF_SIZE | 0 | priv->prs_shadow | 5120 |
| BUF_SIZE | 0 | priv->sysctrl_base | (-1)-s32max |
| CAPPED_DATA | 0 | priv->nthreads | 1 |
| DATA_SOURCE | 0 | priv | $0 |
| BIT_INFO | 0 | priv->max_port_rxqs | 0x0,0x28 |
| MEM_ZERO | 0 | priv | |
| MEM_ZERO | 0 | priv->aggr_txqs | |
| MEM_ZERO | 0 | priv->prs_double_vlans | |
| MEM_ZERO | 0 | priv->prs_shadow | |
| PREEMPT_ADD | |||
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| NO_OVERFLOW_SIMPLE | 0 | priv->axi_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->gop_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_core_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->pp_clk->core->parent->req_rate | |
| LOCK2 | bh | ||
| LOCK2 | 0 | &priv->prs_spinlock | |
| TYPE_LOCK | (struct mvpp2)->prs_spinlock |
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_ip6_proto() -> mvpp2_prs_shadow_set()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | priv | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_shadow | 4096-ptr_max |
| PARAM_VALUE | 1 | index | 1 |
| PARAM_VALUE | 2 | lu | 8 |
| BUF_SIZE | 0 | priv->aggr_txqs | 504 |
| BUF_SIZE | 0 | priv->axi_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->gop_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->mg_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->mg_core_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->pp_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->prs_double_vlans | 100 |
| BUF_SIZE | 0 | priv->prs_shadow | 5120 |
| BUF_SIZE | 0 | priv->sysctrl_base | (-1)-s32max |
| CAPPED_DATA | 0 | priv->nthreads | 1 |
| DATA_SOURCE | 0 | priv | $0 |
| BIT_INFO | 0 | priv->max_port_rxqs | 0x0,0x28 |
| MEM_ZERO | 0 | priv->aggr_txqs | |
| MEM_ZERO | 0 | priv->prs_double_vlans | |
| MEM_ZERO | 0 | priv->prs_shadow | |
| PREEMPT_ADD | |||
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| LOCK2 | bh | ||
| LOCK2 | 0 | &priv->prs_spinlock | |
| TYPE_LOCK | (struct mvpp2)->prs_spinlock |
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_mac_drop_all_set() -> mvpp2_prs_shadow_set()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | priv | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_shadow | 4096-ptr_max |
| PARAM_VALUE | 1 | index | 0 |
| PARAM_VALUE | 2 | lu | 1 |
| BUF_SIZE | 0 | priv->aggr_txqs | 504 |
| BUF_SIZE | 0 | priv->axi_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->gop_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->mg_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->mg_core_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->pp_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->prs_double_vlans | 100 |
| BUF_SIZE | 0 | priv->prs_shadow | 5120 |
| BUF_SIZE | 0 | priv->sysctrl_base | (-1)-s32max |
| CAPPED_DATA | 0 | priv->nthreads | 1 |
| DATA_SOURCE | 0 | priv | $0 |
| BIT_INFO | 0 | priv->max_port_rxqs | 0x0,0x28 |
| MEM_ZERO | 0 | priv->aggr_txqs | |
| MEM_ZERO | 0 | priv->prs_double_vlans | |
| MEM_ZERO | 0 | priv->prs_shadow | |
| PREEMPT_ADD | |||
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| LOCK2 | bh | ||
| LOCK2 | 0 | &priv->prs_spinlock | |
| TYPE_LOCK | (struct mvpp2)->prs_spinlock |
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_mac_init() -> mvpp2_prs_shadow_set()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | priv | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_shadow | 4096-ptr_max |
| PARAM_VALUE | 1 | index | 255 |
| PARAM_VALUE | 2 | lu | 1 |
| BUF_SIZE | 0 | priv->aggr_txqs | 504 |
| BUF_SIZE | 0 | priv->axi_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->gop_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_core_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->pp_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->prs_double_vlans | 100 |
| BUF_SIZE | 0 | priv->prs_shadow | 5120 |
| BUF_SIZE | 0 | priv->sysctrl_base | (-1)-s32max |
| CAPPED_DATA | 0 | priv->nthreads | 1 |
| DATA_SOURCE | 0 | priv | $0 |
| BIT_INFO | 0 | priv->max_port_rxqs | 0x0,0x28 |
| MEM_ZERO | 0 | priv | |
| MEM_ZERO | 0 | priv->aggr_txqs | |
| MEM_ZERO | 0 | priv->prs_double_vlans | |
| MEM_ZERO | 0 | priv->prs_shadow | |
| PREEMPT_ADD | |||
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| NO_OVERFLOW_SIMPLE | 0 | priv->axi_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->gop_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_core_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->pp_clk->core->parent->req_rate | |
| LOCK2 | bh | ||
| LOCK2 | 0 | &priv->prs_spinlock | |
| TYPE_LOCK | (struct mvpp2)->prs_spinlock |
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_mh_init() -> mvpp2_prs_shadow_set()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | priv | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_shadow | 4096-ptr_max |
| PARAM_VALUE | 1 | index | 243 |
| PARAM_VALUE | 2 | lu | 0 |
| BUF_SIZE | 0 | priv->aggr_txqs | 504 |
| BUF_SIZE | 0 | priv->axi_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->gop_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_core_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->pp_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->prs_double_vlans | 100 |
| BUF_SIZE | 0 | priv->prs_shadow | 5120 |
| BUF_SIZE | 0 | priv->sysctrl_base | (-1)-s32max |
| CAPPED_DATA | 0 | priv->nthreads | 1 |
| DATA_SOURCE | 0 | priv | $0 |
| BIT_INFO | 0 | priv->max_port_rxqs | 0x0,0x28 |
| MEM_ZERO | 0 | priv | |
| MEM_ZERO | 0 | priv->aggr_txqs | |
| MEM_ZERO | 0 | priv->prs_double_vlans | |
| MEM_ZERO | 0 | priv->prs_shadow | |
| PREEMPT_ADD | |||
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| NO_OVERFLOW_SIMPLE | 0 | priv->axi_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->gop_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_core_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->pp_clk->core->parent->req_rate | |
| LOCK2 | bh | ||
| LOCK2 | 0 | &priv->prs_spinlock | |
| TYPE_LOCK | (struct mvpp2)->prs_spinlock |
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_mh_init() -> mvpp2_prs_shadow_set()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | priv | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_shadow | 4096-ptr_max |
| PARAM_VALUE | 1 | index | 225 |
| PARAM_VALUE | 2 | lu | 0 |
| BUF_SIZE | 0 | priv->aggr_txqs | 504 |
| BUF_SIZE | 0 | priv->axi_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->gop_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_core_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->pp_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->prs_double_vlans | 100 |
| BUF_SIZE | 0 | priv->prs_shadow | 5120 |
| BUF_SIZE | 0 | priv->sysctrl_base | (-1)-s32max |
| CAPPED_DATA | 0 | priv->nthreads | 1 |
| DATA_SOURCE | 0 | priv | $0 |
| BIT_INFO | 0 | priv->max_port_rxqs | 0x0,0x28 |
| MEM_ZERO | 0 | priv | |
| MEM_ZERO | 0 | priv->aggr_txqs | |
| MEM_ZERO | 0 | priv->prs_double_vlans | |
| MEM_ZERO | 0 | priv->prs_shadow | |
| PREEMPT_ADD | |||
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| NO_OVERFLOW_SIMPLE | 0 | priv->axi_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->gop_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_core_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->pp_clk->core->parent->req_rate | |
| LOCK2 | bh | ||
| LOCK2 | 0 | &priv->prs_spinlock | |
| TYPE_LOCK | (struct mvpp2)->prs_spinlock |
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_pppoe_init() -> mvpp2_prs_shadow_set()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | priv | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_shadow | 4096-ptr_max |
| PARAM_VALUE | 1 | index | 1 |
| PARAM_VALUE | 2 | lu | 6 |
| BUF_SIZE | 0 | priv->aggr_txqs | 504 |
| BUF_SIZE | 0 | priv->axi_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->gop_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_core_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->pp_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->prs_double_vlans | 100 |
| BUF_SIZE | 0 | priv->prs_shadow | 5120 |
| BUF_SIZE | 0 | priv->sysctrl_base | (-1)-s32max |
| CAPPED_DATA | 0 | priv->nthreads | 1 |
| DATA_SOURCE | 0 | priv | $0 |
| BIT_INFO | 0 | priv->max_port_rxqs | 0x0,0x28 |
| MEM_ZERO | 0 | priv | |
| MEM_ZERO | 0 | priv->aggr_txqs | |
| MEM_ZERO | 0 | priv->prs_double_vlans | |
| MEM_ZERO | 0 | priv->prs_shadow | |
| PREEMPT_ADD | |||
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| NO_OVERFLOW_SIMPLE | 0 | priv->axi_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->gop_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_core_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->pp_clk->core->parent->req_rate | |
| LOCK2 | bh | ||
| LOCK2 | 0 | &priv->prs_spinlock | |
| TYPE_LOCK | (struct mvpp2)->prs_spinlock |
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_pppoe_init() -> mvpp2_prs_shadow_set()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | priv | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_shadow | 4096-ptr_max |
| PARAM_VALUE | 1 | index | 1 |
| PARAM_VALUE | 2 | lu | 6 |
| BUF_SIZE | 0 | priv->aggr_txqs | 504 |
| BUF_SIZE | 0 | priv->axi_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->gop_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_core_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->pp_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->prs_double_vlans | 100 |
| BUF_SIZE | 0 | priv->prs_shadow | 5120 |
| BUF_SIZE | 0 | priv->sysctrl_base | (-1)-s32max |
| CAPPED_DATA | 0 | priv->nthreads | 1 |
| DATA_SOURCE | 0 | priv | $0 |
| BIT_INFO | 0 | priv->max_port_rxqs | 0x0,0x28 |
| MEM_ZERO | 0 | priv | |
| MEM_ZERO | 0 | priv->aggr_txqs | |
| MEM_ZERO | 0 | priv->prs_double_vlans | |
| MEM_ZERO | 0 | priv->prs_shadow | |
| PREEMPT_ADD | |||
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| NO_OVERFLOW_SIMPLE | 0 | priv->axi_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->gop_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_core_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->pp_clk->core->parent->req_rate | |
| LOCK2 | bh | ||
| LOCK2 | 0 | &priv->prs_spinlock | |
| TYPE_LOCK | (struct mvpp2)->prs_spinlock |
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_pppoe_init() -> mvpp2_prs_shadow_set()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | priv | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_shadow | 4096-ptr_max |
| PARAM_VALUE | 1 | index | 1 |
| PARAM_VALUE | 2 | lu | 6 |
| BUF_SIZE | 0 | priv->aggr_txqs | 504 |
| BUF_SIZE | 0 | priv->axi_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->gop_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_core_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->pp_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->prs_double_vlans | 100 |
| BUF_SIZE | 0 | priv->prs_shadow | 5120 |
| BUF_SIZE | 0 | priv->sysctrl_base | (-1)-s32max |
| CAPPED_DATA | 0 | priv->nthreads | 1 |
| DATA_SOURCE | 0 | priv | $0 |
| BIT_INFO | 0 | priv->max_port_rxqs | 0x0,0x28 |
| MEM_ZERO | 0 | priv | |
| MEM_ZERO | 0 | priv->aggr_txqs | |
| MEM_ZERO | 0 | priv->prs_double_vlans | |
| MEM_ZERO | 0 | priv->prs_shadow | |
| PREEMPT_ADD | |||
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| NO_OVERFLOW_SIMPLE | 0 | priv->axi_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->gop_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_core_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->pp_clk->core->parent->req_rate | |
| LOCK2 | bh | ||
| LOCK2 | 0 | &priv->prs_spinlock | |
| TYPE_LOCK | (struct mvpp2)->prs_spinlock |
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_vid_enable_filtering() -> mvpp2_prs_shadow_set()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | priv | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_shadow | 4096-ptr_max |
| PARAM_VALUE | 2 | lu | 4 |
| PREEMPT_ADD | <- disables preempt | ||
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| LOCK2 | bh | ||
| LOCK2 | 0 | &priv->prs_spinlock | |
| HALF_LOCKED2 | global &rtnl_mutex | ||
| TYPE_LOCK | (struct mvpp2)->prs_spinlock |
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_vid_entry_add() -> mvpp2_prs_shadow_set()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | priv | 4096-ptr_max |
| PARAM_VALUE | 1 | index | 0-255 |
| PARAM_VALUE | 2 | lu | 4 |
| PREEMPT_ADD | <- disables preempt | ||
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| LOCK2 | bh | ||
| LOCK2 | 0 | &priv->prs_spinlock | |
| TYPE_LOCK | (struct mvpp2)->prs_spinlock |
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_vid_init() -> mvpp2_prs_shadow_set()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | priv | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_shadow | 4096-ptr_max |
| PARAM_VALUE | 1 | index | 248 |
| PARAM_VALUE | 2 | lu | 4 |
| BUF_SIZE | 0 | priv->aggr_txqs | 504 |
| BUF_SIZE | 0 | priv->axi_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->gop_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_core_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->pp_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->prs_double_vlans | 100 |
| BUF_SIZE | 0 | priv->prs_shadow | 5120 |
| BUF_SIZE | 0 | priv->sysctrl_base | (-1)-s32max |
| CAPPED_DATA | 0 | priv->nthreads | 1 |
| DATA_SOURCE | 0 | priv | $0 |
| BIT_INFO | 0 | priv->max_port_rxqs | 0x0,0x28 |
| MEM_ZERO | 0 | priv | |
| MEM_ZERO | 0 | priv->aggr_txqs | |
| MEM_ZERO | 0 | priv->prs_double_vlans | |
| MEM_ZERO | 0 | priv->prs_shadow | |
| PREEMPT_ADD | |||
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| NO_OVERFLOW_SIMPLE | 0 | priv->axi_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->gop_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_core_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->pp_clk->core->parent->req_rate | |
| LOCK2 | bh | ||
| LOCK2 | 0 | &priv->prs_spinlock | |
| TYPE_LOCK | (struct mvpp2)->prs_spinlock |
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_vid_init() -> mvpp2_prs_shadow_set()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | priv | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_shadow | 4096-ptr_max |
| PARAM_VALUE | 1 | index | 249 |
| PARAM_VALUE | 2 | lu | 4 |
| BUF_SIZE | 0 | priv->aggr_txqs | 504 |
| BUF_SIZE | 0 | priv->axi_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->gop_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_core_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->pp_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->prs_double_vlans | 100 |
| BUF_SIZE | 0 | priv->prs_shadow | 5120 |
| BUF_SIZE | 0 | priv->sysctrl_base | (-1)-s32max |
| CAPPED_DATA | 0 | priv->nthreads | 1 |
| DATA_SOURCE | 0 | priv | $0 |
| BIT_INFO | 0 | priv->max_port_rxqs | 0x0,0x28 |
| MEM_ZERO | 0 | priv | |
| MEM_ZERO | 0 | priv->aggr_txqs | |
| MEM_ZERO | 0 | priv->prs_double_vlans | |
| MEM_ZERO | 0 | priv->prs_shadow | |
| PREEMPT_ADD | |||
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| NO_OVERFLOW_SIMPLE | 0 | priv->axi_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->gop_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_core_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->pp_clk->core->parent->req_rate | |
| LOCK2 | bh | ||
| LOCK2 | 0 | &priv->prs_spinlock | |
| TYPE_LOCK | (struct mvpp2)->prs_spinlock |
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_vlan_add() -> mvpp2_prs_shadow_set()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | priv | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_shadow | 4096-ptr_max |
| PARAM_VALUE | 1 | index | 1 |
| PARAM_VALUE | 2 | lu | 3 |
| BUF_SIZE | 0 | priv->aggr_txqs | 504 |
| BUF_SIZE | 0 | priv->axi_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->gop_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->mg_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->mg_core_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->pp_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->prs_double_vlans | 100 |
| BUF_SIZE | 0 | priv->prs_shadow | 5120 |
| BUF_SIZE | 0 | priv->sysctrl_base | (-1)-s32max |
| CAPPED_DATA | 0 | priv->nthreads | 1 |
| DATA_SOURCE | 0 | priv | $0 |
| BIT_INFO | 0 | priv->max_port_rxqs | 0x0,0x28 |
| MEM_ZERO | 0 | priv->aggr_txqs | |
| MEM_ZERO | 0 | priv->prs_double_vlans | |
| MEM_ZERO | 0 | priv->prs_shadow | |
| PREEMPT_ADD | |||
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| LOCK2 | bh | ||
| LOCK2 | 0 | &priv->prs_spinlock | |
| TYPE_LOCK | (struct mvpp2)->prs_spinlock |
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_vlan_init() -> mvpp2_prs_shadow_set()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | priv | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_shadow | 4096-ptr_max |
| PARAM_VALUE | 1 | index | 250 |
| PARAM_VALUE | 2 | lu | 3 |
| BUF_SIZE | 0 | priv->aggr_txqs | 504 |
| BUF_SIZE | 0 | priv->axi_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->gop_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_core_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->pp_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->prs_double_vlans | 100 |
| BUF_SIZE | 0 | priv->prs_shadow | 5120 |
| BUF_SIZE | 0 | priv->sysctrl_base | (-1)-s32max |
| CAPPED_DATA | 0 | priv->nthreads | 1 |
| DATA_SOURCE | 0 | priv | $1 |
| BIT_INFO | 0 | priv->max_port_rxqs | 0x0,0x28 |
| MEM_ZERO | 0 | priv | |
| MEM_ZERO | 0 | priv->aggr_txqs | |
| MEM_ZERO | 0 | priv->prs_double_vlans | |
| MEM_ZERO | 0 | priv->prs_shadow | |
| PREEMPT_ADD | |||
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| NO_OVERFLOW_SIMPLE | 0 | priv->axi_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->gop_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_core_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->pp_clk->core->parent->req_rate | |
| LOCK2 | bh | ||
| LOCK2 | 0 | &priv->prs_spinlock | |
| TYPE_LOCK | (struct mvpp2)->prs_spinlock |
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_vlan_init() -> mvpp2_prs_shadow_set()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | priv | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_shadow | 4096-ptr_max |
| PARAM_VALUE | 1 | index | 251 |
| PARAM_VALUE | 2 | lu | 3 |
| BUF_SIZE | 0 | priv->aggr_txqs | 504 |
| BUF_SIZE | 0 | priv->axi_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->gop_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_core_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->pp_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->prs_double_vlans | 100 |
| BUF_SIZE | 0 | priv->prs_shadow | 5120 |
| BUF_SIZE | 0 | priv->sysctrl_base | (-1)-s32max |
| CAPPED_DATA | 0 | priv->nthreads | 1 |
| DATA_SOURCE | 0 | priv | $1 |
| BIT_INFO | 0 | priv->max_port_rxqs | 0x0,0x28 |
| MEM_ZERO | 0 | priv | |
| MEM_ZERO | 0 | priv->aggr_txqs | |
| MEM_ZERO | 0 | priv->prs_double_vlans | |
| MEM_ZERO | 0 | priv->prs_shadow | |
| PREEMPT_ADD | |||
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| NO_OVERFLOW_SIMPLE | 0 | priv->axi_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->gop_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_core_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->pp_clk->core->parent->req_rate | |
| LOCK2 | bh | ||
| LOCK2 | 0 | &priv->prs_spinlock | |
| TYPE_LOCK | (struct mvpp2)->prs_spinlock |