Defined in 1 files as a function:
Referenced in 1 files:
Smatch caller information:
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c __mvpp2_prs_mac_da_accept() -> mvpp2_prs_shadow_ri_set()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | priv | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_shadow | 4096-ptr_max |
| PARAM_VALUE | 1 | index | 112-191 |
| PARAM_VALUE | 2 | ri | 0-1,512,1024 |
| PARAM_VALUE | 3 | ri_mask | 1537 |
| FUZZY_MAX | 2 | ri | 1024 |
| BIT_INFO | 2 | ri | 0x0,0x601 |
| PREEMPT_ADD | |||
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| LOCK2 | bh | ||
| HALF_LOCKED2 | &port->priv->prs_spinlock | ||
| HALF_LOCKED2 | &priv->prs_spinlock | ||
| TYPE_LOCK | (struct mvpp2)->prs_spinlock |
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_etype_init() -> mvpp2_prs_shadow_ri_set()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | priv | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_shadow | 4096-ptr_max |
| PARAM_VALUE | 1 | index | 1 |
| PARAM_VALUE | 2 | ri | 2048 |
| PARAM_VALUE | 3 | ri_mask | 2048 |
| BUF_SIZE | 0 | priv->aggr_txqs | 504 |
| BUF_SIZE | 0 | priv->axi_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->gop_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_core_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->pp_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->prs_double_vlans | 100 |
| BUF_SIZE | 0 | priv->prs_shadow | 5120 |
| BUF_SIZE | 0 | priv->sysctrl_base | (-1)-s32max |
| CAPPED_DATA | 0 | priv->nthreads | 1 |
| DATA_SOURCE | 0 | priv | $0 |
| BIT_INFO | 0 | priv->max_port_rxqs | 0x0,0x28 |
| MEM_ZERO | 0 | priv | |
| MEM_ZERO | 0 | priv->aggr_txqs | |
| MEM_ZERO | 0 | priv->prs_double_vlans | |
| MEM_ZERO | 0 | priv->prs_shadow | |
| PREEMPT_ADD | |||
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| NO_OVERFLOW_SIMPLE | 0 | priv->axi_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->gop_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_core_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->pp_clk->core->parent->req_rate | |
| LOCK2 | bh | ||
| LOCK2 | 0 | &priv->prs_spinlock | |
| TYPE_LOCK | (struct mvpp2)->prs_spinlock |
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_etype_init() -> mvpp2_prs_shadow_ri_set()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | priv | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_shadow | 4096-ptr_max |
| PARAM_VALUE | 1 | index | 1 |
| PARAM_VALUE | 2 | ri | 24576 |
| PARAM_VALUE | 3 | ri_mask | 28672 |
| BUF_SIZE | 0 | priv->aggr_txqs | 504 |
| BUF_SIZE | 0 | priv->axi_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->gop_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_core_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->pp_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->prs_double_vlans | 100 |
| BUF_SIZE | 0 | priv->prs_shadow | 5120 |
| BUF_SIZE | 0 | priv->sysctrl_base | (-1)-s32max |
| CAPPED_DATA | 0 | priv->nthreads | 1 |
| DATA_SOURCE | 0 | priv | $0 |
| BIT_INFO | 0 | priv->max_port_rxqs | 0x0,0x28 |
| MEM_ZERO | 0 | priv | |
| MEM_ZERO | 0 | priv->aggr_txqs | |
| MEM_ZERO | 0 | priv->prs_double_vlans | |
| MEM_ZERO | 0 | priv->prs_shadow | |
| PREEMPT_ADD | |||
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| NO_OVERFLOW_SIMPLE | 0 | priv->axi_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->gop_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_core_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->pp_clk->core->parent->req_rate | |
| LOCK2 | bh | ||
| LOCK2 | 0 | &priv->prs_spinlock | |
| TYPE_LOCK | (struct mvpp2)->prs_spinlock |
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_etype_init() -> mvpp2_prs_shadow_ri_set()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | priv | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_shadow | 4096-ptr_max |
| PARAM_VALUE | 1 | index | 1 |
| PARAM_VALUE | 2 | ri | 2097168 |
| PARAM_VALUE | 3 | ri_mask | 3145840 |
| BUF_SIZE | 0 | priv->aggr_txqs | 504 |
| BUF_SIZE | 0 | priv->axi_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->gop_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_core_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->pp_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->prs_double_vlans | 100 |
| BUF_SIZE | 0 | priv->prs_shadow | 5120 |
| BUF_SIZE | 0 | priv->sysctrl_base | (-1)-s32max |
| CAPPED_DATA | 0 | priv->nthreads | 1 |
| DATA_SOURCE | 0 | priv | $0 |
| BIT_INFO | 0 | priv->max_port_rxqs | 0x0,0x28 |
| MEM_ZERO | 0 | priv | |
| MEM_ZERO | 0 | priv->aggr_txqs | |
| MEM_ZERO | 0 | priv->prs_double_vlans | |
| MEM_ZERO | 0 | priv->prs_shadow | |
| PREEMPT_ADD | |||
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| NO_OVERFLOW_SIMPLE | 0 | priv->axi_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->gop_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_core_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->pp_clk->core->parent->req_rate | |
| LOCK2 | bh | ||
| LOCK2 | 0 | &priv->prs_spinlock | |
| TYPE_LOCK | (struct mvpp2)->prs_spinlock |
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_etype_init() -> mvpp2_prs_shadow_ri_set()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | priv | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_shadow | 4096-ptr_max |
| PARAM_VALUE | 1 | index | 1 |
| PARAM_VALUE | 2 | ri | 4096 |
| PARAM_VALUE | 3 | ri_mask | 28672 |
| BUF_SIZE | 0 | priv->aggr_txqs | 504 |
| BUF_SIZE | 0 | priv->axi_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->gop_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_core_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->pp_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->prs_double_vlans | 100 |
| BUF_SIZE | 0 | priv->prs_shadow | 5120 |
| BUF_SIZE | 0 | priv->sysctrl_base | (-1)-s32max |
| CAPPED_DATA | 0 | priv->nthreads | 1 |
| DATA_SOURCE | 0 | priv | $0 |
| BIT_INFO | 0 | priv->max_port_rxqs | 0x0,0x28 |
| MEM_ZERO | 0 | priv | |
| MEM_ZERO | 0 | priv->aggr_txqs | |
| MEM_ZERO | 0 | priv->prs_double_vlans | |
| MEM_ZERO | 0 | priv->prs_shadow | |
| PREEMPT_ADD | |||
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| NO_OVERFLOW_SIMPLE | 0 | priv->axi_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->gop_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_core_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->pp_clk->core->parent->req_rate | |
| LOCK2 | bh | ||
| LOCK2 | 0 | &priv->prs_spinlock | |
| TYPE_LOCK | (struct mvpp2)->prs_spinlock |
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_etype_init() -> mvpp2_prs_shadow_ri_set()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | priv | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_shadow | 4096-ptr_max |
| PARAM_VALUE | 1 | index | 1 |
| PARAM_VALUE | 2 | ri | 16384 |
| PARAM_VALUE | 3 | ri_mask | 28672 |
| BUF_SIZE | 0 | priv->aggr_txqs | 504 |
| BUF_SIZE | 0 | priv->axi_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->gop_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_core_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->pp_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->prs_double_vlans | 100 |
| BUF_SIZE | 0 | priv->prs_shadow | 5120 |
| BUF_SIZE | 0 | priv->sysctrl_base | (-1)-s32max |
| CAPPED_DATA | 0 | priv->nthreads | 1 |
| DATA_SOURCE | 0 | priv | $0 |
| BIT_INFO | 0 | priv->max_port_rxqs | 0x0,0x28 |
| MEM_ZERO | 0 | priv | |
| MEM_ZERO | 0 | priv->aggr_txqs | |
| MEM_ZERO | 0 | priv->prs_double_vlans | |
| MEM_ZERO | 0 | priv->prs_shadow | |
| PREEMPT_ADD | |||
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| NO_OVERFLOW_SIMPLE | 0 | priv->axi_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->gop_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_core_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->pp_clk->core->parent->req_rate | |
| LOCK2 | bh | ||
| LOCK2 | 0 | &priv->prs_spinlock | |
| TYPE_LOCK | (struct mvpp2)->prs_spinlock |
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_etype_init() -> mvpp2_prs_shadow_ri_set()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | priv | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_shadow | 4096-ptr_max |
| PARAM_VALUE | 1 | index | 247 |
| PARAM_VALUE | 2 | ri | 0 |
| PARAM_VALUE | 3 | ri_mask | 28672 |
| BUF_SIZE | 0 | priv->aggr_txqs | 504 |
| BUF_SIZE | 0 | priv->axi_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->gop_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_core_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->pp_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->prs_double_vlans | 100 |
| BUF_SIZE | 0 | priv->prs_shadow | 5120 |
| BUF_SIZE | 0 | priv->sysctrl_base | (-1)-s32max |
| CAPPED_DATA | 0 | priv->nthreads | 1 |
| DATA_SOURCE | 0 | priv | $0 |
| BIT_INFO | 0 | priv->max_port_rxqs | 0x0,0x28 |
| MEM_ZERO | 0 | priv | |
| MEM_ZERO | 0 | priv->aggr_txqs | |
| MEM_ZERO | 0 | priv->prs_double_vlans | |
| MEM_ZERO | 0 | priv->prs_shadow | |
| PREEMPT_ADD | |||
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| NO_OVERFLOW_SIMPLE | 0 | priv->axi_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->gop_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_core_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->pp_clk->core->parent->req_rate | |
| LOCK2 | bh | ||
| LOCK2 | 0 | &priv->prs_spinlock | |
| TYPE_LOCK | (struct mvpp2)->prs_spinlock |