Defined in 1 files as a function:
Referenced in 1 files:
-
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c
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Smatch caller information:
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c __mvpp2_prs_mac_da_accept() -> mvpp2_prs_hw_write()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | priv | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_shadow | 4096-ptr_max |
| PARAM_VALUE | 1 | pe | 1703818470059278336 |
| PARAM_VALUE | 1 | pe->index | 112-191 |
| MEM_ZERO | 1 | pe | |
| PREEMPT_ADD | |||
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| LOCK2 | bh | ||
| HALF_LOCKED2 | &port->priv->prs_spinlock | ||
| HALF_LOCKED2 | &priv->prs_spinlock | ||
| TYPE_LOCK | (struct mvpp2)->prs_spinlock |
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c __mvpp2_prs_mac_promisc_set() -> mvpp2_prs_hw_write()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | priv | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->bm_pools->id | 0-63 |
| PARAM_VALUE | 0 | priv->bm_pools->size | 0,16352 |
| PARAM_VALUE | 0 | priv->bm_pools->size_bytes | 0,130816,261632 |
| PARAM_VALUE | 0 | priv->max_port_rxqs | 0,8,32 |
| PARAM_VALUE | 0 | priv->nthreads | 0-9 |
| PARAM_VALUE | 0 | priv->prs_shadow | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_spinlock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 1 | pe | 5802253647233675264 |
| PARAM_VALUE | 1 | pe->index | 253-254 |
| BUF_SIZE | 0 | priv->aggr_txqs | (-1),504 |
| BUF_SIZE | 0 | priv->axi_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->gop_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->mg_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->mg_core_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->pp_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->prs_double_vlans | (-1),100 |
| BUF_SIZE | 0 | priv->prs_shadow | (-1),5120 |
| BUF_SIZE | 0 | priv->sysctrl_base | (-1)-s32max |
| DATA_SOURCE | 0 | priv | $0 |
| FUZZY_MAX | 0 | priv->max_port_rxqs | 32 |
| MEM_ZERO | 1 | pe | |
| PREEMPT_ADD | |||
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| LOCK2 | bh | ||
| LOCK2 | 0 | &priv->prs_spinlock | |
| TYPE_LOCK | (struct mvpp2)->prs_spinlock |
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_add_flow() -> mvpp2_prs_hw_write()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | priv | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->aggr_txqs | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->bm_pools | 1-u64max |
| PARAM_VALUE | 0 | priv->bm_pools->buf_num | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->buf_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->dma_addr | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->frag_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->id | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->pkt_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->port_map | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->size_bytes | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->virt_addr | 0 |
| PARAM_VALUE | 0 | priv->iface_base | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->max_port_rxqs | 8,32 |
| PARAM_VALUE | 0 | priv->nthreads | 0-9 |
| PARAM_VALUE | 0 | priv->prs_double_vlans | 1-u64max |
| PARAM_VALUE | 0 | priv->prs_shadow | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_shadow->finish | 0 |
| PARAM_VALUE | 0 | priv->prs_shadow->lu | 0 |
| PARAM_VALUE | 0 | priv->prs_shadow->ri | 0 |
| PARAM_VALUE | 0 | priv->prs_shadow->ri_mask | 0 |
| PARAM_VALUE | 0 | priv->prs_shadow->udf | 0 |
| PARAM_VALUE | 0 | priv->prs_shadow->valid | 0 |
| PARAM_VALUE | 0 | priv->prs_spinlock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | priv->swth_base | 4096-ptr_max |
| PARAM_VALUE | 1 | pe | 1916249289316446208 |
| PARAM_VALUE | 1 | pe->index | 1 |
| BUF_SIZE | 0 | priv->aggr_txqs | 504 |
| BUF_SIZE | 0 | priv->axi_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->gop_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->mg_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->mg_core_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->pp_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->sysctrl_base | (-1)-s32max |
| CAPPED_DATA | 0 | priv->nthreads | 1 |
| DATA_SOURCE | 0 | priv | $0 |
| FUZZY_MAX | 0 | priv->max_port_rxqs | 32 |
| BIT_INFO | 0 | priv->max_port_rxqs | 0x0,0x28 |
| HARD_MAX | 0 | priv->max_port_rxqs | 32 |
| MEM_ZERO | 1 | pe | |
| PREEMPT_ADD | <- disables preempt | ||
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| LOCK2 | bh | ||
| LOCK2 | 0 | &priv->prs_spinlock | |
| TYPE_LOCK | (struct mvpp2)->prs_spinlock |
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_def_flow() -> mvpp2_prs_hw_write()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | priv | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_shadow | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_spinlock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 1 | pe | 8491537561043218432 |
| PARAM_VALUE | 1 | pe->index | 0-255 |
| MEM_ZERO | 1 | pe | |
| PREEMPT_ADD | <- disables preempt | ||
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| LOCK2 | bh | ||
| LOCK2 | 0 | &priv->prs_spinlock | |
| HALF_LOCKED2 | global &rtnl_mutex | ||
| TYPE_LOCK | (struct mvpp2)->prs_spinlock |
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_def_flow_init() -> mvpp2_prs_hw_write()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | priv | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->aggr_txqs | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->axi_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->bm_pools | 1-u64max |
| PARAM_VALUE | 0 | priv->bm_pools->buf_num | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->buf_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->dma_addr | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->frag_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->id | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->pkt_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->port_map | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->size_bytes | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->virt_addr | 0 |
| PARAM_VALUE | 0 | priv->cm3_base | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->gop_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->hw_version | 0 |
| PARAM_VALUE | 0 | priv->iface_base | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->lms_base | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->max_port_rxqs | 8,32 |
| PARAM_VALUE | 0 | priv->mg_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->mg_core_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->nthreads | 0-9 |
| PARAM_VALUE | 0 | priv->percpu_pools | 0-1 |
| PARAM_VALUE | 0 | priv->pp_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_double_vlans | 1-u64max |
| PARAM_VALUE | 0 | priv->prs_shadow | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_spinlock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | priv->sysctrl_base | 0-ptr_max |
| PARAM_VALUE | 1 | pe | 1880244632500092928 |
| PARAM_VALUE | 1 | pe->index | 231-234 |
| BUF_SIZE | 0 | priv->aggr_txqs | 504 |
| BUF_SIZE | 0 | priv->axi_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->gop_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_core_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->pp_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->prs_double_vlans | 100 |
| BUF_SIZE | 0 | priv->prs_shadow | 5120 |
| BUF_SIZE | 0 | priv->sysctrl_base | (-1)-s32max |
| CAPPED_DATA | 0 | priv->nthreads | 1 |
| DATA_SOURCE | 0 | priv | $0 |
| FUZZY_MAX | 0 | priv->max_port_rxqs | 32 |
| FUZZY_MAX | 0 | priv->percpu_pools | 1 |
| BIT_INFO | 0 | priv->max_port_rxqs | 0x0,0x28 |
| HARD_MAX | 0 | priv->max_port_rxqs | 32 |
| HARD_MAX | 0 | priv->percpu_pools | 1 |
| MEM_ZERO | 0 | priv | |
| MEM_ZERO | 0 | priv->aggr_txqs | |
| MEM_ZERO | 0 | priv->prs_double_vlans | |
| MEM_ZERO | 0 | priv->prs_shadow | |
| MEM_ZERO | 1 | pe | |
| PREEMPT_ADD | |||
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| NO_OVERFLOW_SIMPLE | 0 | priv->axi_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->gop_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_core_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->pp_clk->core->parent->req_rate | |
| LOCK2 | bh | ||
| LOCK2 | 0 | &priv->prs_spinlock | |
| TYPE_LOCK | (struct mvpp2)->prs_spinlock |
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_double_vlan_add() -> mvpp2_prs_hw_write()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | priv | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->aggr_txqs | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->bm_pools | 1-u64max |
| PARAM_VALUE | 0 | priv->bm_pools->buf_num | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->buf_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->dma_addr | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->frag_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->id | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->pkt_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->port_map | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->size_bytes | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->virt_addr | 0 |
| PARAM_VALUE | 0 | priv->iface_base | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->max_port_rxqs | 8,32 |
| PARAM_VALUE | 0 | priv->nthreads | 0-9 |
| PARAM_VALUE | 0 | priv->prs_double_vlans | 1-u64max |
| PARAM_VALUE | 0 | priv->prs_shadow | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_spinlock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | priv->swth_base | 4096-ptr_max |
| PARAM_VALUE | 1 | pe | 4086510890966097920 |
| PARAM_VALUE | 1 | pe->index | 1-111 |
| BUF_SIZE | 0 | priv->aggr_txqs | 504 |
| BUF_SIZE | 0 | priv->axi_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->gop_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->mg_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->mg_core_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->pp_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->prs_double_vlans | 100 |
| BUF_SIZE | 0 | priv->prs_shadow | 5120 |
| BUF_SIZE | 0 | priv->sysctrl_base | (-1)-s32max |
| CAPPED_DATA | 0 | priv->nthreads | 1 |
| DATA_SOURCE | 0 | priv | $0 |
| FUZZY_MAX | 0 | priv->max_port_rxqs | 32 |
| BIT_INFO | 0 | priv->max_port_rxqs | 0x0,0x28 |
| HARD_MAX | 0 | priv->max_port_rxqs | 32 |
| MEM_ZERO | 0 | priv->aggr_txqs | |
| MEM_ZERO | 0 | priv->prs_double_vlans | |
| MEM_ZERO | 0 | priv->prs_shadow | |
| MEM_ZERO | 1 | pe | |
| PREEMPT_ADD | |||
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| LOCK2 | bh | ||
| LOCK2 | 0 | &priv->prs_spinlock | |
| TYPE_LOCK | (struct mvpp2)->prs_spinlock |
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_drop_fc() -> mvpp2_prs_hw_write()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | priv | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->aggr_txqs | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->bm_pools | 1-u64max |
| PARAM_VALUE | 0 | priv->bm_pools->buf_num | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->buf_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->dma_addr | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->frag_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->id | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->pkt_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->port_map | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->size_bytes | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->virt_addr | 0 |
| PARAM_VALUE | 0 | priv->iface_base | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->max_port_rxqs | 8,32 |
| PARAM_VALUE | 0 | priv->nthreads | 0-9 |
| PARAM_VALUE | 0 | priv->prs_double_vlans | 1-u64max |
| PARAM_VALUE | 0 | priv->prs_shadow | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_spinlock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | priv->swth_base | 4096-ptr_max |
| PARAM_VALUE | 1 | pe | 4522978697510957056 |
| PARAM_VALUE | 1 | pe->index | 252 |
| BUF_SIZE | 0 | priv->aggr_txqs | 504 |
| BUF_SIZE | 0 | priv->axi_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->gop_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->mg_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->mg_core_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->pp_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->prs_double_vlans | 100 |
| BUF_SIZE | 0 | priv->prs_shadow | 5120 |
| BUF_SIZE | 0 | priv->sysctrl_base | (-1)-s32max |
| CAPPED_DATA | 0 | priv->nthreads | 1 |
| DATA_SOURCE | 0 | priv | $0 |
| FUZZY_MAX | 0 | priv->max_port_rxqs | 32 |
| BIT_INFO | 0 | priv->max_port_rxqs | 0x0,0x28 |
| HARD_MAX | 0 | priv->max_port_rxqs | 32 |
| MEM_ZERO | 0 | priv->aggr_txqs | |
| MEM_ZERO | 0 | priv->prs_double_vlans | |
| MEM_ZERO | 0 | priv->prs_shadow | |
| MEM_ZERO | 1 | pe | |
| PREEMPT_ADD | |||
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| LOCK2 | bh | ||
| LOCK2 | 0 | &priv->prs_spinlock | |
| TYPE_LOCK | (struct mvpp2)->prs_spinlock |
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_dsa_init() -> mvpp2_prs_hw_write()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | priv | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->aggr_txqs | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->axi_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->bm_pools | 1-u64max |
| PARAM_VALUE | 0 | priv->bm_pools->buf_num | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->buf_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->dma_addr | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->frag_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->id | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->pkt_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->port_map | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->size_bytes | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->virt_addr | 0 |
| PARAM_VALUE | 0 | priv->cm3_base | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->gop_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->hw_version | 0 |
| PARAM_VALUE | 0 | priv->iface_base | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->lms_base | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->max_port_rxqs | 8,32 |
| PARAM_VALUE | 0 | priv->mg_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->mg_core_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->nthreads | 0-9 |
| PARAM_VALUE | 0 | priv->percpu_pools | 0-1 |
| PARAM_VALUE | 0 | priv->pp_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_double_vlans | 1-u64max |
| PARAM_VALUE | 0 | priv->prs_shadow | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_spinlock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | priv->sysctrl_base | 0-ptr_max |
| PARAM_VALUE | 1 | pe | 5563481091190947840 |
| PARAM_VALUE | 1 | pe->index | 244 |
| BUF_SIZE | 0 | priv->aggr_txqs | 504 |
| BUF_SIZE | 0 | priv->axi_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->gop_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_core_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->pp_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->prs_double_vlans | 100 |
| BUF_SIZE | 0 | priv->prs_shadow | 5120 |
| BUF_SIZE | 0 | priv->sysctrl_base | (-1)-s32max |
| CAPPED_DATA | 0 | priv->nthreads | 1 |
| DATA_SOURCE | 0 | priv | $0 |
| FUZZY_MAX | 0 | priv->max_port_rxqs | 32 |
| FUZZY_MAX | 0 | priv->percpu_pools | 1 |
| BIT_INFO | 0 | priv->max_port_rxqs | 0x0,0x28 |
| HARD_MAX | 0 | priv->max_port_rxqs | 32 |
| HARD_MAX | 0 | priv->percpu_pools | 1 |
| MEM_ZERO | 0 | priv | |
| MEM_ZERO | 0 | priv->aggr_txqs | |
| MEM_ZERO | 0 | priv->prs_double_vlans | |
| MEM_ZERO | 0 | priv->prs_shadow | |
| MEM_ZERO | 1 | pe | |
| PREEMPT_ADD | |||
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| NO_OVERFLOW_SIMPLE | 0 | priv->axi_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->gop_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_core_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->pp_clk->core->parent->req_rate | |
| LOCK2 | bh | ||
| LOCK2 | 0 | &priv->prs_spinlock | |
| TYPE_LOCK | (struct mvpp2)->prs_spinlock |
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_dsa_tag_ethertype_set() -> mvpp2_prs_hw_write()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | priv | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->aggr_txqs | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->bm_pools | 1-u64max |
| PARAM_VALUE | 0 | priv->bm_pools->buf_num | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->buf_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->dma_addr | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->frag_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->id | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->pkt_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->port_map | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->size_bytes | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->virt_addr | 0 |
| PARAM_VALUE | 0 | priv->iface_base | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->max_port_rxqs | 8,32 |
| PARAM_VALUE | 0 | priv->nthreads | 0-9 |
| PARAM_VALUE | 0 | priv->prs_double_vlans | 1-u64max |
| PARAM_VALUE | 0 | priv->prs_shadow | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_spinlock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | priv->swth_base | 4096-ptr_max |
| PARAM_VALUE | 1 | pe | 4352005569347919872 |
| PARAM_VALUE | 1 | pe->index | 239-242 |
| BUF_SIZE | 0 | priv->aggr_txqs | 504 |
| BUF_SIZE | 0 | priv->axi_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->gop_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->mg_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->mg_core_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->pp_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->prs_double_vlans | 100 |
| BUF_SIZE | 0 | priv->prs_shadow | 5120 |
| BUF_SIZE | 0 | priv->sysctrl_base | (-1)-s32max |
| CAPPED_DATA | 0 | priv->nthreads | 1 |
| DATA_SOURCE | 0 | priv | $0 |
| FUZZY_MAX | 0 | priv->max_port_rxqs | 32 |
| BIT_INFO | 0 | priv->max_port_rxqs | 0x0,0x28 |
| HARD_MAX | 0 | priv->max_port_rxqs | 32 |
| MEM_ZERO | 0 | priv->aggr_txqs | |
| MEM_ZERO | 0 | priv->prs_double_vlans | |
| MEM_ZERO | 0 | priv->prs_shadow | |
| MEM_ZERO | 1 | pe | |
| PREEMPT_ADD | |||
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| LOCK2 | bh | ||
| LOCK2 | 0 | &priv->prs_spinlock | |
| TYPE_LOCK | (struct mvpp2)->prs_spinlock |
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_dsa_tag_set() -> mvpp2_prs_hw_write()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | priv | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->bm_pools->id | 0-63 |
| PARAM_VALUE | 0 | priv->bm_pools->size | 0,16352 |
| PARAM_VALUE | 0 | priv->bm_pools->size_bytes | 0,130816,261632 |
| PARAM_VALUE | 0 | priv->max_port_rxqs | 0,8,32 |
| PARAM_VALUE | 0 | priv->nthreads | 0-9 |
| PARAM_VALUE | 0 | priv->prs_shadow | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_spinlock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 1 | pe | 4953152220360962048 |
| PARAM_VALUE | 1 | pe->index | 235-238 |
| BUF_SIZE | 0 | priv->aggr_txqs | (-1),504 |
| BUF_SIZE | 0 | priv->axi_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->gop_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->mg_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->mg_core_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->pp_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->prs_double_vlans | (-1),100 |
| BUF_SIZE | 0 | priv->prs_shadow | (-1),5120 |
| BUF_SIZE | 0 | priv->sysctrl_base | (-1)-s32max |
| DATA_SOURCE | 0 | priv | $0 |
| FUZZY_MAX | 0 | priv->max_port_rxqs | 32 |
| MEM_ZERO | 1 | pe | |
| PREEMPT_ADD | |||
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| LOCK2 | bh | ||
| LOCK2 | 0 | &priv->prs_spinlock | |
| TYPE_LOCK | (struct mvpp2)->prs_spinlock |
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_etype_init() -> mvpp2_prs_hw_write()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | priv | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->aggr_txqs | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->axi_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->bm_pools | 1-u64max |
| PARAM_VALUE | 0 | priv->bm_pools->buf_num | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->buf_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->dma_addr | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->frag_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->id | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->pkt_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->port_map | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->size_bytes | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->virt_addr | 0 |
| PARAM_VALUE | 0 | priv->cm3_base | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->gop_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->hw_version | 0 |
| PARAM_VALUE | 0 | priv->iface_base | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->lms_base | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->max_port_rxqs | 8,32 |
| PARAM_VALUE | 0 | priv->mg_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->mg_core_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->nthreads | 0-9 |
| PARAM_VALUE | 0 | priv->percpu_pools | 0-1 |
| PARAM_VALUE | 0 | priv->pp_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_double_vlans | 1-u64max |
| PARAM_VALUE | 0 | priv->prs_shadow | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_spinlock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | priv->sysctrl_base | 0-ptr_max |
| PARAM_VALUE | 1 | pe | 6020348862478905344 |
| PARAM_VALUE | 1 | pe->index | 1 |
| BUF_SIZE | 0 | priv->aggr_txqs | 504 |
| BUF_SIZE | 0 | priv->axi_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->gop_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_core_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->pp_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->prs_double_vlans | 100 |
| BUF_SIZE | 0 | priv->prs_shadow | 5120 |
| BUF_SIZE | 0 | priv->sysctrl_base | (-1)-s32max |
| CAPPED_DATA | 0 | priv->nthreads | 1 |
| DATA_SOURCE | 0 | priv | $0 |
| FUZZY_MAX | 0 | priv->max_port_rxqs | 32 |
| FUZZY_MAX | 0 | priv->percpu_pools | 1 |
| BIT_INFO | 0 | priv->max_port_rxqs | 0x0,0x28 |
| HARD_MAX | 0 | priv->max_port_rxqs | 32 |
| HARD_MAX | 0 | priv->percpu_pools | 1 |
| MEM_ZERO | 0 | priv | |
| MEM_ZERO | 0 | priv->aggr_txqs | |
| MEM_ZERO | 0 | priv->prs_double_vlans | |
| MEM_ZERO | 0 | priv->prs_shadow | |
| MEM_ZERO | 1 | pe | |
| PREEMPT_ADD | |||
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| NO_OVERFLOW_SIMPLE | 0 | priv->axi_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->gop_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_core_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->pp_clk->core->parent->req_rate | |
| LOCK2 | bh | ||
| LOCK2 | 0 | &priv->prs_spinlock | |
| TYPE_LOCK | (struct mvpp2)->prs_spinlock |
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_etype_init() -> mvpp2_prs_hw_write()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | priv | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->aggr_txqs | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->axi_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->bm_pools | 1-u64max |
| PARAM_VALUE | 0 | priv->bm_pools->buf_num | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->buf_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->dma_addr | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->frag_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->id | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->pkt_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->port_map | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->size_bytes | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->virt_addr | 0 |
| PARAM_VALUE | 0 | priv->cm3_base | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->gop_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->hw_version | 0 |
| PARAM_VALUE | 0 | priv->iface_base | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->lms_base | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->max_port_rxqs | 8,32 |
| PARAM_VALUE | 0 | priv->mg_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->mg_core_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->nthreads | 0-9 |
| PARAM_VALUE | 0 | priv->percpu_pools | 0-1 |
| PARAM_VALUE | 0 | priv->pp_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_double_vlans | 1-u64max |
| PARAM_VALUE | 0 | priv->prs_shadow | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_spinlock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | priv->sysctrl_base | 0-ptr_max |
| PARAM_VALUE | 1 | pe | 6020348862478905344 |
| PARAM_VALUE | 1 | pe->index | 1 |
| BUF_SIZE | 0 | priv->aggr_txqs | 504 |
| BUF_SIZE | 0 | priv->axi_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->gop_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_core_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->pp_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->prs_double_vlans | 100 |
| BUF_SIZE | 0 | priv->prs_shadow | 5120 |
| BUF_SIZE | 0 | priv->sysctrl_base | (-1)-s32max |
| CAPPED_DATA | 0 | priv->nthreads | 1 |
| DATA_SOURCE | 0 | priv | $0 |
| FUZZY_MAX | 0 | priv->max_port_rxqs | 32 |
| FUZZY_MAX | 0 | priv->percpu_pools | 1 |
| BIT_INFO | 0 | priv->max_port_rxqs | 0x0,0x28 |
| HARD_MAX | 0 | priv->max_port_rxqs | 32 |
| HARD_MAX | 0 | priv->percpu_pools | 1 |
| MEM_ZERO | 0 | priv | |
| MEM_ZERO | 0 | priv->aggr_txqs | |
| MEM_ZERO | 0 | priv->prs_double_vlans | |
| MEM_ZERO | 0 | priv->prs_shadow | |
| MEM_ZERO | 1 | pe | |
| PREEMPT_ADD | |||
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| NO_OVERFLOW_SIMPLE | 0 | priv->axi_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->gop_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_core_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->pp_clk->core->parent->req_rate | |
| LOCK2 | bh | ||
| LOCK2 | 0 | &priv->prs_spinlock | |
| TYPE_LOCK | (struct mvpp2)->prs_spinlock |
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_etype_init() -> mvpp2_prs_hw_write()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | priv | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->aggr_txqs | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->axi_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->bm_pools | 1-u64max |
| PARAM_VALUE | 0 | priv->bm_pools->buf_num | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->buf_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->dma_addr | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->frag_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->id | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->pkt_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->port_map | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->size_bytes | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->virt_addr | 0 |
| PARAM_VALUE | 0 | priv->cm3_base | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->gop_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->hw_version | 0 |
| PARAM_VALUE | 0 | priv->iface_base | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->lms_base | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->max_port_rxqs | 8,32 |
| PARAM_VALUE | 0 | priv->mg_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->mg_core_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->nthreads | 0-9 |
| PARAM_VALUE | 0 | priv->percpu_pools | 0-1 |
| PARAM_VALUE | 0 | priv->pp_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_double_vlans | 1-u64max |
| PARAM_VALUE | 0 | priv->prs_shadow | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_spinlock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | priv->sysctrl_base | 0-ptr_max |
| PARAM_VALUE | 1 | pe | 6020348862478905344 |
| PARAM_VALUE | 1 | pe->index | 1 |
| BUF_SIZE | 0 | priv->aggr_txqs | 504 |
| BUF_SIZE | 0 | priv->axi_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->gop_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_core_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->pp_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->prs_double_vlans | 100 |
| BUF_SIZE | 0 | priv->prs_shadow | 5120 |
| BUF_SIZE | 0 | priv->sysctrl_base | (-1)-s32max |
| CAPPED_DATA | 0 | priv->nthreads | 1 |
| DATA_SOURCE | 0 | priv | $0 |
| FUZZY_MAX | 0 | priv->max_port_rxqs | 32 |
| FUZZY_MAX | 0 | priv->percpu_pools | 1 |
| BIT_INFO | 0 | priv->max_port_rxqs | 0x0,0x28 |
| HARD_MAX | 0 | priv->max_port_rxqs | 32 |
| HARD_MAX | 0 | priv->percpu_pools | 1 |
| MEM_ZERO | 0 | priv | |
| MEM_ZERO | 0 | priv->aggr_txqs | |
| MEM_ZERO | 0 | priv->prs_double_vlans | |
| MEM_ZERO | 0 | priv->prs_shadow | |
| MEM_ZERO | 1 | pe | |
| PREEMPT_ADD | |||
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| NO_OVERFLOW_SIMPLE | 0 | priv->axi_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->gop_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_core_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->pp_clk->core->parent->req_rate | |
| LOCK2 | bh | ||
| LOCK2 | 0 | &priv->prs_spinlock | |
| TYPE_LOCK | (struct mvpp2)->prs_spinlock |
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_etype_init() -> mvpp2_prs_hw_write()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | priv | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->aggr_txqs | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->axi_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->bm_pools | 1-u64max |
| PARAM_VALUE | 0 | priv->bm_pools->buf_num | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->buf_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->dma_addr | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->frag_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->id | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->pkt_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->port_map | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->size_bytes | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->virt_addr | 0 |
| PARAM_VALUE | 0 | priv->cm3_base | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->gop_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->hw_version | 0 |
| PARAM_VALUE | 0 | priv->iface_base | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->lms_base | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->max_port_rxqs | 8,32 |
| PARAM_VALUE | 0 | priv->mg_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->mg_core_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->nthreads | 0-9 |
| PARAM_VALUE | 0 | priv->percpu_pools | 0-1 |
| PARAM_VALUE | 0 | priv->pp_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_double_vlans | 1-u64max |
| PARAM_VALUE | 0 | priv->prs_shadow | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_spinlock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | priv->sysctrl_base | 0-ptr_max |
| PARAM_VALUE | 1 | pe | 6020348862478905344 |
| PARAM_VALUE | 1 | pe->index | 1 |
| BUF_SIZE | 0 | priv->aggr_txqs | 504 |
| BUF_SIZE | 0 | priv->axi_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->gop_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_core_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->pp_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->prs_double_vlans | 100 |
| BUF_SIZE | 0 | priv->prs_shadow | 5120 |
| BUF_SIZE | 0 | priv->sysctrl_base | (-1)-s32max |
| CAPPED_DATA | 0 | priv->nthreads | 1 |
| DATA_SOURCE | 0 | priv | $0 |
| FUZZY_MAX | 0 | priv->max_port_rxqs | 32 |
| FUZZY_MAX | 0 | priv->percpu_pools | 1 |
| BIT_INFO | 0 | priv->max_port_rxqs | 0x0,0x28 |
| HARD_MAX | 0 | priv->max_port_rxqs | 32 |
| HARD_MAX | 0 | priv->percpu_pools | 1 |
| MEM_ZERO | 0 | priv | |
| MEM_ZERO | 0 | priv->aggr_txqs | |
| MEM_ZERO | 0 | priv->prs_double_vlans | |
| MEM_ZERO | 0 | priv->prs_shadow | |
| MEM_ZERO | 1 | pe | |
| PREEMPT_ADD | |||
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| NO_OVERFLOW_SIMPLE | 0 | priv->axi_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->gop_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_core_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->pp_clk->core->parent->req_rate | |
| LOCK2 | bh | ||
| LOCK2 | 0 | &priv->prs_spinlock | |
| TYPE_LOCK | (struct mvpp2)->prs_spinlock |
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_etype_init() -> mvpp2_prs_hw_write()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | priv | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->aggr_txqs | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->axi_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->bm_pools | 1-u64max |
| PARAM_VALUE | 0 | priv->bm_pools->buf_num | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->buf_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->dma_addr | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->frag_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->id | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->pkt_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->port_map | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->size_bytes | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->virt_addr | 0 |
| PARAM_VALUE | 0 | priv->cm3_base | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->gop_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->hw_version | 0 |
| PARAM_VALUE | 0 | priv->iface_base | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->lms_base | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->max_port_rxqs | 8,32 |
| PARAM_VALUE | 0 | priv->mg_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->mg_core_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->nthreads | 0-9 |
| PARAM_VALUE | 0 | priv->percpu_pools | 0-1 |
| PARAM_VALUE | 0 | priv->pp_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_double_vlans | 1-u64max |
| PARAM_VALUE | 0 | priv->prs_shadow | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_spinlock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | priv->sysctrl_base | 0-ptr_max |
| PARAM_VALUE | 1 | pe | 6020348862478905344 |
| PARAM_VALUE | 1 | pe->index | 1 |
| BUF_SIZE | 0 | priv->aggr_txqs | 504 |
| BUF_SIZE | 0 | priv->axi_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->gop_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_core_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->pp_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->prs_double_vlans | 100 |
| BUF_SIZE | 0 | priv->prs_shadow | 5120 |
| BUF_SIZE | 0 | priv->sysctrl_base | (-1)-s32max |
| CAPPED_DATA | 0 | priv->nthreads | 1 |
| DATA_SOURCE | 0 | priv | $0 |
| FUZZY_MAX | 0 | priv->max_port_rxqs | 32 |
| FUZZY_MAX | 0 | priv->percpu_pools | 1 |
| BIT_INFO | 0 | priv->max_port_rxqs | 0x0,0x28 |
| HARD_MAX | 0 | priv->max_port_rxqs | 32 |
| HARD_MAX | 0 | priv->percpu_pools | 1 |
| MEM_ZERO | 0 | priv | |
| MEM_ZERO | 0 | priv->aggr_txqs | |
| MEM_ZERO | 0 | priv->prs_double_vlans | |
| MEM_ZERO | 0 | priv->prs_shadow | |
| MEM_ZERO | 1 | pe | |
| PREEMPT_ADD | |||
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| NO_OVERFLOW_SIMPLE | 0 | priv->axi_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->gop_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_core_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->pp_clk->core->parent->req_rate | |
| LOCK2 | bh | ||
| LOCK2 | 0 | &priv->prs_spinlock | |
| TYPE_LOCK | (struct mvpp2)->prs_spinlock |
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_etype_init() -> mvpp2_prs_hw_write()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | priv | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->aggr_txqs | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->axi_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->bm_pools | 1-u64max |
| PARAM_VALUE | 0 | priv->bm_pools->buf_num | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->buf_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->dma_addr | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->frag_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->id | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->pkt_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->port_map | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->size_bytes | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->virt_addr | 0 |
| PARAM_VALUE | 0 | priv->cm3_base | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->gop_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->hw_version | 0 |
| PARAM_VALUE | 0 | priv->iface_base | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->lms_base | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->max_port_rxqs | 8,32 |
| PARAM_VALUE | 0 | priv->mg_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->mg_core_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->nthreads | 0-9 |
| PARAM_VALUE | 0 | priv->percpu_pools | 0-1 |
| PARAM_VALUE | 0 | priv->pp_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_double_vlans | 1-u64max |
| PARAM_VALUE | 0 | priv->prs_shadow | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_spinlock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | priv->sysctrl_base | 0-ptr_max |
| PARAM_VALUE | 1 | pe | 6020348862478905344 |
| PARAM_VALUE | 1 | pe->index | 247 |
| BUF_SIZE | 0 | priv->aggr_txqs | 504 |
| BUF_SIZE | 0 | priv->axi_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->gop_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_core_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->pp_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->prs_double_vlans | 100 |
| BUF_SIZE | 0 | priv->prs_shadow | 5120 |
| BUF_SIZE | 0 | priv->sysctrl_base | (-1)-s32max |
| CAPPED_DATA | 0 | priv->nthreads | 1 |
| DATA_SOURCE | 0 | priv | $0 |
| FUZZY_MAX | 0 | priv->max_port_rxqs | 32 |
| FUZZY_MAX | 0 | priv->percpu_pools | 1 |
| BIT_INFO | 0 | priv->max_port_rxqs | 0x0,0x28 |
| HARD_MAX | 0 | priv->max_port_rxqs | 32 |
| HARD_MAX | 0 | priv->percpu_pools | 1 |
| MEM_ZERO | 0 | priv | |
| MEM_ZERO | 0 | priv->aggr_txqs | |
| MEM_ZERO | 0 | priv->prs_double_vlans | |
| MEM_ZERO | 0 | priv->prs_shadow | |
| MEM_ZERO | 1 | pe | |
| PREEMPT_ADD | |||
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| NO_OVERFLOW_SIMPLE | 0 | priv->axi_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->gop_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_core_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->pp_clk->core->parent->req_rate | |
| LOCK2 | bh | ||
| LOCK2 | 0 | &priv->prs_spinlock | |
| TYPE_LOCK | (struct mvpp2)->prs_spinlock |
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_ip4_cast() -> mvpp2_prs_hw_write()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | priv | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->aggr_txqs | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->bm_pools | 1-u64max |
| PARAM_VALUE | 0 | priv->bm_pools->buf_num | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->buf_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->dma_addr | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->frag_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->id | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->pkt_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->port_map | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->size_bytes | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->virt_addr | 0 |
| PARAM_VALUE | 0 | priv->iface_base | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->max_port_rxqs | 8,32 |
| PARAM_VALUE | 0 | priv->nthreads | 0-9 |
| PARAM_VALUE | 0 | priv->prs_double_vlans | 1-u64max |
| PARAM_VALUE | 0 | priv->prs_shadow | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_spinlock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | priv->swth_base | 4096-ptr_max |
| PARAM_VALUE | 1 | pe | 2736999958787665920 |
| PARAM_VALUE | 1 | pe->index | 1 |
| BUF_SIZE | 0 | priv->aggr_txqs | 504 |
| BUF_SIZE | 0 | priv->axi_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->gop_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->mg_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->mg_core_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->pp_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->prs_double_vlans | 100 |
| BUF_SIZE | 0 | priv->prs_shadow | 5120 |
| BUF_SIZE | 0 | priv->sysctrl_base | (-1)-s32max |
| CAPPED_DATA | 0 | priv->nthreads | 1 |
| DATA_SOURCE | 0 | priv | $0 |
| FUZZY_MAX | 0 | priv->max_port_rxqs | 32 |
| BIT_INFO | 0 | priv->max_port_rxqs | 0x0,0x28 |
| HARD_MAX | 0 | priv->max_port_rxqs | 32 |
| MEM_ZERO | 0 | priv->aggr_txqs | |
| MEM_ZERO | 0 | priv->prs_double_vlans | |
| MEM_ZERO | 0 | priv->prs_shadow | |
| MEM_ZERO | 1 | pe | |
| PREEMPT_ADD | |||
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| LOCK2 | bh | ||
| LOCK2 | 0 | &priv->prs_spinlock | |
| TYPE_LOCK | (struct mvpp2)->prs_spinlock |
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_ip4_init() -> mvpp2_prs_hw_write()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | priv | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->aggr_txqs | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->axi_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->bm_pools | 1-u64max |
| PARAM_VALUE | 0 | priv->bm_pools->buf_num | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->buf_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->dma_addr | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->frag_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->id | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->pkt_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->port_map | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->size_bytes | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->virt_addr | 0 |
| PARAM_VALUE | 0 | priv->cm3_base | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->gop_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->hw_version | 0 |
| PARAM_VALUE | 0 | priv->iface_base | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->lms_base | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->max_port_rxqs | 8,32 |
| PARAM_VALUE | 0 | priv->mg_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->mg_core_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->nthreads | 0-9 |
| PARAM_VALUE | 0 | priv->percpu_pools | 0-1 |
| PARAM_VALUE | 0 | priv->pp_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_double_vlans | 1-u64max |
| PARAM_VALUE | 0 | priv->prs_shadow | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_spinlock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | priv->sysctrl_base | 0-ptr_max |
| PARAM_VALUE | 1 | pe | 4334746765092249600 |
| PARAM_VALUE | 1 | pe->index | 246 |
| BUF_SIZE | 0 | priv->aggr_txqs | 504 |
| BUF_SIZE | 0 | priv->axi_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->gop_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_core_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->pp_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->prs_double_vlans | 100 |
| BUF_SIZE | 0 | priv->prs_shadow | 5120 |
| BUF_SIZE | 0 | priv->sysctrl_base | (-1)-s32max |
| CAPPED_DATA | 0 | priv->nthreads | 1 |
| DATA_SOURCE | 0 | priv | $0 |
| FUZZY_MAX | 0 | priv->max_port_rxqs | 32 |
| FUZZY_MAX | 0 | priv->percpu_pools | 1 |
| BIT_INFO | 0 | priv->max_port_rxqs | 0x0,0x28 |
| HARD_MAX | 0 | priv->max_port_rxqs | 32 |
| HARD_MAX | 0 | priv->percpu_pools | 1 |
| MEM_ZERO | 0 | priv | |
| MEM_ZERO | 0 | priv->aggr_txqs | |
| MEM_ZERO | 0 | priv->prs_double_vlans | |
| MEM_ZERO | 0 | priv->prs_shadow | |
| MEM_ZERO | 1 | pe | |
| PREEMPT_ADD | |||
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| NO_OVERFLOW_SIMPLE | 0 | priv->axi_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->gop_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_core_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->pp_clk->core->parent->req_rate | |
| LOCK2 | bh | ||
| LOCK2 | 0 | &priv->prs_spinlock | |
| TYPE_LOCK | (struct mvpp2)->prs_spinlock |
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_ip4_init() -> mvpp2_prs_hw_write()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | priv | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->aggr_txqs | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->axi_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->bm_pools | 1-u64max |
| PARAM_VALUE | 0 | priv->bm_pools->buf_num | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->buf_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->dma_addr | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->frag_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->id | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->pkt_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->port_map | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->size_bytes | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->virt_addr | 0 |
| PARAM_VALUE | 0 | priv->cm3_base | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->gop_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->hw_version | 0 |
| PARAM_VALUE | 0 | priv->iface_base | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->lms_base | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->max_port_rxqs | 8,32 |
| PARAM_VALUE | 0 | priv->mg_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->mg_core_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->nthreads | 0-9 |
| PARAM_VALUE | 0 | priv->percpu_pools | 0-1 |
| PARAM_VALUE | 0 | priv->pp_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_double_vlans | 1-u64max |
| PARAM_VALUE | 0 | priv->prs_shadow | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_spinlock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | priv->sysctrl_base | 0-ptr_max |
| PARAM_VALUE | 1 | pe | 4334746765092249600 |
| PARAM_VALUE | 1 | pe->index | 228 |
| BUF_SIZE | 0 | priv->aggr_txqs | 504 |
| BUF_SIZE | 0 | priv->axi_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->gop_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_core_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->pp_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->prs_double_vlans | 100 |
| BUF_SIZE | 0 | priv->prs_shadow | 5120 |
| BUF_SIZE | 0 | priv->sysctrl_base | (-1)-s32max |
| CAPPED_DATA | 0 | priv->nthreads | 1 |
| DATA_SOURCE | 0 | priv | $0 |
| FUZZY_MAX | 0 | priv->max_port_rxqs | 32 |
| FUZZY_MAX | 0 | priv->percpu_pools | 1 |
| BIT_INFO | 0 | priv->max_port_rxqs | 0x0,0x28 |
| HARD_MAX | 0 | priv->max_port_rxqs | 32 |
| HARD_MAX | 0 | priv->percpu_pools | 1 |
| MEM_ZERO | 0 | priv | |
| MEM_ZERO | 0 | priv->aggr_txqs | |
| MEM_ZERO | 0 | priv->prs_double_vlans | |
| MEM_ZERO | 0 | priv->prs_shadow | |
| MEM_ZERO | 1 | pe | |
| PREEMPT_ADD | |||
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| NO_OVERFLOW_SIMPLE | 0 | priv->axi_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->gop_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_core_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->pp_clk->core->parent->req_rate | |
| LOCK2 | bh | ||
| LOCK2 | 0 | &priv->prs_spinlock | |
| TYPE_LOCK | (struct mvpp2)->prs_spinlock |
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_ip4_proto() -> mvpp2_prs_hw_write()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | priv | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->aggr_txqs | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->bm_pools | 1-u64max |
| PARAM_VALUE | 0 | priv->bm_pools->buf_num | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->buf_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->dma_addr | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->frag_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->id | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->pkt_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->port_map | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->size_bytes | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->virt_addr | 0 |
| PARAM_VALUE | 0 | priv->iface_base | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->max_port_rxqs | 8,32 |
| PARAM_VALUE | 0 | priv->nthreads | 0-9 |
| PARAM_VALUE | 0 | priv->prs_double_vlans | 1-u64max |
| PARAM_VALUE | 0 | priv->prs_shadow | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_spinlock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | priv->swth_base | 4096-ptr_max |
| PARAM_VALUE | 1 | pe | 3184683941490450432 |
| PARAM_VALUE | 1 | pe->index | 1 |
| BUF_SIZE | 0 | priv->aggr_txqs | 504 |
| BUF_SIZE | 0 | priv->axi_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->gop_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->mg_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->mg_core_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->pp_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->prs_double_vlans | 100 |
| BUF_SIZE | 0 | priv->prs_shadow | 5120 |
| BUF_SIZE | 0 | priv->sysctrl_base | (-1)-s32max |
| CAPPED_DATA | 0 | priv->nthreads | 1 |
| DATA_SOURCE | 0 | priv | $0 |
| FUZZY_MAX | 0 | priv->max_port_rxqs | 32 |
| BIT_INFO | 0 | priv->max_port_rxqs | 0x0,0x28 |
| HARD_MAX | 0 | priv->max_port_rxqs | 32 |
| MEM_ZERO | 0 | priv->aggr_txqs | |
| MEM_ZERO | 0 | priv->prs_double_vlans | |
| MEM_ZERO | 0 | priv->prs_shadow | |
| MEM_ZERO | 1 | pe | |
| PREEMPT_ADD | |||
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| LOCK2 | bh | ||
| LOCK2 | 0 | &priv->prs_spinlock | |
| TYPE_LOCK | (struct mvpp2)->prs_spinlock |
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_ip4_proto() -> mvpp2_prs_hw_write()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | priv | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->aggr_txqs | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->bm_pools | 1-u64max |
| PARAM_VALUE | 0 | priv->bm_pools->buf_num | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->buf_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->dma_addr | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->frag_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->id | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->pkt_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->port_map | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->size_bytes | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->virt_addr | 0 |
| PARAM_VALUE | 0 | priv->iface_base | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->max_port_rxqs | 8,32 |
| PARAM_VALUE | 0 | priv->nthreads | 0-9 |
| PARAM_VALUE | 0 | priv->prs_double_vlans | 1-u64max |
| PARAM_VALUE | 0 | priv->prs_shadow | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_spinlock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | priv->swth_base | 4096-ptr_max |
| PARAM_VALUE | 1 | pe | 3184683941490450432 |
| PARAM_VALUE | 1 | pe->index | 1 |
| BUF_SIZE | 0 | priv->aggr_txqs | 504 |
| BUF_SIZE | 0 | priv->axi_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->gop_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->mg_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->mg_core_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->pp_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->prs_double_vlans | 100 |
| BUF_SIZE | 0 | priv->prs_shadow | 5120 |
| BUF_SIZE | 0 | priv->sysctrl_base | (-1)-s32max |
| CAPPED_DATA | 0 | priv->nthreads | 1 |
| DATA_SOURCE | 0 | priv | $0 |
| FUZZY_MAX | 0 | priv->max_port_rxqs | 32 |
| BIT_INFO | 0 | priv->max_port_rxqs | 0x0,0x28 |
| HARD_MAX | 0 | priv->max_port_rxqs | 32 |
| MEM_ZERO | 0 | priv->aggr_txqs | |
| MEM_ZERO | 0 | priv->prs_double_vlans | |
| MEM_ZERO | 0 | priv->prs_shadow | |
| MEM_ZERO | 1 | pe | |
| PREEMPT_ADD | |||
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| LOCK2 | bh | ||
| LOCK2 | 0 | &priv->prs_spinlock | |
| TYPE_LOCK | (struct mvpp2)->prs_spinlock |
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_ip6_cast() -> mvpp2_prs_hw_write()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | priv | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->aggr_txqs | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->bm_pools | 1-u64max |
| PARAM_VALUE | 0 | priv->bm_pools->buf_num | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->buf_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->dma_addr | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->frag_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->id | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->pkt_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->port_map | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->size_bytes | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->virt_addr | 0 |
| PARAM_VALUE | 0 | priv->iface_base | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->max_port_rxqs | 8,32 |
| PARAM_VALUE | 0 | priv->nthreads | 0-9 |
| PARAM_VALUE | 0 | priv->prs_double_vlans | 1-u64max |
| PARAM_VALUE | 0 | priv->prs_shadow | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_spinlock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | priv->swth_base | 4096-ptr_max |
| PARAM_VALUE | 1 | pe | 3409190429578313728 |
| PARAM_VALUE | 1 | pe->index | 1 |
| BUF_SIZE | 0 | priv->aggr_txqs | 504 |
| BUF_SIZE | 0 | priv->axi_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->gop_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->mg_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->mg_core_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->pp_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->prs_double_vlans | 100 |
| BUF_SIZE | 0 | priv->prs_shadow | 5120 |
| BUF_SIZE | 0 | priv->sysctrl_base | (-1)-s32max |
| CAPPED_DATA | 0 | priv->nthreads | 1 |
| DATA_SOURCE | 0 | priv | $0 |
| FUZZY_MAX | 0 | priv->max_port_rxqs | 32 |
| BIT_INFO | 0 | priv->max_port_rxqs | 0x0,0x28 |
| HARD_MAX | 0 | priv->max_port_rxqs | 32 |
| MEM_ZERO | 0 | priv->aggr_txqs | |
| MEM_ZERO | 0 | priv->prs_double_vlans | |
| MEM_ZERO | 0 | priv->prs_shadow | |
| MEM_ZERO | 1 | pe | |
| PREEMPT_ADD | |||
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| LOCK2 | bh | ||
| LOCK2 | 0 | &priv->prs_spinlock | |
| TYPE_LOCK | (struct mvpp2)->prs_spinlock |
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_ip6_init() -> mvpp2_prs_hw_write()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | priv | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->aggr_txqs | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->axi_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->bm_pools | 1-u64max |
| PARAM_VALUE | 0 | priv->bm_pools->buf_num | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->buf_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->dma_addr | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->frag_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->id | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->pkt_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->port_map | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->size_bytes | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->virt_addr | 0 |
| PARAM_VALUE | 0 | priv->cm3_base | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->gop_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->hw_version | 0 |
| PARAM_VALUE | 0 | priv->iface_base | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->lms_base | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->max_port_rxqs | 8,32 |
| PARAM_VALUE | 0 | priv->mg_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->mg_core_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->nthreads | 0-9 |
| PARAM_VALUE | 0 | priv->percpu_pools | 0-1 |
| PARAM_VALUE | 0 | priv->pp_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_double_vlans | 1-u64max |
| PARAM_VALUE | 0 | priv->prs_shadow | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_spinlock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | priv->sysctrl_base | 0-ptr_max |
| PARAM_VALUE | 1 | pe | 6077879296518840320 |
| PARAM_VALUE | 1 | pe->index | 1 |
| BUF_SIZE | 0 | priv->aggr_txqs | 504 |
| BUF_SIZE | 0 | priv->axi_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->gop_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_core_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->pp_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->prs_double_vlans | 100 |
| BUF_SIZE | 0 | priv->prs_shadow | 5120 |
| BUF_SIZE | 0 | priv->sysctrl_base | (-1)-s32max |
| CAPPED_DATA | 0 | priv->nthreads | 1 |
| DATA_SOURCE | 0 | priv | $0 |
| FUZZY_MAX | 0 | priv->max_port_rxqs | 32 |
| FUZZY_MAX | 0 | priv->percpu_pools | 1 |
| BIT_INFO | 0 | priv->max_port_rxqs | 0x0,0x28 |
| HARD_MAX | 0 | priv->max_port_rxqs | 32 |
| HARD_MAX | 0 | priv->percpu_pools | 1 |
| MEM_ZERO | 0 | priv | |
| MEM_ZERO | 0 | priv->aggr_txqs | |
| MEM_ZERO | 0 | priv->prs_double_vlans | |
| MEM_ZERO | 0 | priv->prs_shadow | |
| MEM_ZERO | 1 | pe | |
| PREEMPT_ADD | |||
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| NO_OVERFLOW_SIMPLE | 0 | priv->axi_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->gop_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_core_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->pp_clk->core->parent->req_rate | |
| LOCK2 | bh | ||
| LOCK2 | 0 | &priv->prs_spinlock | |
| TYPE_LOCK | (struct mvpp2)->prs_spinlock |
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_ip6_init() -> mvpp2_prs_hw_write()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | priv | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->aggr_txqs | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->axi_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->bm_pools | 1-u64max |
| PARAM_VALUE | 0 | priv->bm_pools->buf_num | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->buf_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->dma_addr | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->frag_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->id | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->pkt_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->port_map | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->size_bytes | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->virt_addr | 0 |
| PARAM_VALUE | 0 | priv->cm3_base | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->gop_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->hw_version | 0 |
| PARAM_VALUE | 0 | priv->iface_base | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->lms_base | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->max_port_rxqs | 8,32 |
| PARAM_VALUE | 0 | priv->mg_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->mg_core_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->nthreads | 0-9 |
| PARAM_VALUE | 0 | priv->percpu_pools | 0-1 |
| PARAM_VALUE | 0 | priv->pp_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_double_vlans | 1-u64max |
| PARAM_VALUE | 0 | priv->prs_shadow | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_spinlock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | priv->sysctrl_base | 0-ptr_max |
| PARAM_VALUE | 1 | pe | 6077879296518840320 |
| PARAM_VALUE | 1 | pe->index | 245 |
| BUF_SIZE | 0 | priv->aggr_txqs | 504 |
| BUF_SIZE | 0 | priv->axi_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->gop_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_core_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->pp_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->prs_double_vlans | 100 |
| BUF_SIZE | 0 | priv->prs_shadow | 5120 |
| BUF_SIZE | 0 | priv->sysctrl_base | (-1)-s32max |
| CAPPED_DATA | 0 | priv->nthreads | 1 |
| DATA_SOURCE | 0 | priv | $0 |
| FUZZY_MAX | 0 | priv->max_port_rxqs | 32 |
| FUZZY_MAX | 0 | priv->percpu_pools | 1 |
| BIT_INFO | 0 | priv->max_port_rxqs | 0x0,0x28 |
| HARD_MAX | 0 | priv->max_port_rxqs | 32 |
| HARD_MAX | 0 | priv->percpu_pools | 1 |
| MEM_ZERO | 0 | priv | |
| MEM_ZERO | 0 | priv->aggr_txqs | |
| MEM_ZERO | 0 | priv->prs_double_vlans | |
| MEM_ZERO | 0 | priv->prs_shadow | |
| MEM_ZERO | 1 | pe | |
| PREEMPT_ADD | |||
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| NO_OVERFLOW_SIMPLE | 0 | priv->axi_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->gop_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_core_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->pp_clk->core->parent->req_rate | |
| LOCK2 | bh | ||
| LOCK2 | 0 | &priv->prs_spinlock | |
| TYPE_LOCK | (struct mvpp2)->prs_spinlock |
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_ip6_init() -> mvpp2_prs_hw_write()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | priv | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->aggr_txqs | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->axi_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->bm_pools | 1-u64max |
| PARAM_VALUE | 0 | priv->bm_pools->buf_num | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->buf_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->dma_addr | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->frag_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->id | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->pkt_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->port_map | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->size_bytes | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->virt_addr | 0 |
| PARAM_VALUE | 0 | priv->cm3_base | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->gop_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->hw_version | 0 |
| PARAM_VALUE | 0 | priv->iface_base | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->lms_base | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->max_port_rxqs | 8,32 |
| PARAM_VALUE | 0 | priv->mg_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->mg_core_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->nthreads | 0-9 |
| PARAM_VALUE | 0 | priv->percpu_pools | 0-1 |
| PARAM_VALUE | 0 | priv->pp_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_double_vlans | 1-u64max |
| PARAM_VALUE | 0 | priv->prs_shadow | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_spinlock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | priv->sysctrl_base | 0-ptr_max |
| PARAM_VALUE | 1 | pe | 6077879296518840320 |
| PARAM_VALUE | 1 | pe->index | 226 |
| BUF_SIZE | 0 | priv->aggr_txqs | 504 |
| BUF_SIZE | 0 | priv->axi_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->gop_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_core_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->pp_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->prs_double_vlans | 100 |
| BUF_SIZE | 0 | priv->prs_shadow | 5120 |
| BUF_SIZE | 0 | priv->sysctrl_base | (-1)-s32max |
| CAPPED_DATA | 0 | priv->nthreads | 1 |
| DATA_SOURCE | 0 | priv | $0 |
| FUZZY_MAX | 0 | priv->max_port_rxqs | 32 |
| FUZZY_MAX | 0 | priv->percpu_pools | 1 |
| BIT_INFO | 0 | priv->max_port_rxqs | 0x0,0x28 |
| HARD_MAX | 0 | priv->max_port_rxqs | 32 |
| HARD_MAX | 0 | priv->percpu_pools | 1 |
| MEM_ZERO | 0 | priv | |
| MEM_ZERO | 0 | priv->aggr_txqs | |
| MEM_ZERO | 0 | priv->prs_double_vlans | |
| MEM_ZERO | 0 | priv->prs_shadow | |
| MEM_ZERO | 1 | pe | |
| PREEMPT_ADD | |||
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| NO_OVERFLOW_SIMPLE | 0 | priv->axi_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->gop_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_core_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->pp_clk->core->parent->req_rate | |
| LOCK2 | bh | ||
| LOCK2 | 0 | &priv->prs_spinlock | |
| TYPE_LOCK | (struct mvpp2)->prs_spinlock |
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_ip6_init() -> mvpp2_prs_hw_write()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | priv | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->aggr_txqs | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->axi_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->bm_pools | 1-u64max |
| PARAM_VALUE | 0 | priv->bm_pools->buf_num | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->buf_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->dma_addr | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->frag_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->id | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->pkt_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->port_map | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->size_bytes | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->virt_addr | 0 |
| PARAM_VALUE | 0 | priv->cm3_base | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->gop_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->hw_version | 0 |
| PARAM_VALUE | 0 | priv->iface_base | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->lms_base | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->max_port_rxqs | 8,32 |
| PARAM_VALUE | 0 | priv->mg_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->mg_core_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->nthreads | 0-9 |
| PARAM_VALUE | 0 | priv->percpu_pools | 0-1 |
| PARAM_VALUE | 0 | priv->pp_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_double_vlans | 1-u64max |
| PARAM_VALUE | 0 | priv->prs_shadow | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_spinlock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | priv->sysctrl_base | 0-ptr_max |
| PARAM_VALUE | 1 | pe | 6077879296518840320 |
| PARAM_VALUE | 1 | pe->index | 227 |
| BUF_SIZE | 0 | priv->aggr_txqs | 504 |
| BUF_SIZE | 0 | priv->axi_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->gop_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_core_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->pp_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->prs_double_vlans | 100 |
| BUF_SIZE | 0 | priv->prs_shadow | 5120 |
| BUF_SIZE | 0 | priv->sysctrl_base | (-1)-s32max |
| CAPPED_DATA | 0 | priv->nthreads | 1 |
| DATA_SOURCE | 0 | priv | $0 |
| FUZZY_MAX | 0 | priv->max_port_rxqs | 32 |
| FUZZY_MAX | 0 | priv->percpu_pools | 1 |
| BIT_INFO | 0 | priv->max_port_rxqs | 0x0,0x28 |
| HARD_MAX | 0 | priv->max_port_rxqs | 32 |
| HARD_MAX | 0 | priv->percpu_pools | 1 |
| MEM_ZERO | 0 | priv | |
| MEM_ZERO | 0 | priv->aggr_txqs | |
| MEM_ZERO | 0 | priv->prs_double_vlans | |
| MEM_ZERO | 0 | priv->prs_shadow | |
| MEM_ZERO | 1 | pe | |
| PREEMPT_ADD | |||
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| NO_OVERFLOW_SIMPLE | 0 | priv->axi_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->gop_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_core_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->pp_clk->core->parent->req_rate | |
| LOCK2 | bh | ||
| LOCK2 | 0 | &priv->prs_spinlock | |
| TYPE_LOCK | (struct mvpp2)->prs_spinlock |
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_ip6_proto() -> mvpp2_prs_hw_write()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | priv | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->aggr_txqs | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->bm_pools | 1-u64max |
| PARAM_VALUE | 0 | priv->bm_pools->buf_num | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->buf_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->dma_addr | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->frag_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->id | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->pkt_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->port_map | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->size_bytes | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->virt_addr | 0 |
| PARAM_VALUE | 0 | priv->iface_base | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->max_port_rxqs | 8,32 |
| PARAM_VALUE | 0 | priv->nthreads | 0-9 |
| PARAM_VALUE | 0 | priv->prs_double_vlans | 1-u64max |
| PARAM_VALUE | 0 | priv->prs_shadow | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_spinlock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | priv->swth_base | 4096-ptr_max |
| PARAM_VALUE | 1 | pe | 72253909496639488 |
| PARAM_VALUE | 1 | pe->index | 1 |
| BUF_SIZE | 0 | priv->aggr_txqs | 504 |
| BUF_SIZE | 0 | priv->axi_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->gop_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->mg_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->mg_core_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->pp_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->prs_double_vlans | 100 |
| BUF_SIZE | 0 | priv->prs_shadow | 5120 |
| BUF_SIZE | 0 | priv->sysctrl_base | (-1)-s32max |
| CAPPED_DATA | 0 | priv->nthreads | 1 |
| DATA_SOURCE | 0 | priv | $0 |
| FUZZY_MAX | 0 | priv->max_port_rxqs | 32 |
| BIT_INFO | 0 | priv->max_port_rxqs | 0x0,0x28 |
| HARD_MAX | 0 | priv->max_port_rxqs | 32 |
| MEM_ZERO | 0 | priv->aggr_txqs | |
| MEM_ZERO | 0 | priv->prs_double_vlans | |
| MEM_ZERO | 0 | priv->prs_shadow | |
| MEM_ZERO | 1 | pe | |
| PREEMPT_ADD | |||
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| LOCK2 | bh | ||
| LOCK2 | 0 | &priv->prs_spinlock | |
| TYPE_LOCK | (struct mvpp2)->prs_spinlock |
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_mac_drop_all_set() -> mvpp2_prs_hw_write()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | priv | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->aggr_txqs | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->bm_pools | 1-u64max |
| PARAM_VALUE | 0 | priv->bm_pools->buf_num | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->buf_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->dma_addr | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->frag_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->id | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->pkt_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->port_map | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->size_bytes | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->virt_addr | 0 |
| PARAM_VALUE | 0 | priv->iface_base | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->max_port_rxqs | 8,32 |
| PARAM_VALUE | 0 | priv->nthreads | 0-9 |
| PARAM_VALUE | 0 | priv->prs_double_vlans | 1-u64max |
| PARAM_VALUE | 0 | priv->prs_shadow | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_spinlock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | priv->swth_base | 4096-ptr_max |
| PARAM_VALUE | 1 | pe | 3879522055080284160 |
| PARAM_VALUE | 1 | pe->index | 0 |
| BUF_SIZE | 0 | priv->aggr_txqs | 504 |
| BUF_SIZE | 0 | priv->axi_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->gop_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->mg_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->mg_core_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->pp_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->prs_double_vlans | 100 |
| BUF_SIZE | 0 | priv->prs_shadow | 5120 |
| BUF_SIZE | 0 | priv->sysctrl_base | (-1)-s32max |
| CAPPED_DATA | 0 | priv->nthreads | 1 |
| DATA_SOURCE | 0 | priv | $0 |
| FUZZY_MAX | 0 | priv->max_port_rxqs | 32 |
| BIT_INFO | 0 | priv->max_port_rxqs | 0x0,0x28 |
| HARD_MAX | 0 | priv->max_port_rxqs | 32 |
| MEM_ZERO | 0 | priv->aggr_txqs | |
| MEM_ZERO | 0 | priv->prs_double_vlans | |
| MEM_ZERO | 0 | priv->prs_shadow | |
| MEM_ZERO | 1 | pe | |
| PREEMPT_ADD | |||
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| LOCK2 | bh | ||
| LOCK2 | 0 | &priv->prs_spinlock | |
| TYPE_LOCK | (struct mvpp2)->prs_spinlock |
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_mac_init() -> mvpp2_prs_hw_write()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | priv | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->aggr_txqs | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->axi_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->bm_pools | 1-u64max |
| PARAM_VALUE | 0 | priv->bm_pools->buf_num | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->buf_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->dma_addr | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->frag_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->id | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->pkt_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->port_map | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->size_bytes | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->virt_addr | 0 |
| PARAM_VALUE | 0 | priv->cm3_base | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->gop_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->hw_version | 0 |
| PARAM_VALUE | 0 | priv->iface_base | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->lms_base | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->max_port_rxqs | 8,32 |
| PARAM_VALUE | 0 | priv->mg_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->mg_core_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->nthreads | 0-9 |
| PARAM_VALUE | 0 | priv->percpu_pools | 0-1 |
| PARAM_VALUE | 0 | priv->pp_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_double_vlans | 1-u64max |
| PARAM_VALUE | 0 | priv->prs_shadow | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_spinlock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | priv->sysctrl_base | 0-ptr_max |
| PARAM_VALUE | 1 | pe | 4970396584856748032 |
| PARAM_VALUE | 1 | pe->index | 255 |
| BUF_SIZE | 0 | priv->aggr_txqs | 504 |
| BUF_SIZE | 0 | priv->axi_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->gop_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_core_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->pp_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->prs_double_vlans | 100 |
| BUF_SIZE | 0 | priv->prs_shadow | 5120 |
| BUF_SIZE | 0 | priv->sysctrl_base | (-1)-s32max |
| CAPPED_DATA | 0 | priv->nthreads | 1 |
| DATA_SOURCE | 0 | priv | $0 |
| FUZZY_MAX | 0 | priv->max_port_rxqs | 32 |
| FUZZY_MAX | 0 | priv->percpu_pools | 1 |
| BIT_INFO | 0 | priv->max_port_rxqs | 0x0,0x28 |
| HARD_MAX | 0 | priv->max_port_rxqs | 32 |
| HARD_MAX | 0 | priv->percpu_pools | 1 |
| MEM_ZERO | 0 | priv | |
| MEM_ZERO | 0 | priv->aggr_txqs | |
| MEM_ZERO | 0 | priv->prs_double_vlans | |
| MEM_ZERO | 0 | priv->prs_shadow | |
| MEM_ZERO | 1 | pe | |
| PREEMPT_ADD | |||
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| NO_OVERFLOW_SIMPLE | 0 | priv->axi_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->gop_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_core_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->pp_clk->core->parent->req_rate | |
| LOCK2 | bh | ||
| LOCK2 | 0 | &priv->prs_spinlock | |
| TYPE_LOCK | (struct mvpp2)->prs_spinlock |
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_mh_init() -> mvpp2_prs_hw_write()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | priv | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->aggr_txqs | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->axi_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->bm_pools | 1-u64max |
| PARAM_VALUE | 0 | priv->bm_pools->buf_num | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->buf_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->dma_addr | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->frag_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->id | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->pkt_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->port_map | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->size_bytes | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->virt_addr | 0 |
| PARAM_VALUE | 0 | priv->cm3_base | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->gop_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->hw_version | 0 |
| PARAM_VALUE | 0 | priv->iface_base | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->lms_base | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->max_port_rxqs | 8,32 |
| PARAM_VALUE | 0 | priv->mg_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->mg_core_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->nthreads | 0-9 |
| PARAM_VALUE | 0 | priv->percpu_pools | 0-1 |
| PARAM_VALUE | 0 | priv->pp_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_double_vlans | 1-u64max |
| PARAM_VALUE | 0 | priv->prs_shadow | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_spinlock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | priv->sysctrl_base | 0-ptr_max |
| PARAM_VALUE | 1 | pe | 965187905653493760 |
| PARAM_VALUE | 1 | pe->index | 243 |
| BUF_SIZE | 0 | priv->aggr_txqs | 504 |
| BUF_SIZE | 0 | priv->axi_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->gop_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_core_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->pp_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->prs_double_vlans | 100 |
| BUF_SIZE | 0 | priv->prs_shadow | 5120 |
| BUF_SIZE | 0 | priv->sysctrl_base | (-1)-s32max |
| CAPPED_DATA | 0 | priv->nthreads | 1 |
| DATA_SOURCE | 0 | priv | $0 |
| FUZZY_MAX | 0 | priv->max_port_rxqs | 32 |
| FUZZY_MAX | 0 | priv->percpu_pools | 1 |
| BIT_INFO | 0 | priv->max_port_rxqs | 0x0,0x28 |
| HARD_MAX | 0 | priv->max_port_rxqs | 32 |
| HARD_MAX | 0 | priv->percpu_pools | 1 |
| MEM_ZERO | 0 | priv | |
| MEM_ZERO | 0 | priv->aggr_txqs | |
| MEM_ZERO | 0 | priv->prs_double_vlans | |
| MEM_ZERO | 0 | priv->prs_shadow | |
| MEM_ZERO | 1 | pe | |
| PREEMPT_ADD | |||
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| NO_OVERFLOW_SIMPLE | 0 | priv->axi_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->gop_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_core_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->pp_clk->core->parent->req_rate | |
| LOCK2 | bh | ||
| LOCK2 | 0 | &priv->prs_spinlock | |
| TYPE_LOCK | (struct mvpp2)->prs_spinlock |
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_mh_init() -> mvpp2_prs_hw_write()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | priv | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->aggr_txqs | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->axi_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->bm_pools | 1-u64max |
| PARAM_VALUE | 0 | priv->bm_pools->buf_num | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->buf_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->dma_addr | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->frag_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->id | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->pkt_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->port_map | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->size_bytes | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->virt_addr | 0 |
| PARAM_VALUE | 0 | priv->cm3_base | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->gop_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->hw_version | 0 |
| PARAM_VALUE | 0 | priv->iface_base | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->lms_base | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->max_port_rxqs | 8,32 |
| PARAM_VALUE | 0 | priv->mg_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->mg_core_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->nthreads | 0-9 |
| PARAM_VALUE | 0 | priv->percpu_pools | 0-1 |
| PARAM_VALUE | 0 | priv->pp_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_double_vlans | 1-u64max |
| PARAM_VALUE | 0 | priv->prs_shadow | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_spinlock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | priv->sysctrl_base | 0-ptr_max |
| PARAM_VALUE | 1 | pe | 965187905653493760 |
| PARAM_VALUE | 1 | pe->index | 225 |
| BUF_SIZE | 0 | priv->aggr_txqs | 504 |
| BUF_SIZE | 0 | priv->axi_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->gop_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_core_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->pp_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->prs_double_vlans | 100 |
| BUF_SIZE | 0 | priv->prs_shadow | 5120 |
| BUF_SIZE | 0 | priv->sysctrl_base | (-1)-s32max |
| CAPPED_DATA | 0 | priv->nthreads | 1 |
| DATA_SOURCE | 0 | priv | $0 |
| FUZZY_MAX | 0 | priv->max_port_rxqs | 32 |
| FUZZY_MAX | 0 | priv->percpu_pools | 1 |
| BIT_INFO | 0 | priv->max_port_rxqs | 0x0,0x28 |
| HARD_MAX | 0 | priv->max_port_rxqs | 32 |
| HARD_MAX | 0 | priv->percpu_pools | 1 |
| MEM_ZERO | 0 | priv | |
| MEM_ZERO | 0 | priv->aggr_txqs | |
| MEM_ZERO | 0 | priv->prs_double_vlans | |
| MEM_ZERO | 0 | priv->prs_shadow | |
| MEM_ZERO | 1 | pe | |
| PREEMPT_ADD | |||
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| NO_OVERFLOW_SIMPLE | 0 | priv->axi_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->gop_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_core_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->pp_clk->core->parent->req_rate | |
| LOCK2 | bh | ||
| LOCK2 | 0 | &priv->prs_spinlock | |
| TYPE_LOCK | (struct mvpp2)->prs_spinlock |
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_pppoe_init() -> mvpp2_prs_hw_write()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | priv | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->aggr_txqs | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->axi_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->bm_pools | 1-u64max |
| PARAM_VALUE | 0 | priv->bm_pools->buf_num | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->buf_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->dma_addr | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->frag_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->id | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->pkt_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->port_map | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->size_bytes | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->virt_addr | 0 |
| PARAM_VALUE | 0 | priv->cm3_base | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->gop_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->hw_version | 0 |
| PARAM_VALUE | 0 | priv->iface_base | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->lms_base | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->max_port_rxqs | 8,32 |
| PARAM_VALUE | 0 | priv->mg_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->mg_core_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->nthreads | 0-9 |
| PARAM_VALUE | 0 | priv->percpu_pools | 0-1 |
| PARAM_VALUE | 0 | priv->pp_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_double_vlans | 1-u64max |
| PARAM_VALUE | 0 | priv->prs_shadow | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_spinlock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | priv->sysctrl_base | 0-ptr_max |
| PARAM_VALUE | 1 | pe | 4019841646639550464 |
| PARAM_VALUE | 1 | pe->index | 1 |
| BUF_SIZE | 0 | priv->aggr_txqs | 504 |
| BUF_SIZE | 0 | priv->axi_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->gop_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_core_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->pp_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->prs_double_vlans | 100 |
| BUF_SIZE | 0 | priv->prs_shadow | 5120 |
| BUF_SIZE | 0 | priv->sysctrl_base | (-1)-s32max |
| CAPPED_DATA | 0 | priv->nthreads | 1 |
| DATA_SOURCE | 0 | priv | $0 |
| FUZZY_MAX | 0 | priv->max_port_rxqs | 32 |
| FUZZY_MAX | 0 | priv->percpu_pools | 1 |
| BIT_INFO | 0 | priv->max_port_rxqs | 0x0,0x28 |
| HARD_MAX | 0 | priv->max_port_rxqs | 32 |
| HARD_MAX | 0 | priv->percpu_pools | 1 |
| MEM_ZERO | 0 | priv | |
| MEM_ZERO | 0 | priv->aggr_txqs | |
| MEM_ZERO | 0 | priv->prs_double_vlans | |
| MEM_ZERO | 0 | priv->prs_shadow | |
| MEM_ZERO | 1 | pe | |
| PREEMPT_ADD | |||
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| NO_OVERFLOW_SIMPLE | 0 | priv->axi_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->gop_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_core_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->pp_clk->core->parent->req_rate | |
| LOCK2 | bh | ||
| LOCK2 | 0 | &priv->prs_spinlock | |
| TYPE_LOCK | (struct mvpp2)->prs_spinlock |
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_pppoe_init() -> mvpp2_prs_hw_write()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | priv | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->aggr_txqs | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->axi_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->bm_pools | 1-u64max |
| PARAM_VALUE | 0 | priv->bm_pools->buf_num | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->buf_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->dma_addr | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->frag_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->id | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->pkt_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->port_map | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->size_bytes | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->virt_addr | 0 |
| PARAM_VALUE | 0 | priv->cm3_base | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->gop_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->hw_version | 0 |
| PARAM_VALUE | 0 | priv->iface_base | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->lms_base | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->max_port_rxqs | 8,32 |
| PARAM_VALUE | 0 | priv->mg_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->mg_core_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->nthreads | 0-9 |
| PARAM_VALUE | 0 | priv->percpu_pools | 0-1 |
| PARAM_VALUE | 0 | priv->pp_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_double_vlans | 1-u64max |
| PARAM_VALUE | 0 | priv->prs_shadow | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_spinlock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | priv->sysctrl_base | 0-ptr_max |
| PARAM_VALUE | 1 | pe | 4019841646639550464 |
| PARAM_VALUE | 1 | pe->index | 1 |
| BUF_SIZE | 0 | priv->aggr_txqs | 504 |
| BUF_SIZE | 0 | priv->axi_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->gop_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_core_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->pp_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->prs_double_vlans | 100 |
| BUF_SIZE | 0 | priv->prs_shadow | 5120 |
| BUF_SIZE | 0 | priv->sysctrl_base | (-1)-s32max |
| CAPPED_DATA | 0 | priv->nthreads | 1 |
| DATA_SOURCE | 0 | priv | $0 |
| FUZZY_MAX | 0 | priv->max_port_rxqs | 32 |
| FUZZY_MAX | 0 | priv->percpu_pools | 1 |
| BIT_INFO | 0 | priv->max_port_rxqs | 0x0,0x28 |
| HARD_MAX | 0 | priv->max_port_rxqs | 32 |
| HARD_MAX | 0 | priv->percpu_pools | 1 |
| MEM_ZERO | 0 | priv | |
| MEM_ZERO | 0 | priv->aggr_txqs | |
| MEM_ZERO | 0 | priv->prs_double_vlans | |
| MEM_ZERO | 0 | priv->prs_shadow | |
| MEM_ZERO | 1 | pe | |
| PREEMPT_ADD | |||
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| NO_OVERFLOW_SIMPLE | 0 | priv->axi_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->gop_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_core_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->pp_clk->core->parent->req_rate | |
| LOCK2 | bh | ||
| LOCK2 | 0 | &priv->prs_spinlock | |
| TYPE_LOCK | (struct mvpp2)->prs_spinlock |
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_pppoe_init() -> mvpp2_prs_hw_write()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | priv | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->aggr_txqs | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->axi_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->bm_pools | 1-u64max |
| PARAM_VALUE | 0 | priv->bm_pools->buf_num | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->buf_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->dma_addr | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->frag_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->id | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->pkt_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->port_map | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->size_bytes | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->virt_addr | 0 |
| PARAM_VALUE | 0 | priv->cm3_base | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->gop_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->hw_version | 0 |
| PARAM_VALUE | 0 | priv->iface_base | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->lms_base | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->max_port_rxqs | 8,32 |
| PARAM_VALUE | 0 | priv->mg_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->mg_core_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->nthreads | 0-9 |
| PARAM_VALUE | 0 | priv->percpu_pools | 0-1 |
| PARAM_VALUE | 0 | priv->pp_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_double_vlans | 1-u64max |
| PARAM_VALUE | 0 | priv->prs_shadow | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_spinlock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | priv->sysctrl_base | 0-ptr_max |
| PARAM_VALUE | 1 | pe | 4019841646639550464 |
| PARAM_VALUE | 1 | pe->index | 1 |
| BUF_SIZE | 0 | priv->aggr_txqs | 504 |
| BUF_SIZE | 0 | priv->axi_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->gop_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_core_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->pp_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->prs_double_vlans | 100 |
| BUF_SIZE | 0 | priv->prs_shadow | 5120 |
| BUF_SIZE | 0 | priv->sysctrl_base | (-1)-s32max |
| CAPPED_DATA | 0 | priv->nthreads | 1 |
| DATA_SOURCE | 0 | priv | $0 |
| FUZZY_MAX | 0 | priv->max_port_rxqs | 32 |
| FUZZY_MAX | 0 | priv->percpu_pools | 1 |
| BIT_INFO | 0 | priv->max_port_rxqs | 0x0,0x28 |
| HARD_MAX | 0 | priv->max_port_rxqs | 32 |
| HARD_MAX | 0 | priv->percpu_pools | 1 |
| MEM_ZERO | 0 | priv | |
| MEM_ZERO | 0 | priv->aggr_txqs | |
| MEM_ZERO | 0 | priv->prs_double_vlans | |
| MEM_ZERO | 0 | priv->prs_shadow | |
| MEM_ZERO | 1 | pe | |
| PREEMPT_ADD | |||
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| NO_OVERFLOW_SIMPLE | 0 | priv->axi_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->gop_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_core_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->pp_clk->core->parent->req_rate | |
| LOCK2 | bh | ||
| LOCK2 | 0 | &priv->prs_spinlock | |
| TYPE_LOCK | (struct mvpp2)->prs_spinlock |
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_vid_enable_filtering() -> mvpp2_prs_hw_write()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | priv | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_shadow | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_spinlock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 1 | pe | 3147553324451065856 |
| MEM_ZERO | 1 | pe | |
| PREEMPT_ADD | <- disables preempt | ||
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| LOCK2 | bh | ||
| LOCK2 | 0 | &priv->prs_spinlock | |
| HALF_LOCKED2 | global &rtnl_mutex | ||
| TYPE_LOCK | (struct mvpp2)->prs_spinlock |
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_vid_entry_add() -> mvpp2_prs_hw_write()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | priv | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_shadow | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_spinlock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 1 | pe | 962073587783770112 |
| PARAM_VALUE | 1 | pe->index | 0-255 |
| MEM_ZERO | 1 | pe | |
| PREEMPT_ADD | <- disables preempt | ||
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| LOCK2 | bh | ||
| LOCK2 | 0 | &priv->prs_spinlock | |
| TYPE_LOCK | (struct mvpp2)->prs_spinlock |
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_vid_init() -> mvpp2_prs_hw_write()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | priv | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->aggr_txqs | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->axi_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->bm_pools | 1-u64max |
| PARAM_VALUE | 0 | priv->bm_pools->buf_num | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->buf_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->dma_addr | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->frag_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->id | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->pkt_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->port_map | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->size_bytes | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->virt_addr | 0 |
| PARAM_VALUE | 0 | priv->cm3_base | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->gop_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->hw_version | 0 |
| PARAM_VALUE | 0 | priv->iface_base | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->lms_base | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->max_port_rxqs | 8,32 |
| PARAM_VALUE | 0 | priv->mg_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->mg_core_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->nthreads | 0-9 |
| PARAM_VALUE | 0 | priv->percpu_pools | 0-1 |
| PARAM_VALUE | 0 | priv->pp_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_double_vlans | 1-u64max |
| PARAM_VALUE | 0 | priv->prs_shadow | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_spinlock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | priv->sysctrl_base | 0-ptr_max |
| PARAM_VALUE | 1 | pe | 9113014881668296704 |
| PARAM_VALUE | 1 | pe->index | 248 |
| BUF_SIZE | 0 | priv->aggr_txqs | 504 |
| BUF_SIZE | 0 | priv->axi_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->gop_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_core_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->pp_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->prs_double_vlans | 100 |
| BUF_SIZE | 0 | priv->prs_shadow | 5120 |
| BUF_SIZE | 0 | priv->sysctrl_base | (-1)-s32max |
| CAPPED_DATA | 0 | priv->nthreads | 1 |
| DATA_SOURCE | 0 | priv | $0 |
| FUZZY_MAX | 0 | priv->max_port_rxqs | 32 |
| FUZZY_MAX | 0 | priv->percpu_pools | 1 |
| BIT_INFO | 0 | priv->max_port_rxqs | 0x0,0x28 |
| HARD_MAX | 0 | priv->max_port_rxqs | 32 |
| HARD_MAX | 0 | priv->percpu_pools | 1 |
| MEM_ZERO | 0 | priv | |
| MEM_ZERO | 0 | priv->aggr_txqs | |
| MEM_ZERO | 0 | priv->prs_double_vlans | |
| MEM_ZERO | 0 | priv->prs_shadow | |
| MEM_ZERO | 1 | pe | |
| PREEMPT_ADD | |||
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| NO_OVERFLOW_SIMPLE | 0 | priv->axi_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->gop_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_core_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->pp_clk->core->parent->req_rate | |
| LOCK2 | bh | ||
| LOCK2 | 0 | &priv->prs_spinlock | |
| TYPE_LOCK | (struct mvpp2)->prs_spinlock |
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_vid_init() -> mvpp2_prs_hw_write()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | priv | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->aggr_txqs | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->axi_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->bm_pools | 1-u64max |
| PARAM_VALUE | 0 | priv->bm_pools->buf_num | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->buf_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->dma_addr | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->frag_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->id | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->pkt_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->port_map | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->size_bytes | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->virt_addr | 0 |
| PARAM_VALUE | 0 | priv->cm3_base | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->gop_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->hw_version | 0 |
| PARAM_VALUE | 0 | priv->iface_base | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->lms_base | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->max_port_rxqs | 8,32 |
| PARAM_VALUE | 0 | priv->mg_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->mg_core_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->nthreads | 0-9 |
| PARAM_VALUE | 0 | priv->percpu_pools | 0-1 |
| PARAM_VALUE | 0 | priv->pp_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_double_vlans | 1-u64max |
| PARAM_VALUE | 0 | priv->prs_shadow | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_spinlock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | priv->sysctrl_base | 0-ptr_max |
| PARAM_VALUE | 1 | pe | 9113014881668296704 |
| PARAM_VALUE | 1 | pe->index | 249 |
| BUF_SIZE | 0 | priv->aggr_txqs | 504 |
| BUF_SIZE | 0 | priv->axi_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->gop_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_core_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->pp_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->prs_double_vlans | 100 |
| BUF_SIZE | 0 | priv->prs_shadow | 5120 |
| BUF_SIZE | 0 | priv->sysctrl_base | (-1)-s32max |
| CAPPED_DATA | 0 | priv->nthreads | 1 |
| DATA_SOURCE | 0 | priv | $0 |
| FUZZY_MAX | 0 | priv->max_port_rxqs | 32 |
| FUZZY_MAX | 0 | priv->percpu_pools | 1 |
| BIT_INFO | 0 | priv->max_port_rxqs | 0x0,0x28 |
| HARD_MAX | 0 | priv->max_port_rxqs | 32 |
| HARD_MAX | 0 | priv->percpu_pools | 1 |
| MEM_ZERO | 0 | priv | |
| MEM_ZERO | 0 | priv->aggr_txqs | |
| MEM_ZERO | 0 | priv->prs_double_vlans | |
| MEM_ZERO | 0 | priv->prs_shadow | |
| MEM_ZERO | 1 | pe | |
| PREEMPT_ADD | |||
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| NO_OVERFLOW_SIMPLE | 0 | priv->axi_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->gop_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_core_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->pp_clk->core->parent->req_rate | |
| LOCK2 | bh | ||
| LOCK2 | 0 | &priv->prs_spinlock | |
| TYPE_LOCK | (struct mvpp2)->prs_spinlock |
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_vlan_add() -> mvpp2_prs_hw_write()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | priv | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->aggr_txqs | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->bm_pools | 1-u64max |
| PARAM_VALUE | 0 | priv->bm_pools->buf_num | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->buf_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->dma_addr | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->frag_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->id | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->pkt_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->port_map | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->size_bytes | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->virt_addr | 0 |
| PARAM_VALUE | 0 | priv->iface_base | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->max_port_rxqs | 8,32 |
| PARAM_VALUE | 0 | priv->nthreads | 0-9 |
| PARAM_VALUE | 0 | priv->prs_double_vlans | 1-u64max |
| PARAM_VALUE | 0 | priv->prs_shadow | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_spinlock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | priv->swth_base | 4096-ptr_max |
| PARAM_VALUE | 1 | pe | 2522427410274926592 |
| PARAM_VALUE | 1 | pe->index | 1-111 |
| BUF_SIZE | 0 | priv->aggr_txqs | 504 |
| BUF_SIZE | 0 | priv->axi_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->gop_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->mg_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->mg_core_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->pp_clk | (-1),1-s32max |
| BUF_SIZE | 0 | priv->prs_double_vlans | 100 |
| BUF_SIZE | 0 | priv->prs_shadow | 5120 |
| BUF_SIZE | 0 | priv->sysctrl_base | (-1)-s32max |
| CAPPED_DATA | 0 | priv->nthreads | 1 |
| DATA_SOURCE | 0 | priv | $0 |
| FUZZY_MAX | 0 | priv->max_port_rxqs | 32 |
| BIT_INFO | 0 | priv->max_port_rxqs | 0x0,0x28 |
| HARD_MAX | 0 | priv->max_port_rxqs | 32 |
| MEM_ZERO | 0 | priv->aggr_txqs | |
| MEM_ZERO | 0 | priv->prs_double_vlans | |
| MEM_ZERO | 0 | priv->prs_shadow | |
| MEM_ZERO | 1 | pe | |
| PREEMPT_ADD | |||
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| LOCK2 | bh | ||
| LOCK2 | 0 | &priv->prs_spinlock | |
| TYPE_LOCK | (struct mvpp2)->prs_spinlock |
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_vlan_init() -> mvpp2_prs_hw_write()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | priv | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->aggr_txqs | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->axi_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->bm_pools | 1-u64max |
| PARAM_VALUE | 0 | priv->bm_pools->buf_num | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->buf_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->dma_addr | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->frag_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->id | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->pkt_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->port_map | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->size_bytes | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->virt_addr | 0 |
| PARAM_VALUE | 0 | priv->cm3_base | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->gop_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->hw_version | 0 |
| PARAM_VALUE | 0 | priv->iface_base | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->lms_base | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->max_port_rxqs | 8,32 |
| PARAM_VALUE | 0 | priv->mg_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->mg_core_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->nthreads | 0-9 |
| PARAM_VALUE | 0 | priv->percpu_pools | 0-1 |
| PARAM_VALUE | 0 | priv->pp_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_double_vlans | 1-u64max |
| PARAM_VALUE | 0 | priv->prs_shadow | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_spinlock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | priv->sysctrl_base | 0-ptr_max |
| PARAM_VALUE | 1 | pe | 1629319460482756608 |
| PARAM_VALUE | 1 | pe->index | 250 |
| BUF_SIZE | 0 | priv->aggr_txqs | 504 |
| BUF_SIZE | 0 | priv->axi_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->gop_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_core_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->pp_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->prs_double_vlans | 100 |
| BUF_SIZE | 0 | priv->prs_shadow | 5120 |
| BUF_SIZE | 0 | priv->sysctrl_base | (-1)-s32max |
| CAPPED_DATA | 0 | priv->nthreads | 1 |
| DATA_SOURCE | 0 | priv | $1 |
| FUZZY_MAX | 0 | priv->max_port_rxqs | 32 |
| FUZZY_MAX | 0 | priv->percpu_pools | 1 |
| BIT_INFO | 0 | priv->max_port_rxqs | 0x0,0x28 |
| HARD_MAX | 0 | priv->max_port_rxqs | 32 |
| HARD_MAX | 0 | priv->percpu_pools | 1 |
| MEM_ZERO | 0 | priv | |
| MEM_ZERO | 0 | priv->aggr_txqs | |
| MEM_ZERO | 0 | priv->prs_double_vlans | |
| MEM_ZERO | 0 | priv->prs_shadow | |
| MEM_ZERO | 1 | pe | |
| PREEMPT_ADD | |||
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| NO_OVERFLOW_SIMPLE | 0 | priv->axi_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->gop_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_core_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->pp_clk->core->parent->req_rate | |
| LOCK2 | bh | ||
| LOCK2 | 0 | &priv->prs_spinlock | |
| TYPE_LOCK | (struct mvpp2)->prs_spinlock |
drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c mvpp2_prs_vlan_init() -> mvpp2_prs_hw_write()
| Type | Parameter | Key | Value |
|---|---|---|---|
| PARAM_VALUE | 0 | priv | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->aggr_txqs | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->axi_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->bm_pools | 1-u64max |
| PARAM_VALUE | 0 | priv->bm_pools->buf_num | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->buf_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->dma_addr | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->frag_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->id | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->pkt_size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->port_map | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->size | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->size_bytes | 0 |
| PARAM_VALUE | 0 | priv->bm_pools->virt_addr | 0 |
| PARAM_VALUE | 0 | priv->cm3_base | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->gop_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->hw_version | 0 |
| PARAM_VALUE | 0 | priv->iface_base | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->lms_base | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->max_port_rxqs | 8,32 |
| PARAM_VALUE | 0 | priv->mg_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->mg_core_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->nthreads | 0-9 |
| PARAM_VALUE | 0 | priv->percpu_pools | 0-1 |
| PARAM_VALUE | 0 | priv->pp_clk | 0,4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_double_vlans | 1-u64max |
| PARAM_VALUE | 0 | priv->prs_shadow | 4096-ptr_max |
| PARAM_VALUE | 0 | priv->prs_spinlock.rlock.dep_map->name | 0-255 |
| PARAM_VALUE | 0 | priv->sysctrl_base | 0-ptr_max |
| PARAM_VALUE | 1 | pe | 1629319460482756608 |
| PARAM_VALUE | 1 | pe->index | 251 |
| BUF_SIZE | 0 | priv->aggr_txqs | 504 |
| BUF_SIZE | 0 | priv->axi_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->gop_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->mg_core_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->pp_clk | (-1)-s32max |
| BUF_SIZE | 0 | priv->prs_double_vlans | 100 |
| BUF_SIZE | 0 | priv->prs_shadow | 5120 |
| BUF_SIZE | 0 | priv->sysctrl_base | (-1)-s32max |
| CAPPED_DATA | 0 | priv->nthreads | 1 |
| DATA_SOURCE | 0 | priv | $1 |
| FUZZY_MAX | 0 | priv->max_port_rxqs | 32 |
| FUZZY_MAX | 0 | priv->percpu_pools | 1 |
| BIT_INFO | 0 | priv->max_port_rxqs | 0x0,0x28 |
| HARD_MAX | 0 | priv->max_port_rxqs | 32 |
| HARD_MAX | 0 | priv->percpu_pools | 1 |
| MEM_ZERO | 0 | priv | |
| MEM_ZERO | 0 | priv->aggr_txqs | |
| MEM_ZERO | 0 | priv->prs_double_vlans | |
| MEM_ZERO | 0 | priv->prs_shadow | |
| MEM_ZERO | 1 | pe | |
| PREEMPT_ADD | |||
| RX_PATH | |||
| TASK_NOT_RUNNING | |||
| NOCHECK_CALL | |||
| NO_OVERFLOW_SIMPLE | 0 | priv->axi_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->gop_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->mg_core_clk->core->parent->req_rate | |
| NO_OVERFLOW_SIMPLE | 0 | priv->pp_clk->core->parent->req_rate | |
| LOCK2 | bh | ||
| LOCK2 | 0 | &priv->prs_spinlock | |
| TYPE_LOCK | (struct mvpp2)->prs_spinlock |