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Defined in 1 files as a prototype:

Defined in 1 files as a function:

Referenced in 2 files:

Smatch caller information:

drivers/net/wireless/mediatek/mt76/mt7996/dma.c mt7996_dma_enable() -> mt7996_dma_start()

Type Parameter Key Value
PARAM_VALUE 0 dev 4096-ptr_max
PARAM_VALUE 0 dev->hif2->speed 0-255
PARAM_VALUE 0 dev->hif2->width 0-s32max
PARAM_VALUE 0 dev->mt76.bus 4096-ptr_max
PARAM_VALUE 0 dev->mt76.bus->rmw 4096-ptr_max
PARAM_VALUE 0 dev->mt76.bus->rr 4096-ptr_max
PARAM_VALUE 0 dev->mt76.dev 4096-ptr_max
PARAM_VALUE 0 dev->mt76.dma_dev->cma_area->available_count 0-s64max
PARAM_VALUE 0 dev->mt76.dma_dev->cma_area->nranges s32min-s32max
PARAM_VALUE 0 dev->mt76.drv->rx_check 0,4096-ptr_max
PARAM_VALUE 0 dev->mt76.drv->sta_ps 0,4096-ptr_max
PARAM_VALUE 0 dev->mt76.q_rx 4096-ptr_max
PARAM_VALUE 0 dev->mt76.queue_ops 4096-ptr_max
PARAM_VALUE 0 dev->mt76.queue_ops->alloc 0,4096-ptr_max
PARAM_VALUE 0 dev->mt76.queue_ops->dequeue 0
PARAM_VALUE 0 dev->mt76.queue_ops->init 0,5701030900122525696
PARAM_VALUE 0 dev->mt76.queue_ops->kick 5531295452590358528,5670636873677549568,8083338665798123520
PARAM_VALUE 0 dev->mt76.queue_ops->reset_q 0,4096-ptr_max
PARAM_VALUE 0 dev->mt76.queue_ops->rx_cleanup 0,1325129280109801472
PARAM_VALUE 0 dev->mt76.queue_ops->rx_queue_init 0,6447196424567136256
PARAM_VALUE 0 dev->mt76.queue_ops->rx_reset 0,3913084583414751232
PARAM_VALUE 0 dev->mt76.queue_ops->tx_cleanup 0,740481638872236032
PARAM_VALUE 0 dev->mt76.queue_ops->tx_queue_skb 291027769529466880,3169668587421933568,3648645348619886592
PARAM_VALUE 0 dev->mt76.queue_ops->tx_queue_skb_raw 0,2076218637392773120,8484283273268027392
PARAM_VALUE 0 dev->mt76.tx_napi.dev 4096-ptr_max
PARAM_VALUE 0 dev->mt76.tx_napi.dev->lock.dep_map->name 0-255
PARAM_VALUE 0 dev->mt76.tx_napi.dev->lock.first_waiter->list.prev->next 5159360019465732096
PARAM_VALUE 0 dev->mt76.tx_napi.dev->lock.first_waiter->list.prev->prev 5159360019465732096
PARAM_VALUE 0 dev->mt76.tx_napi.dev->lock.first_waiter->task->blocked_lock.dep_map->name 0-255
PARAM_VALUE 0 dev->mt76.tx_napi.dev->lock.first_waiter->task->blocked_lock.owner (-1)
PARAM_VALUE 0 dev->mt76.tx_napi.dev->lock.first_waiter->task->blocked_lock.owner_cpu 4294967295
PARAM_VALUE 0 dev->mt76.tx_napi.dev->lock.first_waiter->task->blocked_lock.raw_lock.val.counter s32min-s32max
PARAM_VALUE 0 dev->mt76.tx_napi.dev->lock.first_waiter->task->usage.refs.counter s32min-s32max
PARAM_VALUE 0 dev->mt76.tx_napi.napi_hash_node.pprev 0,4096-ptr_max
PARAM_VALUE 0 dev->mt76.tx_napi.timer.is_queued 0
PARAM_VALUE 0 dev->mt76.tx_napi.timer.node.node.next 0
PARAM_VALUE 0 dev->mt76.tx_napi.timer.node.node.prev 0
PARAM_VALUE 0 *dev->mt76.tx_napi_dev->name 0-255
PARAM_VALUE 2 wed_reset 1
BUF_SIZE 0 dev->mt76.phy.priv (-1),13440
BUF_SIZE 0 dev->phy.mt76 (-1),2952
CAPPED_DATA 0 dev->mt76.tx_napi.timer.base 1
DATA_SOURCE 0 dev $0
DATA_SOURCE 1 reset $1
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
HOST_DATA 0 dev->mt76->sdio.func->tmpbuf 0-255
HOST_DATA 0 dev->mt76.mmio.irqmask 0-u32max[c]
HOST_DATA 0 dev->mt76.rx_token.idr_rt.xa_flags 0-u32max
HOST_DATA 0 dev->mt76.rxfilter 0-u32max
HOST_DATA 0 dev->mt76.token.idr_rt.xa_flags 0,67108864-u32max
HOST_DATA 0 dev->phy.dev->mt76.mmio.irqmask 0-u32max[c]
HOST_DATA 0 dev->phy.dev->mt76.rx_token.idr_rt.xa_flags 0,4-u32max
HOST_DATA 0 dev->phy.dev->mt76.rxfilter 0-u32max
HOST_DATA 0 dev->phy.dev->mt76.token.idr_rt.xa_flags 0,67108864-u32max
HALF_LOCKED2 &pool->lock
HALF_LOCKED2 0 &dev->mt76.mutex