mt7925_mcu_set_rxfilter identifier - Linux source code next-20260811

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linux

Versions

FIXME
- FIXME
  - next-20260811

Defined in 1 files as a prototype:

drivers/net/wireless/mediatek/mt76/mt7925/mt7925.h, line 298 (as a prototype)

Defined in 1 files as a function:

drivers/net/wireless/mediatek/mt76/mt7925/mcu.c, line 4116 (as a function)

Referenced in 2 files:

Smatch caller information:

drivers/net/wireless/mediatek/mt76/mt7925/mcu.c mt7925_mcu_set_beacon_filter() -> mt7925_mcu_set_rxfilter()

Type	Parameter	Key	Value
PARAM_VALUE	0	dev	4096-ptr_max
PARAM_VALUE	1	fif	0
PARAM_VALUE	2	bit_op	1
PARAM_VALUE	3	bit_map	2048
BUF_SIZE	0	dev	s32min-(-1),1-s32max
BUF_SIZE	0	dev	s32min-(-1),1-s32max
DATA_SOURCE	0	dev	$0
RX_PATH
TASK_NOT_RUNNING
USER_DATA	0	dev->aspm_supported	0-1[u]
USER_DATA	0	dev->backup_l1	0-u32max[u]
USER_DATA	0	dev->backup_l2	0-u32max[u]
USER_DATA	0	dev->coredump.last_activity	0-u64max[u]
USER_DATA	0	dev->coredump.msg_list.qlen	0-u32max[u]
USER_DATA	0	dev->coredump.work.cpu	s32min-s32max[u]
USER_DATA	0	dev->coredump.work.timer.expires	0-u64max[u]
USER_DATA	0	dev->coredump.work.timer.flags	0-u32max[u]
USER_DATA	0	dev->coredump.work.work.data.counter	s64min-s64max[u]
USER_DATA	0	dev->country_ie_env	0-u32max[u]
USER_DATA	0	dev->fw_assert	0-1[u]
USER_DATA	0	dev->fw_debug	0-255[u]
USER_DATA	0	dev->fw_features	0-255[u]
USER_DATA	0	dev->has_eht	0-1[u]
USER_DATA	0	dev->hif_idle	0-1[u]
USER_DATA	0	dev->hif_resumed	0-1[u]
USER_DATA	0	dev->hw_full_reset	0-1[u]
USER_DATA	0	dev->hw_init_done	0-1[u]
USER_DATA	0	dev->init_work.data.counter	s64min-s64max[u]
USER_DATA	0	dev->ipv6_ns_list.qlen	0-u32max[u]
USER_DATA	0	dev->ipv6_ns_work.data.counter	s64min-s64max[u]
USER_DATA	0	dev->mlo_pm_work.cpu	s32min-s32max[u]
USER_DATA	0	dev->mlo_pm_work.timer.expires	0-u64max[u]
USER_DATA	0	dev->mlo_pm_work.timer.flags	0-u32max[u]
USER_DATA	0	dev->mlo_pm_work.work.data.counter	s64min-s64max[u]
USER_DATA	0	dev->mphy.antenna_mask	0-255[u]
USER_DATA	0	dev->mphy.band_idx	0-255[u]
USER_DATA	0	dev->mphy.cap.has_2ghz	0-1[u]
USER_DATA	0	dev->mphy.cap.has_5ghz	0-1[u]
USER_DATA	0	dev->mphy.cap.has_6ghz	0-1[u]
USER_DATA	0	dev->mphy.chainmask	0-u16max[u]
USER_DATA	0	dev->mphy.chandef.center_freq1	0-u32max[u]
USER_DATA	0	dev->mphy.chandef.center_freq2	0-u32max[u]
USER_DATA	0	dev->mphy.chandef.edmg.bw_config	0-u32max[u]
USER_DATA	0	dev->mphy.chandef.edmg.channels	0-255[u]
USER_DATA	0	dev->mphy.chandef.freq1_offset	0-u16max[u]
USER_DATA	0	dev->mphy.chandef.npca_punctured	0-u16max[u]
USER_DATA	0	dev->mphy.chandef.punctured	0-u16max[u]
USER_DATA	0	dev->mphy.chandef.s1g_primary_2mhz	0-1[u]
USER_DATA	0	dev->mphy.chandef.width	0-u32max[u]
USER_DATA	0	dev->mphy.dfs_state	0-u32max[u]
USER_DATA	0	dev->mphy.leds.al	0-1[u]
USER_DATA	0	dev->mphy.leds.cdev.activated	0-1[u]
USER_DATA	0	dev->mphy.leds.cdev.blink_brightness	s32min-s32max[u]
USER_DATA	0	dev->mphy.leds.cdev.blink_delay_off	0-u64max[u]
USER_DATA	0	dev->mphy.leds.cdev.blink_delay_on	0-u64max[u]
USER_DATA	0	dev->mphy.leds.cdev.blink_timer.expires	0-u64max[u]
USER_DATA	0	dev->mphy.leds.cdev.blink_timer.flags	0-u32max[u]
USER_DATA	0	dev->mphy.leds.cdev.brightness	0-u32max[u]
USER_DATA	0	dev->mphy.leds.cdev.brightness_hw_changed	s32min-s32max[u]
USER_DATA	0	dev->mphy.leds.cdev.color	0-u32max[u]
USER_DATA	0	dev->mphy.leds.cdev.delayed_delay_off	0-u64max[u]
USER_DATA	0	dev->mphy.leds.cdev.delayed_delay_on	0-u64max[u]
USER_DATA	0	dev->mphy.leds.cdev.delayed_set_value	s32min-s32max[u]
USER_DATA	0	dev->mphy.leds.cdev.flags	s32min-s32max[u]
USER_DATA	0	dev->mphy.leds.cdev.led_access.osq.tail.counter	s32min-s32max[u]
USER_DATA	0	dev->mphy.leds.cdev.led_access.owner.counter	s64min-s64max[u]
USER_DATA	0	dev->mphy.leds.cdev.max_brightness	0-u32max[u]
USER_DATA	0	dev->mphy.leds.cdev.new_blink_brightness	s32min-s32max[u]
USER_DATA	0	dev->mphy.leds.cdev.set_brightness_work.data.counter	s64min-s64max[u]
USER_DATA	0	dev->mphy.leds.cdev.trigger_lock.count.counter	s64min-s64max[u]
USER_DATA	0	dev->mphy.leds.cdev.trigger_lock.osq.tail.counter	s32min-s32max[u]
USER_DATA	0	dev->mphy.leds.cdev.trigger_lock.owner.counter	s64min-s64max[u]
USER_DATA	0	dev->mphy.leds.cdev.work_flags	0-u64max[u]
USER_DATA	0	dev->mphy.leds.pin	0-255[u]
USER_DATA	0	dev->mphy.mac_work.cpu	s32min-s32max[u]
USER_DATA	0	dev->mphy.mac_work.timer.expires	0-u64max[u]
USER_DATA	0	dev->mphy.mac_work.timer.flags	0-u32max[u]
USER_DATA	0	dev->mphy.mac_work.work.data.counter	s64min-s64max[u]
USER_DATA	0	dev->mphy.mac_work_count	0-255[u]
USER_DATA	0	dev->mphy.main_chandef.center_freq1	0-u32max[u]
USER_DATA	0	dev->mphy.main_chandef.center_freq2	0-u32max[u]
USER_DATA	0	dev->mphy.main_chandef.edmg.bw_config	0-u32max[u]
USER_DATA	0	dev->mphy.main_chandef.edmg.channels	0-255[u]
USER_DATA	0	dev->mphy.main_chandef.freq1_offset	0-u16max[u]
USER_DATA	0	dev->mphy.main_chandef.npca_punctured	0-u16max[u]
USER_DATA	0	dev->mphy.main_chandef.punctured	0-u16max[u]
USER_DATA	0	dev->mphy.main_chandef.s1g_primary_2mhz	0-1[u]
USER_DATA	0	dev->mphy.main_chandef.width	0-u32max[u]
USER_DATA	0	dev->mphy.mgmt_tx_pending.counter	s32min-s32max[u]
USER_DATA	0	dev->mphy.no_active_monitor	0-1[u]
USER_DATA	0	dev->mphy.num_sta	0-u32max[u]
USER_DATA	0	dev->mphy.offchannel	0-1[u]
USER_DATA	0	dev->mphy.radar_enabled	0-1[u]
USER_DATA	0	dev->mphy.roc_work.cpu	s32min-s32max[u]
USER_DATA	0	dev->mphy.roc_work.timer.expires	0-u64max[u]
USER_DATA	0	dev->mphy.roc_work.timer.flags	0-u32max[u]
USER_DATA	0	dev->mphy.roc_work.work.data.counter	s64min-s64max[u]
USER_DATA	0	dev->mphy.sband_2g.sband.band	0-u32max[u]
USER_DATA	0	dev->mphy.sband_2g.sband.edmg_cap.bw_config	0-u32max[u]
USER_DATA	0	dev->mphy.sband_2g.sband.edmg_cap.channels	0-255[u]
USER_DATA	0	dev->mphy.sband_2g.sband.ht_cap.ampdu_density	0-255[u]
USER_DATA	0	dev->mphy.sband_2g.sband.ht_cap.ampdu_factor	0-255[u]
USER_DATA	0	dev->mphy.sband_2g.sband.ht_cap.cap	0-u16max[u]
USER_DATA	0	dev->mphy.sband_2g.sband.ht_cap.ht_supported	0-1[u]
USER_DATA	0	dev->mphy.sband_2g.sband.ht_cap.mcs.rx_highest	0-u16max[u]
USER_DATA	0	dev->mphy.sband_2g.sband.ht_cap.mcs.tx_params	0-255[u]
USER_DATA	0	dev->mphy.sband_2g.sband.n_bitrates	s32min-s32max[u]
USER_DATA	0	dev->mphy.sband_2g.sband.n_channels	s32min-s32max[u]
USER_DATA	0	dev->mphy.sband_2g.sband.n_iftype_data	0-u16max[u]
USER_DATA	0	dev->mphy.sband_2g.sband.s1g_cap.s1g	0-1[u]
USER_DATA	0	dev->mphy.sband_2g.sband.vht_cap.cap	0-u32max[u]
USER_DATA	0	dev->mphy.sband_2g.sband.vht_cap.vht_mcs.rx_highest	0-u16max[u]
USER_DATA	0	dev->mphy.sband_2g.sband.vht_cap.vht_mcs.rx_mcs_map	0-u16max[u]
USER_DATA	0	dev->mphy.sband_2g.sband.vht_cap.vht_mcs.tx_highest	0-u16max[u]
USER_DATA	0	dev->mphy.sband_2g.sband.vht_cap.vht_mcs.tx_mcs_map	0-u16max[u]
USER_DATA	0	dev->mphy.sband_2g.sband.vht_cap.vht_supported	0-1[u]
USER_DATA	0	dev->mphy.sband_5g.sband.band	0-u32max[u]
USER_DATA	0	dev->mphy.sband_5g.sband.edmg_cap.bw_config	0-u32max[u]
USER_DATA	0	dev->mphy.sband_5g.sband.edmg_cap.channels	0-255[u]
USER_DATA	0	dev->mphy.sband_5g.sband.ht_cap.ampdu_density	0-255[u]
USER_DATA	0	dev->mphy.sband_5g.sband.ht_cap.ampdu_factor	0-255[u]
USER_DATA	0	dev->mphy.sband_5g.sband.ht_cap.cap	0-u16max[u]
USER_DATA	0	dev->mphy.sband_5g.sband.ht_cap.ht_supported	0-1[u]
USER_DATA	0	dev->mphy.sband_5g.sband.ht_cap.mcs.rx_highest	0-u16max[u]
USER_DATA	0	dev->mphy.sband_5g.sband.ht_cap.mcs.tx_params	0-255[u]
USER_DATA	0	dev->mphy.sband_5g.sband.n_bitrates	s32min-s32max[u]
USER_DATA	0	dev->mphy.sband_5g.sband.n_channels	s32min-s32max[u]
USER_DATA	0	dev->mphy.sband_5g.sband.n_iftype_data	0-u16max[u]
USER_DATA	0	dev->mphy.sband_5g.sband.s1g_cap.s1g	0-1[u]
USER_DATA	0	dev->mphy.sband_5g.sband.vht_cap.cap	0-u32max[u]
USER_DATA	0	dev->mphy.sband_5g.sband.vht_cap.vht_mcs.rx_highest	0-u16max[u]
USER_DATA	0	dev->mphy.sband_5g.sband.vht_cap.vht_mcs.rx_mcs_map	0-u16max[u]
USER_DATA	0	dev->mphy.sband_5g.sband.vht_cap.vht_mcs.tx_highest	0-u16max[u]
USER_DATA	0	dev->mphy.sband_5g.sband.vht_cap.vht_mcs.tx_mcs_map	0-u16max[u]
USER_DATA	0	dev->mphy.sband_5g.sband.vht_cap.vht_supported	0-1[u]
USER_DATA	0	dev->mphy.sband_6g.sband.band	0-u32max[u]
USER_DATA	0	dev->mphy.sband_6g.sband.edmg_cap.bw_config	0-u32max[u]
USER_DATA	0	dev->mphy.sband_6g.sband.edmg_cap.channels	0-255[u]
USER_DATA	0	dev->mphy.sband_6g.sband.ht_cap.ampdu_density	0-255[u]
USER_DATA	0	dev->mphy.sband_6g.sband.ht_cap.ampdu_factor	0-255[u]
USER_DATA	0	dev->mphy.sband_6g.sband.ht_cap.cap	0-u16max[u]
USER_DATA	0	dev->mphy.sband_6g.sband.ht_cap.ht_supported	0-1[u]
USER_DATA	0	dev->mphy.sband_6g.sband.ht_cap.mcs.rx_highest	0-u16max[u]
USER_DATA	0	dev->mphy.sband_6g.sband.ht_cap.mcs.tx_params	0-255[u]
USER_DATA	0	dev->mphy.sband_6g.sband.n_bitrates	s32min-s32max[u]
USER_DATA	0	dev->mphy.sband_6g.sband.n_channels	s32min-s32max[u]
USER_DATA	0	dev->mphy.sband_6g.sband.n_iftype_data	0-u16max[u]
USER_DATA	0	dev->mphy.sband_6g.sband.s1g_cap.s1g	0-1[u]
USER_DATA	0	dev->mphy.sband_6g.sband.vht_cap.cap	0-u32max[u]
USER_DATA	0	dev->mphy.sband_6g.sband.vht_cap.vht_mcs.rx_highest	0-u16max[u]
USER_DATA	0	dev->mphy.sband_6g.sband.vht_cap.vht_mcs.rx_mcs_map	0-u16max[u]
USER_DATA	0	dev->mphy.sband_6g.sband.vht_cap.vht_mcs.tx_highest	0-u16max[u]
USER_DATA	0	dev->mphy.sband_6g.sband.vht_cap.vht_mcs.tx_mcs_map	0-u16max[u]
USER_DATA	0	dev->mphy.sband_6g.sband.vht_cap.vht_supported	0-1[u]
USER_DATA	0	dev->mphy.state	0-u64max[u]
USER_DATA	0	dev->mphy.survey_time	s64min-s64max[u]
USER_DATA	0	dev->mphy.test.freq_offset	0-u32max[u]
USER_DATA	0	dev->mphy.test.state	0-u32max[u]
USER_DATA	0	dev->mphy.test.tx_antenna_mask	0-255[u]
USER_DATA	0	dev->mphy.test.tx_count	0-u32max[u]
USER_DATA	0	dev->mphy.test.tx_done	0-u32max[u]
USER_DATA	0	dev->mphy.test.tx_duty_cycle	0-255[u]
USER_DATA	0	dev->mphy.test.tx_ipg	0-u32max[u]
USER_DATA	0	dev->mphy.test.tx_ltf	0-255[u]
USER_DATA	0	dev->mphy.test.tx_mpdu_len	0-u16max[u]
USER_DATA	0	dev->mphy.test.tx_pending	0-u32max[u]
USER_DATA	0	dev->mphy.test.tx_power_control	0-255[u]
USER_DATA	0	dev->mphy.test.tx_queued	0-u32max[u]
USER_DATA	0	dev->mphy.test.tx_queued_limit	0-u16max[u]
USER_DATA	0	dev->mphy.test.tx_rate_idx	0-255[u]
USER_DATA	0	dev->mphy.test.tx_rate_ldpc	0-255[u]
USER_DATA	0	dev->mphy.test.tx_rate_mode	0-255[u]
USER_DATA	0	dev->mphy.test.tx_rate_nss	0-255[u]
USER_DATA	0	dev->mphy.test.tx_rate_sgi	0-255[u]
USER_DATA	0	dev->mphy.test.tx_rate_stbc	0-255[u]
USER_DATA	0	dev->mphy.test.tx_spe_idx	0-255[u]
USER_DATA	0	dev->mphy.test.tx_time	0-u32max[u]
USER_DATA	0	dev->mphy.txpower_cur	s32min-s32max[u]
USER_DATA	0	dev->mt76.beacon_int	s32min-s32max[u]
USER_DATA	0	dev->mt76.beacon_mask	0-255[u]
USER_DATA	0	dev->mt76.bus_hung.counter	s32min-s32max[u]
USER_DATA	0	dev->mt76.csa_complete	0-255[u]
USER_DATA	0	dev->mt76.cur_cc_bss_rx	0-u32max[u]
USER_DATA	0	dev->mt76.debugfs_reg	0-u32max[u]
USER_DATA	0	dev->mt76.eeprom.size	0-u64max[u]
USER_DATA	0	dev->mt76.global_wcid.ampdu_state	0-u64max[u]
USER_DATA	0	dev->mt76.global_wcid.amsdu	0-1[u]
USER_DATA	0	dev->mt76.global_wcid.cipher	0-u16max[u]
USER_DATA	0	dev->mt76.global_wcid.flags	0-u64max[u]
USER_DATA	0	dev->mt76.global_wcid.hw_key_idx	0-255[u]
USER_DATA	0	dev->mt76.global_wcid.hw_key_idx2	0-255[u]
USER_DATA	0	dev->mt76.global_wcid.idx	0-u16max[u]
USER_DATA	0	dev->mt76.global_wcid.inactive_count	s32min-s32max[u]
USER_DATA	0	dev->mt76.global_wcid.link_id	0-15[u]
USER_DATA	0	dev->mt76.global_wcid.link_valid	0-1[u]
USER_DATA	0	dev->mt76.global_wcid.non_aql_packets.counter	s32min-s32max[u]
USER_DATA	0	dev->mt76.global_wcid.offchannel	0-1[u]
USER_DATA	0	dev->mt76.global_wcid.phy_idx	0-3[u]
USER_DATA	0	dev->mt76.global_wcid.pktid.idr_base	0-u32max[u]
USER_DATA	0	dev->mt76.global_wcid.pktid.idr_next	0-u32max[u]
USER_DATA	0	dev->mt76.global_wcid.pktid.idr_rt.xa_flags	0-u32max[u]
USER_DATA	0	dev->mt76.global_wcid.rate.bw	0-255[u]
USER_DATA	0	dev->mt76.global_wcid.rate.eht_gi	0-255[u]
USER_DATA	0	dev->mt76.global_wcid.rate.eht_ru_alloc	0-255[u]
USER_DATA	0	dev->mt76.global_wcid.rate.flags	0-u16max[u]
USER_DATA	0	dev->mt76.global_wcid.rate.he_dcm	0-255[u]
USER_DATA	0	dev->mt76.global_wcid.rate.he_gi	0-255[u]
USER_DATA	0	dev->mt76.global_wcid.rate.he_ru_alloc	0-255[u]
USER_DATA	0	dev->mt76.global_wcid.rate.legacy	0-u16max[u]
USER_DATA	0	dev->mt76.global_wcid.rate.mcs	0-255[u]
USER_DATA	0	dev->mt76.global_wcid.rate.n_bonded_ch	0-255[u]
USER_DATA	0	dev->mt76.global_wcid.rate.nss	0-255[u]
USER_DATA	0	dev->mt76.global_wcid.rssi.internal	0-u64max[u]
USER_DATA	0	dev->mt76.global_wcid.rx_check_pn	0-255[u]
USER_DATA	0	dev->mt76.global_wcid.sta	0-1[u]
USER_DATA	0	dev->mt76.global_wcid.sta_disabled	0-1[u]
USER_DATA	0	dev->mt76.global_wcid.stats.rx_bytes	0-u64max[u]
USER_DATA	0	dev->mt76.global_wcid.stats.rx_drops	0-u32max[u]
USER_DATA	0	dev->mt76.global_wcid.stats.rx_errors	0-u32max[u]
USER_DATA	0	dev->mt76.global_wcid.stats.rx_packets	0-u32max[u]
USER_DATA	0	dev->mt76.global_wcid.stats.tx_bytes	0-u64max[u]
USER_DATA	0	dev->mt76.global_wcid.stats.tx_failed	0-u32max[u]
USER_DATA	0	dev->mt76.global_wcid.stats.tx_packets	0-u32max[u]
USER_DATA	0	dev->mt76.global_wcid.stats.tx_retries	0-u32max[u]
USER_DATA	0	dev->mt76.global_wcid.sw_iv	0-1[u]
USER_DATA	0	dev->mt76.global_wcid.tx_info	0-u32max[u]
USER_DATA	0	dev->mt76.global_wcid.tx_offchannel.qlen	0-u32max[u]
USER_DATA	0	dev->mt76.global_wcid.tx_pending.qlen	0-u32max[u]
USER_DATA	0	dev->mt76.hwrro_mode	0-u32max[u]
USER_DATA	0	dev->mt76.irq_tasklet.count.counter	s32min-s32max[u]
USER_DATA	0	dev->mt76.irq_tasklet.data	0-u64max[u]
USER_DATA	0	dev->mt76.irq_tasklet.state	0-u64max[u]
USER_DATA	0	dev->mt76.irq_tasklet.use_callback	0-1[u]
USER_DATA	0	dev->mt76.mcu.msg_seq	0-u32max[u]
USER_DATA	0	dev->mt76.mcu.mutex.osq.tail.counter	s32min-s32max[u]
USER_DATA	0	dev->mt76.mcu.mutex.owner.counter	s64min-s64max[u]
USER_DATA	0	dev->mt76.mcu.res_q.qlen	0-u32max[u]
USER_DATA	0	dev->mt76.mcu.timeout	s32min-s32max[u]
USER_DATA	0	dev->mt76.mmio.irqmask	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.npu_type	s32min-s32max[u]
USER_DATA	0	dev->mt76.mmio.phy_addr	0-u64max[u]
USER_DATA	0	dev->mt76.mmio.wed.hw_rro.desc_phys	0-u64max[u]
USER_DATA	0	dev->mt76.mmio.wed.hw_rro.size	s32min-s32max[u]
USER_DATA	0	dev->mt76.mmio.wed.ind_cmd_ring.desc_phys	0-u64max[u]
USER_DATA	0	dev->mt76.mmio.wed.ind_cmd_ring.desc_size	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed.ind_cmd_ring.flags	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed.ind_cmd_ring.reg_base	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed.ind_cmd_ring.size	s32min-s32max[u]
USER_DATA	0	dev->mt76.mmio.wed.init_done	0-1[u]
USER_DATA	0	dev->mt76.mmio.wed.irq	s32min-s32max[u]
USER_DATA	0	dev->mt76.mmio.wed.rev_id	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed.rro.fdbk_phys	0-u64max[u]
USER_DATA	0	dev->mt76.mmio.wed.rro.miod_phys	0-u64max[u]
USER_DATA	0	dev->mt76.mmio.wed.rro.ring.desc_phys	0-u64max[u]
USER_DATA	0	dev->mt76.mmio.wed.rro.ring.desc_size	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed.rro.ring.flags	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed.rro.ring.reg_base	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed.rro.ring.size	s32min-s32max[u]
USER_DATA	0	dev->mt76.mmio.wed.running	0-1[u]
USER_DATA	0	dev->mt76.mmio.wed.rx_buf_ring.desc_phys	0-u64max[u]
USER_DATA	0	dev->mt76.mmio.wed.rx_buf_ring.size	s32min-s32max[u]
USER_DATA	0	dev->mt76.mmio.wed.tx_buf_ring.desc_phys	0-u64max[u]
USER_DATA	0	dev->mt76.mmio.wed.tx_buf_ring.size	s32min-s32max[u]
USER_DATA	0	dev->mt76.mmio.wed.txfree_ring.desc_phys	0-u64max[u]
USER_DATA	0	dev->mt76.mmio.wed.txfree_ring.desc_size	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed.txfree_ring.flags	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed.txfree_ring.reg_base	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed.txfree_ring.size	s32min-s32max[u]
USER_DATA	0	dev->mt76.mmio.wed.version	0-255[u]
USER_DATA	0	dev->mt76.mmio.wed.wdma_idx	s32min-s32max[u]
USER_DATA	0	dev->mt76.mmio.wed.wlan.amsdu_max_len	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed.wlan.amsdu_max_subframes	0-255[u]
USER_DATA	0	dev->mt76.mmio.wed.wlan.bus_type	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed.wlan.hif2	0-1[u]
USER_DATA	0	dev->mt76.mmio.wed.wlan.hw_rro	0-1[u]
USER_DATA	0	dev->mt76.mmio.wed.wlan.id	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed.wlan.ind_cmd.ack_sn_addr	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed.wlan.ind_cmd.particular_se_phys	0-u64max[u]
USER_DATA	0	dev->mt76.mmio.wed.wlan.ind_cmd.particular_sid	0-u16max[u]
USER_DATA	0	dev->mt76.mmio.wed.wlan.ind_cmd.se_group_nums	0-255[u]
USER_DATA	0	dev->mt76.mmio.wed.wlan.ind_cmd.win_size	0-u16max[u]
USER_DATA	0	dev->mt76.mmio.wed.wlan.msi	0-1[u]
USER_DATA	0	dev->mt76.mmio.wed.wlan.nbuf	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed.wlan.phy_base	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed.wlan.rx_nbuf	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed.wlan.rx_npkt	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed.wlan.rx_size	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed.wlan.token_start	0-u16max[u]
USER_DATA	0	dev->mt76.mmio.wed.wlan.txfree_tbit	0-255[u]
USER_DATA	0	dev->mt76.mmio.wed.wlan.wcid_512	0-1[u]
USER_DATA	0	dev->mt76.mmio.wed.wlan.wpdma_int	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed.wlan.wpdma_mask	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed.wlan.wpdma_phys	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed.wlan.wpdma_rx_glo	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed.wlan.wpdma_rx_pg	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed.wlan.wpdma_tx	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed.wlan.wpdma_txfree	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.hw_rro.desc_phys	0-u64max[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.hw_rro.size	s32min-s32max[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.ind_cmd_ring.desc_phys	0-u64max[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.ind_cmd_ring.desc_size	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.ind_cmd_ring.flags	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.ind_cmd_ring.reg_base	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.ind_cmd_ring.size	s32min-s32max[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.init_done	0-1[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.irq	s32min-s32max[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.rev_id	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.rro.fdbk_phys	0-u64max[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.rro.miod_phys	0-u64max[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.rro.ring.desc_phys	0-u64max[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.rro.ring.desc_size	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.rro.ring.flags	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.rro.ring.reg_base	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.rro.ring.size	s32min-s32max[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.running	0-1[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.rx_buf_ring.desc_phys	0-u64max[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.rx_buf_ring.size	s32min-s32max[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.tx_buf_ring.desc_phys	0-u64max[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.tx_buf_ring.size	s32min-s32max[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.txfree_ring.desc_phys	0-u64max[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.txfree_ring.desc_size	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.txfree_ring.flags	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.txfree_ring.reg_base	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.txfree_ring.size	s32min-s32max[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.version	0-255[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.wdma_idx	s32min-s32max[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.wlan.amsdu_max_len	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.wlan.amsdu_max_subframes	0-255[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.wlan.bus_type	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.wlan.hif2	0-1[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.wlan.hw_rro	0-1[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.wlan.id	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.wlan.ind_cmd.ack_sn_addr	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.wlan.ind_cmd.particular_se_phys	0-u64max[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.wlan.ind_cmd.particular_sid	0-u16max[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.wlan.ind_cmd.se_group_nums	0-255[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.wlan.ind_cmd.win_size	0-u16max[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.wlan.msi	0-1[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.wlan.nbuf	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.wlan.phy_base	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.wlan.rx_nbuf	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.wlan.rx_npkt	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.wlan.rx_size	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.wlan.token_start	0-u16max[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.wlan.txfree_tbit	0-255[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.wlan.wcid_512	0-1[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.wlan.wpdma_int	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.wlan.wpdma_mask	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.wlan.wpdma_phys	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.wlan.wpdma_rx_glo	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.wlan.wpdma_rx_pg	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.wlan.wpdma_tx	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.wlan.wpdma_txfree	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed_reset.done	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed_reset.wait.lock.magic	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed_reset.wait.lock.owner_cpu	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed_reset.wait.lock.raw_lock.locked	0-255[u]
USER_DATA	0	dev->mt76.mmio.wed_reset.wait.lock.raw_lock.locked_pending	0-u16max[u]
USER_DATA	0	dev->mt76.mmio.wed_reset.wait.lock.raw_lock.pending	0-255[u]
USER_DATA	0	dev->mt76.mmio.wed_reset.wait.lock.raw_lock.tail	0-u16max[u]
USER_DATA	0	dev->mt76.mmio.wed_reset.wait.lock.raw_lock.val.counter	s32min-s32max[u]
USER_DATA	0	dev->mt76.mmio.wed_reset_complete.done	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed_reset_complete.wait.lock.magic	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed_reset_complete.wait.lock.owner_cpu	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed_reset_complete.wait.lock.raw_lock.locked	0-255[u]
USER_DATA	0	dev->mt76.mmio.wed_reset_complete.wait.lock.raw_lock.locked_pending	0-u16max[u]
USER_DATA	0	dev->mt76.mmio.wed_reset_complete.wait.lock.raw_lock.pending	0-255[u]
USER_DATA	0	dev->mt76.mmio.wed_reset_complete.wait.lock.raw_lock.tail	0-u16max[u]
USER_DATA	0	dev->mt76.mmio.wed_reset_complete.wait.lock.raw_lock.val.counter	s32min-s32max[u]
USER_DATA	0	dev->mt76.mutex.osq.tail.counter	s32min-s32max[u]
USER_DATA	0	dev->mt76.mutex.owner.counter	s64min-s64max[u]
USER_DATA	0	dev->mt76.otp.size	0-u64max[u]
USER_DATA	0	dev->mt76.phy.antenna_mask	0-255[u]
USER_DATA	0	dev->mt76.phy.band_idx	0-255[u]
USER_DATA	0	dev->mt76.phy.cap.has_2ghz	0-1[u]
USER_DATA	0	dev->mt76.phy.cap.has_5ghz	0-1[u]
USER_DATA	0	dev->mt76.phy.cap.has_6ghz	0-1[u]
USER_DATA	0	dev->mt76.phy.chainmask	0-u16max[u]
USER_DATA	0	dev->mt76.phy.chandef.center_freq1	0-u32max[u]
USER_DATA	0	dev->mt76.phy.chandef.center_freq2	0-u32max[u]
USER_DATA	0	dev->mt76.phy.chandef.edmg.bw_config	0-u32max[u]
USER_DATA	0	dev->mt76.phy.chandef.edmg.channels	0-255[u]
USER_DATA	0	dev->mt76.phy.chandef.freq1_offset	0-u16max[u]
USER_DATA	0	dev->mt76.phy.chandef.npca_punctured	0-u16max[u]
USER_DATA	0	dev->mt76.phy.chandef.punctured	0-u16max[u]
USER_DATA	0	dev->mt76.phy.chandef.s1g_primary_2mhz	0-1[u]
USER_DATA	0	dev->mt76.phy.chandef.width	0-u32max[u]
USER_DATA	0	dev->mt76.phy.dfs_state	0-u32max[u]
USER_DATA	0	dev->mt76.phy.leds.al	0-1[u]
USER_DATA	0	dev->mt76.phy.leds.cdev.activated	0-1[u]
USER_DATA	0	dev->mt76.phy.leds.cdev.blink_brightness	s32min-s32max[u]
USER_DATA	0	dev->mt76.phy.leds.cdev.blink_delay_off	0-u64max[u]
USER_DATA	0	dev->mt76.phy.leds.cdev.blink_delay_on	0-u64max[u]
USER_DATA	0	dev->mt76.phy.leds.cdev.blink_timer.expires	0-u64max[u]
USER_DATA	0	dev->mt76.phy.leds.cdev.blink_timer.flags	0-u32max[u]
USER_DATA	0	dev->mt76.phy.leds.cdev.brightness	0-u32max[u]
USER_DATA	0	dev->mt76.phy.leds.cdev.brightness_hw_changed	s32min-s32max[u]
USER_DATA	0	dev->mt76.phy.leds.cdev.color	0-u32max[u]
USER_DATA	0	dev->mt76.phy.leds.cdev.delayed_delay_off	0-u64max[u]
USER_DATA	0	dev->mt76.phy.leds.cdev.delayed_delay_on	0-u64max[u]
USER_DATA	0	dev->mt76.phy.leds.cdev.delayed_set_value	s32min-s32max[u]
USER_DATA	0	dev->mt76.phy.leds.cdev.flags	s32min-s32max[u]
USER_DATA	0	dev->mt76.phy.leds.cdev.led_access.osq.tail.counter	s32min-s32max[u]
USER_DATA	0	dev->mt76.phy.leds.cdev.led_access.owner.counter	s64min-s64max[u]
USER_DATA	0	dev->mt76.phy.leds.cdev.max_brightness	0-u32max[u]
USER_DATA	0	dev->mt76.phy.leds.cdev.new_blink_brightness	s32min-s32max[u]
USER_DATA	0	dev->mt76.phy.leds.cdev.set_brightness_work.data.counter	s64min-s64max[u]
USER_DATA	0	dev->mt76.phy.leds.cdev.trigger_lock.count.counter	s64min-s64max[u]
USER_DATA	0	dev->mt76.phy.leds.cdev.trigger_lock.osq.tail.counter	s32min-s32max[u]
USER_DATA	0	dev->mt76.phy.leds.cdev.trigger_lock.owner.counter	s64min-s64max[u]
USER_DATA	0	dev->mt76.phy.leds.cdev.work_flags	0-u64max[u]
USER_DATA	0	dev->mt76.phy.leds.pin	0-255[u]
USER_DATA	0	dev->mt76.phy.mac_work.cpu	s32min-s32max[u]
USER_DATA	0	dev->mt76.phy.mac_work.timer.expires	0-u64max[u]
USER_DATA	0	dev->mt76.phy.mac_work.timer.flags	0-u32max[u]
USER_DATA	0	dev->mt76.phy.mac_work.work.data.counter	s64min-s64max[u]
USER_DATA	0	dev->mt76.phy.mac_work_count	0-255[u]
USER_DATA	0	dev->mt76.phy.main_chandef.center_freq1	0-u32max[u]
USER_DATA	0	dev->mt76.phy.main_chandef.center_freq2	0-u32max[u]
USER_DATA	0	dev->mt76.phy.main_chandef.edmg.bw_config	0-u32max[u]
USER_DATA	0	dev->mt76.phy.main_chandef.edmg.channels	0-255[u]
USER_DATA	0	dev->mt76.phy.main_chandef.freq1_offset	0-u16max[u]
USER_DATA	0	dev->mt76.phy.main_chandef.npca_punctured	0-u16max[u]
USER_DATA	0	dev->mt76.phy.main_chandef.punctured	0-u16max[u]
USER_DATA	0	dev->mt76.phy.main_chandef.s1g_primary_2mhz	0-1[u]
USER_DATA	0	dev->mt76.phy.main_chandef.width	0-u32max[u]
USER_DATA	0	dev->mt76.phy.mgmt_tx_pending.counter	s32min-s32max[u]
USER_DATA	0	dev->mt76.phy.no_active_monitor	0-1[u]
USER_DATA	0	dev->mt76.phy.num_sta	0-u32max[u]
USER_DATA	0	dev->mt76.phy.offchannel	0-1[u]
USER_DATA	0	dev->mt76.phy.radar_enabled	0-1[u]
USER_DATA	0	dev->mt76.phy.roc_work.cpu	s32min-s32max[u]
USER_DATA	0	dev->mt76.phy.roc_work.timer.expires	0-u64max[u]
USER_DATA	0	dev->mt76.phy.roc_work.timer.flags	0-u32max[u]
USER_DATA	0	dev->mt76.phy.roc_work.work.data.counter	s64min-s64max[u]
USER_DATA	0	dev->mt76.phy.sband_2g.sband.band	0-u32max[u]
USER_DATA	0	dev->mt76.phy.sband_2g.sband.edmg_cap.bw_config	0-u32max[u]
USER_DATA	0	dev->mt76.phy.sband_2g.sband.edmg_cap.channels	0-255[u]
USER_DATA	0	dev->mt76.phy.sband_2g.sband.ht_cap.ampdu_density	0-255[u]
USER_DATA	0	dev->mt76.phy.sband_2g.sband.ht_cap.ampdu_factor	0-255[u]
USER_DATA	0	dev->mt76.phy.sband_2g.sband.ht_cap.cap	0-u16max[u]
USER_DATA	0	dev->mt76.phy.sband_2g.sband.ht_cap.ht_supported	0-1[u]
USER_DATA	0	dev->mt76.phy.sband_2g.sband.ht_cap.mcs.rx_highest	0-u16max[u]
USER_DATA	0	dev->mt76.phy.sband_2g.sband.ht_cap.mcs.tx_params	0-255[u]
USER_DATA	0	dev->mt76.phy.sband_2g.sband.n_bitrates	s32min-s32max[u]
USER_DATA	0	dev->mt76.phy.sband_2g.sband.n_channels	s32min-s32max[u]
USER_DATA	0	dev->mt76.phy.sband_2g.sband.n_iftype_data	0-u16max[u]
USER_DATA	0	dev->mt76.phy.sband_2g.sband.s1g_cap.s1g	0-1[u]
USER_DATA	0	dev->mt76.phy.sband_2g.sband.vht_cap.cap	0-u32max[u]
USER_DATA	0	dev->mt76.phy.sband_2g.sband.vht_cap.vht_mcs.rx_highest	0-u16max[u]
USER_DATA	0	dev->mt76.phy.sband_2g.sband.vht_cap.vht_mcs.rx_mcs_map	0-u16max[u]
USER_DATA	0	dev->mt76.phy.sband_2g.sband.vht_cap.vht_mcs.tx_highest	0-u16max[u]
USER_DATA	0	dev->mt76.phy.sband_2g.sband.vht_cap.vht_mcs.tx_mcs_map	0-u16max[u]
USER_DATA	0	dev->mt76.phy.sband_2g.sband.vht_cap.vht_supported	0-1[u]
USER_DATA	0	dev->mt76.phy.sband_5g.sband.band	0-u32max[u]
USER_DATA	0	dev->mt76.phy.sband_5g.sband.edmg_cap.bw_config	0-u32max[u]
USER_DATA	0	dev->mt76.phy.sband_5g.sband.edmg_cap.channels	0-255[u]
USER_DATA	0	dev->mt76.phy.sband_5g.sband.ht_cap.ampdu_density	0-255[u]
USER_DATA	0	dev->mt76.phy.sband_5g.sband.ht_cap.ampdu_factor	0-255[u]
USER_DATA	0	dev->mt76.phy.sband_5g.sband.ht_cap.cap	0-u16max[u]
USER_DATA	0	dev->mt76.phy.sband_5g.sband.ht_cap.ht_supported	0-1[u]
USER_DATA	0	dev->mt76.phy.sband_5g.sband.ht_cap.mcs.rx_highest	0-u16max[u]
USER_DATA	0	dev->mt76.phy.sband_5g.sband.ht_cap.mcs.tx_params	0-255[u]
USER_DATA	0	dev->mt76.phy.sband_5g.sband.n_bitrates	s32min-s32max[u]
USER_DATA	0	dev->mt76.phy.sband_5g.sband.n_channels	s32min-s32max[u]
USER_DATA	0	dev->mt76.phy.sband_5g.sband.n_iftype_data	0-u16max[u]
USER_DATA	0	dev->mt76.phy.sband_5g.sband.s1g_cap.s1g	0-1[u]
USER_DATA	0	dev->mt76.phy.sband_5g.sband.vht_cap.cap	0-u32max[u]
USER_DATA	0	dev->mt76.phy.sband_5g.sband.vht_cap.vht_mcs.rx_highest	0-u16max[u]
USER_DATA	0	dev->mt76.phy.sband_5g.sband.vht_cap.vht_mcs.rx_mcs_map	0-u16max[u]
USER_DATA	0	dev->mt76.phy.sband_5g.sband.vht_cap.vht_mcs.tx_highest	0-u16max[u]
USER_DATA	0	dev->mt76.phy.sband_5g.sband.vht_cap.vht_mcs.tx_mcs_map	0-u16max[u]
USER_DATA	0	dev->mt76.phy.sband_5g.sband.vht_cap.vht_supported	0-1[u]
USER_DATA	0	dev->mt76.phy.sband_6g.sband.band	0-u32max[u]
USER_DATA	0	dev->mt76.phy.sband_6g.sband.edmg_cap.bw_config	0-u32max[u]
USER_DATA	0	dev->mt76.phy.sband_6g.sband.edmg_cap.channels	0-255[u]
USER_DATA	0	dev->mt76.phy.sband_6g.sband.ht_cap.ampdu_density	0-255[u]
USER_DATA	0	dev->mt76.phy.sband_6g.sband.ht_cap.ampdu_factor	0-255[u]
USER_DATA	0	dev->mt76.phy.sband_6g.sband.ht_cap.cap	0-u16max[u]
USER_DATA	0	dev->mt76.phy.sband_6g.sband.ht_cap.ht_supported	0-1[u]
USER_DATA	0	dev->mt76.phy.sband_6g.sband.ht_cap.mcs.rx_highest	0-u16max[u]
USER_DATA	0	dev->mt76.phy.sband_6g.sband.ht_cap.mcs.tx_params	0-255[u]
USER_DATA	0	dev->mt76.phy.sband_6g.sband.n_bitrates	s32min-s32max[u]
USER_DATA	0	dev->mt76.phy.sband_6g.sband.n_channels	s32min-s32max[u]
USER_DATA	0	dev->mt76.phy.sband_6g.sband.n_iftype_data	0-u16max[u]
USER_DATA	0	dev->mt76.phy.sband_6g.sband.s1g_cap.s1g	0-1[u]
USER_DATA	0	dev->mt76.phy.sband_6g.sband.vht_cap.cap	0-u32max[u]
USER_DATA	0	dev->mt76.phy.sband_6g.sband.vht_cap.vht_mcs.rx_highest	0-u16max[u]
USER_DATA	0	dev->mt76.phy.sband_6g.sband.vht_cap.vht_mcs.rx_mcs_map	0-u16max[u]
USER_DATA	0	dev->mt76.phy.sband_6g.sband.vht_cap.vht_mcs.tx_highest	0-u16max[u]
USER_DATA	0	dev->mt76.phy.sband_6g.sband.vht_cap.vht_mcs.tx_mcs_map	0-u16max[u]
USER_DATA	0	dev->mt76.phy.sband_6g.sband.vht_cap.vht_supported	0-1[u]
USER_DATA	0	dev->mt76.phy.state	0-u64max[u]
USER_DATA	0	dev->mt76.phy.survey_time	s64min-s64max[u]
USER_DATA	0	dev->mt76.phy.test.freq_offset	0-u32max[u]
USER_DATA	0	dev->mt76.phy.test.state	0-u32max[u]
USER_DATA	0	dev->mt76.phy.test.tx_antenna_mask	0-255[u]
USER_DATA	0	dev->mt76.phy.test.tx_count	0-u32max[u]
USER_DATA	0	dev->mt76.phy.test.tx_done	0-u32max[u]
USER_DATA	0	dev->mt76.phy.test.tx_duty_cycle	0-255[u]
USER_DATA	0	dev->mt76.phy.test.tx_ipg	0-u32max[u]
USER_DATA	0	dev->mt76.phy.test.tx_ltf	0-255[u]
USER_DATA	0	dev->mt76.phy.test.tx_mpdu_len	0-u16max[u]
USER_DATA	0	dev->mt76.phy.test.tx_pending	0-u32max[u]
USER_DATA	0	dev->mt76.phy.test.tx_power_control	0-255[u]
USER_DATA	0	dev->mt76.phy.test.tx_queued	0-u32max[u]
USER_DATA	0	dev->mt76.phy.test.tx_queued_limit	0-u16max[u]
USER_DATA	0	dev->mt76.phy.test.tx_rate_idx	0-255[u]
USER_DATA	0	dev->mt76.phy.test.tx_rate_ldpc	0-255[u]
USER_DATA	0	dev->mt76.phy.test.tx_rate_mode	0-255[u]
USER_DATA	0	dev->mt76.phy.test.tx_rate_nss	0-255[u]
USER_DATA	0	dev->mt76.phy.test.tx_rate_sgi	0-255[u]
USER_DATA	0	dev->mt76.phy.test.tx_rate_stbc	0-255[u]
USER_DATA	0	dev->mt76.phy.test.tx_spe_idx	0-255[u]
USER_DATA	0	dev->mt76.phy.test.tx_time	0-u32max[u]
USER_DATA	0	dev->mt76.phy.txpower_cur	s32min-s32max[u]
USER_DATA	0	dev->mt76.pre_tbtt_tasklet.count.counter	s32min-s32max[u]
USER_DATA	0	dev->mt76.pre_tbtt_tasklet.data	0-u64max[u]
USER_DATA	0	dev->mt76.pre_tbtt_tasklet.state	0-u64max[u]
USER_DATA	0	dev->mt76.pre_tbtt_tasklet.use_callback	0-1[u]
USER_DATA	0	dev->mt76.region	0-u32max[u]
USER_DATA	0	dev->mt76.rev	0-u32max[u]
USER_DATA	0	dev->mt76.rnr.bssid_num	0-255[u]
USER_DATA	0	dev->mt76.rnr.seq_num	0-255[u]
USER_DATA	0	dev->mt76.rnr.sreq_flag	0-u32max[u]
USER_DATA	0	dev->mt76.rx_ampdu_len	0-u32max[u]
USER_DATA	0	dev->mt76.rx_ampdu_ref	0-u32max[u]
USER_DATA	0	dev->mt76.rx_ampdu_status.aggr	0-1[u]
USER_DATA	0	dev->mt76.rx_ampdu_status.ampdu_ref	0-u32max[u]
USER_DATA	0	dev->mt76.rx_ampdu_status.amsdu	0-1[u]
USER_DATA	0	dev->mt76.rx_ampdu_status.band	0-7[u]
USER_DATA	0	dev->mt76.rx_ampdu_status.bw	0-15[u]
USER_DATA	0	dev->mt76.rx_ampdu_status.chains	0-255[u]
USER_DATA	0	dev->mt76.rx_ampdu_status.eht.gi	0-3[u]
USER_DATA	0	dev->mt76.rx_ampdu_status.eht.ru	0-15[u]
USER_DATA	0	dev->mt76.rx_ampdu_status.enc_flags	0-255[u]
USER_DATA	0	dev->mt76.rx_ampdu_status.encoding	0-7[u]
USER_DATA	0	dev->mt76.rx_ampdu_status.first_amsdu	0-1[u]
USER_DATA	0	dev->mt76.rx_ampdu_status.flag	0-u32max[u]
USER_DATA	0	dev->mt76.rx_ampdu_status.freq	0-u16max[u]
USER_DATA	0	dev->mt76.rx_ampdu_status.he_dcm	0-1[u]
USER_DATA	0	dev->mt76.rx_ampdu_status.he_gi	0-3[u]
USER_DATA	0	dev->mt76.rx_ampdu_status.he_ru	0-7[u]
USER_DATA	0	dev->mt76.rx_ampdu_status.last_amsdu	0-1[u]
USER_DATA	0	dev->mt76.rx_ampdu_status.nss	0-31[u]
USER_DATA	0	dev->mt76.rx_ampdu_status.phy_idx	0-3[u]
USER_DATA	0	dev->mt76.rx_ampdu_status.qos_ctl	0-255[u]
USER_DATA	0	dev->mt76.rx_ampdu_status.rate_idx	0-255[u]
USER_DATA	0	dev->mt76.rx_ampdu_status.reorder_time	0-u32max[u]
USER_DATA	0	dev->mt76.rx_ampdu_status.seqno	0-u16max[u]
USER_DATA	0	dev->mt76.rx_ampdu_status.signal	(-128)-127[u]
USER_DATA	0	dev->mt76.rx_ampdu_status.timestamp	0-u32max[u]
USER_DATA	0	dev->mt76.rx_ampdu_status.wcid_idx	0-u16max[u]
USER_DATA	0	dev->mt76.rx_token.idr_base	0-u32max[u]
USER_DATA	0	dev->mt76.rx_token.idr_next	0-u32max[u]
USER_DATA	0	dev->mt76.rx_token.idr_rt.xa_flags	0-u32max[u]
USER_DATA	0	dev->mt76.rx_token_size	0-u16max[u]
USER_DATA	0	dev->mt76.rxfilter	0-u32max[u]
USER_DATA	0	dev->mt76.scan.beacon_received	0-1[u]
USER_DATA	0	dev->mt76.scan.beacon_wait	0-1[u]
USER_DATA	0	dev->mt76.scan.chan_idx	s32min-s32max[u]
USER_DATA	0	dev->mt76.scan_work.cpu	s32min-s32max[u]
USER_DATA	0	dev->mt76.scan_work.timer.expires	0-u64max[u]
USER_DATA	0	dev->mt76.scan_work.timer.flags	0-u32max[u]
USER_DATA	0	dev->mt76.scan_work.work.data.counter	s64min-s64max[u]
USER_DATA	0	dev->mt76.sdio.hw_ver	0-255[u]
USER_DATA	0	dev->mt76.sdio.net_worker.state	0-u64max[u]
USER_DATA	0	dev->mt76.sdio.pse_mcu_quota_max	s32min-s32max[u]
USER_DATA	0	dev->mt76.sdio.sched.deficit	s32min-s32max[u]
USER_DATA	0	dev->mt76.sdio.sched.ple_data_quota	s32min-s32max[u]
USER_DATA	0	dev->mt76.sdio.sched.pse_data_quota	s32min-s32max[u]
USER_DATA	0	dev->mt76.sdio.sched.pse_mcu_quota	s32min-s32max[u]
USER_DATA	0	dev->mt76.sdio.sched.pse_page_size	s32min-s32max[u]
USER_DATA	0	dev->mt76.sdio.stat_worker.state	0-u64max[u]
USER_DATA	0	dev->mt76.sdio.status_worker.state	0-u64max[u]
USER_DATA	0	dev->mt76.sdio.txrx_worker.state	0-u64max[u]
USER_DATA	0	dev->mt76.sdio.xmit_buf_sz	0-u32max[u]
USER_DATA	0	dev->mt76.test_mtd.offset	0-u32max[u]
USER_DATA	0	dev->mt76.token.idr_base	0-u32max[u]
USER_DATA	0	dev->mt76.token.idr_next	0-u32max[u]
USER_DATA	0	dev->mt76.token.idr_rt.xa_flags	0-u32max[u]
USER_DATA	0	dev->mt76.token_count	0-u16max[u]
USER_DATA	0	dev->mt76.token_size	0-u16max[u]
USER_DATA	0	dev->mt76.token_start	0-u16max[u]
USER_DATA	0	dev->mt76.tx_napi.defer_hard_irqs	0-u32max[u]
USER_DATA	0	dev->mt76.tx_napi.defer_hard_irqs_count	0-u32max[u]
USER_DATA	0	dev->mt76.tx_napi.gro.bitmask	0-u64max[u]
USER_DATA	0	dev->mt76.tx_napi.gro.cached_napi_id	0-u32max[u]
USER_DATA	0	dev->mt76.tx_napi.gro.rx_count	0-u32max[u]
USER_DATA	0	dev->mt76.tx_napi.gro_flush_timeout	0-u64max[u]
USER_DATA	0	dev->mt76.tx_napi.index	s32min-s32max[u]
USER_DATA	0	dev->mt76.tx_napi.irq	s32min-s32max[u]
USER_DATA	0	dev->mt76.tx_napi.irq_suspend_timeout	0-u64max[u]
USER_DATA	0	dev->mt76.tx_napi.list_owner	s32min-s32max[u]
USER_DATA	0	dev->mt76.tx_napi.napi_id	0-u32max[u]
USER_DATA	0	dev->mt76.tx_napi.napi_rmap_idx	s32min-s32max[u]
USER_DATA	0	dev->mt76.tx_napi.notify.irq	0-u32max[u]
USER_DATA	0	dev->mt76.tx_napi.notify.kref.refcount.refs.counter	s32min-s32max[u]
USER_DATA	0	dev->mt76.tx_napi.notify.work.data.counter	s64min-s64max[u]
USER_DATA	0	dev->mt76.tx_napi.poll_owner	s32min-s32max[u]
USER_DATA	0	dev->mt76.tx_napi.state	0-u64max[u]
USER_DATA	0	dev->mt76.tx_napi.timer._softexpires	s64min-s64max[u]
USER_DATA	0	dev->mt76.tx_napi.timer.is_hard	0-1[u]
USER_DATA	0	dev->mt76.tx_napi.timer.is_lazy	0-1[u]
USER_DATA	0	dev->mt76.tx_napi.timer.is_queued	0-1[u]
USER_DATA	0	dev->mt76.tx_napi.timer.is_rel	0-1[u]
USER_DATA	0	dev->mt76.tx_napi.timer.is_soft	0-1[u]
USER_DATA	0	dev->mt76.tx_napi.timer.node.expires	s64min-s64max[u]
USER_DATA	0	dev->mt76.tx_napi.timer.node.node.node.__rb_parent_color	0-u64max[u]
USER_DATA	0	dev->mt76.tx_napi.weight	s32min-s32max[u]
USER_DATA	0	dev->mt76.tx_worker.state	0-u64max[u]
USER_DATA	0	dev->mt76.usb.data_len	0-u16max[u]
USER_DATA	0	dev->mt76.usb.mcu.base	0-u32max[u]
USER_DATA	0	dev->mt76.usb.mcu.rp_len	s32min-s32max[u]
USER_DATA	0	dev->mt76.usb.rx_worker.state	0-u64max[u]
USER_DATA	0	dev->mt76.usb.sg_en	0-1[u]
USER_DATA	0	dev->mt76.usb.stat_work.data.counter	s64min-s64max[u]
USER_DATA	0	dev->mt76.usb.status_worker.state	0-u64max[u]
USER_DATA	0	dev->mt76.usb.usb_ctrl_mtx.osq.tail.counter	s32min-s32max[u]
USER_DATA	0	dev->mt76.usb.usb_ctrl_mtx.owner.counter	s64min-s64max[u]
USER_DATA	0	dev->mt76.vif_mask	0-u64max[u]
USER_DATA	0	dev->mt76.wed_token_count	0-u16max[u]
USER_DATA	0	dev->n_iface_combinations	s32min-s32max[u]
USER_DATA	0	dev->phy.ampdu_ref	0-u32max[u]
USER_DATA	0	dev->phy.chip_cap	0-u64max[u]
USER_DATA	0	dev->phy.clc_chan_conf	0-255[u]
USER_DATA	0	dev->phy.coverage_class	s16min-s16max[u]
USER_DATA	0	dev->phy.eml_cap	0-u16max[u]
USER_DATA	0	dev->phy.mib.ack_fail_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.ba_miss_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.cck_mdrdy_time	0-u32max[u]
USER_DATA	0	dev->phy.mib.channel_idle_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.dl_cck_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.dl_he_2mu_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.dl_he_2ru_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.dl_he_3mu_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.dl_he_3ru_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.dl_he_4mu_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.dl_he_4ru_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.dl_he_5to8ru_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.dl_he_9to16ru_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.dl_he_ext_su_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.dl_he_gtr16ru_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.dl_he_su_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.dl_htgf_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.dl_htmix_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.dl_ofdm_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.dl_vht_2mu_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.dl_vht_3mu_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.dl_vht_4mu_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.dl_vht_su_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.fcs_err_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.green_mdrdy_time	0-u32max[u]
USER_DATA	0	dev->phy.mib.ofdm_mdrdy_time	0-u32max[u]
USER_DATA	0	dev->phy.mib.primary_cca_busy_time	0-u32max[u]
USER_DATA	0	dev->phy.mib.primary_energy_detect_time	0-u32max[u]
USER_DATA	0	dev->phy.mib.rts_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.rts_retries_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.rx_ampdu_bytes_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.rx_ampdu_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.rx_ampdu_valid_subframe_bytes_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.rx_ampdu_valid_subframe_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.rx_ba_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.rx_delimiter_fail_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.rx_fifo_full_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.rx_len_mismatch_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.rx_mpdu_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.rx_mrdy_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.rx_pfdrop_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.rx_vec_queue_overflow_drop_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.rx_vector_mismatch_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.secondary_cca_busy_time	0-u32max[u]
USER_DATA	0	dev->phy.mib.tx_ampdu_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.tx_amsdu_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.tx_bf_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.tx_bf_ebf_ppdu_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.tx_bf_fb_cpl_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.tx_bf_fb_trig_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.tx_bf_ibf_ppdu_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.tx_bf_rx_fb_all_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.tx_bf_rx_fb_bw	0-u32max[u]
USER_DATA	0	dev->phy.mib.tx_bf_rx_fb_eht_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.tx_bf_rx_fb_he_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.tx_bf_rx_fb_ht_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.tx_bf_rx_fb_nc_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.tx_bf_rx_fb_nr_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.tx_bf_rx_fb_vht_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.tx_mpdu_attempts_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.tx_mpdu_success_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.tx_mu_acked_mpdu_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.tx_mu_bf_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.tx_mu_mpdu_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.tx_pkt_ebf_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.tx_pkt_ibf_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.tx_rwp_fail_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.tx_rwp_need_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.tx_stop_q_empty_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.tx_su_acked_mpdu_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.ul_hetrig_2mu_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.ul_hetrig_2ru_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.ul_hetrig_3mu_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.ul_hetrig_3ru_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.ul_hetrig_4mu_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.ul_hetrig_4ru_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.ul_hetrig_5to8ru_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.ul_hetrig_9to16ru_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.ul_hetrig_gtr16ru_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.ul_hetrig_su_cnt	0-u32max[u]
USER_DATA	0	dev->phy.noise	0-u16max[u]
USER_DATA	0	dev->phy.omac_mask	0-u64max[u]
USER_DATA	0	dev->phy.power_type	0-u32max[u]
USER_DATA	0	dev->phy.roc_grant	0-1[u]
USER_DATA	0	dev->phy.roc_timer.expires	0-u64max[u]
USER_DATA	0	dev->phy.roc_timer.flags	0-u32max[u]
USER_DATA	0	dev->phy.roc_token_id	0-255[u]
USER_DATA	0	dev->phy.roc_work.data.counter	s64min-s64max[u]
USER_DATA	0	dev->phy.rx_ampdu_ts	0-u32max[u]
USER_DATA	0	dev->phy.scan_event_list.qlen	0-u32max[u]
USER_DATA	0	dev->phy.scan_work.cpu	s32min-s32max[u]
USER_DATA	0	dev->phy.scan_work.timer.expires	0-u64max[u]
USER_DATA	0	dev->phy.scan_work.timer.flags	0-u32max[u]
USER_DATA	0	dev->phy.scan_work.work.data.counter	s64min-s64max[u]
USER_DATA	0	dev->phy.slottime	0-255[u]
USER_DATA	0	dev->phy.sta_work_count	0-255[u]
USER_DATA	0	dev->pm.ds_enable	0-1[u]
USER_DATA	0	dev->pm.ds_enable_user	0-1[u]
USER_DATA	0	dev->pm.enable	0-1[u]
USER_DATA	0	dev->pm.enable_user	0-1[u]
USER_DATA	0	dev->pm.idle_timeout	0-u64max[u]
USER_DATA	0	dev->pm.last_activity	0-u64max[u]
USER_DATA	0	dev->pm.mutex.osq.tail.counter	s32min-s32max[u]
USER_DATA	0	dev->pm.mutex.owner.counter	s64min-s64max[u]
USER_DATA	0	dev->pm.ps_work.cpu	s32min-s32max[u]
USER_DATA	0	dev->pm.ps_work.timer.expires	0-u64max[u]
USER_DATA	0	dev->pm.ps_work.timer.flags	0-u32max[u]
USER_DATA	0	dev->pm.ps_work.work.data.counter	s64min-s64max[u]
USER_DATA	0	dev->pm.stats.awake_time	0-u64max[u]
USER_DATA	0	dev->pm.stats.doze_time	0-u64max[u]
USER_DATA	0	dev->pm.stats.last_doze_event	0-u64max[u]
USER_DATA	0	dev->pm.stats.last_wake_event	0-u64max[u]
USER_DATA	0	dev->pm.stats.lp_wake	0-u32max[u]
USER_DATA	0	dev->pm.suspended	0-1[u]
USER_DATA	0	dev->pm.wake.count	0-u32max[u]
USER_DATA	0	dev->pm.wake_work.data.counter	s64min-s64max[u]
USER_DATA	0	dev->regd_change	0-1[u]
USER_DATA	0	dev->regd_in_progress	0-1[u]
USER_DATA	0	dev->regd_user	0-1[u]
USER_DATA	0	dev->reset_work.data.counter	s64min-s64max[u]
USER_DATA	0	dev->skip_wpdma_reinit	0-1[u]
USER_DATA	0	dev->usb_reset_pending.counter	s32min-s32max[u]
USER_DATA	0	dev->usb_reset_work.data.counter	s64min-s64max[u]
UNITS	0	dev	unit_byte
USER_PTR	0	dev
HALF_LOCKED2	0	&dev->mt76.mutex

drivers/net/wireless/mediatek/mt76/mt7925/mcu.c mt7925_mcu_set_beacon_filter() -> mt7925_mcu_set_rxfilter()

Type	Parameter	Key	Value
PARAM_VALUE	0	dev	4096-ptr_max
PARAM_VALUE	0	dev->mt76.mcu.mutex.first_waiter	0,4096-ptr_max
PARAM_VALUE	0	dev->mt76.mcu.mutex.first_waiter->task->blocked_lock.dep_map->name	0-255
PARAM_VALUE	0	dev->mt76.mcu.mutex.osq.tail.counter	0-s32max
PARAM_VALUE	0	dev->mt76.mcu_ops	4096-ptr_max
PARAM_VALUE	1	fif	0
PARAM_VALUE	2	bit_op	2
PARAM_VALUE	3	bit_map	2048
BUF_SIZE	0	dev	s32min-(-1),1-s32max
BUF_SIZE	0	dev	s32min-(-1),1-s32max
DATA_SOURCE	0	dev	$0
RX_PATH
TASK_NOT_RUNNING
USER_DATA	0	dev->aspm_supported	0-1[u]
USER_DATA	0	dev->backup_l1	0-u32max[u]
USER_DATA	0	dev->backup_l2	0-u32max[u]
USER_DATA	0	dev->coredump.last_activity	0-u64max[u]
USER_DATA	0	dev->coredump.msg_list.qlen	0-u32max[u]
USER_DATA	0	dev->coredump.work.cpu	s32min-s32max[u]
USER_DATA	0	dev->coredump.work.timer.expires	0-u64max[u]
USER_DATA	0	dev->coredump.work.timer.flags	0-u32max[u]
USER_DATA	0	dev->coredump.work.work.data.counter	s64min-s64max[u]
USER_DATA	0	dev->country_ie_env	0-u32max[u]
USER_DATA	0	dev->fw_assert	0-1[u]
USER_DATA	0	dev->fw_debug	0-255[u]
USER_DATA	0	dev->fw_features	0-255[u]
USER_DATA	0	dev->has_eht	0-1[u]
USER_DATA	0	dev->hif_idle	0-1[u]
USER_DATA	0	dev->hif_resumed	0-1[u]
USER_DATA	0	dev->hw_full_reset	0-1[u]
USER_DATA	0	dev->hw_init_done	0-1[u]
USER_DATA	0	dev->init_work.data.counter	s64min-s64max[u]
USER_DATA	0	dev->ipv6_ns_list.qlen	0-u32max[u]
USER_DATA	0	dev->ipv6_ns_work.data.counter	s64min-s64max[u]
USER_DATA	0	dev->mlo_pm_work.cpu	s32min-s32max[u]
USER_DATA	0	dev->mlo_pm_work.timer.expires	0-u64max[u]
USER_DATA	0	dev->mlo_pm_work.timer.flags	0-u32max[u]
USER_DATA	0	dev->mlo_pm_work.work.data.counter	s64min-s64max[u]
USER_DATA	0	dev->mphy.antenna_mask	0-255[u]
USER_DATA	0	dev->mphy.band_idx	0-255[u]
USER_DATA	0	dev->mphy.cap.has_2ghz	0-1[u]
USER_DATA	0	dev->mphy.cap.has_5ghz	0-1[u]
USER_DATA	0	dev->mphy.cap.has_6ghz	0-1[u]
USER_DATA	0	dev->mphy.chainmask	0-u16max[u]
USER_DATA	0	dev->mphy.chandef.center_freq1	0-u32max[u]
USER_DATA	0	dev->mphy.chandef.center_freq2	0-u32max[u]
USER_DATA	0	dev->mphy.chandef.edmg.bw_config	0-u32max[u]
USER_DATA	0	dev->mphy.chandef.edmg.channels	0-255[u]
USER_DATA	0	dev->mphy.chandef.freq1_offset	0-u16max[u]
USER_DATA	0	dev->mphy.chandef.npca_punctured	0-u16max[u]
USER_DATA	0	dev->mphy.chandef.punctured	0-u16max[u]
USER_DATA	0	dev->mphy.chandef.s1g_primary_2mhz	0-1[u]
USER_DATA	0	dev->mphy.chandef.width	0-u32max[u]
USER_DATA	0	dev->mphy.dfs_state	0-u32max[u]
USER_DATA	0	dev->mphy.leds.al	0-1[u]
USER_DATA	0	dev->mphy.leds.cdev.activated	0-1[u]
USER_DATA	0	dev->mphy.leds.cdev.blink_brightness	s32min-s32max[u]
USER_DATA	0	dev->mphy.leds.cdev.blink_delay_off	0-u64max[u]
USER_DATA	0	dev->mphy.leds.cdev.blink_delay_on	0-u64max[u]
USER_DATA	0	dev->mphy.leds.cdev.blink_timer.expires	0-u64max[u]
USER_DATA	0	dev->mphy.leds.cdev.blink_timer.flags	0-u32max[u]
USER_DATA	0	dev->mphy.leds.cdev.brightness	0-u32max[u]
USER_DATA	0	dev->mphy.leds.cdev.brightness_hw_changed	s32min-s32max[u]
USER_DATA	0	dev->mphy.leds.cdev.color	0-u32max[u]
USER_DATA	0	dev->mphy.leds.cdev.delayed_delay_off	0-u64max[u]
USER_DATA	0	dev->mphy.leds.cdev.delayed_delay_on	0-u64max[u]
USER_DATA	0	dev->mphy.leds.cdev.delayed_set_value	s32min-s32max[u]
USER_DATA	0	dev->mphy.leds.cdev.flags	s32min-s32max[u]
USER_DATA	0	dev->mphy.leds.cdev.led_access.osq.tail.counter	s32min-s32max[u]
USER_DATA	0	dev->mphy.leds.cdev.led_access.owner.counter	s64min-s64max[u]
USER_DATA	0	dev->mphy.leds.cdev.max_brightness	0-u32max[u]
USER_DATA	0	dev->mphy.leds.cdev.new_blink_brightness	s32min-s32max[u]
USER_DATA	0	dev->mphy.leds.cdev.set_brightness_work.data.counter	s64min-s64max[u]
USER_DATA	0	dev->mphy.leds.cdev.trigger_lock.count.counter	s64min-s64max[u]
USER_DATA	0	dev->mphy.leds.cdev.trigger_lock.osq.tail.counter	s32min-s32max[u]
USER_DATA	0	dev->mphy.leds.cdev.trigger_lock.owner.counter	s64min-s64max[u]
USER_DATA	0	dev->mphy.leds.cdev.work_flags	0-u64max[u]
USER_DATA	0	dev->mphy.leds.pin	0-255[u]
USER_DATA	0	dev->mphy.mac_work.cpu	s32min-s32max[u]
USER_DATA	0	dev->mphy.mac_work.timer.expires	0-u64max[u]
USER_DATA	0	dev->mphy.mac_work.timer.flags	0-u32max[u]
USER_DATA	0	dev->mphy.mac_work.work.data.counter	s64min-s64max[u]
USER_DATA	0	dev->mphy.mac_work_count	0-255[u]
USER_DATA	0	dev->mphy.main_chandef.center_freq1	0-u32max[u]
USER_DATA	0	dev->mphy.main_chandef.center_freq2	0-u32max[u]
USER_DATA	0	dev->mphy.main_chandef.edmg.bw_config	0-u32max[u]
USER_DATA	0	dev->mphy.main_chandef.edmg.channels	0-255[u]
USER_DATA	0	dev->mphy.main_chandef.freq1_offset	0-u16max[u]
USER_DATA	0	dev->mphy.main_chandef.npca_punctured	0-u16max[u]
USER_DATA	0	dev->mphy.main_chandef.punctured	0-u16max[u]
USER_DATA	0	dev->mphy.main_chandef.s1g_primary_2mhz	0-1[u]
USER_DATA	0	dev->mphy.main_chandef.width	0-u32max[u]
USER_DATA	0	dev->mphy.mgmt_tx_pending.counter	s32min-s32max[u]
USER_DATA	0	dev->mphy.no_active_monitor	0-1[u]
USER_DATA	0	dev->mphy.num_sta	0-u32max[u]
USER_DATA	0	dev->mphy.offchannel	0-1[u]
USER_DATA	0	dev->mphy.radar_enabled	0-1[u]
USER_DATA	0	dev->mphy.roc_work.cpu	s32min-s32max[u]
USER_DATA	0	dev->mphy.roc_work.timer.expires	0-u64max[u]
USER_DATA	0	dev->mphy.roc_work.timer.flags	0-u32max[u]
USER_DATA	0	dev->mphy.roc_work.work.data.counter	s64min-s64max[u]
USER_DATA	0	dev->mphy.sband_2g.sband.band	0-u32max[u]
USER_DATA	0	dev->mphy.sband_2g.sband.edmg_cap.bw_config	0-u32max[u]
USER_DATA	0	dev->mphy.sband_2g.sband.edmg_cap.channels	0-255[u]
USER_DATA	0	dev->mphy.sband_2g.sband.ht_cap.ampdu_density	0-255[u]
USER_DATA	0	dev->mphy.sband_2g.sband.ht_cap.ampdu_factor	0-255[u]
USER_DATA	0	dev->mphy.sband_2g.sband.ht_cap.cap	0-u16max[u]
USER_DATA	0	dev->mphy.sband_2g.sband.ht_cap.ht_supported	0-1[u]
USER_DATA	0	dev->mphy.sband_2g.sband.ht_cap.mcs.rx_highest	0-u16max[u]
USER_DATA	0	dev->mphy.sband_2g.sband.ht_cap.mcs.tx_params	0-255[u]
USER_DATA	0	dev->mphy.sband_2g.sband.n_bitrates	s32min-s32max[u]
USER_DATA	0	dev->mphy.sband_2g.sband.n_channels	s32min-s32max[u]
USER_DATA	0	dev->mphy.sband_2g.sband.n_iftype_data	0-u16max[u]
USER_DATA	0	dev->mphy.sband_2g.sband.s1g_cap.s1g	0-1[u]
USER_DATA	0	dev->mphy.sband_2g.sband.vht_cap.cap	0-u32max[u]
USER_DATA	0	dev->mphy.sband_2g.sband.vht_cap.vht_mcs.rx_highest	0-u16max[u]
USER_DATA	0	dev->mphy.sband_2g.sband.vht_cap.vht_mcs.rx_mcs_map	0-u16max[u]
USER_DATA	0	dev->mphy.sband_2g.sband.vht_cap.vht_mcs.tx_highest	0-u16max[u]
USER_DATA	0	dev->mphy.sband_2g.sband.vht_cap.vht_mcs.tx_mcs_map	0-u16max[u]
USER_DATA	0	dev->mphy.sband_2g.sband.vht_cap.vht_supported	0-1[u]
USER_DATA	0	dev->mphy.sband_5g.sband.band	0-u32max[u]
USER_DATA	0	dev->mphy.sband_5g.sband.edmg_cap.bw_config	0-u32max[u]
USER_DATA	0	dev->mphy.sband_5g.sband.edmg_cap.channels	0-255[u]
USER_DATA	0	dev->mphy.sband_5g.sband.ht_cap.ampdu_density	0-255[u]
USER_DATA	0	dev->mphy.sband_5g.sband.ht_cap.ampdu_factor	0-255[u]
USER_DATA	0	dev->mphy.sband_5g.sband.ht_cap.cap	0-u16max[u]
USER_DATA	0	dev->mphy.sband_5g.sband.ht_cap.ht_supported	0-1[u]
USER_DATA	0	dev->mphy.sband_5g.sband.ht_cap.mcs.rx_highest	0-u16max[u]
USER_DATA	0	dev->mphy.sband_5g.sband.ht_cap.mcs.tx_params	0-255[u]
USER_DATA	0	dev->mphy.sband_5g.sband.n_bitrates	s32min-s32max[u]
USER_DATA	0	dev->mphy.sband_5g.sband.n_channels	s32min-s32max[u]
USER_DATA	0	dev->mphy.sband_5g.sband.n_iftype_data	0-u16max[u]
USER_DATA	0	dev->mphy.sband_5g.sband.s1g_cap.s1g	0-1[u]
USER_DATA	0	dev->mphy.sband_5g.sband.vht_cap.cap	0-u32max[u]
USER_DATA	0	dev->mphy.sband_5g.sband.vht_cap.vht_mcs.rx_highest	0-u16max[u]
USER_DATA	0	dev->mphy.sband_5g.sband.vht_cap.vht_mcs.rx_mcs_map	0-u16max[u]
USER_DATA	0	dev->mphy.sband_5g.sband.vht_cap.vht_mcs.tx_highest	0-u16max[u]
USER_DATA	0	dev->mphy.sband_5g.sband.vht_cap.vht_mcs.tx_mcs_map	0-u16max[u]
USER_DATA	0	dev->mphy.sband_5g.sband.vht_cap.vht_supported	0-1[u]
USER_DATA	0	dev->mphy.sband_6g.sband.band	0-u32max[u]
USER_DATA	0	dev->mphy.sband_6g.sband.edmg_cap.bw_config	0-u32max[u]
USER_DATA	0	dev->mphy.sband_6g.sband.edmg_cap.channels	0-255[u]
USER_DATA	0	dev->mphy.sband_6g.sband.ht_cap.ampdu_density	0-255[u]
USER_DATA	0	dev->mphy.sband_6g.sband.ht_cap.ampdu_factor	0-255[u]
USER_DATA	0	dev->mphy.sband_6g.sband.ht_cap.cap	0-u16max[u]
USER_DATA	0	dev->mphy.sband_6g.sband.ht_cap.ht_supported	0-1[u]
USER_DATA	0	dev->mphy.sband_6g.sband.ht_cap.mcs.rx_highest	0-u16max[u]
USER_DATA	0	dev->mphy.sband_6g.sband.ht_cap.mcs.tx_params	0-255[u]
USER_DATA	0	dev->mphy.sband_6g.sband.n_bitrates	s32min-s32max[u]
USER_DATA	0	dev->mphy.sband_6g.sband.n_channels	s32min-s32max[u]
USER_DATA	0	dev->mphy.sband_6g.sband.n_iftype_data	0-u16max[u]
USER_DATA	0	dev->mphy.sband_6g.sband.s1g_cap.s1g	0-1[u]
USER_DATA	0	dev->mphy.sband_6g.sband.vht_cap.cap	0-u32max[u]
USER_DATA	0	dev->mphy.sband_6g.sband.vht_cap.vht_mcs.rx_highest	0-u16max[u]
USER_DATA	0	dev->mphy.sband_6g.sband.vht_cap.vht_mcs.rx_mcs_map	0-u16max[u]
USER_DATA	0	dev->mphy.sband_6g.sband.vht_cap.vht_mcs.tx_highest	0-u16max[u]
USER_DATA	0	dev->mphy.sband_6g.sband.vht_cap.vht_mcs.tx_mcs_map	0-u16max[u]
USER_DATA	0	dev->mphy.sband_6g.sband.vht_cap.vht_supported	0-1[u]
USER_DATA	0	dev->mphy.state	0-u64max[u]
USER_DATA	0	dev->mphy.survey_time	s64min-s64max[u]
USER_DATA	0	dev->mphy.test.freq_offset	0-u32max[u]
USER_DATA	0	dev->mphy.test.state	0-u32max[u]
USER_DATA	0	dev->mphy.test.tx_antenna_mask	0-255[u]
USER_DATA	0	dev->mphy.test.tx_count	0-u32max[u]
USER_DATA	0	dev->mphy.test.tx_done	0-u32max[u]
USER_DATA	0	dev->mphy.test.tx_duty_cycle	0-255[u]
USER_DATA	0	dev->mphy.test.tx_ipg	0-u32max[u]
USER_DATA	0	dev->mphy.test.tx_ltf	0-255[u]
USER_DATA	0	dev->mphy.test.tx_mpdu_len	0-u16max[u]
USER_DATA	0	dev->mphy.test.tx_pending	0-u32max[u]
USER_DATA	0	dev->mphy.test.tx_power_control	0-255[u]
USER_DATA	0	dev->mphy.test.tx_queued	0-u32max[u]
USER_DATA	0	dev->mphy.test.tx_queued_limit	0-u16max[u]
USER_DATA	0	dev->mphy.test.tx_rate_idx	0-255[u]
USER_DATA	0	dev->mphy.test.tx_rate_ldpc	0-255[u]
USER_DATA	0	dev->mphy.test.tx_rate_mode	0-255[u]
USER_DATA	0	dev->mphy.test.tx_rate_nss	0-255[u]
USER_DATA	0	dev->mphy.test.tx_rate_sgi	0-255[u]
USER_DATA	0	dev->mphy.test.tx_rate_stbc	0-255[u]
USER_DATA	0	dev->mphy.test.tx_spe_idx	0-255[u]
USER_DATA	0	dev->mphy.test.tx_time	0-u32max[u]
USER_DATA	0	dev->mphy.txpower_cur	s32min-s32max[u]
USER_DATA	0	dev->mt76.beacon_int	s32min-s32max[u]
USER_DATA	0	dev->mt76.beacon_mask	0-255[u]
USER_DATA	0	dev->mt76.bus_hung.counter	s32min-s32max[u]
USER_DATA	0	dev->mt76.csa_complete	0-255[u]
USER_DATA	0	dev->mt76.cur_cc_bss_rx	0-u32max[u]
USER_DATA	0	dev->mt76.debugfs_reg	0-u32max[u]
USER_DATA	0	dev->mt76.eeprom.size	0-u64max[u]
USER_DATA	0	dev->mt76.global_wcid.ampdu_state	0-u64max[u]
USER_DATA	0	dev->mt76.global_wcid.amsdu	0-1[u]
USER_DATA	0	dev->mt76.global_wcid.cipher	0-u16max[u]
USER_DATA	0	dev->mt76.global_wcid.flags	0-u64max[u]
USER_DATA	0	dev->mt76.global_wcid.hw_key_idx	0-255[u]
USER_DATA	0	dev->mt76.global_wcid.hw_key_idx2	0-255[u]
USER_DATA	0	dev->mt76.global_wcid.idx	0-u16max[u]
USER_DATA	0	dev->mt76.global_wcid.inactive_count	s32min-s32max[u]
USER_DATA	0	dev->mt76.global_wcid.link_id	0-15[u]
USER_DATA	0	dev->mt76.global_wcid.link_valid	0-1[u]
USER_DATA	0	dev->mt76.global_wcid.non_aql_packets.counter	s32min-s32max[u]
USER_DATA	0	dev->mt76.global_wcid.offchannel	0-1[u]
USER_DATA	0	dev->mt76.global_wcid.phy_idx	0-3[u]
USER_DATA	0	dev->mt76.global_wcid.pktid.idr_base	0-u32max[u]
USER_DATA	0	dev->mt76.global_wcid.pktid.idr_next	0-u32max[u]
USER_DATA	0	dev->mt76.global_wcid.pktid.idr_rt.xa_flags	0-u32max[u]
USER_DATA	0	dev->mt76.global_wcid.rate.bw	0-255[u]
USER_DATA	0	dev->mt76.global_wcid.rate.eht_gi	0-255[u]
USER_DATA	0	dev->mt76.global_wcid.rate.eht_ru_alloc	0-255[u]
USER_DATA	0	dev->mt76.global_wcid.rate.flags	0-u16max[u]
USER_DATA	0	dev->mt76.global_wcid.rate.he_dcm	0-255[u]
USER_DATA	0	dev->mt76.global_wcid.rate.he_gi	0-255[u]
USER_DATA	0	dev->mt76.global_wcid.rate.he_ru_alloc	0-255[u]
USER_DATA	0	dev->mt76.global_wcid.rate.legacy	0-u16max[u]
USER_DATA	0	dev->mt76.global_wcid.rate.mcs	0-255[u]
USER_DATA	0	dev->mt76.global_wcid.rate.n_bonded_ch	0-255[u]
USER_DATA	0	dev->mt76.global_wcid.rate.nss	0-255[u]
USER_DATA	0	dev->mt76.global_wcid.rssi.internal	0-u64max[u]
USER_DATA	0	dev->mt76.global_wcid.rx_check_pn	0-255[u]
USER_DATA	0	dev->mt76.global_wcid.sta	0-1[u]
USER_DATA	0	dev->mt76.global_wcid.sta_disabled	0-1[u]
USER_DATA	0	dev->mt76.global_wcid.stats.rx_bytes	0-u64max[u]
USER_DATA	0	dev->mt76.global_wcid.stats.rx_drops	0-u32max[u]
USER_DATA	0	dev->mt76.global_wcid.stats.rx_errors	0-u32max[u]
USER_DATA	0	dev->mt76.global_wcid.stats.rx_packets	0-u32max[u]
USER_DATA	0	dev->mt76.global_wcid.stats.tx_bytes	0-u64max[u]
USER_DATA	0	dev->mt76.global_wcid.stats.tx_failed	0-u32max[u]
USER_DATA	0	dev->mt76.global_wcid.stats.tx_packets	0-u32max[u]
USER_DATA	0	dev->mt76.global_wcid.stats.tx_retries	0-u32max[u]
USER_DATA	0	dev->mt76.global_wcid.sw_iv	0-1[u]
USER_DATA	0	dev->mt76.global_wcid.tx_info	0-u32max[u]
USER_DATA	0	dev->mt76.global_wcid.tx_offchannel.qlen	0-u32max[u]
USER_DATA	0	dev->mt76.global_wcid.tx_pending.qlen	0-u32max[u]
USER_DATA	0	dev->mt76.hwrro_mode	0-u32max[u]
USER_DATA	0	dev->mt76.irq_tasklet.count.counter	s32min-s32max[u]
USER_DATA	0	dev->mt76.irq_tasklet.data	0-u64max[u]
USER_DATA	0	dev->mt76.irq_tasklet.state	0-u64max[u]
USER_DATA	0	dev->mt76.irq_tasklet.use_callback	0-1[u]
USER_DATA	0	dev->mt76.mcu.mutex.owner.counter	s64min-s64max[u]
USER_DATA	0	dev->mt76.mcu.res_q.qlen	0-u32max[u]
USER_DATA	0	dev->mt76.mcu.timeout	s32min-s32max[u]
USER_DATA	0	dev->mt76.mmio.irqmask	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.npu_type	s32min-s32max[u]
USER_DATA	0	dev->mt76.mmio.phy_addr	0-u64max[u]
USER_DATA	0	dev->mt76.mmio.wed.hw_rro.desc_phys	0-u64max[u]
USER_DATA	0	dev->mt76.mmio.wed.hw_rro.size	s32min-s32max[u]
USER_DATA	0	dev->mt76.mmio.wed.ind_cmd_ring.desc_phys	0-u64max[u]
USER_DATA	0	dev->mt76.mmio.wed.ind_cmd_ring.desc_size	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed.ind_cmd_ring.flags	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed.ind_cmd_ring.reg_base	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed.ind_cmd_ring.size	s32min-s32max[u]
USER_DATA	0	dev->mt76.mmio.wed.init_done	0-1[u]
USER_DATA	0	dev->mt76.mmio.wed.irq	s32min-s32max[u]
USER_DATA	0	dev->mt76.mmio.wed.rev_id	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed.rro.fdbk_phys	0-u64max[u]
USER_DATA	0	dev->mt76.mmio.wed.rro.miod_phys	0-u64max[u]
USER_DATA	0	dev->mt76.mmio.wed.rro.ring.desc_phys	0-u64max[u]
USER_DATA	0	dev->mt76.mmio.wed.rro.ring.desc_size	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed.rro.ring.flags	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed.rro.ring.reg_base	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed.rro.ring.size	s32min-s32max[u]
USER_DATA	0	dev->mt76.mmio.wed.running	0-1[u]
USER_DATA	0	dev->mt76.mmio.wed.rx_buf_ring.desc_phys	0-u64max[u]
USER_DATA	0	dev->mt76.mmio.wed.rx_buf_ring.size	s32min-s32max[u]
USER_DATA	0	dev->mt76.mmio.wed.tx_buf_ring.desc_phys	0-u64max[u]
USER_DATA	0	dev->mt76.mmio.wed.tx_buf_ring.size	s32min-s32max[u]
USER_DATA	0	dev->mt76.mmio.wed.txfree_ring.desc_phys	0-u64max[u]
USER_DATA	0	dev->mt76.mmio.wed.txfree_ring.desc_size	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed.txfree_ring.flags	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed.txfree_ring.reg_base	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed.txfree_ring.size	s32min-s32max[u]
USER_DATA	0	dev->mt76.mmio.wed.version	0-255[u]
USER_DATA	0	dev->mt76.mmio.wed.wdma_idx	s32min-s32max[u]
USER_DATA	0	dev->mt76.mmio.wed.wlan.amsdu_max_len	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed.wlan.amsdu_max_subframes	0-255[u]
USER_DATA	0	dev->mt76.mmio.wed.wlan.bus_type	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed.wlan.hif2	0-1[u]
USER_DATA	0	dev->mt76.mmio.wed.wlan.hw_rro	0-1[u]
USER_DATA	0	dev->mt76.mmio.wed.wlan.id	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed.wlan.ind_cmd.ack_sn_addr	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed.wlan.ind_cmd.particular_se_phys	0-u64max[u]
USER_DATA	0	dev->mt76.mmio.wed.wlan.ind_cmd.particular_sid	0-u16max[u]
USER_DATA	0	dev->mt76.mmio.wed.wlan.ind_cmd.se_group_nums	0-255[u]
USER_DATA	0	dev->mt76.mmio.wed.wlan.ind_cmd.win_size	0-u16max[u]
USER_DATA	0	dev->mt76.mmio.wed.wlan.msi	0-1[u]
USER_DATA	0	dev->mt76.mmio.wed.wlan.nbuf	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed.wlan.phy_base	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed.wlan.rx_nbuf	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed.wlan.rx_npkt	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed.wlan.rx_size	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed.wlan.token_start	0-u16max[u]
USER_DATA	0	dev->mt76.mmio.wed.wlan.txfree_tbit	0-255[u]
USER_DATA	0	dev->mt76.mmio.wed.wlan.wcid_512	0-1[u]
USER_DATA	0	dev->mt76.mmio.wed.wlan.wpdma_int	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed.wlan.wpdma_mask	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed.wlan.wpdma_phys	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed.wlan.wpdma_rx_glo	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed.wlan.wpdma_rx_pg	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed.wlan.wpdma_tx	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed.wlan.wpdma_txfree	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.hw_rro.desc_phys	0-u64max[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.hw_rro.size	s32min-s32max[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.ind_cmd_ring.desc_phys	0-u64max[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.ind_cmd_ring.desc_size	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.ind_cmd_ring.flags	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.ind_cmd_ring.reg_base	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.ind_cmd_ring.size	s32min-s32max[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.init_done	0-1[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.irq	s32min-s32max[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.rev_id	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.rro.fdbk_phys	0-u64max[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.rro.miod_phys	0-u64max[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.rro.ring.desc_phys	0-u64max[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.rro.ring.desc_size	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.rro.ring.flags	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.rro.ring.reg_base	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.rro.ring.size	s32min-s32max[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.running	0-1[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.rx_buf_ring.desc_phys	0-u64max[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.rx_buf_ring.size	s32min-s32max[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.tx_buf_ring.desc_phys	0-u64max[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.tx_buf_ring.size	s32min-s32max[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.txfree_ring.desc_phys	0-u64max[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.txfree_ring.desc_size	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.txfree_ring.flags	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.txfree_ring.reg_base	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.txfree_ring.size	s32min-s32max[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.version	0-255[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.wdma_idx	s32min-s32max[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.wlan.amsdu_max_len	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.wlan.amsdu_max_subframes	0-255[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.wlan.bus_type	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.wlan.hif2	0-1[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.wlan.hw_rro	0-1[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.wlan.id	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.wlan.ind_cmd.ack_sn_addr	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.wlan.ind_cmd.particular_se_phys	0-u64max[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.wlan.ind_cmd.particular_sid	0-u16max[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.wlan.ind_cmd.se_group_nums	0-255[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.wlan.ind_cmd.win_size	0-u16max[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.wlan.msi	0-1[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.wlan.nbuf	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.wlan.phy_base	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.wlan.rx_nbuf	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.wlan.rx_npkt	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.wlan.rx_size	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.wlan.token_start	0-u16max[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.wlan.txfree_tbit	0-255[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.wlan.wcid_512	0-1[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.wlan.wpdma_int	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.wlan.wpdma_mask	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.wlan.wpdma_phys	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.wlan.wpdma_rx_glo	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.wlan.wpdma_rx_pg	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.wlan.wpdma_tx	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed_hif2.wlan.wpdma_txfree	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed_reset.done	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed_reset.wait.lock.magic	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed_reset.wait.lock.owner_cpu	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed_reset.wait.lock.raw_lock.locked	0-255[u]
USER_DATA	0	dev->mt76.mmio.wed_reset.wait.lock.raw_lock.locked_pending	0-u16max[u]
USER_DATA	0	dev->mt76.mmio.wed_reset.wait.lock.raw_lock.pending	0-255[u]
USER_DATA	0	dev->mt76.mmio.wed_reset.wait.lock.raw_lock.tail	0-u16max[u]
USER_DATA	0	dev->mt76.mmio.wed_reset.wait.lock.raw_lock.val.counter	s32min-s32max[u]
USER_DATA	0	dev->mt76.mmio.wed_reset_complete.done	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed_reset_complete.wait.lock.magic	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed_reset_complete.wait.lock.owner_cpu	0-u32max[u]
USER_DATA	0	dev->mt76.mmio.wed_reset_complete.wait.lock.raw_lock.locked	0-255[u]
USER_DATA	0	dev->mt76.mmio.wed_reset_complete.wait.lock.raw_lock.locked_pending	0-u16max[u]
USER_DATA	0	dev->mt76.mmio.wed_reset_complete.wait.lock.raw_lock.pending	0-255[u]
USER_DATA	0	dev->mt76.mmio.wed_reset_complete.wait.lock.raw_lock.tail	0-u16max[u]
USER_DATA	0	dev->mt76.mmio.wed_reset_complete.wait.lock.raw_lock.val.counter	s32min-s32max[u]
USER_DATA	0	dev->mt76.mutex.osq.tail.counter	s32min-s32max[u]
USER_DATA	0	dev->mt76.mutex.owner.counter	s64min-s64max[u]
USER_DATA	0	dev->mt76.otp.size	0-u64max[u]
USER_DATA	0	dev->mt76.phy.antenna_mask	0-255[u]
USER_DATA	0	dev->mt76.phy.band_idx	0-255[u]
USER_DATA	0	dev->mt76.phy.cap.has_2ghz	0-1[u]
USER_DATA	0	dev->mt76.phy.cap.has_5ghz	0-1[u]
USER_DATA	0	dev->mt76.phy.cap.has_6ghz	0-1[u]
USER_DATA	0	dev->mt76.phy.chainmask	0-u16max[u]
USER_DATA	0	dev->mt76.phy.chandef.center_freq1	0-u32max[u]
USER_DATA	0	dev->mt76.phy.chandef.center_freq2	0-u32max[u]
USER_DATA	0	dev->mt76.phy.chandef.edmg.bw_config	0-u32max[u]
USER_DATA	0	dev->mt76.phy.chandef.edmg.channels	0-255[u]
USER_DATA	0	dev->mt76.phy.chandef.freq1_offset	0-u16max[u]
USER_DATA	0	dev->mt76.phy.chandef.npca_punctured	0-u16max[u]
USER_DATA	0	dev->mt76.phy.chandef.punctured	0-u16max[u]
USER_DATA	0	dev->mt76.phy.chandef.s1g_primary_2mhz	0-1[u]
USER_DATA	0	dev->mt76.phy.chandef.width	0-u32max[u]
USER_DATA	0	dev->mt76.phy.dfs_state	0-u32max[u]
USER_DATA	0	dev->mt76.phy.leds.al	0-1[u]
USER_DATA	0	dev->mt76.phy.leds.cdev.activated	0-1[u]
USER_DATA	0	dev->mt76.phy.leds.cdev.blink_brightness	s32min-s32max[u]
USER_DATA	0	dev->mt76.phy.leds.cdev.blink_delay_off	0-u64max[u]
USER_DATA	0	dev->mt76.phy.leds.cdev.blink_delay_on	0-u64max[u]
USER_DATA	0	dev->mt76.phy.leds.cdev.blink_timer.expires	0-u64max[u]
USER_DATA	0	dev->mt76.phy.leds.cdev.blink_timer.flags	0-u32max[u]
USER_DATA	0	dev->mt76.phy.leds.cdev.brightness	0-u32max[u]
USER_DATA	0	dev->mt76.phy.leds.cdev.brightness_hw_changed	s32min-s32max[u]
USER_DATA	0	dev->mt76.phy.leds.cdev.color	0-u32max[u]
USER_DATA	0	dev->mt76.phy.leds.cdev.delayed_delay_off	0-u64max[u]
USER_DATA	0	dev->mt76.phy.leds.cdev.delayed_delay_on	0-u64max[u]
USER_DATA	0	dev->mt76.phy.leds.cdev.delayed_set_value	s32min-s32max[u]
USER_DATA	0	dev->mt76.phy.leds.cdev.flags	s32min-s32max[u]
USER_DATA	0	dev->mt76.phy.leds.cdev.led_access.osq.tail.counter	s32min-s32max[u]
USER_DATA	0	dev->mt76.phy.leds.cdev.led_access.owner.counter	s64min-s64max[u]
USER_DATA	0	dev->mt76.phy.leds.cdev.max_brightness	0-u32max[u]
USER_DATA	0	dev->mt76.phy.leds.cdev.new_blink_brightness	s32min-s32max[u]
USER_DATA	0	dev->mt76.phy.leds.cdev.set_brightness_work.data.counter	s64min-s64max[u]
USER_DATA	0	dev->mt76.phy.leds.cdev.trigger_lock.count.counter	s64min-s64max[u]
USER_DATA	0	dev->mt76.phy.leds.cdev.trigger_lock.osq.tail.counter	s32min-s32max[u]
USER_DATA	0	dev->mt76.phy.leds.cdev.trigger_lock.owner.counter	s64min-s64max[u]
USER_DATA	0	dev->mt76.phy.leds.cdev.work_flags	0-u64max[u]
USER_DATA	0	dev->mt76.phy.leds.pin	0-255[u]
USER_DATA	0	dev->mt76.phy.mac_work.cpu	s32min-s32max[u]
USER_DATA	0	dev->mt76.phy.mac_work.timer.expires	0-u64max[u]
USER_DATA	0	dev->mt76.phy.mac_work.timer.flags	0-u32max[u]
USER_DATA	0	dev->mt76.phy.mac_work.work.data.counter	s64min-s64max[u]
USER_DATA	0	dev->mt76.phy.mac_work_count	0-255[u]
USER_DATA	0	dev->mt76.phy.main_chandef.center_freq1	0-u32max[u]
USER_DATA	0	dev->mt76.phy.main_chandef.center_freq2	0-u32max[u]
USER_DATA	0	dev->mt76.phy.main_chandef.edmg.bw_config	0-u32max[u]
USER_DATA	0	dev->mt76.phy.main_chandef.edmg.channels	0-255[u]
USER_DATA	0	dev->mt76.phy.main_chandef.freq1_offset	0-u16max[u]
USER_DATA	0	dev->mt76.phy.main_chandef.npca_punctured	0-u16max[u]
USER_DATA	0	dev->mt76.phy.main_chandef.punctured	0-u16max[u]
USER_DATA	0	dev->mt76.phy.main_chandef.s1g_primary_2mhz	0-1[u]
USER_DATA	0	dev->mt76.phy.main_chandef.width	0-u32max[u]
USER_DATA	0	dev->mt76.phy.mgmt_tx_pending.counter	s32min-s32max[u]
USER_DATA	0	dev->mt76.phy.no_active_monitor	0-1[u]
USER_DATA	0	dev->mt76.phy.num_sta	0-u32max[u]
USER_DATA	0	dev->mt76.phy.offchannel	0-1[u]
USER_DATA	0	dev->mt76.phy.radar_enabled	0-1[u]
USER_DATA	0	dev->mt76.phy.roc_work.cpu	s32min-s32max[u]
USER_DATA	0	dev->mt76.phy.roc_work.timer.expires	0-u64max[u]
USER_DATA	0	dev->mt76.phy.roc_work.timer.flags	0-u32max[u]
USER_DATA	0	dev->mt76.phy.roc_work.work.data.counter	s64min-s64max[u]
USER_DATA	0	dev->mt76.phy.sband_2g.sband.band	0-u32max[u]
USER_DATA	0	dev->mt76.phy.sband_2g.sband.edmg_cap.bw_config	0-u32max[u]
USER_DATA	0	dev->mt76.phy.sband_2g.sband.edmg_cap.channels	0-255[u]
USER_DATA	0	dev->mt76.phy.sband_2g.sband.ht_cap.ampdu_density	0-255[u]
USER_DATA	0	dev->mt76.phy.sband_2g.sband.ht_cap.ampdu_factor	0-255[u]
USER_DATA	0	dev->mt76.phy.sband_2g.sband.ht_cap.cap	0-u16max[u]
USER_DATA	0	dev->mt76.phy.sband_2g.sband.ht_cap.ht_supported	0-1[u]
USER_DATA	0	dev->mt76.phy.sband_2g.sband.ht_cap.mcs.rx_highest	0-u16max[u]
USER_DATA	0	dev->mt76.phy.sband_2g.sband.ht_cap.mcs.tx_params	0-255[u]
USER_DATA	0	dev->mt76.phy.sband_2g.sband.n_bitrates	s32min-s32max[u]
USER_DATA	0	dev->mt76.phy.sband_2g.sband.n_channels	s32min-s32max[u]
USER_DATA	0	dev->mt76.phy.sband_2g.sband.n_iftype_data	0-u16max[u]
USER_DATA	0	dev->mt76.phy.sband_2g.sband.s1g_cap.s1g	0-1[u]
USER_DATA	0	dev->mt76.phy.sband_2g.sband.vht_cap.cap	0-u32max[u]
USER_DATA	0	dev->mt76.phy.sband_2g.sband.vht_cap.vht_mcs.rx_highest	0-u16max[u]
USER_DATA	0	dev->mt76.phy.sband_2g.sband.vht_cap.vht_mcs.rx_mcs_map	0-u16max[u]
USER_DATA	0	dev->mt76.phy.sband_2g.sband.vht_cap.vht_mcs.tx_highest	0-u16max[u]
USER_DATA	0	dev->mt76.phy.sband_2g.sband.vht_cap.vht_mcs.tx_mcs_map	0-u16max[u]
USER_DATA	0	dev->mt76.phy.sband_2g.sband.vht_cap.vht_supported	0-1[u]
USER_DATA	0	dev->mt76.phy.sband_5g.sband.band	0-u32max[u]
USER_DATA	0	dev->mt76.phy.sband_5g.sband.edmg_cap.bw_config	0-u32max[u]
USER_DATA	0	dev->mt76.phy.sband_5g.sband.edmg_cap.channels	0-255[u]
USER_DATA	0	dev->mt76.phy.sband_5g.sband.ht_cap.ampdu_density	0-255[u]
USER_DATA	0	dev->mt76.phy.sband_5g.sband.ht_cap.ampdu_factor	0-255[u]
USER_DATA	0	dev->mt76.phy.sband_5g.sband.ht_cap.cap	0-u16max[u]
USER_DATA	0	dev->mt76.phy.sband_5g.sband.ht_cap.ht_supported	0-1[u]
USER_DATA	0	dev->mt76.phy.sband_5g.sband.ht_cap.mcs.rx_highest	0-u16max[u]
USER_DATA	0	dev->mt76.phy.sband_5g.sband.ht_cap.mcs.tx_params	0-255[u]
USER_DATA	0	dev->mt76.phy.sband_5g.sband.n_bitrates	s32min-s32max[u]
USER_DATA	0	dev->mt76.phy.sband_5g.sband.n_channels	s32min-s32max[u]
USER_DATA	0	dev->mt76.phy.sband_5g.sband.n_iftype_data	0-u16max[u]
USER_DATA	0	dev->mt76.phy.sband_5g.sband.s1g_cap.s1g	0-1[u]
USER_DATA	0	dev->mt76.phy.sband_5g.sband.vht_cap.cap	0-u32max[u]
USER_DATA	0	dev->mt76.phy.sband_5g.sband.vht_cap.vht_mcs.rx_highest	0-u16max[u]
USER_DATA	0	dev->mt76.phy.sband_5g.sband.vht_cap.vht_mcs.rx_mcs_map	0-u16max[u]
USER_DATA	0	dev->mt76.phy.sband_5g.sband.vht_cap.vht_mcs.tx_highest	0-u16max[u]
USER_DATA	0	dev->mt76.phy.sband_5g.sband.vht_cap.vht_mcs.tx_mcs_map	0-u16max[u]
USER_DATA	0	dev->mt76.phy.sband_5g.sband.vht_cap.vht_supported	0-1[u]
USER_DATA	0	dev->mt76.phy.sband_6g.sband.band	0-u32max[u]
USER_DATA	0	dev->mt76.phy.sband_6g.sband.edmg_cap.bw_config	0-u32max[u]
USER_DATA	0	dev->mt76.phy.sband_6g.sband.edmg_cap.channels	0-255[u]
USER_DATA	0	dev->mt76.phy.sband_6g.sband.ht_cap.ampdu_density	0-255[u]
USER_DATA	0	dev->mt76.phy.sband_6g.sband.ht_cap.ampdu_factor	0-255[u]
USER_DATA	0	dev->mt76.phy.sband_6g.sband.ht_cap.cap	0-u16max[u]
USER_DATA	0	dev->mt76.phy.sband_6g.sband.ht_cap.ht_supported	0-1[u]
USER_DATA	0	dev->mt76.phy.sband_6g.sband.ht_cap.mcs.rx_highest	0-u16max[u]
USER_DATA	0	dev->mt76.phy.sband_6g.sband.ht_cap.mcs.tx_params	0-255[u]
USER_DATA	0	dev->mt76.phy.sband_6g.sband.n_bitrates	s32min-s32max[u]
USER_DATA	0	dev->mt76.phy.sband_6g.sband.n_channels	s32min-s32max[u]
USER_DATA	0	dev->mt76.phy.sband_6g.sband.n_iftype_data	0-u16max[u]
USER_DATA	0	dev->mt76.phy.sband_6g.sband.s1g_cap.s1g	0-1[u]
USER_DATA	0	dev->mt76.phy.sband_6g.sband.vht_cap.cap	0-u32max[u]
USER_DATA	0	dev->mt76.phy.sband_6g.sband.vht_cap.vht_mcs.rx_highest	0-u16max[u]
USER_DATA	0	dev->mt76.phy.sband_6g.sband.vht_cap.vht_mcs.rx_mcs_map	0-u16max[u]
USER_DATA	0	dev->mt76.phy.sband_6g.sband.vht_cap.vht_mcs.tx_highest	0-u16max[u]
USER_DATA	0	dev->mt76.phy.sband_6g.sband.vht_cap.vht_mcs.tx_mcs_map	0-u16max[u]
USER_DATA	0	dev->mt76.phy.sband_6g.sband.vht_cap.vht_supported	0-1[u]
USER_DATA	0	dev->mt76.phy.state	0-u64max[u]
USER_DATA	0	dev->mt76.phy.survey_time	s64min-s64max[u]
USER_DATA	0	dev->mt76.phy.test.freq_offset	0-u32max[u]
USER_DATA	0	dev->mt76.phy.test.state	0-u32max[u]
USER_DATA	0	dev->mt76.phy.test.tx_antenna_mask	0-255[u]
USER_DATA	0	dev->mt76.phy.test.tx_count	0-u32max[u]
USER_DATA	0	dev->mt76.phy.test.tx_done	0-u32max[u]
USER_DATA	0	dev->mt76.phy.test.tx_duty_cycle	0-255[u]
USER_DATA	0	dev->mt76.phy.test.tx_ipg	0-u32max[u]
USER_DATA	0	dev->mt76.phy.test.tx_ltf	0-255[u]
USER_DATA	0	dev->mt76.phy.test.tx_mpdu_len	0-u16max[u]
USER_DATA	0	dev->mt76.phy.test.tx_pending	0-u32max[u]
USER_DATA	0	dev->mt76.phy.test.tx_power_control	0-255[u]
USER_DATA	0	dev->mt76.phy.test.tx_queued	0-u32max[u]
USER_DATA	0	dev->mt76.phy.test.tx_queued_limit	0-u16max[u]
USER_DATA	0	dev->mt76.phy.test.tx_rate_idx	0-255[u]
USER_DATA	0	dev->mt76.phy.test.tx_rate_ldpc	0-255[u]
USER_DATA	0	dev->mt76.phy.test.tx_rate_mode	0-255[u]
USER_DATA	0	dev->mt76.phy.test.tx_rate_nss	0-255[u]
USER_DATA	0	dev->mt76.phy.test.tx_rate_sgi	0-255[u]
USER_DATA	0	dev->mt76.phy.test.tx_rate_stbc	0-255[u]
USER_DATA	0	dev->mt76.phy.test.tx_spe_idx	0-255[u]
USER_DATA	0	dev->mt76.phy.test.tx_time	0-u32max[u]
USER_DATA	0	dev->mt76.phy.txpower_cur	s32min-s32max[u]
USER_DATA	0	dev->mt76.pre_tbtt_tasklet.count.counter	s32min-s32max[u]
USER_DATA	0	dev->mt76.pre_tbtt_tasklet.data	0-u64max[u]
USER_DATA	0	dev->mt76.pre_tbtt_tasklet.state	0-u64max[u]
USER_DATA	0	dev->mt76.pre_tbtt_tasklet.use_callback	0-1[u]
USER_DATA	0	dev->mt76.region	0-u32max[u]
USER_DATA	0	dev->mt76.rev	0-u32max[u]
USER_DATA	0	dev->mt76.rnr.bssid_num	0-255[u]
USER_DATA	0	dev->mt76.rnr.seq_num	0-255[u]
USER_DATA	0	dev->mt76.rnr.sreq_flag	0-u32max[u]
USER_DATA	0	dev->mt76.rx_ampdu_len	0-u32max[u]
USER_DATA	0	dev->mt76.rx_ampdu_ref	0-u32max[u]
USER_DATA	0	dev->mt76.rx_ampdu_status.aggr	0-1[u]
USER_DATA	0	dev->mt76.rx_ampdu_status.ampdu_ref	0-u32max[u]
USER_DATA	0	dev->mt76.rx_ampdu_status.amsdu	0-1[u]
USER_DATA	0	dev->mt76.rx_ampdu_status.band	0-7[u]
USER_DATA	0	dev->mt76.rx_ampdu_status.bw	0-15[u]
USER_DATA	0	dev->mt76.rx_ampdu_status.chains	0-255[u]
USER_DATA	0	dev->mt76.rx_ampdu_status.eht.gi	0-3[u]
USER_DATA	0	dev->mt76.rx_ampdu_status.eht.ru	0-15[u]
USER_DATA	0	dev->mt76.rx_ampdu_status.enc_flags	0-255[u]
USER_DATA	0	dev->mt76.rx_ampdu_status.encoding	0-7[u]
USER_DATA	0	dev->mt76.rx_ampdu_status.first_amsdu	0-1[u]
USER_DATA	0	dev->mt76.rx_ampdu_status.flag	0-u32max[u]
USER_DATA	0	dev->mt76.rx_ampdu_status.freq	0-u16max[u]
USER_DATA	0	dev->mt76.rx_ampdu_status.he_dcm	0-1[u]
USER_DATA	0	dev->mt76.rx_ampdu_status.he_gi	0-3[u]
USER_DATA	0	dev->mt76.rx_ampdu_status.he_ru	0-7[u]
USER_DATA	0	dev->mt76.rx_ampdu_status.last_amsdu	0-1[u]
USER_DATA	0	dev->mt76.rx_ampdu_status.nss	0-31[u]
USER_DATA	0	dev->mt76.rx_ampdu_status.phy_idx	0-3[u]
USER_DATA	0	dev->mt76.rx_ampdu_status.qos_ctl	0-255[u]
USER_DATA	0	dev->mt76.rx_ampdu_status.rate_idx	0-255[u]
USER_DATA	0	dev->mt76.rx_ampdu_status.reorder_time	0-u32max[u]
USER_DATA	0	dev->mt76.rx_ampdu_status.seqno	0-u16max[u]
USER_DATA	0	dev->mt76.rx_ampdu_status.signal	(-128)-127[u]
USER_DATA	0	dev->mt76.rx_ampdu_status.timestamp	0-u32max[u]
USER_DATA	0	dev->mt76.rx_ampdu_status.wcid_idx	0-u16max[u]
USER_DATA	0	dev->mt76.rx_token.idr_base	0-u32max[u]
USER_DATA	0	dev->mt76.rx_token.idr_next	0-u32max[u]
USER_DATA	0	dev->mt76.rx_token.idr_rt.xa_flags	0-u32max[u]
USER_DATA	0	dev->mt76.rx_token_size	0-u16max[u]
USER_DATA	0	dev->mt76.rxfilter	0-u32max[u]
USER_DATA	0	dev->mt76.scan.beacon_received	0-1[u]
USER_DATA	0	dev->mt76.scan.beacon_wait	0-1[u]
USER_DATA	0	dev->mt76.scan.chan_idx	s32min-s32max[u]
USER_DATA	0	dev->mt76.scan_work.cpu	s32min-s32max[u]
USER_DATA	0	dev->mt76.scan_work.timer.expires	0-u64max[u]
USER_DATA	0	dev->mt76.scan_work.timer.flags	0-u32max[u]
USER_DATA	0	dev->mt76.scan_work.work.data.counter	s64min-s64max[u]
USER_DATA	0	dev->mt76.sdio.hw_ver	0-255[u]
USER_DATA	0	dev->mt76.sdio.net_worker.state	0-u64max[u]
USER_DATA	0	dev->mt76.sdio.pse_mcu_quota_max	s32min-s32max[u]
USER_DATA	0	dev->mt76.sdio.sched.deficit	s32min-s32max[u]
USER_DATA	0	dev->mt76.sdio.sched.ple_data_quota	s32min-s32max[u]
USER_DATA	0	dev->mt76.sdio.sched.pse_data_quota	s32min-s32max[u]
USER_DATA	0	dev->mt76.sdio.sched.pse_mcu_quota	s32min-s32max[u]
USER_DATA	0	dev->mt76.sdio.sched.pse_page_size	s32min-s32max[u]
USER_DATA	0	dev->mt76.sdio.stat_worker.state	0-u64max[u]
USER_DATA	0	dev->mt76.sdio.status_worker.state	0-u64max[u]
USER_DATA	0	dev->mt76.sdio.txrx_worker.state	0-u64max[u]
USER_DATA	0	dev->mt76.sdio.xmit_buf_sz	0-u32max[u]
USER_DATA	0	dev->mt76.test_mtd.offset	0-u32max[u]
USER_DATA	0	dev->mt76.token.idr_base	0-u32max[u]
USER_DATA	0	dev->mt76.token.idr_next	0-u32max[u]
USER_DATA	0	dev->mt76.token.idr_rt.xa_flags	0-u32max[u]
USER_DATA	0	dev->mt76.token_count	0-u16max[u]
USER_DATA	0	dev->mt76.token_size	0-u16max[u]
USER_DATA	0	dev->mt76.token_start	0-u16max[u]
USER_DATA	0	dev->mt76.tx_napi.defer_hard_irqs	0-u32max[u]
USER_DATA	0	dev->mt76.tx_napi.defer_hard_irqs_count	0-u32max[u]
USER_DATA	0	dev->mt76.tx_napi.gro.bitmask	0-u64max[u]
USER_DATA	0	dev->mt76.tx_napi.gro.cached_napi_id	0-u32max[u]
USER_DATA	0	dev->mt76.tx_napi.gro.rx_count	0-u32max[u]
USER_DATA	0	dev->mt76.tx_napi.gro_flush_timeout	0-u64max[u]
USER_DATA	0	dev->mt76.tx_napi.index	s32min-s32max[u]
USER_DATA	0	dev->mt76.tx_napi.irq	s32min-s32max[u]
USER_DATA	0	dev->mt76.tx_napi.irq_suspend_timeout	0-u64max[u]
USER_DATA	0	dev->mt76.tx_napi.list_owner	s32min-s32max[u]
USER_DATA	0	dev->mt76.tx_napi.napi_id	0-u32max[u]
USER_DATA	0	dev->mt76.tx_napi.napi_rmap_idx	s32min-s32max[u]
USER_DATA	0	dev->mt76.tx_napi.notify.irq	0-u32max[u]
USER_DATA	0	dev->mt76.tx_napi.notify.kref.refcount.refs.counter	s32min-s32max[u]
USER_DATA	0	dev->mt76.tx_napi.notify.work.data.counter	s64min-s64max[u]
USER_DATA	0	dev->mt76.tx_napi.poll_owner	s32min-s32max[u]
USER_DATA	0	dev->mt76.tx_napi.state	0-u64max[u]
USER_DATA	0	dev->mt76.tx_napi.timer._softexpires	s64min-s64max[u]
USER_DATA	0	dev->mt76.tx_napi.timer.is_hard	0-1[u]
USER_DATA	0	dev->mt76.tx_napi.timer.is_lazy	0-1[u]
USER_DATA	0	dev->mt76.tx_napi.timer.is_queued	0-1[u]
USER_DATA	0	dev->mt76.tx_napi.timer.is_rel	0-1[u]
USER_DATA	0	dev->mt76.tx_napi.timer.is_soft	0-1[u]
USER_DATA	0	dev->mt76.tx_napi.timer.node.expires	s64min-s64max[u]
USER_DATA	0	dev->mt76.tx_napi.timer.node.node.node.__rb_parent_color	0-u64max[u]
USER_DATA	0	dev->mt76.tx_napi.weight	s32min-s32max[u]
USER_DATA	0	dev->mt76.tx_worker.state	0-u64max[u]
USER_DATA	0	dev->mt76.usb.data_len	0-u16max[u]
USER_DATA	0	dev->mt76.usb.mcu.base	0-u32max[u]
USER_DATA	0	dev->mt76.usb.mcu.rp_len	s32min-s32max[u]
USER_DATA	0	dev->mt76.usb.rx_worker.state	0-u64max[u]
USER_DATA	0	dev->mt76.usb.sg_en	0-1[u]
USER_DATA	0	dev->mt76.usb.stat_work.data.counter	s64min-s64max[u]
USER_DATA	0	dev->mt76.usb.status_worker.state	0-u64max[u]
USER_DATA	0	dev->mt76.usb.usb_ctrl_mtx.osq.tail.counter	s32min-s32max[u]
USER_DATA	0	dev->mt76.usb.usb_ctrl_mtx.owner.counter	s64min-s64max[u]
USER_DATA	0	dev->mt76.vif_mask	0-u64max[u]
USER_DATA	0	dev->mt76.wed_token_count	0-u16max[u]
USER_DATA	0	dev->n_iface_combinations	s32min-s32max[u]
USER_DATA	0	dev->phy.ampdu_ref	0-u32max[u]
USER_DATA	0	dev->phy.chip_cap	0-u64max[u]
USER_DATA	0	dev->phy.clc_chan_conf	0-255[u]
USER_DATA	0	dev->phy.coverage_class	s16min-s16max[u]
USER_DATA	0	dev->phy.eml_cap	0-u16max[u]
USER_DATA	0	dev->phy.mib.ack_fail_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.ba_miss_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.cck_mdrdy_time	0-u32max[u]
USER_DATA	0	dev->phy.mib.channel_idle_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.dl_cck_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.dl_he_2mu_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.dl_he_2ru_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.dl_he_3mu_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.dl_he_3ru_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.dl_he_4mu_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.dl_he_4ru_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.dl_he_5to8ru_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.dl_he_9to16ru_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.dl_he_ext_su_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.dl_he_gtr16ru_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.dl_he_su_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.dl_htgf_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.dl_htmix_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.dl_ofdm_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.dl_vht_2mu_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.dl_vht_3mu_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.dl_vht_4mu_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.dl_vht_su_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.fcs_err_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.green_mdrdy_time	0-u32max[u]
USER_DATA	0	dev->phy.mib.ofdm_mdrdy_time	0-u32max[u]
USER_DATA	0	dev->phy.mib.primary_cca_busy_time	0-u32max[u]
USER_DATA	0	dev->phy.mib.primary_energy_detect_time	0-u32max[u]
USER_DATA	0	dev->phy.mib.rts_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.rts_retries_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.rx_ampdu_bytes_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.rx_ampdu_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.rx_ampdu_valid_subframe_bytes_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.rx_ampdu_valid_subframe_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.rx_ba_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.rx_delimiter_fail_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.rx_fifo_full_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.rx_len_mismatch_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.rx_mpdu_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.rx_mrdy_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.rx_pfdrop_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.rx_vec_queue_overflow_drop_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.rx_vector_mismatch_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.secondary_cca_busy_time	0-u32max[u]
USER_DATA	0	dev->phy.mib.tx_ampdu_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.tx_amsdu_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.tx_bf_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.tx_bf_ebf_ppdu_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.tx_bf_fb_cpl_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.tx_bf_fb_trig_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.tx_bf_ibf_ppdu_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.tx_bf_rx_fb_all_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.tx_bf_rx_fb_bw	0-u32max[u]
USER_DATA	0	dev->phy.mib.tx_bf_rx_fb_eht_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.tx_bf_rx_fb_he_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.tx_bf_rx_fb_ht_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.tx_bf_rx_fb_nc_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.tx_bf_rx_fb_nr_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.tx_bf_rx_fb_vht_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.tx_mpdu_attempts_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.tx_mpdu_success_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.tx_mu_acked_mpdu_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.tx_mu_bf_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.tx_mu_mpdu_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.tx_pkt_ebf_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.tx_pkt_ibf_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.tx_rwp_fail_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.tx_rwp_need_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.tx_stop_q_empty_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.tx_su_acked_mpdu_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.ul_hetrig_2mu_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.ul_hetrig_2ru_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.ul_hetrig_3mu_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.ul_hetrig_3ru_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.ul_hetrig_4mu_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.ul_hetrig_4ru_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.ul_hetrig_5to8ru_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.ul_hetrig_9to16ru_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.ul_hetrig_gtr16ru_cnt	0-u32max[u]
USER_DATA	0	dev->phy.mib.ul_hetrig_su_cnt	0-u32max[u]
USER_DATA	0	dev->phy.noise	0-u16max[u]
USER_DATA	0	dev->phy.omac_mask	0-u64max[u]
USER_DATA	0	dev->phy.power_type	0-u32max[u]
USER_DATA	0	dev->phy.roc_grant	0-1[u]
USER_DATA	0	dev->phy.roc_timer.expires	0-u64max[u]
USER_DATA	0	dev->phy.roc_timer.flags	0-u32max[u]
USER_DATA	0	dev->phy.roc_token_id	0-255[u]
USER_DATA	0	dev->phy.roc_work.data.counter	s64min-s64max[u]
USER_DATA	0	dev->phy.rx_ampdu_ts	0-u32max[u]
USER_DATA	0	dev->phy.scan_event_list.qlen	0-u32max[u]
USER_DATA	0	dev->phy.scan_work.cpu	s32min-s32max[u]
USER_DATA	0	dev->phy.scan_work.timer.expires	0-u64max[u]
USER_DATA	0	dev->phy.scan_work.timer.flags	0-u32max[u]
USER_DATA	0	dev->phy.scan_work.work.data.counter	s64min-s64max[u]
USER_DATA	0	dev->phy.slottime	0-255[u]
USER_DATA	0	dev->phy.sta_work_count	0-255[u]
USER_DATA	0	dev->pm.ds_enable	0-1[u]
USER_DATA	0	dev->pm.ds_enable_user	0-1[u]
USER_DATA	0	dev->pm.enable	0-1[u]
USER_DATA	0	dev->pm.enable_user	0-1[u]
USER_DATA	0	dev->pm.idle_timeout	0-u64max[u]
USER_DATA	0	dev->pm.last_activity	0-u64max[u]
USER_DATA	0	dev->pm.mutex.osq.tail.counter	s32min-s32max[u]
USER_DATA	0	dev->pm.mutex.owner.counter	s64min-s64max[u]
USER_DATA	0	dev->pm.ps_work.cpu	s32min-s32max[u]
USER_DATA	0	dev->pm.ps_work.timer.expires	0-u64max[u]
USER_DATA	0	dev->pm.ps_work.timer.flags	0-u32max[u]
USER_DATA	0	dev->pm.ps_work.work.data.counter	s64min-s64max[u]
USER_DATA	0	dev->pm.stats.awake_time	0-u64max[u]
USER_DATA	0	dev->pm.stats.doze_time	0-u64max[u]
USER_DATA	0	dev->pm.stats.last_doze_event	0-u64max[u]
USER_DATA	0	dev->pm.stats.last_wake_event	0-u64max[u]
USER_DATA	0	dev->pm.stats.lp_wake	0-u32max[u]
USER_DATA	0	dev->pm.suspended	0-1[u]
USER_DATA	0	dev->pm.wake.count	0-u32max[u]
USER_DATA	0	dev->pm.wake_work.data.counter	s64min-s64max[u]
USER_DATA	0	dev->regd_change	0-1[u]
USER_DATA	0	dev->regd_in_progress	0-1[u]
USER_DATA	0	dev->regd_user	0-1[u]
USER_DATA	0	dev->reset_work.data.counter	s64min-s64max[u]
USER_DATA	0	dev->skip_wpdma_reinit	0-1[u]
USER_DATA	0	dev->usb_reset_pending.counter	s32min-s32max[u]
USER_DATA	0	dev->usb_reset_work.data.counter	s64min-s64max[u]
UNITS	0	dev	unit_byte
USER_PTR	0	dev
HALF_LOCKED2	0	&dev->mt76.mutex

drivers/net/wireless/mediatek/mt76/mt7925/main.c mt7925_configure_filter() -> mt7925_mcu_set_rxfilter()

Type	Parameter	Key	Value
PARAM_VALUE	0	dev	4096-ptr_max
PARAM_VALUE	0	dev->mt76.phy.dev	4096-ptr_max
PARAM_VALUE	0	dev->mt76.phy.dev->bus	4096-ptr_max
PARAM_VALUE	0	dev->pm.ps_work.work.lockdep_map->name	0-255
PARAM_VALUE	1	fif	2147483648,2147483652,2147483680,2147483684,2147483712,2147483716,2147483744,2147483748
PARAM_VALUE	2	bit_op	0
PARAM_VALUE	3	bit_map	0
DATA_SOURCE	0	dev	r mt792x_hw_dev
FUZZY_MAX	1	fif	2147483648
BIT_INFO	1	fif	0x80000000,0x80000064
RX_PATH
TASK_NOT_RUNNING
NOCHECK_CALL
LOCK2	0	&dev->mt76.mutex
TYPE_LOCK		(struct mt76_dev)->mutex