Defined in 1 files as a function:

Referenced in 1 files:

Smatch caller information:

drivers/gpu/drm/i915/display/intel_dp_mst.c mst_stream_compute_link_for_joined_pipes() -> mst_stream_compute_config_limits()

Type Parameter Key Value
PARAM_VALUE 0 intel_dp 4096-ptr_max
PARAM_VALUE 0 intel_dp->force_dsc_en 0
PARAM_VALUE 1 conn_state 4096-ptr_max
PARAM_VALUE 1 conn_state->crtc 4096-ptr_max
PARAM_VALUE 2 crtc_state 4096-ptr_max
PARAM_VALUE 2 crtc_state->dsc.compressed_bpp_x16 0
PARAM_VALUE 2 crtc_state->dsc.compression_enable 0
PARAM_VALUE 2 crtc_state->dsc.config.bits_per_pixel 0
PARAM_VALUE 2 crtc_state->dsc.config.convert_rgb 0
PARAM_VALUE 2 crtc_state->dsc.config.final_offset 0
PARAM_VALUE 2 crtc_state->dsc.config.flatness_max_qp 0
PARAM_VALUE 2 crtc_state->dsc.config.flatness_min_qp 0
PARAM_VALUE 2 crtc_state->dsc.config.initial_offset 0
PARAM_VALUE 2 crtc_state->dsc.config.line_buf_depth 0
PARAM_VALUE 2 crtc_state->dsc.config.mux_word_size 0
PARAM_VALUE 2 crtc_state->dsc.config.native_420 0
PARAM_VALUE 2 crtc_state->dsc.config.native_422 0
PARAM_VALUE 2 crtc_state->dsc.config.nfl_bpg_offset 0
PARAM_VALUE 2 crtc_state->dsc.config.nsl_bpg_offset 0
PARAM_VALUE 2 crtc_state->dsc.config.pic_height 0
PARAM_VALUE 2 crtc_state->dsc.config.pic_width 0
PARAM_VALUE 2 crtc_state->dsc.config.rc_bits 0
PARAM_VALUE 2 crtc_state->dsc.config.rc_edge_factor 0
PARAM_VALUE 2 crtc_state->dsc.config.rc_model_size 0
PARAM_VALUE 2 crtc_state->dsc.config.simple_422 0
PARAM_VALUE 2 crtc_state->dsc.config.slice_count 0
PARAM_VALUE 2 crtc_state->dsc.config.slice_height 0
PARAM_VALUE 2 crtc_state->dsc.config.slice_width 0
PARAM_VALUE 2 crtc_state->dsc.config.vbr_enable 0
PARAM_VALUE 2 crtc_state->fec_enable 0
PARAM_VALUE 2 crtc_state->framestart_delay 1
PARAM_VALUE 2 crtc_state->hw.adjusted_mode.flags 0,4-u32max
PARAM_VALUE 2 crtc_state->output_format 0
PARAM_VALUE 2 crtc_state->pipe_src.x1 0
PARAM_VALUE 2 crtc_state->pipe_src.x2 0-u16max
PARAM_VALUE 2 crtc_state->pipe_src.y1 0
PARAM_VALUE 2 crtc_state->pipe_src.y2 0-u16max
PARAM_VALUE 2 crtc_state->pixel_multiplier 1
PARAM_VALUE 2 crtc_state->sink_format 0
PARAM_VALUE 2 crtc_state->uapi.crtc 4096-ptr_max
PARAM_VALUE 3 dsc 0
PARAM_VALUE 4 limits 260769833007583232
BUF_SIZE 0 intel_dp 6896
CAPPED_DATA 1 conn_state->crtc 1
DATA_SOURCE 0 intel_dp r to_primary_dp
DATA_SOURCE 1 conn_state $2
DATA_SOURCE 2 crtc_state $1
MEM_ZERO 2 &crtc_state->dsc.config
MEM_ZERO 2 &crtc_state->dsc.slice_config
RX_PATH
TASK_NOT_RUNNING

drivers/gpu/drm/i915/display/intel_dp_mst.c mst_stream_compute_link_for_joined_pipes() -> mst_stream_compute_config_limits()

Type Parameter Key Value
PARAM_VALUE 0 intel_dp 4096-ptr_max
PARAM_VALUE 1 conn_state 4096-ptr_max
PARAM_VALUE 1 conn_state->crtc 4096-ptr_max
PARAM_VALUE 2 crtc_state 4096-ptr_max
PARAM_VALUE 2 crtc_state->dsc.compressed_bpp_x16 0
PARAM_VALUE 2 crtc_state->dsc.compression_enable 0
PARAM_VALUE 2 crtc_state->dsc.config.bits_per_pixel 0
PARAM_VALUE 2 crtc_state->dsc.config.convert_rgb 0
PARAM_VALUE 2 crtc_state->dsc.config.final_offset 0
PARAM_VALUE 2 crtc_state->dsc.config.flatness_max_qp 0
PARAM_VALUE 2 crtc_state->dsc.config.flatness_min_qp 0
PARAM_VALUE 2 crtc_state->dsc.config.initial_offset 0
PARAM_VALUE 2 crtc_state->dsc.config.line_buf_depth 0
PARAM_VALUE 2 crtc_state->dsc.config.mux_word_size 0
PARAM_VALUE 2 crtc_state->dsc.config.native_420 0
PARAM_VALUE 2 crtc_state->dsc.config.native_422 0
PARAM_VALUE 2 crtc_state->dsc.config.nfl_bpg_offset 0
PARAM_VALUE 2 crtc_state->dsc.config.nsl_bpg_offset 0
PARAM_VALUE 2 crtc_state->dsc.config.pic_height 0
PARAM_VALUE 2 crtc_state->dsc.config.pic_width 0
PARAM_VALUE 2 crtc_state->dsc.config.rc_bits 0
PARAM_VALUE 2 crtc_state->dsc.config.rc_edge_factor 0
PARAM_VALUE 2 crtc_state->dsc.config.rc_model_size 0
PARAM_VALUE 2 crtc_state->dsc.config.simple_422 0
PARAM_VALUE 2 crtc_state->dsc.config.slice_count 0
PARAM_VALUE 2 crtc_state->dsc.config.slice_height 0
PARAM_VALUE 2 crtc_state->dsc.config.slice_width 0
PARAM_VALUE 2 crtc_state->dsc.config.vbr_enable 0
PARAM_VALUE 2 crtc_state->framestart_delay 1
PARAM_VALUE 2 crtc_state->hw.adjusted_mode.flags 0,4-u32max
PARAM_VALUE 2 crtc_state->output_format 0
PARAM_VALUE 2 crtc_state->pipe_src.x1 0
PARAM_VALUE 2 crtc_state->pipe_src.x2 0-u16max
PARAM_VALUE 2 crtc_state->pipe_src.y1 0
PARAM_VALUE 2 crtc_state->pipe_src.y2 0-u16max
PARAM_VALUE 2 crtc_state->pixel_multiplier 1
PARAM_VALUE 2 crtc_state->sink_format 0
PARAM_VALUE 2 crtc_state->uapi.crtc 4096-ptr_max
PARAM_VALUE 3 dsc 1
PARAM_VALUE 4 limits 260769833007583232
PARAM_VALUE 4 limits->link.max_bpp_x16 0-s32max
PARAM_VALUE 4 limits->pipe.min_bpp 0,3-765
BUF_SIZE 0 intel_dp 6896
CAPPED_DATA 1 conn_state->crtc 1
DATA_SOURCE 0 intel_dp r to_primary_dp
DATA_SOURCE 1 conn_state $2
DATA_SOURCE 2 crtc_state $1
MEM_ZERO 2 &crtc_state->dsc.config
MEM_ZERO 2 &crtc_state->dsc.slice_config
RX_PATH
TASK_NOT_RUNNING