mobiveil_csr_readl identifier - Linux source code next-20260811

Projects

linux

Versions

FIXME
- FIXME
  - next-20260811

Defined in 1 files as a function:

drivers/pci/controller/mobiveil/pcie-mobiveil.h, line 185 (as a function)

Referenced in 3 files:

Smatch caller information:

drivers/pci/controller/mobiveil/pcie-mobiveil-host.c mobiveil_host_init() -> mobiveil_csr_readl()

Type	Parameter	Key	Value
PARAM_VALUE	0	pcie	4096-ptr_max
PARAM_VALUE	0	pcie->csr_axi_slave_base	4096-ptr_max
PARAM_VALUE	0	pcie->ib_wins_configured	0
PARAM_VALUE	0	pcie->ob_wins_configured	0
PARAM_VALUE	0	pcie->pdev	4096-ptr_max
PARAM_VALUE	0	pcie->pdev->dev.devres_head.prev	4096-ptr_max
PARAM_VALUE	0	pcie->pdev->dev.devres_head.prev->next	4096-ptr_max
PARAM_VALUE	0	pcie->pdev->dev.devres_head.prev->next->next	4096-ptr_max
PARAM_VALUE	0	pcie->pdev->num_resources	1-u32max
PARAM_VALUE	0	pcie->rp.bridge	4096-ptr_max
PARAM_VALUE	0	pcie->rp.bridge->dev.devres_head.next	4096-ptr_max
PARAM_VALUE	0	pcie->rp.bridge->dev.devres_head.prev	4096-ptr_max
PARAM_VALUE	0	pcie->rp.bridge->dev.dma_io_tlb_mem	1473117533515866112
PARAM_VALUE	0	pcie->rp.bridge->dev.dma_io_tlb_pools.next	4096-ptr_max
PARAM_VALUE	0	pcie->rp.bridge->dev.dma_io_tlb_pools.prev	4096-ptr_max
PARAM_VALUE	0	pcie->rp.bridge->dev.dma_pools.next	4096-ptr_max
PARAM_VALUE	0	pcie->rp.bridge->dev.dma_pools.prev	4096-ptr_max
PARAM_VALUE	0	pcie->rp.bridge->dev.dma_uses_io_tlb	0
PARAM_VALUE	0	pcie->rp.bridge->dev.kobj.entry.next	4096-ptr_max
PARAM_VALUE	0	pcie->rp.bridge->dev.kobj.entry.prev	4096-ptr_max
PARAM_VALUE	0	pcie->rp.bridge->dev.kobj.kref.refcount.refs.counter	1
PARAM_VALUE	0	pcie->rp.bridge->dev.kobj.kset	0
PARAM_VALUE	0	pcie->rp.bridge->dev.kobj.ktype	5399513539053756416
PARAM_VALUE	0	pcie->rp.bridge->dev.kobj.state_initialized	1
PARAM_VALUE	0	pcie->rp.bridge->dev.links.consumers.next	4096-ptr_max
PARAM_VALUE	0	pcie->rp.bridge->dev.links.consumers.prev	4096-ptr_max
PARAM_VALUE	0	pcie->rp.bridge->dev.links.defer_sync.next	4096-ptr_max
PARAM_VALUE	0	pcie->rp.bridge->dev.links.defer_sync.prev	4096-ptr_max
PARAM_VALUE	0	pcie->rp.bridge->dev.links.status	0
PARAM_VALUE	0	pcie->rp.bridge->dev.links.suppliers.next	4096-ptr_max
PARAM_VALUE	0	pcie->rp.bridge->dev.links.suppliers.prev	4096-ptr_max
PARAM_VALUE	0	pcie->rp.bridge->dev.numa_node	(-1)
PARAM_VALUE	0	pcie->rp.bridge->dev.parent	4096-ptr_max
PARAM_VALUE	0	pcie->rp.bridge->dev.power.disable_depth	1
PARAM_VALUE	0	pcie->rp.bridge->dev.power.early_init	1
PARAM_VALUE	0	pcie->rp.bridge->dev.power.entry.next	4096-ptr_max
PARAM_VALUE	0	pcie->rp.bridge->dev.power.entry.prev	4096-ptr_max
PARAM_VALUE	0	pcie->rp.bridge->dev.power.last_status	(-1)
PARAM_VALUE	0	pcie->rp.bridge->dev.power.qos	0
PARAM_VALUE	0	pcie->rp.bridge->dev.power.request	0
PARAM_VALUE	0	pcie->rp.bridge->dev.power.runtime_auto	1
PARAM_VALUE	0	pcie->rp.bridge->dev.power.runtime_status	2
PARAM_VALUE	0	pcie->rp.bridge->dev.power.wait_queue.head.next	4096-ptr_max
PARAM_VALUE	0	pcie->rp.bridge->dev.power.wait_queue.head.prev	4096-ptr_max
PARAM_VALUE	0	pcie->rp.bridge->dev.type	312978283337510912
PARAM_VALUE	0	pcie->rp.bridge->dma_ranges.next	4096-ptr_max
PARAM_VALUE	0	pcie->rp.bridge->dma_ranges.prev	0,4096-ptr_max
PARAM_VALUE	0	pcie->rp.bridge->domain_nr	(-1)
PARAM_VALUE	0	pcie->rp.bridge->ide_stream_ida.xa.xa_flags	67108869
PARAM_VALUE	0	pcie->rp.bridge->ide_stream_ids_ida.xa.xa_flags	67108869
PARAM_VALUE	0	pcie->rp.bridge->native_aer	1
PARAM_VALUE	0	pcie->rp.bridge->native_cxl_error	1
PARAM_VALUE	0	pcie->rp.bridge->native_dpc	1
PARAM_VALUE	0	pcie->rp.bridge->native_ltr	1
PARAM_VALUE	0	pcie->rp.bridge->native_pcie_hotplug	1
PARAM_VALUE	0	pcie->rp.bridge->native_pme	1
PARAM_VALUE	0	pcie->rp.bridge->native_shpc_hotplug	1
PARAM_VALUE	0	pcie->rp.bridge->nr_ide_streams	256
PARAM_VALUE	0	pcie->rp.bridge->ports.next	4096-ptr_max
PARAM_VALUE	0	pcie->rp.bridge->ports.prev	4096-ptr_max
PARAM_VALUE	0	pcie->rp.bridge->windows.next	4096-ptr_max
PARAM_VALUE	0	pcie->rp.bridge->windows.prev	0,4096-ptr_max
PARAM_VALUE	0	pcie->rp.config_axi_slave_base	4096-ptr_max
PARAM_VALUE	0	pcie->rp.ob_io_res	4096-ptr_max
PARAM_VALUE	0	pcie->rp.ob_io_res->name	1-u64max
PARAM_VALUE	1	off	24
BUF_SIZE	0	pcie	0-1080
BUF_SIZE	0	pcie	0-1080
BUF_SIZE	0	pcie->ops	(-1),8
BUF_SIZE	0	pcie->rp.bridge	1984-3064
BUF_SIZE	0	pcie->rp.ops	(-1),8
CAPPED_DATA	0	pcie->pdev->num_resources	1
DATA_SOURCE	0	pcie	$0
RX_PATH
TASK_NOT_RUNNING

drivers/pci/controller/mobiveil/pcie-mobiveil-host.c mobiveil_host_init() -> mobiveil_csr_readl()

Type	Parameter	Key	Value
PARAM_VALUE	0	pcie	4096-ptr_max
PARAM_VALUE	0	pcie->ib_wins_configured	0
PARAM_VALUE	0	pcie->ob_wins_configured	0
PARAM_VALUE	1	off	4
BUF_SIZE	0	pcie	0-1080
BUF_SIZE	0	pcie	0-1080
BUF_SIZE	0	pcie->ops	(-1),8
BUF_SIZE	0	pcie->rp.bridge	(-1),1984-3064
BUF_SIZE	0	pcie->rp.ops	(-1),8
DATA_SOURCE	0	pcie	$0
RX_PATH
TASK_NOT_RUNNING

drivers/pci/controller/mobiveil/pcie-mobiveil-host.c mobiveil_host_init() -> mobiveil_csr_readl()

Type	Parameter	Key	Value
PARAM_VALUE	0	pcie	4096-ptr_max
PARAM_VALUE	0	pcie->ib_wins_configured	0
PARAM_VALUE	0	pcie->ob_wins_configured	0
PARAM_VALUE	1	off	2056
BUF_SIZE	0	pcie	0-1080
BUF_SIZE	0	pcie	0-1080
BUF_SIZE	0	pcie->ops	(-1),8
BUF_SIZE	0	pcie->rp.bridge	(-1),1984-3064
BUF_SIZE	0	pcie->rp.ops	(-1),8
DATA_SOURCE	0	pcie	$0
RX_PATH
TASK_NOT_RUNNING

drivers/pci/controller/mobiveil/pcie-mobiveil-host.c mobiveil_host_init() -> mobiveil_csr_readl()

Type	Parameter	Key	Value
PARAM_VALUE	0	pcie	4096-ptr_max
PARAM_VALUE	0	pcie->ib_wins_configured	0
PARAM_VALUE	0	pcie->ob_wins_configured	0
PARAM_VALUE	1	off	2112
BUF_SIZE	0	pcie	0-1080
BUF_SIZE	0	pcie	0-1080
BUF_SIZE	0	pcie->ops	(-1),8
BUF_SIZE	0	pcie->rp.bridge	(-1),1984-3064
BUF_SIZE	0	pcie->rp.ops	(-1),8
DATA_SOURCE	0	pcie	$0
RX_PATH
TASK_NOT_RUNNING

drivers/pci/controller/mobiveil/pcie-mobiveil-host.c mobiveil_host_init() -> mobiveil_csr_readl()

Type	Parameter	Key	Value
PARAM_VALUE	0	pcie	4096-ptr_max
PARAM_VALUE	0	pcie->ib_wins_configured	0
PARAM_VALUE	0	pcie->ob_wins_configured	0
PARAM_VALUE	1	off	2240
BUF_SIZE	0	pcie	0-1080
BUF_SIZE	0	pcie	0-1080
BUF_SIZE	0	pcie->ops	(-1),8
BUF_SIZE	0	pcie->rp.bridge	(-1),1984-3064
BUF_SIZE	0	pcie->rp.ops	(-1),8
DATA_SOURCE	0	pcie	$0
RX_PATH
TASK_NOT_RUNNING

drivers/pci/controller/mobiveil/pcie-mobiveil-host.c mobiveil_host_init() -> mobiveil_csr_readl()

Type	Parameter	Key	Value
PARAM_VALUE	0	pcie	4096-ptr_max
PARAM_VALUE	0	pcie->ib_wins_configured	0-1
PARAM_VALUE	0	pcie->rp.ob_io_res	4096-ptr_max
PARAM_VALUE	1	off	1140
BUF_SIZE	0	pcie	0-1080
BUF_SIZE	0	pcie	0-1080
BUF_SIZE	0	pcie->ops	(-1),8
BUF_SIZE	0	pcie->rp.bridge	(-1),1984-3064
BUF_SIZE	0	pcie->rp.ops	(-1),8
CAPPED_DATA	0	pcie->apio_wins	1
DATA_SOURCE	0	pcie	$0
FUZZY_MAX	0	pcie->ib_wins_configured	0
RX_PATH
TASK_NOT_RUNNING

drivers/pci/controller/mobiveil/pcie-mobiveil-host.c mobiveil_mask_intx_irq() -> mobiveil_csr_readl()

Type	Parameter	Key	Value
PARAM_VALUE	0	pcie->rp.intx_mask_lock.dep_map->name	0-255
PARAM_VALUE	0	pcie->rp.intx_mask_lock.owner_cpu	0
PARAM_VALUE	0	pcie->rp.intx_mask_lock.raw_lock.val.counter	0-s32max
PARAM_VALUE	1	off	2828
BUF_SIZE	0	pcie	s32min-(-2),1-s32max
BUF_SIZE	0	pcie	s32min-(-2),1-s32max
PREEMPT_ADD			<- disables preempt
RX_PATH
TASK_NOT_RUNNING
UNITS	0	pcie	unit_byte
LOCK2		&rp->intx_mask_lock
LOCK2		flags
HALF_LOCKED2		&desc->lock
HALF_LOCKED2		_T->flags
TYPE_LOCK		(struct mobiveil_root_port)->intx_mask_lock

drivers/pci/controller/mobiveil/pcie-mobiveil-host.c mobiveil_pcie_isr() -> mobiveil_csr_readl()

Type	Parameter	Key	Value
PARAM_VALUE	0	pcie	4096-ptr_max
PARAM_VALUE	1	off	2844
BUF_SIZE	0	pcie	s32min-(-2),1-s32max
BUF_SIZE	0	pcie	s32min-(-2),1-s32max
RX_PATH
TASK_NOT_RUNNING
UNITS	0	pcie	unit_byte

drivers/pci/controller/mobiveil/pcie-mobiveil-host.c mobiveil_pcie_isr() -> mobiveil_csr_readl()

Type	Parameter	Key	Value
PARAM_VALUE	0	pcie	4096-ptr_max
PARAM_VALUE	1	off	2828
BUF_SIZE	0	pcie	s32min-(-2),1-s32max
BUF_SIZE	0	pcie	s32min-(-2),1-s32max
RX_PATH
TASK_NOT_RUNNING
UNITS	0	pcie	unit_byte

drivers/pci/controller/mobiveil/pcie-mobiveil-host.c mobiveil_pcie_isr() -> mobiveil_csr_readl()

Type	Parameter	Key	Value
PARAM_VALUE	0	pcie	4096-ptr_max
PARAM_VALUE	1	off	2844
BUF_SIZE	0	pcie	s32min-(-2),1-s32max
BUF_SIZE	0	pcie	s32min-(-2),1-s32max
RX_PATH
TASK_NOT_RUNNING
UNITS	0	pcie	unit_byte

drivers/pci/controller/mobiveil/pcie-mobiveil-host.c mobiveil_pcie_isr() -> mobiveil_csr_readl()

Type	Parameter	Key	Value
PARAM_VALUE	0	pcie	4096-ptr_max
PARAM_VALUE	1	off	2844
BUF_SIZE	0	pcie	s32min-(-2),1-s32max
BUF_SIZE	0	pcie	s32min-(-2),1-s32max
RX_PATH
TASK_NOT_RUNNING
UNITS	0	pcie	unit_byte

drivers/pci/controller/mobiveil/pcie-mobiveil-host.c mobiveil_unmask_intx_irq() -> mobiveil_csr_readl()

Type	Parameter	Key	Value
PARAM_VALUE	0	pcie->rp.intx_mask_lock.dep_map->name	0-255
PARAM_VALUE	0	pcie->rp.intx_mask_lock.owner_cpu	0
PARAM_VALUE	0	pcie->rp.intx_mask_lock.raw_lock.val.counter	0-s32max
PARAM_VALUE	1	off	2828
BUF_SIZE	0	pcie	s32min-(-2),1-s32max
BUF_SIZE	0	pcie	s32min-(-2),1-s32max
PREEMPT_ADD			<- disables preempt
RX_PATH
TASK_NOT_RUNNING
UNITS	0	pcie	unit_byte
LOCK2		&rp->intx_mask_lock
LOCK2		flags
HALF_LOCKED2		&desc->lock
HALF_LOCKED2		_T->flags
TYPE_LOCK		(struct mobiveil_root_port)->intx_mask_lock

drivers/pci/controller/mobiveil/pcie-mobiveil.c mobiveil_pcie_link_up() -> mobiveil_csr_readl()

Type	Parameter	Key	Value
PARAM_VALUE	0	pcie	4096-ptr_max
PARAM_VALUE	0	pcie->csr_axi_slave_base	4096-ptr_max
PARAM_VALUE	0	pcie->ib_wins_configured	0-1
PARAM_VALUE	0	pcie->ob_wins_configured	0-15
PARAM_VALUE	0	pcie->ops	4096-ptr_max
PARAM_VALUE	0	pcie->pdev	4096-ptr_max
PARAM_VALUE	0	pcie->pdev->dev.devres_head.prev	4096-ptr_max
PARAM_VALUE	0	pcie->pdev->dev.devres_head.prev->next	4096-ptr_max
PARAM_VALUE	0	pcie->pdev->dev.devres_head.prev->next->next	4096-ptr_max
PARAM_VALUE	0	pcie->pdev->dev.driver_data->irq	1-s32max
PARAM_VALUE	0	pcie->pdev->num_resources	1-u32max
PARAM_VALUE	0	pcie->rp.bridge	4096-ptr_max
PARAM_VALUE	0	pcie->rp.bridge->align_resource	0
PARAM_VALUE	0	pcie->rp.bridge->broken_l1ss_resume	0
PARAM_VALUE	0	pcie->rp.bridge->bus	0
PARAM_VALUE	0	pcie->rp.bridge->busnr	0
PARAM_VALUE	0	pcie->rp.bridge->child_ops	0
PARAM_VALUE	0	pcie->rp.bridge->dev.bus	0
PARAM_VALUE	0	pcie->rp.bridge->dev.bus_dma_limit	0
PARAM_VALUE	0	pcie->rp.bridge->dev.class	0
PARAM_VALUE	0	pcie->rp.bridge->dev.cma_area	0
PARAM_VALUE	0	pcie->rp.bridge->dev.devres_head.next	4096-ptr_max
PARAM_VALUE	0	pcie->rp.bridge->dev.devres_head.prev	4096-ptr_max
PARAM_VALUE	0	pcie->rp.bridge->dev.devt	0
PARAM_VALUE	0	pcie->rp.bridge->dev.dma_io_tlb_mem	1473117533515866112
PARAM_VALUE	0	pcie->rp.bridge->dev.dma_io_tlb_pools.next	4096-ptr_max
PARAM_VALUE	0	pcie->rp.bridge->dev.dma_io_tlb_pools.prev	4096-ptr_max
PARAM_VALUE	0	pcie->rp.bridge->dev.dma_mask	0
PARAM_VALUE	0	pcie->rp.bridge->dev.dma_mem	0
PARAM_VALUE	0	pcie->rp.bridge->dev.dma_ops	0
PARAM_VALUE	0	pcie->rp.bridge->dev.dma_parms	0
PARAM_VALUE	0	pcie->rp.bridge->dev.dma_pools.next	4096-ptr_max
PARAM_VALUE	0	pcie->rp.bridge->dev.dma_pools.prev	4096-ptr_max
PARAM_VALUE	0	pcie->rp.bridge->dev.dma_range_map	0
PARAM_VALUE	0	pcie->rp.bridge->dev.dma_uses_io_tlb	0
PARAM_VALUE	0	pcie->rp.bridge->dev.driver	0
PARAM_VALUE	0	pcie->rp.bridge->dev.driver_data	0
PARAM_VALUE	0	pcie->rp.bridge->dev.em_pd	0
PARAM_VALUE	0	pcie->rp.bridge->dev.fwnode	0
PARAM_VALUE	0	pcie->rp.bridge->dev.groups	0
PARAM_VALUE	0	pcie->rp.bridge->dev.id	0
PARAM_VALUE	0	pcie->rp.bridge->dev.init_name	0
PARAM_VALUE	0	pcie->rp.bridge->dev.iommu	0
PARAM_VALUE	0	pcie->rp.bridge->dev.iommu_group	0
PARAM_VALUE	0	pcie->rp.bridge->dev.kobj.entry.next	4096-ptr_max
PARAM_VALUE	0	pcie->rp.bridge->dev.kobj.entry.prev	4096-ptr_max
PARAM_VALUE	0	pcie->rp.bridge->dev.kobj.kref.refcount.refs.counter	1
PARAM_VALUE	0	pcie->rp.bridge->dev.kobj.kset	0
PARAM_VALUE	0	pcie->rp.bridge->dev.kobj.ktype	5399513539053756416
PARAM_VALUE	0	pcie->rp.bridge->dev.kobj.name	0
PARAM_VALUE	0	pcie->rp.bridge->dev.kobj.parent	0
PARAM_VALUE	0	pcie->rp.bridge->dev.kobj.release.cpu	0
PARAM_VALUE	0	pcie->rp.bridge->dev.kobj.release.wq	0
PARAM_VALUE	0	pcie->rp.bridge->dev.kobj.sd	0
PARAM_VALUE	0	pcie->rp.bridge->dev.kobj.state_initialized	1
PARAM_VALUE	0	pcie->rp.bridge->dev.links.consumers.next	4096-ptr_max
PARAM_VALUE	0	pcie->rp.bridge->dev.links.consumers.prev	4096-ptr_max
PARAM_VALUE	0	pcie->rp.bridge->dev.links.defer_sync.next	4096-ptr_max
PARAM_VALUE	0	pcie->rp.bridge->dev.links.defer_sync.prev	4096-ptr_max
PARAM_VALUE	0	pcie->rp.bridge->dev.links.status	0
PARAM_VALUE	0	pcie->rp.bridge->dev.links.suppliers.next	4096-ptr_max
PARAM_VALUE	0	pcie->rp.bridge->dev.links.suppliers.prev	4096-ptr_max
PARAM_VALUE	0	pcie->rp.bridge->dev.msi.data	0
PARAM_VALUE	0	pcie->rp.bridge->dev.msi.domain	0
PARAM_VALUE	0	pcie->rp.bridge->dev.mutex.magic	0
PARAM_VALUE	0	pcie->rp.bridge->dev.numa_node	(-1)
PARAM_VALUE	0	pcie->rp.bridge->dev.of_node	0
PARAM_VALUE	0	pcie->rp.bridge->dev.p	0
PARAM_VALUE	0	pcie->rp.bridge->dev.parent	4096-ptr_max
PARAM_VALUE	0	pcie->rp.bridge->dev.physical_location	0
PARAM_VALUE	0	pcie->rp.bridge->dev.pins	0
PARAM_VALUE	0	pcie->rp.bridge->dev.platform_data	0
PARAM_VALUE	0	pcie->rp.bridge->dev.pm_domain	0
PARAM_VALUE	0	pcie->rp.bridge->dev.power.active_time	0
PARAM_VALUE	0	pcie->rp.bridge->dev.power.can_wakeup	0
PARAM_VALUE	0	pcie->rp.bridge->dev.power.disable_depth	1
PARAM_VALUE	0	pcie->rp.bridge->dev.power.driver_flags	0
PARAM_VALUE	0	pcie->rp.bridge->dev.power.early_init	1
PARAM_VALUE	0	pcie->rp.bridge->dev.power.entry.next	4096-ptr_max
PARAM_VALUE	0	pcie->rp.bridge->dev.power.entry.prev	4096-ptr_max
PARAM_VALUE	0	pcie->rp.bridge->dev.power.in_dpm_list	0
PARAM_VALUE	0	pcie->rp.bridge->dev.power.irq_safe	0
PARAM_VALUE	0	pcie->rp.bridge->dev.power.last_busy	0
PARAM_VALUE	0	pcie->rp.bridge->dev.power.last_status	(-1)
PARAM_VALUE	0	pcie->rp.bridge->dev.power.no_callbacks	0
PARAM_VALUE	0	pcie->rp.bridge->dev.power.no_pm	0
PARAM_VALUE	0	pcie->rp.bridge->dev.power.qos	0
PARAM_VALUE	0	pcie->rp.bridge->dev.power.request	0
PARAM_VALUE	0	pcie->rp.bridge->dev.power.runtime_auto	1
PARAM_VALUE	0	pcie->rp.bridge->dev.power.runtime_status	2
PARAM_VALUE	0	pcie->rp.bridge->dev.power.subsys_data	0
PARAM_VALUE	0	pcie->rp.bridge->dev.power.syscore	0
PARAM_VALUE	0	pcie->rp.bridge->dev.power.wait_queue.head.next	4096-ptr_max
PARAM_VALUE	0	pcie->rp.bridge->dev.power.wait_queue.head.prev	4096-ptr_max
PARAM_VALUE	0	pcie->rp.bridge->dev.power.wakeirq	0
PARAM_VALUE	0	pcie->rp.bridge->dev.release	0
PARAM_VALUE	0	pcie->rp.bridge->dev.removable	0
PARAM_VALUE	0	pcie->rp.bridge->dev.type	312978283337510912
PARAM_VALUE	0	pcie->rp.bridge->disable_device	0
PARAM_VALUE	0	pcie->rp.bridge->dma_ranges.next	4096-ptr_max
PARAM_VALUE	0	pcie->rp.bridge->dma_ranges.prev	0,4096-ptr_max
PARAM_VALUE	0	pcie->rp.bridge->domain_nr	(-1)
PARAM_VALUE	0	pcie->rp.bridge->enable_device	0
PARAM_VALUE	0	pcie->rp.bridge->ide_stream_ida.xa.xa_flags	67108869
PARAM_VALUE	0	pcie->rp.bridge->ide_stream_ids_ida.xa.xa_flags	67108869
PARAM_VALUE	0	pcie->rp.bridge->ignore_reset_delay	0
PARAM_VALUE	0	pcie->rp.bridge->msi_domain	0
PARAM_VALUE	0	pcie->rp.bridge->native_aer	1
PARAM_VALUE	0	pcie->rp.bridge->native_cxl_error	1
PARAM_VALUE	0	pcie->rp.bridge->native_dpc	1
PARAM_VALUE	0	pcie->rp.bridge->native_ltr	1
PARAM_VALUE	0	pcie->rp.bridge->native_pcie_hotplug	1
PARAM_VALUE	0	pcie->rp.bridge->native_pme	1
PARAM_VALUE	0	pcie->rp.bridge->native_shpc_hotplug	1
PARAM_VALUE	0	pcie->rp.bridge->no_ext_tags	0
PARAM_VALUE	0	pcie->rp.bridge->no_inc_mrrs	0
PARAM_VALUE	0	pcie->rp.bridge->nr_ide_streams	256
PARAM_VALUE	0	pcie->rp.bridge->ops	0
PARAM_VALUE	0	pcie->rp.bridge->ports.next	4096-ptr_max
PARAM_VALUE	0	pcie->rp.bridge->ports.prev	4096-ptr_max
PARAM_VALUE	0	pcie->rp.bridge->preserve_config	0
PARAM_VALUE	0	pcie->rp.bridge->release_data	0
PARAM_VALUE	0	pcie->rp.bridge->release_fn	0
PARAM_VALUE	0	pcie->rp.bridge->size_windows	0
PARAM_VALUE	0	pcie->rp.bridge->sysdata	0
PARAM_VALUE	0	pcie->rp.bridge->windows.next	4096-ptr_max
PARAM_VALUE	0	pcie->rp.bridge->windows.prev	0,4096-ptr_max
PARAM_VALUE	0	pcie->rp.config_axi_slave_base	4096-ptr_max
PARAM_VALUE	0	pcie->rp.ob_io_res	4096-ptr_max
PARAM_VALUE	0	pcie->rp.ob_io_res->name	1-u64max
PARAM_VALUE	0	pcie->rp.ops	4096-ptr_max
PARAM_VALUE	0	*pcie->pdev->dev->p->deferred_probe_reason	0-255
PARAM_VALUE	1	off	1028
BUF_SIZE	0	pcie	(-1)-1080
BUF_SIZE	0	pcie	(-1)-1080
BUF_SIZE	0	pcie->ops	(-1),8
BUF_SIZE	0	pcie->rp.bridge	1984-3064
BUF_SIZE	0	pcie->rp.ops	(-1),8
CAPPED_DATA	0	pcie->apio_wins	1
CAPPED_DATA	0	pcie->pdev->num_resources	1
DATA_SOURCE	0	pcie	$0
RX_PATH
TASK_NOT_RUNNING

drivers/pci/controller/mobiveil/pcie-mobiveil.c program_ib_windows() -> mobiveil_csr_readl()

Type	Parameter	Key	Value
PARAM_VALUE	0	pcie	4096-ptr_max
PARAM_VALUE	0	pcie->ib_wins_configured	0
PARAM_VALUE	0	pcie->ob_wins_configured	0-16
PARAM_VALUE	0	pcie->ppio_wins	1-s32max
PARAM_VALUE	0	pcie->rp.ob_io_res	4096-ptr_max
PARAM_VALUE	1	off	19360
BUF_SIZE	0	pcie	(-1)-1080
BUF_SIZE	0	pcie	(-1)-1080
BUF_SIZE	0	pcie->ops	(-1),8
BUF_SIZE	0	pcie->rp.bridge	(-1),1984-3064
BUF_SIZE	0	pcie->rp.ops	(-1),8
CAPPED_DATA	0	pcie->apio_wins	1
DATA_SOURCE	0	pcie	$0
FUZZY_MAX	0	pcie->ob_wins_configured	0
FUZZY_MAX	0	pcie->ppio_wins	1
RX_PATH
TASK_NOT_RUNNING

drivers/pci/controller/mobiveil/pcie-mobiveil.c program_ob_windows() -> mobiveil_csr_readl()

Type	Parameter	Key	Value
PARAM_VALUE	0	pcie	4096-ptr_max
PARAM_VALUE	0	pcie->apio_wins	1-s32max
PARAM_VALUE	0	pcie->ib_wins_configured	0-1
PARAM_VALUE	0	pcie->ob_wins_configured	0-16
PARAM_VALUE	0	pcie->rp.ob_io_res	4096-ptr_max
PARAM_VALUE	1	off	2976-3232
BUF_SIZE	0	pcie	(-1)-1080
BUF_SIZE	0	pcie	(-1)-1080
BUF_SIZE	0	pcie->ops	(-1),8
BUF_SIZE	0	pcie->rp.bridge	(-1),1984-3064
BUF_SIZE	0	pcie->rp.ops	(-1),8
CAPPED_DATA	1	off	1
DATA_SOURCE	0	pcie	$0
RX_PATH
TASK_NOT_RUNNING

drivers/pci/controller/mobiveil/pcie-layerscape-gen4.c ls_g4_pcie_isr() -> mobiveil_csr_readl()

Type	Parameter	Key	Value
PARAM_VALUE	1	off	2844
BUF_SIZE	0	pcie	360
RX_PATH
TASK_NOT_RUNNING
HALF_LOCKED2		&desc->request_mutex
HALF_LOCKED2		flags

drivers/pci/controller/mobiveil/pcie-layerscape-gen4.c ls_g4_pcie_reinit_hw() -> mobiveil_csr_readl()

Type	Parameter	Key	Value
PARAM_VALUE	0	pcie	4096-ptr_max
PARAM_VALUE	1	off	2076
BUF_SIZE	0	pcie	360
HALF_LOCKED2		&pool->lock